FDG315N
N-Channel Logic Level PowerTrench
MOSFET
FDG315N
July 2000
General Description
This N-Channel Logic Level MOSFET is produced using
Fairchild Semiconductor's advanced PowerTrench
process that has been especially tailored to minimize
on-state resistance and yet maintain superior switching
performance.
These devices are well suited for low voltage and
battery powered applications where low in-line power
loss and fast switching are required.
Applications
• DC/DC converter
• Load switch
• Power Management
S
D
D
G
SC70-6
D
D
Features
•
2 A, 30 V. R
R
DS(ON)
DS(ON)
= 0.12 Ω @ V
= 0.16 Ω @ V
= 10 V
GS
= 4.5 V.
GS
• Low gate charge (2.1nC typical).
• High performance trench technology for extremely low
R
DS(ON)
.
• Compact industry standard SC70-6 surface mount
package.
1
2
3
3
6
5
4
Absolute Maximum Ratings
TA = 25°C unless otherwise noted
Symbol Parameter Ratings Units
V
DSS
V
GSS
I
D
P
D
TJ, T
stg
Drain-Source Voltage 30 V
Gate-Source Voltage
Drain Current - Continuous
- Pulsed 6
Power Dissipation for Single Operation
Operating and Storage Junction Temperature Range -55 to +150
(Note 1a)
(Note 1a)
(Note 1b)
±
20
2A
0.75 W
0.48
Thermal Characteristics
θ
R
JA
Thermal Resistance, Junction-to-Ambi ent
(Note 1b)
260
Package Marking and Ordering Information
Device Marking Device Reel Size Tape Width Quantity
15
.
2000 Fairchild Semiconductor International
FDG315N 7’’ 8mm 3000 units
V
°
C
°
C/W
FDG315N Rev. C
FDG315N
Electrical Characteristics T
= 25°C unless otherwise noted
A
Symbol Parameter Test Conditions Min Typ Max Units
Off Characteristics
BV
∆
∆
I
DSS
I
GSS
I
GSS
BV
DSS
T
Drain-Source Breakdown Voltage
Breakdown Voltage Temperature
DSS
Coefficient
J
= 0 V, ID = 250 µA
V
GS
= 250 µA, Referenced to 25°C
I
D
Zero Gate Voltage Drain Current VDS = 24 V, VGS = 0 V 1
Gate-Body Leakage Forward VGS = 16 V, VDS = 0 V 100 nA
Gate-Body Leakage Reverse VGS = -16 V, VDS = 0 V -100 nA
30 V
26
mV/°C
µ
A
On Characteristics (Note 2)
V
∆
∆
R
I
D(on)
G
GS(th)
V
GS(th)
T
DS(on)
FS
Gate Threshold Voltage
Gate Threshold Voltage
Temperature Coefficient
J
Static Drain-Source
On-Resistance
= VGS, ID = 250 µA
V
DS
= 250 µA, Referenced to 25°C
I
D
VGS = 10 V, ID = 2 A
V
= 10 V, ID = 2 A, TJ = 125°C
GS
V
= 4.5 V, ID = 1.7 A
GS
On-State Drain Current VGS = 4.5 V, VDS = 5 V 3 A
Forward Transconductance VDS = 5 V, ID = 2 A 5 S
11.83 V
-4
0.100
0.140
0.130
0.12
0.20
0.16
mV/°C
Ω
Dynamic Characteristics
C
iss
C
oss
C
rss
Input Capacitance 220 pF
Output Capacitance 50 pF
Reverse Transfer Capacitance
V
= 15 V, VGS = 0 V,
DS
f = 1.0 MHz
20 pF
Switching Characteristics (Note 2)
I
d(on)
t
r
t
d(off)
t
f
Q
Q
Q
g
gs
gd
Turn-On Delay Time 3 6 ns
Turn-On Rise Time 11 22 ns
= 15 V, ID = 1 A,
V
DD
V
= 10 V, R
GS
GEN
= 6
Ω
Turn-Off Delay Time 7 14 ns
Turn-Off Fall Time
Total Gate Charge 2.1 4 nC
Gate-Source Charge 0.8 nC
V
= 15 V, ID = 2 A,
DS
= 5 V
V
GS
Gate-Drain Charge
Drain-Source Diode Characteristics and Maximum Ratings
I
S
V
SD
Notes:
1. R
is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface
θJA
of the drain pins. R
a) 170°C/W when mounted on a 1 in2 pad of 2oz copper.
b) 260°C/W when mounted on a minimum pad.
2. Pulse T est: Pulse Width ≤ 300 µs, Duty Cycle ≤ 2.0%
Maximum Continuous Drain-Source Diode Forward Current 0.42 A
Drain-Source Diode Forward
VGS = 0 V, IS = 0.42 A (Note 2) 0.7 1.2 V
Voltage
is guaranteed by design while R
θJC
is determined by the user's board design.
θCA
36ns
0.7 nC
FDG315N Rev. C