Fairchild NDT2955 service manual

April 2002

NDT2955

P-Channel Enhancement Mode Field Effect Transistor

NDT2955

General Description

This 60V P-Channel MOSFET is produc ed using
Fairchild Semiconduc t or’ s high voltage Trench process.
It has been optimized for power m anagement
plications.

Features

• –2.5 A, –60 V. R
R

• High density cell design for extremely low R

= 300mΩ @ VGS = –10 V

DS(ON)

= 500mΩ @ VGS = –4.5 V

DS(ON)

DS(ON)

Applications

• DC/DC converter

• Power management

• High power and current handling capability in a widely

used surface mount pac kage.

D

D

S

SOT-22 3

D

G

SG

D

Absolute Maximum Ratings T

o

=25

C unless otherwise noted

A

D

SOT-223

(J23Z)

S

G

*

D

G

S

Symbol Parameter Ratings Units

V

Drain-Source Voltage –60 V

DSS

V

Gate-Source Voltage

GSS

±20
ID Drain Current – Continuous (Note 1a) –2.5 A
– Pulsed –15
PD

TJ, T

STG

Maximum Power Dissipation (Note 1a) 3.0
(Note 1b)

(Note 1c)

1.3

1.1

Operating and Storage Junction Temperature Range –55 to +150

V

W

°C

Thermal Characteristics

R

θJA

R

θJC

Thermal Resistance, Junction-to-Ambient
Thermal Resistance, Junction-to-Case

(Note 1a) 42

(Note 1) 12

Package Marking and Ordering Information

Device Marking Device Reel Size Tape width Quantity

NDT2955 NDT2955 13’’ 12mm 2500 units

2002 Fairchild Semiconductor Corporation

°C/W

NDT2955 Rev. C

NDT2955

Electrical Characteristics T

= 25°C unless otherwise noted

A

Symbol Parameter Test Conditions Min Typ Max Units
Avalanche Ratings

W

Drain-Source Avalanche Energy Single Pulse, VDD = 30 V, ID = 2.5 A 174 mJ

DSS

Off Characteristics

BV

Drain–Source Breakdown Voltage

DSS

∆BVDSS
∆T

I

Zero Gate Voltage Drain Current VDS = –60 V, VGS = 0 V –10

DSS

I

GSSF

I

GSSR

Breakdown Voltage Temperature
Coefficient

J

Gate–Body Leakage, Forward VGS = –20 V, VDS = 0 V 100 nA

Gate–Body Leakage, Reverse VGS = –20 V, VDS = 0 V –100 nA

= 0 V, ID = –250 µA

V

GS

I

= –250 µA, Referenced to 25°C

D

–60 V

–60

mV/°C

µA

On Characteristics (Note 2)

V

Gate Threshold Voltage

GS(th)

∆VGS(th)
∆TJ

R

DS(on)

Gate Threshold Voltage
Temperature Coefficient

Static Drain–Source

On–Resistance

I

On–State Drain Current VGS = –10 V, VDS = –5 V –12 A

D(on)

= VGS, ID = –250 µA

V

DS

I

= –250 µA, Referenced to 25°C

D

VGS = –10 V, ID = –2.5 A

= –4.5 V, ID = –2 A

V

GS

V

=–10 V, ID =–2.5 A, TJ=125°C

GS

gFS Forward Transconductance VDS = –10 V, ID = –2.5 A 5.5 S

–2 –2.6 –4 V

5.7

95
163
153

300
500
513

mV/°C

mΩ

Dynamic Characteristics

C

Input Capacitance 601 pF

iss

C

Output Capacitance 85 pF

oss

C

Reverse Transfer Capacitance

rss

= –30 V, V

V

DS

f = 1.0 MHz

= 0 V,

GS

35 pF

Switching Characteristics (Note 2)

t

Turn–On Delay Time 12 21 ns

d(on)

tr Turn–On Rise Time 10 20 ns
t

Turn–Off Delay Time 19 34 ns

d(off)

tf Turn–Off Fall Time
Qg Total Gate Charge 11 15 nC
Qgs Gate–Source Charge 2.4 nC
Qgd Gate–Drain Charge

= –30 V, ID = –1 A,

V

DD

= –10 V, R

V

GS

= –30 V, ID = –2.5 A,

V

DS

V

= –10 V

GS

GEN

= 6 Ω

6 12 ns

2.7 nC

Drain–Source Diode Characteristics and Maximum Ratings

IS Maximum Continuous Drain–Source Diode Forward Current –2.5 A
VSD
trr Diode Reverse Recovery Time 25 nS

Qrr Diode Reverse Recovery Charge

Drain–Source Diode Forward
Voltage

VGS = 0 V, IS = –2.5 A (Note 2) –0.8 –1.2 V
I

= –2.5 A,

F

= 100 A/µs

d

iF/dt

40 nC

Notes:

1. R

is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of

θJA

the drain pins. R

2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%

is guaranteed by design while R

θJC

a) 42°C/W when

mounted on a 1in
pad of 2 oz copper

is determined by the user's board design.

θCA

2

b) 95°C/W when

mounted on a .0066

2

in
copper

pad of 2 oz

c) 110°C/W when mounted on a

minimum pad.

NDT2955 Rev. C