Fairchild MM74HC4049, MM74HC4050 service manual
MM74HC4049 • MM74HC4050
Hex Inverting Logic Level Down Converter •
Hex Logic Level Down Converter
MM74HC4049 • MM74HC4050 Hex Inverting Logic Level Down Converter • Hex Logic Level Down Converter
February 1984
Revised October 1999
General Description
The MM74HC4049 and the MM74HC4050 utilize
advanced silicon-gate CMOS technology, and have a modified input protection structu re that enables these parts to
be used as logic level translators which will convert high
level logic to a low level logic while operating from the low
logic supply. For example, 0–15V CMOS logic can be converted to 0–5V logic when usin g a 5V su pply. The modified
input protection has no diode connected to V
ing the input voltage to exceed the supply. The lower zener
diode protects the input fr om both positive and negative
static voltages. In addition each part can be used as a sim-
, thus allow-
CC
ple buffer or inverter without level translation. The
MM74HC4049 is pin and functionally compatible to the
CD4049BC and the MM74HC4050 is compatible to the
CD4050BC
Features
■ Typical propagation delay: 8 ns
■ Wide power supply range: 2V–6V
■ Low quiescent supply current: 20 µA maximum (74HC)
■ Fanout of 10 LS-TTL loads
Ordering Code:
Order Number Package Number Package Description
MM74HC4049M M16A 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150” Narrow
MM74HC4049SJ M16D 16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
MM74HC4049MTC MTC16 16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153. 4.4mm Wide
MM74HC4049N N16E 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide
MM74HC4050M M16A 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150” Narrow
MM74HC4050SJ M16D 16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
MM74HC4050MTC MTC16 16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153. 4.4mm Wide
MM74HC4050N N16E 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide
Devices also availab le in Tape and Reel. Specify by appending th e s uffix let t er “X” to the ordering cod e.
Connection Diagrams
MM74HC4049
© 1999 Fairchild Semiconductor Corporation DS005214 www.fairchildsemi.com
MM74HC4050
Absolute Maximum Ratings(Note 1)
(Note 2)
Supply Voltage (VCC) −0.5 to +7.0V
DC Input Voltage (V
DC Output Voltage (V
Clamp Diode Current (I
DC Output Current, per pin (I
or GND Current, per pin (ICC) ±50 mA
DC V
CC
Storage Temperature Range (T
Power Dissipation (P
(Note 3) 600 mW
S.O. Package only 500 mW
MM74HC4049 • MM74HC4050
Lead Temperature (T
(Soldering 10 seconds) 260°C
) −1.5 to +18V
IN
) −0.5 to V
OUT
, IOK) −20 mA
ZK
) ±25 mA
OUT
) −65°C to +150°C
STG
)
D
)
L
CC
Recommended Operating
Conditions
+0.5V
DC Input Voltage 0 15 V
)
(V
IN
DC Output Voltage 0 V
Supply Voltage (V
)
(V
OUT
Operating Temperature Range (T
Input Rise or Fall Times
, tf) V
(t
r
CC
V
CC
V
Note 1: Absolute Maximum Ratings are those values beyond which damage to the device may occur.
Note 2: Unless otherwise specified all voltages are referenced to ground.
Note 3: Power Dissipation tem perature de rating — pla stic “N” pac kage: −
12 mW/°C from 65 °C to 85°C.
CC
)26V
CC
) −40 +85 °C
A
= 2.0V 1000 ns
= 4.5V 500 ns
= 6.0V 400 ns
Min Max Units
CC
DC Electrical Characteristics (Note 4)
Symbol Parameter Conditions
V
V
V
V
I
I
Minimum HIGH Level Input 2.0V 1.5 1.5 1.5 V
IH
Voltage 4.5V 3.15 3.15 3.15 V
Maximum LOW Level Input 2.0V 0.5 0.5 0.5 V
IL
Voltage 4.5V 1.35 1.35 1.35 V
Minimum HIGH Level V
OH
Output Voltage |I
Maximum LOW Level V
OL
Output Voltage |I
Maximum Input Current V
IN
Maximum Quiescent Supply V
CC
Current I
Note 4: For a power supply of 5V ±10% the wor st case output vo ltages (VOH and VOL) occur for HC at 4.5 V. Thus the 4.5V values sho uld be u sed w hen
designing with this supply. Worst case V
, ICC, IOZ) occur for CMOS at the higher voltage and so the 6. 0V values should be used.
rent (I
IN
= VIH or V
IN
OUT
V
IN
|I
OUT
|I
OUT
IN
OUT
V
IN
|I
OUT
|I
OUT
IN
V
IN
IN
OUT
and VIL occur at V
IH
IL
| ≤ 20 µA 2.0V 2.0 1.9 1.9 1.9 V
= VIH or V
IL
| ≤ 4.0 mA 4.5V 4.2 3.98 3.84 3.7 V
| ≤ 5.2 mA 6.0V 5.7 5.48 5.34 5.2 V
= VIH or V
IL
| ≤ 20 µA 2.0V 0 0.1 0.1 0.1 V
= VIH or V
IL
| ≤ 4 mA 4.5V 0.2 0.26 0.33 0.4 V
| ≤ 5.2 mA 6.0V 0.2 0.26 0.33 0.4 V
= VCC or GND 6.0V ±0.1 ±1.0 ±1.0 µA
= 15V 2.0V ±0.5 ±5 ±5 µA
= VCC or GND 6.0V 2.0 20 40 µA
= 0 µA
V
CC
6.0V 4.2 4.2 4.2 V
6.0V 1.8 1.8 1.8 V
4.5V 4.5 4.4 4.4 4.4 V
6.0V 6.0 5.9 5.9 5.9 V
4.5V 0 0.1 0.1 0.1 V
6.0V 0 0.1 0.1 0.1 V
= 5.5V and 4.5V res pectively. (The VIH value at 5.5V is 3.85V.) The worst case leakage c ur-
CC
TA = 25°CTA = −40°C to 85°CTA = −55°C to 125°C
Typ Guaranteed Limits
V
Units
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