Fairchild MM74C925, MM74C926, MM74C927, MM74C928 service manual
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MM74C925, MM74C926, MM74C927, MM74C928
4-Digit Counters with Multiplexed
7-Segment Output Drivers
General Description
These CMOS counters consist of a 4-digit counter, an internal output latch, NPN output sourcing drivers for a 7-segment display, and an internal multiplexing circuitry with four
multiplexing outputs. The multiplexing circuit has its own
free-running oscillator, and requires no external clock. The
counters advance on negative edge of clock. A high signal
on the Reset input will reset the counter to zero, and reset
the carry-out low. A low signal on the Latch Enable input will
latch the number in the counters into the internal output
latches. A high signal on Display Select input will select the
number in the counter to be displayed; a low level signal on
the Display Select will select the number in the output latch
to be displayed.
The MM74C925 is a 4-decade counter and has Latch Enable, Clock and Reset inputs.
The MM74C926 is like the MM74C925 except that it has a
display select and a carry-out used for cascading counters.
The carry-out signal goes high at 6000, goes back low at
0000.
The MM74C927 is like the MM74C926 except the second
most significant digit divides by 6 rather than 10. Thus, if the
clock input frequency is 10 Hz, the display would read
tenths of seconds and minutes (i.e., 9:59.9).
The MM74C928 is like the MM74C926 except the most significant digit divides by 2 rather than 10 and the carry-out is
March 1988
an overflow indicator which is high at 2000, and it goes back
low only when the counter is reset. Thus, this is a 3(/2-digit
counter.
Features
Y
Wide supply voltage range 3V to 6V
Y
Guaranteed noise margin 1V
Y
High noise immunity 0.45 VCC(typ.)
Y
High segment sourcing current 40 mA
Y
Internal multiplexing circuitry
@
b
V
1.6V, V
CC
CC
e
5V
Design Considerations
Segment resistors are desirable to minimize power dissipation and chip heating. The DS75492 serves as a good digit
driver when it is desired to drive bright displays. When using
this driver with a 5V supply at room temperature, the display
can be driven without segment resistors to full illumination.
The user must use caution in this mode however, to prevent
overheating of the device by using too high a supply voltage
or by operating at high ambient temperatures.
The input protection circuitry consists of a series resistor,
and a diode to ground. Thus input signals exceeding V
will not be clamped. This input signal should not be allowed
to exceed 15V.
CC
MM74C925, MM74C926, MM74C927, MM74C928 4-Digit Counters
with Multiplexed 7-Segment Output Drivers
Connection Diagrams
Dual-In-Line Package
Top View
Order Number MM74C925
C
1995 National Semiconductor Corporation RRD-B30M105/Printed in U. S. A.
TL/F/5919
TL/F/5919– 1
Dual-In-Line Package
TL/F/5919– 2
Top View
Order Number MM74C926,
MM74C927 or MM74C928
Absolute Maximum Ratings (Note 1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Voltage at Any Output Pin GND
b
0.3V to V
CC
a
0.3V
Voltage at Any Input Pin GNDb0.3V toa15V
Operating Temperature
Range (T
)
A
b
40§Ctoa85§C
DC Electrical Characteristics Min/Max limits apply at
Storage Temperature Range
Power Dissipation (PD) Refer to P
Operating VCCRange 3V to 6V
V
CC
Lead Temperature
(Soldering, 10 seconds) 260
b
40§CsT
s
a
85§C, unless otherwise noted
j
Symbol Parameter Conditions Min Typ Max Units
CMOS TO CMOS
V
IN(1)
V
IN(0)
V
OUT(1)
Logical ‘‘1’’ Input Voltage V
Logical ‘‘0’’ Input Voltage V
Logical ‘‘1’’ Output Voltage V
(Carry-Out and Digit Output 4.5 V
e
5V 3.5 V
CC
e
5V 1.5 V
CC
e
eb
CC
5V, I
10 mA
O
Only)
e
V
OUT(0)
I
IN(1)
I
IN(0)
I
CC
Logical ‘‘0’’ Output Voltage V
Logical ‘‘1’’ Input Current V
Logical ‘‘0’’ Input Current V
Supply Current V
CC
CC
CC
CC
e
V
IN
e
5V, I
10 mA 0.5 V
O
e
e
e
e
5V, V
5V, V
15V 0.005 1 mA
IN
e
0V
IN
5V, Outputs Open Circuit,
0V or 5V
b
1
CMOS/LPTTL INTERFACE
V
V
V
Logical ‘‘1’’ Input Voltage V
IN(1)
Logical ‘‘0’’ Input Voltage V
IN(0)
Logical ‘‘1’’ Output Voltage V
OUT(1)
(Carry-Out and Digit I
Output Only)
V
Logical ‘‘0’’ Output Voltage V
OUT(0)
e
4.75V V
CC
e
4.75V 0.8 V
CC
e
4.75V,
CC
eb
360 mA 2.4 V
O
CC
e
4.75V, I
e
360 mA 0.4 V
O
b
2V
CC
OUTPUT DRIVE
V
R
Output Voltage (Segment I
OUT
Sourcing Output)
Output Resistance (Segment I
ON
Sourcing Output)
OUT
I
OUT
OUT
I
OUT
eb
eb
eb
eb
65 mA, V
40 mA, V
65 mA, V
40 mA, V
Output Resistance (Segment 0.6 0.8 %/
CC
CC
CC
CC
e
e
5V, T
25§CV
j
e
T
100§CV
e
e
e
j
5V
e
ÐT
150§CV
j
e
5V, T
25§C2032X
j
e
T
100§C3040X
j
5V
e
ÐT
150§C3550X
j
CC
CC
CC
b
b
b
1.6 V
2V
2V
Output) Temperature Coefficient
I
SOURCE
I
SOURCE
I
SINK
i
Output Source Current V
(Digit Output)
Output Source Current V
(Carry-Out)
Output Sink Current V
(All Outputs)
Thermal Resistance MM74C925 (Note 4) 75 100§C/W
jA
Note 1: ‘‘Absolute Maximum Ratings’’ are those values beyond which the safety of the device cannot be guaranteed. Except for ‘‘Operating Temperature Range’’
they are not meant to imply that the devices should be operated at these limits. The table of ‘‘Electrical Characteristics’’ provides conditions for actual device
operation.
Note 2: Capacitance is guaranteed by periodic testing.
Note 3: C
AN-90.
Note 4: i
determines the no load AC power consumption of any CMOS device. For complete explanation see 54C/74C Family Characteristics application note,
PD
measured in free-air with device soldered into printed circuit board.
jA
e
4.75V, V
CC
e
5V, V
CC
e
5V, V
CC
MM74C926, MM74C927, MM74C928 70 90
OUT
OUT
OUT
e
e
e
1.75V, T
0V, T
VCC,T
e
150§C
j
e
25§C
j
e
25§C
j
b
1
b
1.75
1.75 3.6 mA
2
b
65§Ctoa150§C
vs TAGraph
D(MAX)
6.5V
b
0.005 mA
20 1000 mA
b
1.3 V
CC
b
1.2 V
CC
b
1.4 V
CC
b
2mA
b
3.3 mA
§
C
§
C/W
C
§
AC Electrical Characteristics* T
e
A
25§C, C
e
50 pF, unless otherwise noted
L
Symbol Parameter Conditions Min Typ Max Units
f
MAX
tr,t
f
t
WR
t
WLE
t
SET(CK, LE)
t
LR
t
SET(R, LE)
f
MUX
C
IN
*AC Parameters are guaranteed by DC correlated testing.
Maximum Clock Frequency V
Maximum Clock Rise or Fall Time V
Reset Pulse Width V
Latch Enable Pulse Width V
Clock to Latch Enable Set-Up Time V
Latch Enable to Reset Wait Time V
Reset to Latch Enable Set-Up Time V
Multiplexing Output Frequency V
Input Capacitance Any Input (Note 2) 5 pF
e
5V, T
CC
Square Wave Clock T
e
5V 15 ms
CC
e
5V T
CC
e
5V T
CC
e
5V T
CC
e
5V T
CC
e
5V T
CC
e
5V 1000 Hz
CC
e
25§C 2 4 MHz
j
e
100§C 1.5 3 MHz
j
e
25§C 250 100 ns
j
e
T
100§C 320 125 ns
j
e
25§C 250 100 ns
j
e
T
100§C 320 125 ns
j
e
25§C 2500 1250 ns
j
e
T
100§C 3200 1600 ns
j
e
25§C0
j
e
T
100§C0
j
e
25§C 320 160 ns
j
e
T
100§C 400 200 ns
j
b
100 ns
b
100 ns
Functional Description
Reset Ð Asynchronous, active high
Display Select Ð High, displays output of counter
Low, displays output of latch
Latch Enable Ð High, flow through condition
Low, latch condition
Clock Ð Negative edge sensitive
Typical Performance Characteristics
Note: V
Typical Segment Current
vs Output Voltage
e
Voltage across digit driver
D
Maximum Power Dissipation
vs Ambient Temperature
Segment Output Ð Current sourcing with 40 mA
b
V
1.6V (typ.) Also, sink capability
CC
e
2 LTTL loads
Digit Output Ð Current sourcing with 1 mA@V
1.75V. Also, sink capabilitye2 LTTL
@
V
OUT
OUT
loads
Carry-Out Ð 2 LTTL loads. See carry-out waveforms.
Typical Average Segment
Current vs Segment
Resistor Value
TL/F/5919– 3
e
e
3
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