Fairchild MM74C906, MM74C907 service manual

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MM74C906 • MM74C907 Hex Open Drain N-Channel Buffers •
Hex Open Drain P-Channel Buffers
MM74C906 • MM74C907 Hex Open Drain N-Channel Buffers • Hex Open Drain P-Channel Buffer s
October 1987 Revised January 1999
General Description
All inputs are protected from static discharge by diode clamps to V
and to ground.
CC
Features
Wide supply voltage range: 3V to 15V
Guaranteed noise margin: 1V
High noise immunity: 0.45 V
High current sourcing and sinking open drain outputs
CC
(typ.)
Ordering Code:
Order Number Package Number Package Description
MM74C906M M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150” Narrow MM74C906N N14A 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide MM74C907N N14A 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to t he ordering code.
Connection Diagram
Pin Assignments for DIP and SOIC
Logic Diagrams
MM74C906
MM74C907
Top View
© 1999 Fairchild Semiconductor Corporation DS005911.prf www.fairchildsemi.com
Absolute Maximum Ratings(Note 1)
Voltage at Any Input Pin 0.3V to VCC +0.3V Voltage at Any Output Pin Operating Temperature Range
MM74C906/MM74C907 40°C to +85°C Storage Temperature Range −65°C to +150°C Power Dissipation
Dual-In-Line 700 mW
Operating V Absolute Maximum V Lead Temperature (T
(Soldering, 10 seconds) 260°C
Note 1: “Absolute Maxi mum Ratings” are those valu es beyond which the safety of the device cannot be guaranteed. Ex ce pt for “O perating Tempera­ture Range” they are not mean t to imply that the devices sho uld be oper­ated at these limits. The table of “Electrical Characteristics” provides conditions for actual device op eration.
Range 3V to 15V
CC
CC
)
L
Small Outline 500 mW
MM74C906 • MM74C907
DC Electrical Characteristics
Min/Max limits apply across temperature range unless otherwise noted
Symbol Parameter Conditions Min Typ Max Units
CMOS TO CMOS
V
IN(1)
V
IN(0)
I
IN(1)
I
IN(0)
I
CC
CMOS/LPTTL INTERFA CE
V
IN(1)
V
IN(0)
OUTPUT DRIVE CURRENT
Logical “1” Input Voltage VCC = 5V 3.5 V
Logical “0” Input Voltage VCC = 5V 1.5 V
Logical “1” Input Current VCC = 15V, VIN = 15V 0.005 1 µA Logical “0” Input Current VCC = 15V, VIN = 0V 1.0 0.005 µA Supply Current VCC = 15V, Output Open 0.05 15 µA Output Leakage
MM74C906 VCC = 4.75V, VIN = VCC 1.5V 0.005 5 µA
MM74C907 VCC = 4.75V, VIN = 1V + 0.1 V
Logical “1” Input Voltage VCC = 4.75V VCC 1.5V V Logical “0” Input Voltage VCC = 4.75V 0.8 V
MM74C906 VCC = 4.75V, VIN = 1V +0.1 V
MM74C907 VCC = 4.75V, VIN = VCC 1.5V
MM74C906 VCC = 10V, VIN = 2V
MM74C907 VCC = 10V, VIN = 8V
VCC = 10V 8.0 V
VCC = 10V 2 V
VCC = 4.75V, V
VCC = 4.75V, V
VCC = 4.75V, V VCC = 4.75V, V
VCC = 4.75V, V VCC = 4.75V, V
VCC = 10V, V VCC = 10V, V
VCC = 10V, V VCC = 10V, V
= 18V
OUT
CC
= VCC 18V
OUT
CC
= 0.5V 2.1 8.0 mA
OUT
= 1.0V 4.2 12.0 mA
OUT
= VCC 0.5V 1.05 1.5 mA
OUT
= VCC 1V 2.1 3.0 mA
OUT
= 0.5V 4.2 20 mA
OUT
= 1V 8.4 30 mA
OUT
= 9.5V 2.1 4.0 mA
OUT
= 9V 4.2 8.0 mA
OUT
0.005 5 µA
18V
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