Fairchild MM74C174 service manual

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MM74C174
Hex D-Type Flip-Flop

MM74C174 Hex D-Type Flip-Flop

October 1987
Revised January 1999

General Description

The MM74C174 hex D-type flip-flop is a monolithic comple­mentary MOS (C MOS) integrated circuit constructe d with
N- and P-channel enhancement transistors. All have a
direct clear input. Inform ation at the D inpu ts meeting the
setup time requirements is transferred to the Q o utputs on
the positive-going edge of the clock pulse. Cle ar is inde­pendent of clock and accomplished by a low level at the
clear input. All inputs are prot ected by diodes to V

GND.

CC

Features

■ Wide supply voltage range: 3.0V to 15V

■ Guaranteed noise margin: 1.0V

■ High noise immunity: 0.45 V

■ Low power TTL compatibility:

Fan out of 2 driving 74L

and

CC

(typ.)

Ordering Code:

Order Number Package Number Package Description

MM74C174M M16A 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150” Narrow
MM74C174N N16E 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide

Device also available in Tape and Reel. Specify by appendin g s uf f ix let t er “X” to the ordering co de.

Connection Diagram

Pin Assignments for DIP and SOIC

Truth Table

Inputs Output

Clear Clock D Q

LXXL
H ↑ HH
H ↑ LL
HLXQ

Top View

© 1999 Fairchild Semiconductor Corporation DS005899.prf www.fairchildsemi.com

Logic Diagrams

MM74C174

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