Fairchild MM74C00, MM74C02, MM74C04 service manual
查询74C00供应商
MM74C00 • MM74C02 • MM74C04
Quad 2-Input NAND Gate •
Quad 2-Input NOR Gate •
Hex Inverter
MM74C00 • MM74C02 • MM74C04 Quad 2-Input NAND Gate • Quad 2-Input NOR Gate • Hex Inverter
October 1987
Revised January 1999
General Description
The MM74C00, MM74C02, and MM74C04 logic gates
employ complementary MOS (CMOS) to achieve wide
power supply operating range, low power consumption,
high noise immunity a nd symmet ric contr olled ri se and fall
times. With features such as this the 74C logic family is
close to ideal for use in digital systems. Function and pin
out compatibility with series 74 devices minimizes de sign
time for those designer s already familiar wi th the standard
74 logic family.
All inputs are protected from damage due to static discharge by diode clamps to V
and GND.
CC
Features
■ Wide supply voltage range: 3V to 15V
■ Guaranteed noise margin: 1V
■ High noise immunity: 0.45 V
■ Low power consumption: 10 nW/package (typ.)
■ Low power: TTL compatibility:
Fan out of 2 driving 74L
CC
(typ.)
Ordering Code:
Order Number Package Number Package Description
MM74C00M M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150” Narrow
MM74C00N N14A 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide
MM74C02N M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150” Narrow
MM74C04M M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150” Narrow
MM74C04N N14A 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide
Device also available in Tape and Reel. Specify by appendin g s uf f ix let t er “X” to the ordering co de.
Connection Diagrams
Pin Assignments for DIP and SOIC
MM74C00
MM74C02
Top View
MM74C04
Top View
© 1999 Fairchild Semiconductor Corporation DS005877.prf www.fairchildsemi.com
Top View
Absolute Maximum Ratings(Note 1)
Voltage at Any Pin −0.3V to VCC + 0.3V
Lead Temperature
(Soldering, 10 seconds) 300°C
Operating Temperature Range −40°C to +85°C
Storage Temperature Range −65°C to +150°C
Operating V
Maximum V
Power Dissipation (P
Range 3.0V to 15V
CC
Voltage 18V
CC
)
D
Note 1: “Absolute Maxi mum Ratings” are those valu es beyond which the
safety of the device cannot be guaranteed. E x ce pt for “O perating Temperature Range” they are not mean t to imply that the devices sho uld be operated at these limits. The table of “Electrical Characteristics” provides
conditions for actual device op eration.
Dual-In-Line 700 mW
Small Outline 500 mW
DC Electrical Characteristics
Min/Max limits apply across the guaranteed temperature range unless otherwise noted
Symbol Parameter Conditions Min Typ Max Units
MM74C00 • MM74C02 • MM74C04
CMOS TO CMOS
V
IN(1)
V
IN(0)
V
OUT(1)
V
OUT(0)
I
IN(1)
I
IN(0)
I
CC
LOW POWER TO CMOS
V
IN(1)
V
IN(0)
V
OUT(1)
V
OUT(0)
CMOS TO LOW POWER
V
IN(1)
V
IN(0)
V
OUT(1)
V
OUT(0)
OUTPUT DRIVE (see Family Characteristics Data Sheet) TA = 25°C (short circuit current)
I
SOURCE
I
SOURCE
I
SINK
I
SINK
Logical “1” Input Voltage VCC = 5.0V 3.5 V
VCC = 10V 8.0 V
Logical “0” Input Voltage VCC = 5.0V 1.5 V
VCC = 10V 2.0 V
Logical “1” Output Volt age VCC = 5.0V, IO = −10 µA4.5 V
VCC = 10V, IO = −10 µA9.0 V
Logical “0” Output Volt age VCC = 5.0V, IO = 10 µA0.5V
VCC = 10V, IO = 10 µA1.0V
Logical “1” Input Current VCC = 15V, VIN = 15V 0.005 1.0 µA
Logical “0” Input Current VCC = 15V, VIN = 0V −1.0 −0.005 µA
Supply Current VCC = 15V 0.01 15 µA
Logical “1” Input Voltage 74C, VCC = 4.75V VCC − 1.5 V
Logical “0” Input Voltage 74C, VCC = 4.75V 0.8 V
Logical “1” Output Volt age 74C, VCC = 4.75V, IO = −10 µA4.4 V
Logical “0” Output Volt age 74C, VCC = 4.75V, IO = 10 µA0.4V
Logical “1” Input Voltage 74C, VCC = 4.75V 4.0 V
Logical “0” Input Voltage 74C, VCC = 4.75V 1.0 V
Logical “1” Output Volt age 74C, VCC = 4.75V, IO = −360 µA2.4 V
Logical “0” Output Volt age 74C, VCC = 4.75V, IO = 360 µA0.4V
Output Source Current VCC = 5.0V, V
Output Source Current VCC = 10V, V
Output Sink Current VCC = 5.0V, V
Output Sink Current VCC = 10V, V
IN(0)
IN(0)
IN(1)
IN(1)
= 0V, V
= 0V, V
= 5.0V, V
= 10V, V
= 0V −1.75 mA
OUT
= 0V −8.0 mA
OUT
OUT
OUT
= V
= V
1.75 mA
CC
8.0 mA
CC
AC Electrical Charac teristics (Note 2)
TA = 25°C, CL = 50 pF, unless otherwise specified
Symbol Parameter Conditions Min Typ Max Units
MM74C00, MM74C02, MM74C04
t
, t
pd0
pd1
C
IN
C
PD
Note 2: AC Parameters are guara nt eed by DC correlated test ing.
Note 3: Capacitance is guaranteed by periodic testing.
Note 4: C
AN-90.
www.fairchildsemi.com 2
Propagation Delay Time to VCC = 5.0V 50 90 ns
Logical “1” or “0” VCC = 10V 30 60 ns
Input Capacitance (Note 3) 6.0 pF
Power Dissipation Capacitance Per Gate or Inverter (Note 4) 12 pF
determines t he no loa d AC power c ons um ption of a ny CM OS d evice. For com plet e expla natio n se e Family Cha ract eris tics Appl icat ion N ote —
PD
Loading...