The LM555/NE555/SA555 is a highly stable controller
capable of producing accurate timing pulses. With a
monostable operation, the time delay is controlled by one
external resistor and one capacitor. With an astable
operation, the frequency and duty cycle are accurately
controlled by two external resistors and one capacitor.
When the low signal input is applied to the reset terminal, the timer output remains low regardless of the threshold voltage or
the trigger voltage. Only when the high signal is applied to the reset terminal, the timer's output changes according to
threshold voltage and trigger voltage.
When the threshold voltage exceeds 2/3 of the supply voltage while the timer output is high, the timer's internal discharge Tr.
turns on, lowering the threshold voltage to below 1/3 of the supply voltage. During this time, the timer output is maintained
low. Later, if a low signal is applied to the trigger voltage so that it becomes 1/3 of the supply voltage, the timer's internal
discharge Tr. turns off, increasing the threshold voltage and driving the timer output again at high.
Figure 2. Resistance and Capacitance vs.Figure 2. Resistance and Capacitance vs.
RR
-4
-4
-3
-3
-4-4
-3-3
10
10
10
10
1010
1010
Time delay( t
Time delay( t
Time delay( tTime delay(t
Ω
Ω
ΩΩ
=1k
=1k
=1k=1k
A
A
AA
-2
-2
-2-2
10
10
1010
Time Delay(s)
Time Delay(s)
Time Delay(s)Time Delay (s)
Ω
Ω
Ω
ΩΩ
Ω
ΩΩ
10k
10k
10k10k
10
10
1010
))))
dddd
1M
100k
1M
100k
1M1M
100k100 k
-1
-1
0000
-1-1
10
10
1010
Ω
Ω
ΩΩ
Ω
Ω
ΩΩ
10M
10M
10M10M
1111
2222
10
10
10
10
1010
1010
Figure 3. Waveforms of Monostable Operation
Figure 3. Waveforms of Monostable Operation
Figure 3. Waveforms of Monostable OperationFigure 3. Waveforms of Monostable Operation
4444
LM555/NE555/SA555
Figure 1 illustrates a monostable circuit. In this mode, the timer generates a fixed pulse whenever the trigger voltage falls
below Vcc/3. When the trigger pulse voltage applied to the #2 pin falls below Vcc/3 while the timer output is low, the timer's
internal flip-flop turns the discharging Tr. off and causes the timer output to become high by charging the external capacitor C1
and setting the flip-flop output at the same time.
The voltage across the external capacitor C1, V
at td=1.1R
for the V
*C. Hence, capacitor C1 is charged through resistor RA. The greater the time constant RAC, the longer it takes
A
to reach 2Vcc/3. In other words, the time constant RAC controls the output pulse width.
C1
increases exponentially with the time constant t=RA*C and reaches 2Vcc/3
C1
When the applied voltage to the capacitor C1 reaches 2Vcc/3, the comparator on the trigger terminal resets the flip-flop,
turning the discharging Tr. on. At this time, C1 begins to discharge and the timer output converts to low.
In this way, the timer operating in the monostable repeats the above process. Figure 2 shows the time constant relationship
based on R
and C. Figure 3 shows the general waveforms during the monostable operation.
A
It must be noted that , for a norma l oper ati on, the trig ger pul se vo ltage needs to ma intai n a min imum of Vcc/ 3 befor e the time r
output turns low. That is, alth ough the output remains unaf fected even if a dif f erent trigger pulse is applied while the output is
high, it may be affected and the waveform does not operate properly if the trigger pulse voltage at the end of the output pulse
remains at below Vcc/3. Figure 4 shows such a timer output abnormality.
Figure 4. Waveforms of Monostable Operation (abnormal)
Figure 4. Waveforms of Monostable Operation (abnormal)
Figure 4. Waveforms of Monostable Operation (abnormal)Figure 4. Waveforms of Monostable Operation (abnormal)