Fairchild HUF75623P3, HUF75623S3ST service manual
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Data Sheet December 2001
22A, 100V, 0.064 Ohm, N-Channel,
UltraFET® Power MOSFETs
Packaging
HUF75623P3, HUF75623S3ST
JEDEC TO-220AB JEDEC TO-263AB
DRAIN
(FLANGE)
HUF75623P3
SOURCE
DRAIN
GATE
GATE
SOURCE
HUF75623S3ST
DRAIN
(FLANGE
Features
• Ultra Low On-Resistance
-r
• Simulation Models
- Temperature Compensated PSPICE® and SABER™
Electrical Models
- Spice and SABER Thermal Impedance Models
- www.fairchildsemi.com
DS(ON)
= 0.064Ω, V
GS
= 10V
• Peak Cu rrent vs Pulse Width Curve
• UIS Rating Curve
Symbol
D
G
S
Absolute Maximum Ratings
Drain to Source Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
Drain to Gate Voltage (R
Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
Drain Current
Continuous (T
Continuous (TC = 100oC, VGS = 10V) (Figure 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I
Pulsed Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I
Pulsed Avalanche Rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . UIS Figures 6, 14, 15
Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . P
Derate Above 25oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T
Maximum Temperature for Soldering
Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T
Package Body for 10s, See Techbrief TB334. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T
NOTE:
= 25oC to 150oC.
1. T
J
CAUTION: Stresses above those listed in “ Absolute M aximum Ratings” may cause perm anent damage to th e device. This is a stress onl y rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
All Fairchild semiconductor products are manufactured, assembled and tested under ISO9000 and QS9000 quality systems certification.
C
Product reliability information can be found at http://www.fairchildsemi.com/products/discrete/reliability/index.html
= 20kΩ) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
GS
= 25oC, VGS = 10V) (Figure 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I
TC = 25oC, Unless Otherwise Specified
For severe environments, see our Automotive HUFA series.
Ordering Information
PART NUMBER PACKAGE BRAND
HUF75623P3 TO-220AB 75623P
HUF75623S3ST TO-263AB 75623S
NOTE: When ordering, use the entire part number i.e., HUF75623P3
HUF75623P3, HUF75623S3ST UNITS
DSS
DGR
GS
D
D
DM
D
, T
J
STG
L
pkg
100 V
100 V
±20 V
22
15
Figure 4
85
0.57
-55 to 175
300
260
A
A
W
W/oC
o
C
o
C
o
C
©2001 Fairchild Semiconductor Corpo ration HUF75623P3, HUF75623S3ST Rev. B
HUF75623P3, HUF75623S3ST
Electrical Specifications
TC = 25oC, Unless Otherwise Specified
PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS
OFF STATE SPECIFICATIONS
Drain to Source Breakdown Voltage BV
Zero Gate Voltage Drain Current I
Gate to Source Leakage Current I
ON STATE SPECIFICATIONS
Gate to Source Threshold Voltage V
Drain to Source On Resistance r
THERMAL SPECIFICATIONS
Thermal Resistance Junction to Case R
Thermal Resistance Junction to
Ambient
SWITCHING SPECIFICATIONS (V
GS
= 10V)
Turn-On Time t
Turn-On Delay Time t
Rise Time t
Turn-Off Delay Time t
Fall Time t
Turn-Off Time t
GATE CHARGE SPECIFICATIONS
DSSID
DSS
VDS = 95V, VGS = 0V - - 1 µA
V
GSS
GS(TH)VGS
DS(ON)ID
θJC
R
θJA
ON
d(ON)
VGS = ±20V - - ±100 nA
TO-220 - - 1.76oC/W
VDD = 50V, ID = 22A
V
R
(Figures 18, 19)
r
d(OFF)
f
OFF
= 250µA, VGS = 0V (Figure 11) 100 - - V
= 90V, VGS = 0V, TC = 150oC - - 250 µA
DS
= VDS, ID = 250µA (Figure 10) 2 - 4 V
= 22A, VGS = 10V (Figure 9) - 0.054 0.064 Ω
--62oC/W
- - 75 ns
= 10V,
GS
GS
= 13Ω
-7.9-ns
-42-ns
-47-ns
- 39 - ns
- - 130 ns
Total Gate Charge Q
Gate Charge at 10V Q
Threshold Gate Charge Q
g(TOT)VGS
g(10)
g(TH)
Gate to Source Gate Charge Q
Gate to Drain “Miller” Charge Q
CAPACITANCE SPECIFICATIONS
Input Capacitance C
Output Capacitance C
Reverse Transfer Capacitance C
ISS
OSS
RSS
Source to Drain Diode Specifications
PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS
Source to Drain Diode Voltage V
Reverse Recovery Time t
Reverse Recovered Charge Q
SD
RR
= 0V to 20V VDD = 50V,
= 22A,
I
VGS = 0V to 10V - 23 28 nC
VGS = 0V to 2V - 1.7 2 nC
gs
gd
D
I
= 1.0mA
g(REF)
(Figures 13, 16, 17)
VDS = 25V, VGS = 0V,
-4352nC
-3.5-nC
-8.7-nC
- 790 - pF
f = 1MHz
(Figure 12)
- 215 - pF
-70-pF
ISD = 22A - - 1.25 V
I
= 11A - - 1.00 V
SD
rr
ISD = 22A, dISD/dt = 100A/µs - - 100 ns
ISD = 22A, dISD/dt = 100A/µs - - 313 nC
©2001 Fairchild Semiconductor Corpo ration HUF75623P3, HUF75623S3ST Rev. B
Typical Performance Curves
5
5
HUF75623P3, HUF75623S3ST
1.2
1.0
0.8
0.6
0.4
0.2
POWER DISSIPATION MULTIPLIER
0
0 25 50 75 100 17
125 150
TC, CASE TEMPERATURE (oC)
FIGURE 1. NORMALIZED POWER DISSIPA TION vs CASE
TEMPERATURE
2
DUTY CYCLE - DESCENDING ORDER
0.5
1
0.2
0.1
0.05
0.02
0.01
0.1
, NORMALIZED
θJC
Z
THERMAL IMPEDANCE
SINGLE PULSE
0.01
-5
10
-4
10
-3
10
t, RECTANGULAR PULSE DURATION (s)
25
20
V
GS
15
10
, DRAIN CURRENT (A)
D
I
5
0
25
50 75 100 125 150
TC, CASE TEMPERATURE (oC)
FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs
CASE TEMPERATURE
P
DM
t
1
NOTES:
DUTY FACTOR: D = t
PEAK TJ = PDM x Z
-2
10
-1
10
θJC
10
1/t2
0
x R
θJC
+ T
= 10V
t
2
17
C
1
10
FIGURE 3. NORMALIZED MAXIMUM TRANSIENT THERMAL IMPEDANCE
300
TC = 25oC
100
FOR TEMPERATURES
ABOVE 25
CURRENT AS FOLLOWS:
VGS = 10V
I = I
o
C DERATE PEAK
25
175 - T
150
C
, PEAK CURRENT (A)
DM
I
TRANSCONDUCTANCE
MAY LIMIT CURRENT
IN THIS REGION
10
-5
10
-4
10
-3
10
-2
10
-1
10
0
10
10
t, PULSE WIDTH (s)
FIGURE 4. PEAK CURRENT CAPABILITY
©2001 Fairchild Semiconductor Corpo ration HUF75623P3, HUF75623S3ST Rev. B
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