Fairchild HUF75545P3, HUF75545S3, HUF75545S3S service manual

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Data Sheet September 2002

75A, 80V, 0.010 Ohm, N-Channel,
UltraFET® Power MOSFET

Packaging

JEDEC TO-220AB JEDEC TO-263AB

SOURCE

DRAIN

GATE

GATE

SOURCE

DRAIN

(FLANGE)

HUF75545P3

DRAIN

(FLANGE)

JEDEC TO-262AA

HUF75545S3S

SOURCE

DRAIN

GATE

HUF75545P3, HUF75545S3, HUF75545S3S

DRAIN

(FLANGE)

Features

• Ultra Low On-Resistance

-r

• Simulation Models

- Temperature Compensated PSPICE® and SABER™
Electri cal Models

- Spice and SABER Thermal Impedance Models

- www.fairchildsemi.com

• Peak Current vs Pulse Width Curve

• UIS Rating Curve

DS(ON)

= 0.010Ω, V

GS

= 10V

HUF75545S3

Symbol

D

G

S

Absolute Maximum Ratings T

Drain to Source Voltage (Note 1). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .V

Drain to Gate Voltage (R

Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .V

Drain Current

Continuous (T

Continuous (TC= 100oC, VGS = 10V) (Figure 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .I

Pulsed Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I

Pulsed Avalanche Rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . UIS Figure 6

Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . P

Derate Above 25oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T

Maximum Temperature for Soldering

Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T

Package Body for 10s, See Techbrief TB334. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .T

NOTES:

1. T

= 25oC to 150oC.

J

CAUTION: Stresses above those listed in “ Absolute M aximum Ratings” may cause perm anent damage to the device. This is a stre ss only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.

C

= 20kΩ) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .V

GS

= 25oC, VGS = 10V) (Figure 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .I

= 25oC, Unless Otherwise Specified

C

Ordering Information

PART NUMBER PACKAGE BRAND

HUF75545P3 TO-220AB 75545P
HUF75545S3 TO-262AA 75545S
HUF75545S3S TO-263AB 75545S

NOTE: When orderin g, use the e ntire part numb er . A dd the s uffi x T to
obtain the TO-263AB variant in tape and reel, e.g., HUF75545S3ST.

HUF75545P3, HUF75545S3,

HUF75545S3S UNITS

DSS

DGR

GS

D
D

DM

D

, T

J

STG

L

pkg

80 V
80 V

±20 V

75
73

Figure 4

270

1.8

-55 to 175

300
260

A
A

W

W/oC

o

C

o

C

o

C

Product reliabil it y information can be found at http ://www.fairchildsem i.com/products/di s crete/reliability/index.html

All Fairchild semiconductor products are manufactured, assembled and tested under ISO9000 and QS9000 qualit y systems certification.

©2002 Fairchild Semiconductor Corporation HUF75545P3 / HUF75545S3 / HUF75545S3S Rev. C

For severe environments, see our Automotive HUFA series.

HUF75545P3, HUF75545S3, HUF75545S3S

Electrical Specifications T

= 25oC, Unless Otherwise Specified

C

PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS

OFF STATE SPECIFICATIONS

Drain to Source Breakdown Voltage BV
Zero Gate Voltage Drain Current I

Gate to Source Leakage Current I

ON STATE SPECIFICATIONS

Gate to Source Threshold Voltage V
Drain to Source On Resistance r

THERMAL SPECI FICATIONS

Thermal Resistance Junction to Case R
Thermal Resistance Junction to

Ambient
SWITCHING SPECIFICATIONS (V

GS

= 10V)
Turn-On Time t
Turn-On Delay Time t
Rise Time t
Turn-Off Delay Time t
Fall Time t
Turn-Off Time t

GATE CHARGE SPECIFICATIONS

DSSID

DSS

VDS = 75V, VGS = 0V - - 1 µA
V

GSS

GS(TH)VGS

DS(ON)ID

θJC

R

θJA

ON

d(ON)

d(OFF)

OFF

VGS = ±20V - - ±100 nA

TO-220 and TO-263 - - 0.55oC/W

VDD = 40V, ID = 75A
V
R

r

f

= 250µA, VGS = 0V (Figure 11) 80 - - V

= 70V, VGS = 0V, TC = 150oC - - 250 µA

DS

= VDS, ID = 250µA (Figure 10) 2 - 4 V

= 75A, VGS = 10V (Figure 9) - 0.0082 0.010 Ω

--62oC/W

- - 210 ns

= 10V,

GS
GS

= 2.5Ω

-14-ns

- 125 - ns

-40-ns

- 90 - ns

- - 195 ns

Total Gate Charge Q
Gate Charge at 10V Q
Threshold Gate Charge Q

g(TOT)VGS

g(10)

g(TH)

Gate to Source Gate Charge Q
Gate to Drain “Miller” Charge Q

CAPACITANCE SPECIFICATIONS

Input Capacitance C
Output Capacitance C
Reverse Transfer Capacitance C

ISS

OSS

RSS

Source to Drain Diode Specifications

PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNI TS

Source to Drain Diode Voltage V

Reverse Recovery Time t
Reverse Recovered Charge Q

gs

gd

SD

rr

RR

= 0V to 20V VDD = 40V,

= 75A,

I

VGS = 0V to 10V - 105 125 nC
VGS = 0V to 2V - 6.8 8.2 nC

D

I

= 1.0mA

g(REF)

(Figure 13)

- 195 235 nC

-15-nC

-43-nC

VDS = 25V, VGS = 0V,

- 3750 - pF
f = 1MHz
(Figure 12)

- 1100 - pF

- 350 - pF

ISD = 75A - - 1.25 V
I

= 35A - - 1.00 V

SD

ISD = 75A, dISD/dt = 100A/µs - - 100 ns
ISD = 75A, dISD/dt = 100A/µs - - 300 nC

©2002 Fairchild Semiconductor Corporation HUF75545P3 / HUF75545S3 / HUF75545S3S Rev. C

HUF75545P3, HUF75545S3, HUF75545S3S

Typical Performance Curves

1.2

1.0

0.8

0.6

0.4

0.2

POWER DISSIPATION MULTIPLIER

0

0 25 50 75 100 175

125

150

TC, CASE TEMPERATURE (oC)

FIGURE 1. NORMALIZED POWER DISSIP A TI ON vs CASE

TEMPERATURE

2

DUTY CYCLE - DESCENDING ORDER

0.5

1

0.2

0.1

0.05

0.02

0.01

0.1

, NORMALIZED

θJC

Z

THERMAL IMPEDANCE

0.01

-5

10

SINGLE PULSE

-4

10

-3

10

t, RECTANGULAR PULSE DURATION (s)

80

60

V

= 10V

GS

40

, DRAIN CURRENT (A)

20

D

I

0

25

50 75 100 125 150

TC, CASE TEMPERATURE (oC)

FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs

CASE TEMPERATURE

P

DM

t

NOTES:
DUTY FACTOR: D = t
PEAK TJ = PDM x Z

-2

10

-1

10

1/t2

x R

θJC

θJC

0

10

1

t

+ T

175

2

C

1

10

FIGURE 3. NORMALIZED MAXIMUM TRANSIENT THERMAL IMPEDANCE

, PEAK CURRENT (A)
I

DM

2000

1000

100

TRANSCONDUCTANCE
MAY LIMIT CURRENT
IN THIS REGION

50

-5

10

VGS = 10V

-4

10

-3

10

-2

10

-1

10

t, PULSE WIDTH (s)

TC = 25oC

FOR TEMPERAT URES
ABOVE 25

o

C DERATE PEAK

CURRENT AS FOLLOWS:

175 - T

I = I

25

0

10

C

150

10

FIGURE 4. PEAK CURRENT CAPABILITY

©2002 Fairchild Semiconductor Corporation HUF75545P3 / HUF75545S3 / HUF75545S3S Rev. C

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