Fairchild HUF75531SK8 service manual

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Data Sheet December 2001

6A, 80V, 0.030 Ohm, N-Channel,
UltraFET Power MOSFET

Packaging

JEDEC MS-012AA

BRANDING DASH

5

1

2

3

4

Symbol

HUF75531SK8

Features

• Ultra Low On-Resistance

-r

• Simulation Models

- Temperature Compensated PSPICE® and SABER™
Electrical Models

- Spice and SABER

- www.fairchildsemi.com

• Peak Cu rrent vs Pulse Width Curve

• UIS Rating Curve

DS(ON)

= 0.030Ω, V

= 10V

GS

Thermal Impedance Models

SOURCE (1)
SOURCE (2)
SOURCE (3)

GATE (4)

Absolute Maximum Ratings

Drain to Source Voltage (Note 1). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V

Drain to Gate Voltage (R

Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .V

Drain Current

Continuous (T

Continuous (TA= 100oC, VGS = 10V) (Figure 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I

Pulsed Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I

Pulsed Avalanche Rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . UIS Figures 6, 14, 15

Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . P

Derate Above 25oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T

Maximum Temperature for Soldering

Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T

Package Body for 10s, See Techbrief TB370. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T

NOTES:

= 25oC to 125oC.

1. T

J

o

C/W measured using FR-4 board with 0.76 in2 (490.3 mm2) copper pad at 10 second.

2. 50

o

3. 152

C/W measured using FR-4 board with 0.054 in2 (34.8 mm2) copper pad at 1000 seconds

o

C/W measured using FR-4 board with 0.0115 in2 (7.42 mm2) copper pad at 1000 seconds

4. 189

CAUTION: Stresses above those listed in “ Absolute M aximum Ratings” may cause perm anent damage to th e device. This is a stress onl y rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.

A

= 20kΩ) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V

GS

= 25oC, VGS = 10V) (Figure 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I

DRAIN (8)
DRAIN (7)
DRAIN (6)
DRAIN (5)

TA = 25oC, Unless Otherwise Specified

Ordering Information

PART NUMBER PACKAGE BRAND

HUF75531SK8 MS-012AA 75531SK8

NOTE: When ordering, use the entire part number. Add the suffix T
to obtain the variant in tape and reel, e.g., HUF75531SK8T.

HUF75531SK8 UNITS

DSS

DGR

GS

D
D

DM

D

, T

J

STG

L

pkg

80 V
80 V

±20 V

6
4

Figure 4

2.5
20

-55 to 150

300
260

A
A

W

mW/oC

o

C

o

C

o

C

Product reliability information can be found at http://www.fairchildsemi.com/products/discrete/reliability/index.html

All Fairchild semiconductor products are manufactured, assembled and tested under ISO9000 and QS9000 quality systems certification.

©2001 Fairchild Semiconductor Corpo ration HUF75531SK8 Rev. B

For severe environments, see our Automotive HUFA series.

HUF75531SK8

Electrical Specifications

TA = 25oC, Unless Otherwise Specified

PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS

OFF STATE SPECIFICATIONS

Drain to Source Breakdown Voltage BV
Zero Gate Voltage Drain Current I

Gate to Source Leakage Current I

ON STATE SPECIFICATIONS

Gate to Source Threshold Voltage V
Drain to Source On Resistance r

THERMAL SPECIFICATIONS

Thermal Resistance Junction to
Ambient

SWITCHING SPECIFICATIONS (V

GS

= 10V)
Turn-On Time t
Turn-On Delay Time t
Rise Time t
Turn-Off Delay Time t
Fall Time t
Turn-Off Time t

GATE CHARGE SPECIFICATIONS

Total Gate Charge Q
Gate Charge at 10V Q
Threshold Gate Charge Q
Gate to Source Gate Charge Q
Gate to Drain "Miller" Charge Q

CAPACITANCE SPECIFICATIONS

Input Capacitance C
Output Capacitance C
Reverse Transfer Capacitance C

DSSID

DSS

VDS = 75V, VGS = 0V - - 1 µA
V

GSS

GS(TH)VGS

DS(ON)ID

R

θJA

VGS = ±20V - - ±100 nA

Pad Area = 0.76 in2 (490.3 mm2) (Note 2) - - 50
Pad Area = 0.054 in
Pad Area = 0.0115 in

ON

d(ON)

d(OFF)

OFF

g(TOT)VGS

g(10)

g(TH)

ISS

OSS

RSS

VDD = 40V, ID = 6A
V
R
(Figures 18, 19)

r

f

VGS = 0V to 10V - 37 45 nC
VGS = 0V to 2V - 2.4 2.9 nC

gs

gd

VDS = 25V, VGS = 0V,
f = 1MHz
(Figure 12)

= 250µA, VGS = 0V (Figure 11) 80 - - V

= 70V, VGS = 0V, TA = 150oC - - 250 µA

DS

= VDS, ID = 250µA (Figure 10) 2 - 4 V

= 6A, VGS = 10V (Figure 9) - 0.025 0.030 Ω

o

2

(34.8 mm2) (Note 3) - - 152

2

(7.42 mm2)(Note 4) 189

o
o

- - 55 ns

= 10V,

GS
GS

= 6.8Ω

- 10.5 - ns

-25-ns

-49-ns

- 29 - ns

- - 115 ns

= 0V to 20V VDD = 40V,

= 6A,

I

D

= 1.0mA

I

g(REF)

-6882nC

(Figures 13, 16, 17)

-4.8-nC

-14-nC

- 1210 - pF

- 385 - pF

- 115 - pF

C/W
C/W
C/W

Source to Drain Diode Specifications

PARAMETER SYMBOL TE ST CONDIT IONS MIN TYP MAX UNITS

Source to Drain Diode Voltage V

SD

Reverse Recovery Time t
Reverse Recovered Charge Q

©2001 Fairchild Semiconductor Corpo ration HUF75531SK8 Rev. B

RR

ISD = 6A - - 1.25 V

= 4A - - 1.00 V

I

SD

ISD = 6A, dISD/dt = 100A/µs - - 105 ns

rr

ISD = 6A, dISD/dt = 100A/µs - - 325 nC

Typical Performance Curves

0

HUF75531SK8

1.2

1.0

0.8

0.6

0.4

0.2

POWER DISSIPATION MULTIPLIER

0

0255075100 15

125

TA, AMBIENT TEMPERATURE (oC)

FIGURE 1. NORMALIZED POWER DISSIPATION vs

CASE TEMPERATURE

3

DUTY CYCLE - DESCENDING ORDER

0.5

1

0.2

0.1

0.05

0.02

0.01

0.1

, NORMALIZED

JA

θ

Z

0.01

THERMAL IMPEDANCE

0.001

-5

10

10

-4

SINGLE PULSE

-3

10

t, RECTANGULAR PULSE DURATION (s)

10

8

V

GS

= 10V, R

θ

JA

= 50oC/W

6

4

, DRAIN CURRENT (A)

D

I

2

0

25

50 75 100 125

150

TA, AMBIENT TEMPERATURE (oC)

FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs

CASE TEMPERATURE

R

= 50oC/W

θ

JA

P

DM

t

1

t

x R

10

2

+ T

θ

JA

A

2

3

10

NOTES:
DUTY FACTOR: D = t

PEAK TJ = PDM x Z

-2

-1

10

0

10

10

1

1/t2

θ

JA

FIGURE 3. NORMALIZED MAXIMUM TRANSIENT THERMAL IMPEDANCE

500

100

10

, PEAK CURRENT (A)

TRANSCONDUCTANCE

DM

MAY LIMIT CURRENT

I

IN THIS REGION

1

-5

10

VGS = 10V

-4

10

R

= 50oC/W

θ

JA

-3

10

-2

10

-1

10

0

10

t, PULSE WIDTH (s)

TA = 25oC
FOR TEMPERATURES
ABOVE 25

o

C DERATE PEAK

CURRENT AS FOLLOWS:

25

150 - T

10

I = I

1

10

125

2

A

10

FIGURE 4. PEAK CURRENT CAPABILITY

©2001 Fairchild Semiconductor Corpo ration HUF75531SK8 Rev. B

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