Fairchild HUF75345G3, HUF75345P3, HUF75345S3S service manual

HUF75345G3, HUF75345P3, HUF75345S3S
Data Sheet December 2009
75A, 55V, 0.007 Ohm, N-Channel UltraFET Power MOSFETs
These N-Channel power MOSFETs are manufactured using the innovative UltraFET® process. This
advanced process technology achieves the lowest possible on-resistance per silicon area, resulting in outstanding performance. This device is capable of withstanding high energy in the avalanche mode and the diode exhibits very low reverse recovery time and stored charge. It was designed for use in applications where power efficiency is important, such as switching regulators, switching converters, motor drivers, relay drivers, low­voltage bus switches, and power management in portable and battery-operated products.
Formerly developmental type TA75345.
Ordering Information
PART NUMBER PACKAGE BRAND
HUF75345G3 TO-247 75345G
HUF75345P3 TO-220AB 75345P
HUF75345S3S TO-263AB 75345S
NOTE: When ordering, use the entire part number. Add the suffix T to obtain the TO-263AB variant in tape and reel, e.g., HUF75345S3ST.
Features
• 75A, 55V
• Simulation Models
- Temperature Compensated PSPICE® and SABER™ Models
- Thermal Impedance SPICE and SABER Models Available on the WEB at: www.fairchildsemi.com
• Peak Current vs Pulse Width Curve
• UIS Rating Curve
• Related Literature
- TB334, “Guidelines for Soldering Surface Mount Components to PC Boards”
Symbol
D
G
S
Packaging
JEDEC STYLE TO-247 JEDEC TO-220AB
SOURCE
DRAIN
GATE
DRAIN (TAB)
JEDEC TO-263AB
GATE
SOURCE
Product reliability information can be found at http://www.fairchildsemi.com/products/discrete/reliability/index.html
For severe environments, see our Automotive HUFA series.
All Fairchild semiconductor products are manufactured, assembled and tested under ISO9000 and QS9000 quality systems certification.
DRAIN
(FLANGE)
DRAIN
(FLANGE)
SOURCE
DRAIN
GATE
©2009 Fairchild Semiconductor Corporation HUF75345G3, HUF75345P3, HUF75345S3S Rev. B2
HUF75345G3, HUF75345P3, HUF75345S3S
Absolute Maximum Ratings T
= 25oC, Unless Otherwise Specified
C
UNITS
Drain to Source Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
Drain to Gate Voltage (R
= 20kΩ) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
GS
Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
DSS
DGR
GS
55 V
55 V
±20 V
Drain Current
Continuous (Figure 2). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I
Pulsed Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .I
Pulsed Avalanche Rating. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . E
Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . P
Derate Above 25oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T
, T
J
STG
D
DM
AS
D
75
Figure 4
Figure 6
325
2.17
-55 to 175
Maximum Temperature for Soldering
Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .T
Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
L
pkg
300 260
A
W
W/oC
o
C
o
C
o
C
NOTE:
1. T
= 25oC to 150oC.
J
Electrical Specifications T
= 25oC, Unless Otherwise Specified
C
PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS
OFF STATE SPECIFICATIONS
Drain to Source Breakdown Voltage BV
Zero Gate Voltage Drain Current I
Gate to Source Leakage Current I
DSSID
DSS
GSS
= 250µA, VGS = 0V (Figure 11) 55 - - V
VDS = 50V, VGS = 0V - - 1 µA
= 45V, VGS = 0V, TC = 150oC--250µA
V
DS
VGS = ±20V - - ±100 nA
ON STATE SPECIFICATIONS
Gate to Source Threshold Voltage V
Drain to Source On Resistance r
GS(TH)VGS
DS(ON)ID
= VDS, ID = 250µA (Figure 10) 2 - 4 V
= 75A, VGS = 10V (Figure 9) - 0.006 0.007 W
THERMAL SPECIFICATIONS
Thermal Resistance Junction to Case R
Thermal Resistance Junction to Ambient R
SWITCHING SPECIFICATIONS (V
GS
= 10V)
Turn-On Time t
Turn-On Delay Time t
d(ON)
Rise Time t
Turn-Off Delay Time t
d(OFF)
Fall Time t
Turn-Off Time t
θJC
θJA
ON
r
f
OFF
(Figure 3) - - 0.46
TO-247 - - 30
TO-220, TO-263 - - 62
VDD = 30V, ID≅ 75A,
= 0.4Ω, VGS= 10V,
R
L
= 2.5
R
GS
--195ns
-14- ns
- 118 - ns
-42- ns
-26- ns
- - 98 ns
o
C/W
o
C/W
o
C/W
GATE CHARGE SPECIFICATIONS
Total Gate Charge Q
Gate Charge at 10V Q
Threshold Gate Charge Q
Gate to Source Gate Charge Q
Gate to Drain “Miller” Charge Q
g(TOT)VGS
g(10)
g(TH)
gs
gd
= 0V to 20V VDD = 30V,
75A,
I
VGS = 0V to 10V - 125 165 nC
VGS = 0V to 2V - 6.8 10 nC
D
= 0.4
R
L
= 1.0mA
I
g(REF)
(Figure 13)
- 220 275 nC
-14-nC
-58-nC
©2009 Fairchild Semiconductor Corporation HUF75345G3, HUF75345P3, HUF75345S3S Rev. B2
HUF75345G3, HUF75345P3, HUF75345S3S
Electrical Specifications T
= 25oC, Unless Otherwise Specified (Continued)
C
PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS
CAPACITANCE SPECIFICATIONS
Input Capacitance C
Output Capacitance C
Reverse Transfer Capacitance C
Source to Drain Diode Specifications
PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS
Source to Drain Diode Voltage V
Reverse Recovery Time t
Reverse Recovered Charge Q
Typical Performance Curves
1.2
1.0
0.8
0.6
ISS
OSS
RSS
SD
rr
RR
VDS = 25V, VGS = 0V, f = 1MHz (Figure 12)
- 4000 - pF
- 1450 - pF
- 450 - pF
ISD = 75A - - 1.25 V
ISD = 75A, dISD/dt = 100A/µs--55ns
ISD = 75A, dISD/dt = 100A/µs--80nC
80
60
40
0.4
0.2
POWER DISSIPATION MULTIPLIER
0
0 25 50 75 100 150
TC, CASE TEMPERATURE (oC)
125 175
FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE
TEMPERATURE
2
DUTY CYCLE - DESCENDING ORDER
0.5
1
0.2
0.1
0.05
0.02
0.01
0.1
, NORMALIZED
θJC
Z
THERMAL IMPEDANCE
0.01
-5
10
SINGLE PULSE
-4
10
-3
10
t, RECTANGULAR PULSE DURATION (s)
, DRAIN CURRENT (A)
20
D
I
0
25
50 75 100 125 150 175
TC, CASE TEMPERATURE (oC)
FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs
CASE TEMPERATURE
P
DM
t
NOTES: DUTY FACTOR: D = t
PEAK TJ = PDM x Z
-2
10
-1
10
1/t2
x R
θJC
0
10
1
θJC
t
2
+ T
C
1
10
FIGURE 3. NORMALIZED MAXIMUM TRANSIENT THERMAL IMPEDANCE
©2009 Fairchild Semiconductor Corporation HUF75345G3, HUF75345P3, HUF75345S3S Rev. B2
HUF75345G3, HUF75345P3, HUF75345S3S
Typical Performance Curves (Continued)
2000
TC = 25oC
1000
VGS = 20V
VGS = 10V
, PEAK CURRENT (A)
I
DM
100
TRANSCONDUCTANCE MAY LIMIT CURRENT IN THIS REGION
50
-5
10
-4
10
-3
10
-2
10
-1
10
t, PULSE WIDTH (s)
FIGURE 4. PEAK CURRENT CAPABILITY
1000
100
TJ = MAX RATED T
= 25oC
C
100µs
1ms
10
OPERATION IN THIS
, DRAIN CURRENT (A)
AREA MAY BE
D
I
LIMITED BY r
V
DSS(MAX)
DS(ON)
= 55V
10ms
1
1200
, DRAIN TO SOURCE VOLTAGE (V)
V
DS
10 100
1000
If R = 0 tAV = (L)(IAS)/(1.3*RATED BV
If R ≠ 0
= (L/R)ln[(IAS*R)/(1.3*RATED BV
t
AV
100
, AVALANCHE CURRENT (A)
STARTING TJ = 150oC
AS
I
10
0.01
0.1
tAV, TIME IN AVALANCHE (ms)
NOTE: Refer to Fairchild Application Notes AN9321 and AN9322.
FIGURE 5. FORWARD BIAS SAFE OPERATING AREA
FIGURE 6. UNCLAMPED INDUCTIVE SWITCHING CAPABILITY
FOR TEMPERATURES ABOVE 25
o
C DERATE PEAK
CURRENT AS FOLLOWS:
175 - T
DSS
C
150
- VDD) +1]
I = I
25
DSS
0
10
- VDD)
STARTING TJ = 25oC
1 10 100
1
10
150
120
= 20V
V
GS
VGS = 10V VGS = 7V
VGS = 5V
150
PULSE DURATION = 80µs DUTY CYCLE = 0.5% MAX
120
VGS = 6V
90
60
, DRAIN CURRENT (A)
D
I
30
0
01234
PULSE DURATION = 80µs DUTY CYCLE = 0.5% MAX T
= 25oC
C
VDS, DRAIN TO SOURCE VOLTAGE (V)
90
60
, DRAIN CURRENT (A)
D
I
30
0
0 3.0 4.5 6.0 7.51.5
25oC
175oC
-55oC
VGS, GATE TO SOURCE VOLTAGE (V)
VDD= 15V
FIGURE 7. SATURATION CHARACTERISTICS FIGURE 8. TRANSFER CHARACTERISTICS
©2009 Fairchild Semiconductor Corporation HUF75345G3, HUF75345P3, HUF75345S3S Rev. B2
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