Fairchild FDT3N40 service manual

FDT3N40

400V N-Channel MOSFET

FDT3N40 400V N-Channel MOSFET

November 2009

TM

UniFET

Features

• 2A, 400V, R

• Low gate charge ( typical 4.5 nC)

•Low C

•Fast switching

• 100% avalanche tested

• Improved dv/dt capability

( typical 3.7 pF)

rss

= 3.4 @VGS = 10 V

DS(on)

D

G

S

SOT-223

FDT Series

Description

These N-Channel enhancement mode power field effect
transistors are produced using Fairchild’s proprietary, planar
stripe, DMOS technology.

This advanced technology has been especially tailored to
minimize on-state resistance, provide superior switching
performance, and withstand high energy pulse in the avalanche
and commutation mode. These devices are well suited for high
efficient switched mode power supplies and active power factor
correction.

Absolute Maximum Ratings

Symbol Parameter FDT3N40 Unit

V

DSS

I

D

I

DM

V

GSS

E

AS

I

AR

E

AR

dv/dt Peak Diode Recovery dv/dt
P

D

T

J, TSTG

T

L

* Drain current limited by maximum junction temperature

Drain-Source Voltage 400 V
Drain Current - Continuous (TC = 25C)

- Continuous (T
Drain Current - Pulsed
Gate-Source voltage 30 V
Single Pulsed Avalanche Energy
Avalanche Current (Note 1) 2A
Repetitive Avalanche Energy (Note 1) 0.2 mJ

Power Dissipation (TC = 25C)

- Derate above 25C
Operating and Storage Temperature Range -55 to +150 C
Maximum Lead Temperature for Soldering Purpose,

1/8” from Case for 5 Seconds

= 100C)

C

(Note 1)

(Note 2)

(Note 3) 4.5 V/ns

*

2.0

*

1.2

*

8.0

46 mJ

2

0.02

300 C

Thermal Characteristics

A
A

A

W

W/C

Symbol Parameter Typ Max Unit

*

R

JA

* Surface Mounted on JESD51-3 Board, T<0.1sec.

©2009 Fairchild Semiconductor Corporation 1 www.fairchildsemi.com

FDT3N40 Rev. A

Thermal Resistance, Case-to-Sink Typ. -- 60 C/W

Package Marking and Ordering Information

Device Marking Device Package Reel Size Tape Width Quantity

FDT3N40 FDT3N40TF SOT-223 330mm 12mm 4000

FDT3N40 400V N-Channel MOSFET

Electrical Characteristics T

= 25°C unless otherwise noted

C

Symbol Parameter Conditions Min. Typ. Max Units

Off Characteristics

BV

DSS

BV
/ T

I

DSS

I

GSSF

I

GSSR

On Characteristics

V

GS(th)

R

DS(on)

g

FS

Dynamic Characteristics

C

iss

C

oss

C

rss

Switching Characteristics

t

d(on)

t

r

t

d(off)

t

f

Q

g

Q

gs

Q

gd

Drain-Source Diode Characteristics and Maximum Ratings

I

S

I

SM

V

SD

t

rr

Q

rr

Drain-Source Breakdown Voltage VGS = 0V, ID = 250A 400 -- -- V
Breakdown Voltage Temperature

DSS

Coefficient

J

Zero Gate Voltage Drain Current VDS = 400V, VGS = 0V

I

= 250A, Referenced to 25C--0.4--V/C

D

V

= 320V, TC = 125C

DS

--

--

--

--

1

10

A
A

Gate-Body Leakage Current, Forward VGS = 30V, VDS = 0V -- -- 100 nA
Gate-Body Leakage Current, Reverse VGS = -30V, VDS = 0V -- -- -100 nA

Gate Threshold Voltage VDS = VGS, ID = 250A3.0--5.0V
Static Drain-Source

On-Resistance
Forward Transconductance VDS = 40V, ID = 1A

Input Capacitance VDS = 25V, VGS = 0V,
Output Capacitance -- 30 40 pF

V

= 10V, ID = 1A -- 2.8 3.4 

GS

(Note 4)

-- 2 -- S

-- 173 225 pF

f = 1.0MHz

Reverse Transfer Capacitance -- 3.7 6 pF

Turn-On Delay Time VDD = 200V, ID = 2A

R

= 25

Turn-On Rise Time -- 30 70 ns

G

-- 10 30 ns

Turn-Off Delay Time -- 10 30 ns
Turn-Off Fall Time -- 25 60 ns
Total Gate Charge VDS = 320V, ID = 2A

V

= 10V

Gate-Source Charge -- 1.2 -- nC

GS

Gate-Drain Charge -- 2 -- nC

(Note 4, 5)

-- 4.5 6 nC

(Note 4, 5)

Maximum Continuous Drain-Source Diode Forward Current -- -- 2 A
Maximum Pulsed Drain-Source Diode Forward Current -- -- 8 A
Drain-Source Diode Forward Voltage VGS = 0V, IS = 2A -- -- 1.4 V
Reverse Recovery Time VGS = 0V, IS = 2A

dI

/dt =100A/s (Note 4)

Reverse Recovery Charge -- 0.75 -- C

F

-- 210 -- ns

NOTES:

1. Repetitive Rating: Pulse width limited by maximum junction temperature

2. L = 10mH, IAS = 2A, VDD = 50V, RG = 25, Starting TJ = 25C

3. ISD  2A, di/dt  200A/s, VDD  BV

4. Pulse Test: Pulse width  300s, Duty Cycle  2%

5. Essentially Independent of Operating Temperature Typical Characteristics

, Starting TJ = 25C

DSS

FDT3N40 Rev. A

2 www.fairchildsemi.com

Typical Performance Characteristics

45678910

10

0

10

1

150oC

25oC

-55oC

* Notes :

1. V

DS

= 40V

2. 250

s Pulse Test

I

D

, Drain Current [A]

V

, Gate-Source Voltage [V]

10

-1

10

0

10

1

10

-2

10

-1

10

0

10

1

V

GS

Top : 15.0 V

10.0 V

8.0 V

7.0 V

6.5 V

6.0 V
Bottom : 5.5 V

* Notes :

1. 250

s Pulse Test

2. T

C

= 25oC

I

D

, Drain Current [A]

V

, Drain-Source Voltage [V]

0123456

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

VGS = 20V

VGS = 10V

* Note : TJ = 25oC

R

DS(ON)

[], Drain-Source On-Resistance

ID, Drain Current [A]

0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0

10

-1

10

0

10

1

150oC

* Notes :

1. V

GS

= 0V

2. 250

s Pulse Test

25oC

I

DR

, Reverse Drain Current [A]

VSD, Source-Drain voltage [V]

10

-1

10

0

10

1

0

50

100

150

200

250

300

350

C

iss

= Cgs + Cgd (Cds = shorted)

C

oss

= Cds + C

gd

C

rss

= C

gd

* Note :

1. V

GS

= 0 V

2. f = 1 MHz

C

rss

C

oss

C

iss

Capacitances [pF]

VDS, Drain-Source Voltage [V]

012345

0

2

4

6

8

10

12

VDS = 200V

VDS = 80V

VDS = 320V

* Note : ID = 2A

V

GS

, Gate-Source Voltage [V]

QG, Total Gate Charge [nC]

Figure 1. On-Region Characteristics Figure 2. Transfer Characteristics

Figure 3. On-Resistance Variation vs. Figure 4. Body Diode Forward Voltage

Drain Current and Gate Voltage Variation vs. Source Current

and Temperatue

FDT3N40 400V N-Channel MOSFET

Figure 5. Capacitance Characteristics Figure 6. Gate Charge Characteristics

FDT3N40 Rev. A

3 www.fairchildsemi.com

Typical Performance Characteristics (Continued)

-100 -50 0 50 100 150 200

0.0

0.5

1.0

1.5

2.0

2.5

3.0

* Notes :

1. V

GS

= 10 V

2. I

D

= 1 A

R

DS(ON)

, (Normalized)

Drain-Source On-Resistance

TJ, Junction Temperature [oC]

-100 -50 0 50 100 150 200

0.8

0.9

1.0

1.1

1.2

* Notes :

1. V

GS

= 0 V

2. I

D

= 250A

BV

DSS

, (Normalized)

Drain-Source Breakdown Voltage

TJ, Junction Temperature [oC]

10

0

10

1

10

2

10

-2

10

-1

10

0

10

1

100 ms

1 ms

10 s

DC

10 ms

100 s

Operation in This Area
is Limited by R

DS(on)

* Notes :

1. T

C

= 25 oC

2. T

J

= 150 oC

3. Single Pulse

I

D

, Drain Current [A]

VDS, Drain-Source Voltage [V]

25 50 75 100 125 150

0.0

0.5

1.0

1.5

2.0

2.5

I

D

, Drain Current [A]

TC, Case Temperature [oC]

10

-5

10

-4

10

-3

10

-2

10

-1

10

0

10

1

10

2

10

3

10

-2

10

-1

10

0

10

1

10

2

* Notes :

1. Z

JA

(t) = 60 oC/W Max.

2. D u ty F ac to r , D = t

1/t2

3. TJM - TC = PDM * Z

JC

(t)

single pulse

D=0.5

0.02

0.2

0.05

0.1

0.01

Z

JA

(t), Thermal Response

t1, Sq u a re W ave P u lse D u ra tion [se c ]

t

1

P

DM

t

2

Figure 7. Breakdown Voltage Variation Figure 8. On-Resistance Variation

vs. Temperature vs. Temperature

Figure 9. Maximum Safe Operating Area Figure 10. Maximum Drain Current

vs. Case Temperature

FDT3N40 400V N-Channel MOSFET

Figure 11. Transient Thermal Response Curve

FDT3N40 Rev. A

4 www.fairchildsemi.com

Gate Charge Test Circuit & Waveform

Resistive Switching Test Circuit & Waveforms

Unclamped Inductive Switching Test Circuit & Waveforms

FDT3N40 400V N-Channel MOSFET

FDT3N40 Rev. A

5 www.fairchildsemi.com

Peak Diode Recovery dv/dt Test Circuit & Waveforms

FDT3N40 400V N-Channel MOSFET

FDT3N40 Rev. A

6 www.fairchildsemi.com

Mechanical Dimensions

SOT-223

FDT3N40 400V N-Channel MOSFET

FDT3N40 Rev. A

7 www.fairchildsemi.com

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Definition of Terms

Datasheet Identification Product Status Definition

Advance Information Formative / In Design

Preliminary First Production

No Identification Needed Full Production

Obsolete Not In Production

Datasheet contains the design specifications for product development. Specifications may change in
any manner without notice.

Datasheet contains preliminary data; supplementary data will be published at a later date. Fairchild
Semiconductor reserves the right to make changes at any time without notice to improve design.

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Rev. I44

© 2008 Fairchild Semiconductor Corporation www.fairchildsemi.com