Fairchild FDS9934C service manual
FDS9934C
FDS9934C
Complementary
March 2006
Features
These dual N- and P-Channel enhancement mode
power field effect transistors are produced using
Fairchild Semiconductor’s advanced PowerTrench
process that has been especially tailored to minimize
on-state ressitance and yet maintain superior switching
performance.
These devices are well suited for low voltage and
battery powered applications where low in-line power
loss and fast switching are required.
D2
D
D2
D
D1
D
D1
D
SO-8
Pin 1
SO-8
S1
Absolute Maximum Ratings T
V
DSS
V
GSS
I
D
Drain-Source Voltage
Gate-Source Voltage
Drain Current – Continuous (Note 1a)
G2
S2
G
G1
S
S
S
=25oC unless otherwise noted
A
– Pulsed
P
D
Power Dissipation for Dual Operation 2
Power Dissipation for Single Operation (Note 1a) 1.6
TJ, T
STG
Operating and Storage Junction Temperature Range –55 to +150
• Q1: 6.5 A, 20 V. R
R
• Q2: –5 A, –20 V,R
R
Q2
5
6
Q1
7
8
Q1 Q2
±10
6.5 –5
(Note 1b)
(Note 1c)
= 30 mΩ @ VGS = 4.5 V
DS(ON)
= 43 mΩ @ VGS = 2.5 V.
DS(ON)
= 55 mΩ @ VGS = –4.5 V
DS(ON)
= 90 mΩ @ VGS = –2.5 V
DS(ON)
Ratings UnitsSymbol Parameter
20 –20
±12
20 –30
1
0.9
4
3
2
1
V
V
A
W
°C
Thermal Characteristics
R
θJA
R
θJC
Thermal Resistance, Junction-to-Ambient (Note 1a) 78
Thermal Resistance, Junction-to-Case (Note 1) 40
Package Marking and Ordering Information
Device Marking Device Reel Size Tape width Quantity
FDS9934C FDS9934C 13’’ 12mm 2500 units
2006 Fairchild Semiconductor Corporation
FDS9934C Rev D(W)
°C/W
°C/W
Electrical Characteristics T
FDS9934C
= 25°C unless otherwise noted
A
Symbol Parameter Test Conditions Type Min Typ Max Units
Off Characteristics
BV
DSS
∆BVDSS
∆T
I
DSS
I
GSS
Drain-Source Breakdown
Voltage
Breakdown Voltage
Temperature Coefficient
J
Zero Gate Voltage Drain
Current
VGS = 0 V, ID = 250 µA
VGS = 0 V, ID = –250 µA
ID = 250 µA, Referenced to 25°C
ID = –250 µA, Referenced to 25°C
VDS = 16V, VGS = 0 V
VDS = –16V, VGS = 0 V
Gate-Body Leakage VGS = ±8 V, VDS = 0 V
VGS = ±12 V, VDS = 0 V
Q1Q2 20
–20
Q1
Q2
Q1
Q2
Q1
Q2
14
–14
1
–1
±100
±100
V
mV/°C
µA
nA
V
GS(th)
∆VGS(th)
???∆T
J
R
DS(on)
Gate Threshold Voltage VDS = VGS, ID = 250 µA
Gate Threshold Voltage
Temperature Coefficient
Static Drain-Source
On-Resistance
I
g
D(on)
FS
On-State Drain Current VGS = 4.5V, VDS = 5 V
Forward Transcoductance VDS = –5 V, ID = 6.5 A
Dynamic Characteristics
C
iss
C
oss
C
rss
R
G
Input Capacitance Q1
Output Capacitance Q1
Reverse Transfer Capacitance
Gate Resistance VGS = 15 mV, f = 1.0 MHz Q1
VDS = VGS, ID = 250 µA
ID = 250 uA, Referenced to 25°C
ID = 250 uA, Referenced to 25°C
VGS = 4.5 V, ID = 6.5 A
VGS = 2.5 V, ID = 5.4 A
V
= 4.5 V, ID =6.5A, TJ=125°C
GS
VGS = –4.5 V, ID = –3.2 A
VGS = –2.5 V, ID = –1.0 A
V
= –4.5 V,ID = –3.2 A, TJ=125°C
GS
VGS = –4.5 V, VDS = – 5 V
VDS = 5 V, ID = – 5.5 A
Q1
VDS = 10V, VGS = 0 V,
f = 1.0 MHz
Q2
VDS = –10 V, VGS = 0 V,
f = 1.0 MHz
Q1Q20.6
–0.6 1–0.9
Q1
Q2
–3
3
Q1 25
35
35
Q2 43
64
55
Q1Q2 15
–16
Q1
Q2
22
14
650
Q2
955
150
Q2
Q1
Q2
215
85
115
1.4
Q2
4.9
1.5
–1.2
30
43
50
55
90
76
V
mV/°C
mΩ
mΩ
A
S
S
pF
pF
pF
Ω
FDS9934C Rev D(W)
Electrical Characteristics (continued) T
FDS9934C
= 25°C unless otherwise noted
A
Symbol Parameter Test Conditions Type Min Typ Max Units
Switching Characteristics (Note 2)
t
t
t
t
Q
Q
Q
d(on)
r
d(off)
f
g
gs
gd
Turn-On Delay Time Q1
Turn-On Rise Time Q1
Q1
VDD = 10 V, ID = 1 A,
VGS = 4.5V, R
GEN
= 6Ω
Q2
Q2
Turn-Off Delay Time Q1
Turn-Off Fall Time
Q2
VDD = –6V, ID = –1A,
VGS = –4.5V, R
GEN
= 6Ω
Q2
Q1
Q2
Total Gate Charge Q1
Q1
VDS = 10 V, ID = 3 A, VGS = 4.5V
Q2
Gate-Source Charge Q1
Q2
Gate-Drain Charge
Q2
VDS = –6 V, ID = –3.2 A,VGS = –4.5 V
Q1
Q2
8
1629ns
16
9
1718ns
9
15
2641ns
25
4
9
19
6.2
8.7912
1.2
2.1
1.7
2.1
9
Drain–Source Diode Characteristics and Maximum Ratings
I
S
V
SD
t
rr
Q
rr
Notes:
1. R
θJA
the drain pins. R
Maximum Continuous Drain-Source Diode Forward Current Q1
Q2
Drain-Source Diode Forward
Voltage
Diode Reverse Recovery
Time
Diode Reverse Recovery
Charge
is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of
is guaranteed by design while R
θJC
VGS = 0 V, IS = 1.3 A (Note 2)
VGS = 0 V, IS = -2.0 A (Note 2)
Q1
IF = 6.5 A, diF/dt = 100 A/µs
Q2
IF = -3.2 A, diF/dt = 100 A/µs
is determined by the user's board design.
θCA
Q1
Q2
Q1
Q2
Q1
Q2
0.73
–0.8
1.3
–1.3
1.2
–1.2
15
20
5
7
ns
nC
nC
nC
A
V
nS
nC
a) 78°C/W when
mounted on a
0.5 in2 pad of 2 oz
copper
Scale 1 : 1 on letter size paper
2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%
b) 125°C/W when
mounted on a .02 in
pad of 2 oz copper
2
c) 135°C/W when mounted on a
minimum pad.
FDS9934C Rev D(W)
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