Fairchild FDG6318P service manual

January 2003

FDG6318P

Dual P-Channel, Digital FET

FDG6318P

General Description

These dual P-Channel logic level enhancement mode
MOSFET are produced using Fairchild Semiconductor’s
advanced PowerTrench process that has been
especially tailored to minimize on-state resistance. This
device has been designed especially for low voltage
applications as a replacement for bipolar digital
transistors and small signal MOSFETS.

Applications

• Battery management

Features

• –0.5 A, –20 V. R
R

• Very low level gate drive requirements allowing direct
operation in 3V circuits (V

• Compact industry standard SC70-6 surface mount
package

= 780 mΩ @ VGS = –4.5 V

DS(ON)

= 1200 mΩ @ VGS = –2.5 V

DS(ON)

< 1.5V).

GS(th)

S

G

D

S

G

1 or 4

2 or 5

6 or 3

5 or 2

D

G

D

Pin 1

G

S

SC70-6

The pinouts are symmetrical; pin 1 and pin 4 are interchangeable.

Absolute Maximum Ratings

TA=25oC unless otherwise noted

3 or 6

D

4 or 1

S

Symbol Parameter Ratings Units

V

Drain-Source Voltage –20 V

DSS

V

Gate-Source Voltage ±12 V

GSS

ID Drain Current – Continuous
– Pulsed –1.8
PD Power Dissipation for Single Operation
TJ, T

Operating and Storage Junction Temperature Range –55 to +150

STG

(Note 1)

–0.5 A

(Note 1)

0.3 W

°C

Thermal Characteristics

R

θJA

Thermal Resistance, Junction-to-Ambient

(Note 1)

415

Package Marking and Ordering Information

Device Marking Device Reel Size Tape width Quantity

2003 Fairchild Semiconductor Corporation

.38 FDG6318P 7’’ 8mm 3000 units

°C/W

FDG6318P Rev C (W)

FDG6318P

Electrical Characteristics

TA = 25°C unless otherwise noted

Symbol Parameter Test Conditions Min Typ Max Units
Off Characteristics

BV

Drain–Source Breakdown

DSS

Voltage

∆BV

DSS

∆T

J

I

Zero Gate Voltage Drain Current VDS = –16 V, VGS = 0 V –1

DSS

I

Gate–Body Leakage

GSS

On Characteristics

V

GS(th)

∆V

GS(th)

∆TJ
R

DS(on)

Breakdown Voltage Temperature
Coefficient

(Note 2)

Gate Threshold Voltage

Gate Threshold Voltage
Temperature Coefficient

Static Drain–Source

On–Resistance

I

On–State Drain Current VGS = –4.5 V, VDS = –5 V –1.8 A

D(on)

V

= 0 V, ID = –250 µA

GS

= –250 µA, Referenced to 25°C

I

D

V

= ±12 V, VDS = 0 V

GS

V

= VGS, ID = –250 µA

DS

= –250 µA, Referenced to 25°C

I

D

VGS = –4.5 V, ID = –0.5 A
V

= –2.5 V, ID = –0.4 A

GS

= –4.5 V, ID = –0.5 A, TJ=125°C

V

GS

–20 V

–10

mV/°C

µA

±100

nA

–0.65 –1.2 –1.5 V

2

580

980

1200

780

780

mV/°C

mΩ

gFS Forward Transconductance VDS = –5 V, ID = –0.5 A 1.1 S

Dynamic Characteristics

C

Input Capacitance 83 pF

iss

C

Output Capacitance 20 pF

oss

C

Reverse Transfer Capacitance

rss

RG Gate Resistance

Switching Characteristics

t

Turn–On Delay Time 6 12 ns

d(on)

(Note 2)

tr Turn–On Rise Time 12 22 ns
t

Turn–Off Delay Time 6 13 ns

d(off)

tf Turn–Off Fall Time
Qg Total Gate Charge 0.86 1.2 nC
Qgs Gate–Source Charge 0.22 nC
Qgd Gate–Drain Charge

= –10 V, V

V

DS

GS

f = 1.0 MHz

V

= 15 mV, f = 1.0 MHz

GS

V

= –10 V, ID = 1 A,

DD

= –4.5 V, R

V

GS

V

= –10 V, ID = –0.6 A,

DS

= –4.5 V

V

GS

GEN

= 0 V,

= 6 Ω

11 pF

12.1

Ω

1 3 ns

0.25 nC

Drain–Source Diode Characteristics and Maximum Ratings

IS Maximum Continuous Drain–Source Diode Forward Current –0.25 A
VSD Drain–Source Diode Forward

Voltage

trr Reverse Recovery Time

Qrr Reverse Recovery Charge

Notes:

1. R

is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of

θJA

the drain pins. R

2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%

is guaranteed by design while R

θJC

VGS = 0 V, IS = –0.25 A

I

= –0.5 A,

F

= 100 A/µs

d

iF/dt

is determined by the user's board design. R

θJA

(Note 2)

–0.83 –1.2 V

12.6

2.52

= 415°C/W when mounted on a minimum pad .

θJA

FDG6318P Rev C (W)

ns
nC

Typical Characteristics

FDG6318P

1.8
VGS = -10.0V

-6.0V

1.2

0.6

, DRAIN CURRENT (A)

D

-I

0

00.511.522.53

-V

, DRAIN-SOURCE VOLTAGE (V)

DS

-4.5V

-3.5V

-3.0V

-2.5V

-2.0V

1.75

VGS = -3.5V

1.5

1.25

, NORMALIZED

DS(ON)

R

1

DRAIN-SOURCE ON-RESISTANCE

0.75
0 0.4 0.8 1.2 1.6

-4.0V

-4.5V

-5.0V

-I

, DRAIN CURRENT (A)

D

-6.0V

-10.0V

Figure 1. On-Region Characteristics. Figure 2. On-Resistance Variation with

Drain Current and Gate Voltage.

1.4
ID = -0.5A

1.3

1.2

1.1

, NORMALIZED

DS(ON)

0.9

R

0.8

DRAIN-SOURCE ON-RESIST ANCE

0.7

= -4.5V

V

GS

1

-50-250 255075100125

, JUNCTION TEMPERATURE (oC)

T

J

Figure 3. On-Resistance Variation with

Temperature.

1.8

1.4

1

, ON-RESISTANCE (OHM)

0.6

DS(ON)

R

0.2

TA = 25oC

0246810

-V

, GATE TO SOURCE VOLTAGE (V)

GS

TA = 125oC

Figure 4. On-Resistance Variation with

Gate-to-Source Voltage.

ID = -0.25A

1.8

VDS = -5V

1.2

0.6

, DRAIN CURRENT (A)

D

-I

0

0.511.522.533.5

, GATE TO SOURCE VOLTAGE (V)

-V

GS

TA = -55oC

125oC

Figure 5. Transfer Characteristics. Figure 6. Body Diode Forward Voltage Variation

25oC

10

VGS = 0V

1

0.1

0.01

0.001

, REVERSE DRAIN CURRENT (A)

S

-I

0.0001
0 0.2 0.4 0.6 0.8 1 1.2 1.4

TA = 125oC

25oC

-55oC

-V

, BODY DIODE FORWARD VOLTAGE (V)

SD

with Source Current and Temperature.

FDG6318P Rev C (W)

Typical Characteristics

FDG6318P

10

ID = -0.5A

8

6

4

2

, GATE-SOURCE VOLTAGE (V)

GS

-V

0

0 0.3 0.6 0.9 1.2 1.5 1.8 2.1

VDS = -5V

Q

, GATE CHARGE (nC)

g

-10V

-15V

120

80

40

CAPACITANCE (pF)

C

rss

0

048121620

C

oss

, DRAIN TO SOURCE VOLTAGE (V)

-V

DS

C

iss

Figure 7. Gate Charge Characteristics. Figure 8. Capacitance Characteristics.

10

R

LIMIT

DS(ON)

100µs

1

100ms

1s

VGS = -4.5V

0.1

, DRAIN CURRENT (A)

SINGLE PULSE

D

-I

0.01

= 415oC/W

R

θJA

T

= 25oC

A

0.1 1 10 100

DC

, DRAIN-SOURCE VOLTAGE (V)

-V

DS

1ms

10ms

30

24

18

12

POWER (W)

6

0

0.0001 0.001 0.01 0.1 1 10 100

SINGLE PULSE TIME (SEC)

SINGLE PULSE

R

Figure 9. Maximum Safe Operating Area. Figure 10. Single Pulse Maximum

Power Dissipation.

= 415oC/W

θJA

T

= 25oC

A

f = 1MHz

V

= 0 V

GS

1

D = 0.5

0.2

0.1

0.01

r(t), NORMALIZED EFFECTIVE

TRANSIENT THERMAL RESISTANCE

0.001

0.1

0.05

0.02

0.01

SINGLE PULSE

0.0001 0.001 0.01 0.1 1 10 100

t

, TIME (sec)

1

R

(t) = r(t) * R

θJA

R

= 415 °C/W

θJA

P(pk)

t

1

t

2

T

- TA = P * R

J

Duty Cycle, D = t

θJA

(t)

θJA

/ t

1

2

Figure 11. Transient Thermal Response Curve.

Thermal characterization performed using the conditions described in Note 1.
Transient thermal response will change depending on the circuit board design.

FDG6318P Rev C (W)

TRADEMARKS

The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.

ACEx
ActiveArray
Bottomless
CoolFET
CROSSVOL T
DOME
EcoSPARK
E2CMOS
EnSigna

TM

TM

FACT
FACT Quiet Series

â

FAST
FASTr
FRFET
GlobalOptoisolator
GTO
HiSeC

I2C
Across the board. Around the world.
The Power Franchise
Programmable Active Droop

ImpliedDisconnect
ISOPLANAR
LittleFET
MicroFET
MicroPak
MICROWIRE
MSX
MSXPro
OCX
OCXPro
OPTOLOGIC

â

OPTOPLANAR

PACMAN
POP
Power247
PowerTrench

â

QFET
QS
QT Optoelectronics
Quiet Series
RapidConfigure
RapidConnect
SILENT SWITCHER
SMART START

SPM
Stealth
SuperSOT-3
SuperSOT-6
SuperSOT-8
SyncFET
TinyLogic
TruTranslation
UHC
UltraFET

â

VCX

â

â

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER
NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILDS PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:

1. Life support devices or systems are devices or
systems which, (a) are intended for surgical implant into
the body, or (b) support or sustain life, or (c) whose
failure to perform when properly used in accordance
with instructions for use provided in the labeling, can be
reasonably expected to result in significant injury to the
user.

PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification Product Status Definition

Advance Information

Preliminary

No Identification Needed

Formative or
In Design

First Production

Full Production

2. A critical component is any component of a life
support device or system whose failure to perform can
be reasonably expected to cause the failure of the life
support device or system, or to affect its safety or

effectiveness.

This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.

This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.

This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.

Obsolete

Not In Production

This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.

Rev. I2