PFM Mode for High Efficiency in Light Load (Forced PWM
Available on MODE Pin)
Minimum PFM Frequency Avoids Audible Noise
270µA Typical Quiescent Current in PFM Mode
External Frequency Synchronization
Low Ripple Light-Load PFM Mode with Forced
PWM Control
Power Good Output
Internal Soft-Start
Input Under-Voltage Lockout (UVLO)
Thermal Shutdown and Overload Protection
12-Lead 3x3.5mm MLP
Applications
Description
The FAN5354 is a step-down switching voltage regulator that
delivers an adjustable output from an input voltage supply of
2.7V to 5.5V. Using a proprietary architecture with
synchronous rectification, the FAN5354 is capable of
delivering 3A at over 85% efficiency, while maintaining a
very high efficiency of over 80% at load currents as low as
2mA. The regulator operates at a nominal fixed frequency of
3MHz, which reduces the value of the external components
to 470nH for the output inductor and 10µF for the output
capacitor. Additional output capacitance can be added to
improve regulation during load transients without affecting
stability and inductance up to 1.2µH may be used with
additional output capacitance.
At moderate and light loads, pulse frequency modulation
(PFM) is used to operate the device in power-save mode
with a typical quiescent current of 270µA. Even with such a
low quiescent current, the part exhibits excellent transient
response during large load swings. At higher loads, the
system automatically switches to fixed-frequency control,
operating at 3MHz. In shutdown mode, the supply current
drops below 1µA, reducing power consumption. PFM mode
can be disabled if constant frequency is desired. To avoid
audible noise, the regulator limits its minimum PFM
frequency. The FAN5354 is available in 12-lead 3x3.5mm
MLP package.
Set-Top Box
Hard Disk Drive
Communications Cards
DSP Power
Figure 1. Typical Application
Ordering Information
Part Number Temperature Range Package Packing Method
FAN5354MPX -40 to 85°C MLP-12, 3x3.5mm Tape and Reel
Table 1. Recommended External Components for 3A Maximum Load Current
Component Description Vendor Parameter Typ. Units
IHLP1616ABER47M01 (Vishay)
SD12-R47-R (Coiltronics)
L1 470nH Nominal
VLC5020T-R47N (TDK)
(TDK)
LQH55PNR47NT0 (Murata)
C
C
C
C
R3
OUT
IN
IN1
VCC
10nF, 25V, X7R, 0402
(1)
4.7µF, 6.3V, X5R, 0603
2 Pieces
10µF, 6.3V, X5R, 0805
10µF, 6.3V, X5R, 0805
Resistor: 1Ω 0402
GRM21BR60J106M (Murata)
C2012X5R0J106M (TDK)
GRM155R71E103K (Murata)
C1005X7R1E103K (TDK)
GRM188R60J475K (Murata)
C1608X5R0J475K (TDK)
Any R 1
Note:
1. R3 is optional and improves IC power supply noise rejection. See Layout recommendations for more information.
L 0.47
DCR 20
C 10.0
C 10 nF
C 4.7
µH
mΩ
µF
µF
Ω
Pin Configuration
FAN5354 — 3MHz, 3A Synchronous Buck Regulator
FB
VOU T
PGN D
PGN D
SW
SW
1
2
3
4
5
P1
(GND)
12
11
10
9
8
7
MODE
PGO OD
EN
VCC
PVIN
PVIN6
Figure 2. 12-Pin, 3x3.5mm MLP (Top View)
Pin Definitions
Pin # Name Description
1 FB
2 VOUT
3, 4 PGND
5, 6 SW
P1 GND
7, 8 PVIN
9 VCC
10 EN
11 PGOOD
12 MODE
Note:
2. P1 is the bottom heat-sink pad. Ground plane should flow through pins 3, 4, and P1 and can be extended through pin 11 if
PGOOD’s function is not required, and through pin 12 if MODE is to be grounded, to improve IC cooling.
FB. Connect to resistor divider. The IC regulates this pin to 0.8V.
VOUT. Sense pin for VOUT. Connect to COUT.
Power Ground. Low-side MOSFET is referenced to this pin. CIN and COUT should be returned with a minimal path to these pins.
Switching Node. Connect to inductor.
Ground. All signals are referenced to this pin.
Power Input Voltage. Connect to input power source. Connect to CIN with minimal path.
IC Bias Supply. Connect to input power source. Use a separate bypass capacitor CVCC from this pin
to the P1 GND terminal between pins 1 and 12.
Enable. The device is in shutdown mode when this pin is LOW. Do not leave this pin floating.
Power Good. This open-drain pin pulls LOW if the output falls out of regulation or is in soft-start.
MODE / Sync. A logic 0 allows the IC to automatically switch to PFM during light loads. When held
HIGH, the IC to stays in PWM mode. The regulator also synchronizes its switching frequency to the
frequency provided on this pin. Do not leave this pin floating.
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above
the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended
exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum
ratings are stress ratings only.
Symbol Parameter Min. Max. Units
VIN
SW, PVIN, VCC Pins
Other Pins -0.3 VCC + 0.3
V
INOV_SLEW
R
PGOOD
ESD
Maximum Slew Rate of VIN Above 6.5V when PWM is Switching 15 V/ms
Pull-Up Resistance from PGOOD to VCC 1
Electrostatic Discharge
Protection Level
TJ Junction Temperature –40 +150 °C
T
Storage Temperature –65 +150 °C
STG
TL Lead Soldering Temperature, 10 Seconds +260 °C
Note:
3. Lesser of 7V or VCC+0.3V.
IC Not Switching -0.3 7.0
IC Switching -0.3 6.5
Human Body Model per JESD22-A114 2
Charged Device Model per JESD22-C101 2
V
(3)
V
KΩ
KV
FAN5354 — 3MHz, 3A Synchronous Buck Regulator
Recommended Operating Conditions
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended operating
conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not recommend
exceeding them or designing to Absolute Maximum Ratings.
Symbol Parameter Min. Typ. Max. Units
V
Supply Voltage Range 2.7 5.5 V
CC, VIN
V
Output Voltage Range 0.8 90% Duty Cycle V
OUT
I
Output Current 0 3 A
OUT
L Inductor 0.47 µH
CIN Input Capacitor 10 µF
C
Output Capacitor 20 µF
OUT
TA Operating Ambient Temperature -40 +85 °C
TJ Operating Junction Temperature -40 +125 °C
Thermal Properties
Symbol Parameter Min. Typ. Max. Units
θJA
Junction-to-Ambient Thermal Resistance
Note:
4. Junction-to-ambient thermal resistance is a function of application and board layout. This data is measured with four-layer
1s2p boards in accordance to JESD51- JEDEC standard. Special attention must be paid not to exceed junction
temperature T