Fairchild BSS84 User Manual

July 2002

BSS84

P-Channel Enhancement Mode Field Effect Transistor

General Description

These P-Channel enhancement m ode field effect transistors are produced usi ng Fai rchild’s proprietary, high cell density, DMOS technology. This very high density process has been designed to minimize onstate resistance, provide rugged and reliable performance and fast switching. They can be used, with a minimum of effort, in most appl i cations requiring up to

0.13A DC and can deliver current up to 0.52A. This product is particularly suited to low voltage applications requiring a low current high side switch.

Features

• −0.13A, −50V. R

• Voltage controlled p-channel s mall signal switch

• High density cell design for low R

= 10Ω @ VGS = −5 V

DS(ON)

• High saturation current

BSS84

D

S

SG

SOT-23

Absolute Maximum Ratings T

G

o

=25

C unless otherwise noted

A

Symbol Parameter Ratings Units

V

Drain-Source Voltage

DSS

V

Gate-Source Voltage

GSS

ID Drain Current – Continuous (Note 1) – Pulsed PD

TJ, T TL

STG

Maximum Power Dissipation (Note 1) 0.36 Derate Above 25°C

Operating and Storage Junction Temperature Range

Maximum Lead Temperature for Soldering Purposes, 1/16” from Case for 10 Seconds

−50 ±20

−0.13

−0.52

2.9

−55 to +150 °C 300

Thermal Characteristics

R

θJA

Thermal Resistance, Junction-to-Ambient

(Note 1) 350

mW/°C

°C/W

V V A

W

Package Marking and Ordering Information

Device Marking Device Reel Size Tape width Quantity

SP BSS84 7’’ 8mm 3000 units

2002 Fairchild Semiconductor Corporation

BSS84 Rev B(W)

BSS84

Electrical Characteristics T

= 25°C unless otherwise noted

A

Symbol Parameter Test Conditions Min Typ Max Units Off Characteristics

BV

Drain–Source Breakdown Voltage

DSS

∆BVDSS ∆T

J

I

Zero Gate Voltage Drain Current VDS = –50 V, VGS = 0 V –15

DSS

Breakdown Voltage Temperature Coefficient

I

Gate–Body Leakage.

GSS

= 0 V, ID = –250 µA

V

GS

I

= –250 µA,Referenced to 25°C

D

= –50 V,VGS = 0 V TJ = 125°C

V

DS

= ±20 V, VDS = 0 V

V

GS

–50 V

–48

mV/°C

µA

–60

±10

µA

nA

On Characteristics (Note 2)

V

Gate Threshold Voltage VDS = VGS, ID = –1 mA –0.8 –1.7 –2 V

GS(th)

∆VGS(th) ∆TJ

R

DS(on)

I

On–State Drain Current VGS = –5 V, VDS = – 10 V –0.6 A

D(on)

Gate Threshold Voltage Temperature Coefficient

Static Drain–Source

On–Resistance

= –1 mA,Referenced to 25°C

I

D

VGS = –5 V, ID = –0.10 A V

= –5 V,ID = –0.10 A,TJ=125°C

GS

3

1.2

1.9

10 17

mV/°C

Ω

gFS Forward Transconductance VDS = –25V, ID = – 0.10 A 0.05 0.6 S

Dynamic Characteristics

C

Input Capacitance 73 pF

iss

C

Output Capacitance 10 pF

oss

C

Reverse Transfer Capacitance

rss

RG Gate Resistance VGS = –15 mV, f = 1.0 MHz 9

= –25 V, V

V

DS

f = 1.0 MHz

= 0 V,

GS

5 pF

Ω

Switching Characteristics (Note 2)

t

Turn–On Delay Time 2.5 5 ns

d(on)

tr Turn–On Rise Time 6.3 13 ns t

Turn–Off Delay Time 10 20 ns

d(off)

tf Turn–Off Fall Time Qg Total Gate Charge 0.9 1.3 nC Qgs Gate–Source Charge 0.2 nC Qgd Gate–Drain Charge

= –30 V, ID = – 0.27A,

V

DD

= –10 V, R

V

GS

V

= –25 V, ID = –0.10 A,

DS

V

= –5 V

GS

GEN

= 6 Ω

4.8 9.6 ns

0.3 nC

Drain–Source Diode Characteristics and Maximum Ratings

IS Maximum Continuous Drain–Source Diode Forward Current –0.13 A VSD Drain–Source Diode Forward

VGS = 0 V, IS = –0.26 A(Note 2) –0.8 –1.2 V

Voltage

trr Diode Reverse Recovery Time 10 nS Qrr Diode Reverse Recovery Charge

Notes:

1. R

is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of

θJA

the drain pins. R

is guaranteed by design while R

θJC

a) 350°C/W when mounted on a

minimum pad..

θCA

= –0.10A

I

F

= 100 A/µs (Note 2)

d

iF/dt

is determined by the user's board design.

3 nC

Scale 1 : 1 on letter size paper

2. Pulse Test: Pulse Width ≤ 300 µs, Duty Cycle ≤ 2.0%

BSS84 Rev B(W)

E )

Typical Characteristics

BSS84

1

V

= -5V -4.5V

GS

0.8

0.6

0.4

, DRAIN CURRENT (A)

D

-I

0.2

0

012345

-V

DS

-3.5V

-3.0V

-2.5V

, DRAIN TO SOURCE VOL T AGE (V )

2

1.8 VGS=-3.0V

1.6

1.4

, NORMALIZED

1.2

DS(ON)

R

1

DRAIN-SOURCE ON-RESISTANCE

0.8

0 0.2 0.4 0.6 0.8 1

-3.5V

-4.0V

, DRAIN CURRENT (A)

-I

D

-4.5V

Figure 1. On-Region Characteristics. Figure 2. On-Resistance Variation with

Drain Current and Gate Voltage.

1.8 ID = -0.10A

1.6

1.4

1.2

, NORMALIZED

DS(ON)

0.8

R

0.6

DRAIN-SOURCE ON-RESISTANC

0.4

= -5V

V

GS

1

-50 -25 0 25 50 75 100 125 150

, JUNCTION TE MP E RATURE (oC)

T

J

5

4

3

, ON-RESISTANCE (OHM)

2

DS(ON)

R

TA = 25oC

1

2 2.5 3 3.5 4 4.5 5

TA = 125oC

, GATE TO SOURCE VOLTAGE (V)

-V

GS

-5.0V

ID = -0.05A

Figure 3. On-Resistance Variation with

Temperature.

1

VDS = -5V

0.8

0.6

0.4

, DRAIN CURRENT (A)

D

-I

0.2

0

1 1.5 2 2.5 3 3.5 4

, GATE TO SOURCE VOLTAGE (V)

-V

GS

TA = -55oC

125oC

25oC

Figure 4. On-Resistance Variation with

Gate-to-Source Voltage.

1

VGS = 0V

0.1

0.01

0.001

, REVERSE DRAIN CURRENT (A

S

-I

0.0001

0.0 0.2 0.4 0.6 0.8 1.0 1.2

TA = 125oC

25oC

-V

BODY DIODE FORWARD VOLTAGE (V)

SD,

-55oC

Figure 5. Transfer Characteristics. Figure 6. Body Diode Forward Voltage Variation

with Source Current and Temperature.

BSS84 Rev B(W)

t

,

(sec)

T

)

Typical Characteristics

BSS84

5

ID = -0.10A

4

3

2

1

, GATE-SOURCE VOLTAGE (V)

GS

-V

0

0 0.2 0.4 0.6 0.8 1

Q

g

VDS = -8V

, GATE CHARGE (nC)

-25V

-30V

100

80

60

40

CAPACITANCE (pF)

20

0

0 1020304050

C

ISS

C

OSS

C

RSS

-V

, DRAIN TO SOURCE VOLTAGE (V)

DS

Figure 7. Gate Charge Characteristics. Figure 8. Capacitance Characteristics.

1

R

LIMIT

DS(ON)

0.1

0.01

, DRAIN CURRENT (A)

D

-I

0.001

VGS = -5V

SINGLE PULSE

= 350oC/W

R

θ

JA

T

= 25oC

A

110100

, DRAIN-SOURCE VOLTAGE (V)

-V

DS

100ms

10s

1s

DC

10ms

100us

1ms

5

4

3

2

1

P(pk), PEAK TRANSIENT POWER (W)

0

0.01 0.1 1 10 100

t

, TIME (sec)

1

SINGLE PULSE R

θ

= 350°C/W

JA

T

= 25°C

A

f = 1 MHz V

= 0 V

GS

Figure 9. Maximum Safe Operating Area. Figure 10. Single Pulse Maximum

Power Dissipation.

1

D = 0.5

0.1

0.01

THERMAL RESISTANCE

0.001

r(t), NORMALIZED EFFECTIVE TRANSIEN

0.0001 0.001 0.01 0.1 1 10 100 1000

0.2

0.1

0.05

0.02

0.01

SINGLE PULSE

TIME

R

(t) = r(t) * R

JA

θ

R

= 350oC/W

θJA

P(pk

t

1

t

2

T

- TA = P * R

J

Duty Cycle, D = t

JA

θ

(t)

JA

θ

/ t

1

2

Figure 11. Transient Thermal Response Curve.

Thermal characterization performed using the conditions described in Note 1a. Transient thermal response will change depending on the circuit board design.

BSS84 Rev B(W)

TRADEMARKS

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DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILDS PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein:

1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, or (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in significant injury to the user.

PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification Product Status Definition

Advance Information

Preliminary

No Identification Needed

Formative or In Design

First Production

Full Production

2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or

effectiveness.

This datasheet contains the design specifications for product development. Specifications may change in any manner without notice.

This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design.

This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design.

Obsolete

Not In Production

This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only.

Rev. I