Fairchild 74ABT16244 service manual

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74ABT16244
16-Bit Buffer/Line Driver with 3-STATE Outputs

74ABT16244 16-Bit Buffer/Line Driver with 3-STATE Outputs

April 1992
Revised May 2005

General Description

The ABT16244 contains sixteen no n-inverting buffers with
3-STATE o utputs designed to be employed as a memory
and address driver, clock driver, or bus oriented transmit­ter/receiver. The device is nibble cont rolled. Individual 3­STATE con trol inputs can be shorted to gether for 8-bit or
16-bit operation.

Features

■ Separate control logic for each nibble

■ 16-bit version of the ABT244

■ Outputs sink capability of 64 mA, source capability of

32 mA

■ Guaranteed output skew

■ Guaranteed multiple output switching specifications

■ Output switching specified for both 50 pF and

250 pF loads

■ Guaranteed simultaneous switching noise level and

dynamic threshold performan ce

■ Guaranteed latchup protection

■ High impedance glitch free bus loading during entire

power up and power down cycle

■ Non-destructive hot insertion capability

Ordering Code:

Order Number Package Number Package Description

74ABT16244CSSC MS48A 48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300" Wide
74ABT16244CMTD MTD48 48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide

Devices are also available in Tape and Reel. Specify by appending the suffix letter “X” to the or dering code.

Logic Symbol

Connection Diagram

Pin Descriptions

Pin Names Description

OE

n

I

0–I15

O

0–O15

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Output Enable Inputs (Active LOW)

Inputs
Outputs

Truth Tables

OE

1

74ABT16244

L L L
L H H
H X Z

OE

2

L L L
L H H
H X Z

OE

3

L L L
L H H
H X Z

OE

4

L L L
L H H

H X Z

H HIGH Voltage Level
L

LOW Volt age Level
Immaterial

X

High Impedance

Z

Inputs Outputs

I0–I

3

O0–O

Inputs Outputs

I4–I

7

O4–O

Inputs Outputs

I8–I

11

O8–O

Inputs Outputs

I12–I

15

O12–O

Functional Description

The ABT16244 contai ns sixteen n on-inverting buffers with
3-STATE out puts. The device is nibble (4 bits) controll ed

3

with each nibble functi oning ident ically, but independent of
the other. The control pins can be shorted together to
obtain full 16-bit operation.

Logic Diagram

7

11

15

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Absolute Maximum Ratings(Note 1) Recommended Operating

Storage T emperature 65qC to 150qC

55q

Ambient Temperature under Bias
Junction Temperature under Bias

Pin Potential to Ground Pin

V

CC

Input Voltage (Note 2)
Input Current (Note 2)

C to 125qC

55q

C to 150qC



0.5V to 7.0V



0.5V to 7.0V



30 mA to 5.0 mA
Voltage Applied to Any Output
in the Disabled or



Power-Off State
in the HIGH State

0.5V to 5.5V



0.5V to V
Current Applied to Output
in LOW State (Max) twice the rated I
DC Latchup Source Current

OL



500 mA

Over Voltage Latchup (I/O) 10V

Conditions

Free Air Ambient Temperature
Supply Voltage
Minimum Input Edge Rate (
Data Input 50 mV/ns
Enab l e Input 20 mV/ns

CC

Note 1: Absolute maximum ratings are values beyond which the device
may be damaged or have its useful life impaired. Functional operation

(mA)

under these conditions is not implied.
Note 2: Either voltage limit or current limit is sufficient t o protect inputs.

'V/'

t)

DC Electrical Characteristics

Symbol Parameter Min Typ Max Units

V

Input HIGH Voltage 2.0 V Recognized HIGH Signal

IH

V

Input LOW Voltage 0.8 V Recognized LOW Signal

IL

V

Input Clamp Diode Voltage 1.2 V Min IIN 18 mA

CD

V

Output HIGH Voltage 2.5 V Min IOH 3 mA

OH

V

Output LOW Voltage 0.55 V Min IOL 64 mA

OL

I

Input HIGH Current 1

IH

I

Input HIGH Current

BVI

Breakdown Test

I

Input LOW Current 1

IL

V

Input Leakage Test 4.75 V 0.0 IID 1.9 PA

ID

Output Leakage Current 10 PA 0  5.5V V

I

OZH

I

Output Leakage Current 10 PA 0  5.5V V

OZL

I

Output Short-Circuit Current 100 275 mA Max V

OS

I

Output HIGH Leakage Current 50 PA MaxV

CEX

I

Bus Drainage Test 100 PA 0.0V

ZZ

I

Power Supply Current 2.0 mA Max All Outputs HIGH

CCH

I

Power Supply Current 60 mA Max All Outputs LOW

CCL

I

Power Supply Current 2.0 mA Max OEn V

CCZ

I

Additional ICC/Input Outputs Enabled 2.5 mA VI VCC  2.1V

CCT

I

Dynamic I

CCD

Note 3: Guaranteed but not tested.

CC

(Note 3) 0.1 MHz One Bit Toggling,

Outputs 3-STATE 2.5 mA Max Enable Input VI VCC  2.1V
Outputs 3-STATE 50 PA Data Input VI VCC  2.1V

No Load mA/

2.0 V Min IOH 32 mA

1V

7 PA MaxVIN 7.0V

1V

V

CC

PA Max

PA Max

VIN 2.7V (Note 3)

VIN 0.5V (Note 3)

All Other Pins Grounded

All Other Pins GND

All Others at VCC or GND

All Others at VCC or GND
Outputs Open, OEn GND

Max

50% Duty Cycle

IN

IN

OUT

OUT
OUT
OUT
OUT

40q

C to 85qC



4.5V to 5.5V

Conditions

V

CC

0.0V

2.7V; OEn 2.0V

0.5V; OEn 2.0V

0.0V
V

CC

5.5V

CC

74ABT16244

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