Ensemble Designs 4500 User Manual
Model 4500 MPEG Stream Processor
E NSEMBLE
DESIGNS
Model 4500
ASI and SMPTE 310M
Converter and MPEG
Transport Processor
Data Pack
Revision 1.1 SW v2.2.3
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4500-1
Model 4500 MPEG Stream Processor
Contents
MODULE OVERVIEW 4
DVB-ASI and SMPTE 310M Converter and MPEG Transport Processor 4
Clock Quality and Transmission 5
The Transport Stream Hierarchy 5
Transport Stream Bit Clocks and ATSC Transmissions 6
Importance of clock quality for broadcasting 6
MAJOR FUNCTIONAL CAPABILITIES OF THE 4500 7
Signal Conversion 7
Stream Analysis 7
Clock Cleaner 7
Transport Stream Time Base Corrector 7
BLOCK DIAGRAM 9
INSTALLATION 11
CABLING 11
Status and Alarm Cabling 11
3RU and 1RU Backplane Diagrams 12
4500 Parameter Table 14
Front Panel Controls and Indicators 15
AVENUE PC REMOTE CONFIGURATION 16
4500 Avenue PC Menus 17
Input Menu 17
Stream Menu 18
CRC Menu 19
Program Menu 20
Process Menu 21
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Model 4500 MPEG Stream Processor
Cong Menu 22
AVENUE TOUCH SCREEN REMOTE CONFIGURATION 23
Input Menu 24
Stream Menu 25
CRC Menu 26
Program Menu 27
Process Menu 28
Cong Menu 29
TROUBLESHOOTING 30
SOFTWARE UPDATES 30
WARRANTY AND FACTORY SERVICE 31
Warranty 31
Factory Service 31
SPECIFICATIONS 32
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Model 4500 MPEG Stream Processor
MODULE OVERVIEW
DVB-ASI and SMPTE 310M Converter and MPEG Transport Processor
The 4500 MPEG Transport Stream Processor processes DVB-ASI and SMPTE 310M bitstreams. It
provides stream content analysis with support for Priority 1 and Priority 2 test protocols of the ETR 290
DVB measurement guidelines. As a converter, it can translate ASI to 310M or 310M to ASI. Using the
reference input, the output bitstream can be synchronized to a video or 10 MHz reference signal.
The 4500 module is useful in broadcast and transmission applications. Set the output of the 4500
module to the desired signal type, either ASI or 310M. The module auto-senses what type of signal is
on the input and converts as needed. Advanced conguration in the Avenue Control System allows
choosing which services on the input are passed on to the output.
The built-in transport stream analyzer detects whether the input constitutes a valid signal by checking
for PAT, PMT, and PID packets. In addition to the ETR 290 test protocols, you can congure tests to
dene the minimum number of video and audio packets expected per second in a given service.
Alarms can be generated via SNMP, Avenue PC, and contact closure outputs.
The 4500 acts as a Time Base Corrector to remove jitter and adjust transport streams to the precise,
desired bit rate. The reference input to the 4500 allows the use of either analog video or a 10
MHz signal to synchronize the output of the module. This is of particular importance in broadcast
applications where the quality of the symbol clock – both jitter and accuracy – bears directly on the
modulation process.
Reference to the 4500 can be supplied from an Avenue 7400 or 9400 SPG with GPS Option in order to
provide the ultimate clock accuracy. In this conguration, the 4500 is an ideal solution to frequency
coordination for multi-transmitter systems like Single Frequency Networks (SFN) and mobile/handheld
transmission services.
A CRC and Data Checksum packet can be inserted into the stream by the 4500 to provide data path
integrity testing at downstream points. Monitoring of these special packets can be performed by
a second 4500 or an Avenue 4450, 4455, or 7455 ASI/310 Protection Switch. Data Integrity history
is carried forward through the system to facilitate fault nding. These CRC packets provide an
unequivocal test of data integrity on a transmission link by transmission link basis.
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Model 4500 MPEG Stream Processor
Clock Quality and Transmission
This section addresses the underlying capabilities of the 4500. As background for that discussion, we
will take a quick look at the components of the transport stream.
The Transport Stream Hierarchy
The transport stream works as a hierarchy. At the top of the stream hierarchy is the PAT followed
by PID, PMT and PCR. See the following table for more information about the components of this
hierarchy.
Transport Stream Hierarchy
PAT Program Allocation Table
Goes by about every half a second; •
Shows how many programs are in the stream; •
Indicates which program it is; •
Points to the PID number or PMT for the program. •
PID Packet Identier
PID number for program 1 is 100; PID number for program 2 is 312; •
In the PID stream, there will be a PAT every half a second; •
Every half second, there will be enough packets to add up to 19.3 Mb/s. •
PMT Program Map Table
Indicates how to nd all constituent parts of the transport stream; •
Has description of the program; •
Indicates what the element count is; •
Refers to elemental streams that collectively make up the program; •
elemental stream includes video, audio, closed captions, surround sound;
Indicates where to nd the PCR. •
PCR Program Clock Reference
An on-going set of packets; •
When used properly, the 4500 causes the PCR to be frequency and phase •
locked all the way back to the station.
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Model 4500 MPEG Stream Processor
Transport Stream Bit Clocks and ATSC Transmissions
Having clean, accurate, low-jitter clocks in the MPEG transport stream feeding an ATSC transmitting
system is important. The 4500 oers a method to improve clock quality, thereby improving the overall
performance of the transmission system.
Importance of clock quality for broadcasting
As it aects SDI signals
An SDI signal is a bitstream that contains both information (data) and the pacing (clock) needed to
read it. In order to recover error-free data at the end of a cable, the clocking that is used to construct
the bitstream must be stable and consistent. The eye pattern display on a digital waveform monitor
can be used to verify how well a particular signal source achieves that goal. The better the clock that
underlies the data, the longer a piece of cable that an SDI signal can transit without error.
When a serial clock’s frequency is unwavering and free of phase shifts and noise that would cause the
clock edges to jitter, the data can be easily recovered because the dierence between the symbols (the
ones and zeros in the bitstream) is clear and unambiguous.
As it aects ATSC digital transmission
There are two critical dierences between ATSC and SDI expressed in terms of restrictions in ATSC’s
8 VSB modulation.
The rst dierence is that the channel bandwidth of ATSC is severely restricted compared to an
SDI signal traveling on a piece of coaxial cable. The eective bandwidth of that cable is several
times greater than the fundamental bit rate being transmitted. The consequence of the bandwidth
restriction is that the 8 VSB eye is much smaller than the SDI eye.
The second dierence is ATSC’s use of eight symbols (discrete amplitude levels or voltage levels)
versus two for SDI. At each sampling point (clock) in the ATSC signal, the signal can take on any one of
eight dierent voltage levels (symbols). The digital waveform monitor displays this as a stack of seven
eyes, created by the eight discrete voltage levels possible at the sampling point.
The MPEG encoder generates the digital clock seen in the 8 VSB eye pattern. The frequency accuracy,
purity, and stability of the computer grade clocks is sucient for sending data from point to point on
a coaxial cable. However, these computer grade clocks are not sucient for creating a waveform as
complex as 8 VSB modulation.
Placing an Avenue 4500 MPEG Stream Processor in front of the ATSC Exciter helps the transmitter
present the cleanest possible digital signal.
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Model 4500 MPEG Stream Processor
MAJOR FUNCTIONAL CAPABILITIES OF THE 4500
Signal Conversion
The 4500 converts DVB-ASI to SMPTE 310M or SMPTE 310M to DVB-ASI. Using the reference input, the
output bitstream can be synchronized to a video or 10 MHz reference signal.
Set the output of the 4500 module to the desired signal type. The module auto-senses what type of
signal is on the input and converts as needed. Additionally, it will pass DVB-ASI to DVB-ASI, and SMPTE
310M to SMPTE 310M.
DVB-ASI is a worldwide standard, whereas SMPTE 310M is broadcast in North America only because it
is highly specic to NTSC broadcast standards.
Stream Analysis
The idea of stream analysis in this context is similar to what the 4455 and 7455 can do, yet the
capabilities of the 4500 go above and beyond those products.
The built-in transport stream analyzer detects whether the input constitutes a valid signal by checking
for PAT, PMT, and PID packets. In addition to the ETR 290 test protocols, you can congure tests to
dene the minimum number of video and audio packets expected per second in a given service.
Clock Cleaner
Transport Stream Time Base Corrector
There are reclocking techniques that can be used to reduce jitter in a serial bitstream. But they cannot
correct any underlying frequency error, and ultimately their eectiveness is limited by the bandwidth
inherent in their design.
In contrast, the Avenue 4500 overcomes underlying frequency error by separating the content from
the original clock and generating a new output based upon more accurate and more stable clocks.
Although the data rate of the actual content is constantly varying in response to the compressibility
of that content, the overall data rate is held constant at 19.39 Mb/s. The 4500 accomplishes this by
adjusting the number of null packets (which contain no data) to keep the packet count at precisely
12,894 per second.
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Model 4500 MPEG Stream Processor
As a transport stream arrives at the input of the Avenue 4500, the signal is deserialized and the Data
packets are saved into a buer. The Null packets are discarded.
Guided by a reference clock, Data packets are read from the buer. Null packets are inserted as needed
to bring the total bit rate up to 19.39 Mb/s. The packets are then serialized, using that reference clock,
as either a DVB-ASI or SMPTE 310M signal. All of the original Data is preserved, but the clocks are all
new.
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Model 4500 MPEG Stream Processor
Processed Outputs
CRC Test
Master
Reference
Ext
Ref
Input
Reclocked Loopback Output
DVB-ASI / SMPTE 310M Input
Status and Alarms
SNMP, TCP/IP, GPI
Bit Rate
Clock Generation
CRC History
Management
Stream
Analysis
CRC
Insertion
Packet
Buer
Output
Formatting
Internal
Precision
Reference
BLOCK DIAGRAM
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4500 MPEG Stream Processor
Functional Block Diagram, Portrait View
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Processed Outputs
CRC Test
Master
Reference
Ext
Ref
Input
Reclocked Loopback Output
DVB-ASI / SMPTE 310M Input
Status and Alarms
SNMP, TCP/IP, GPI
Bit Rate
Clock Generation
CRC History
Management
Stream
Analysis
CRC
Insertion
Packet
Buer
Output
Formatting
Internal
Precision
Reference
Model 4500 MPEG Stream Processor
Functional Block Diagram, Landscape View
4500 MPEG Stream Processor
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