ECS SI54P AIO SI54P-AIO User Manual version with Phoenix BIOS

Sl54P
AI
O
User's
(for
Phoenix BIOS)
Manual
Trademarks
All brand and product names used tered trademarks of their respective
ii
in
this manual may be trademarks or
companies
.
regis
II
Contents
I ntrod u ctio n
General
Specifications
System Chipset 2
1
System Me
Jumper Settings a
Setting the Jumpers Connectors 7
Board Layouts
Built-in BIOS
·
SETUP Program 9
System Setup 10 Fixed Disk Setu Advanced System Setup
Boot Options Secu Green PC Feature
Load ROM Load
S
ave Values to CMOS
Quitting Setup 34
mory
Cache Memory Subsystems
nd Connector
SETUP P
p
Inte
grated Pe Memory Cache Me
mory Advanced Chipset Control 19 PC
I Devices 23
rity Setup
Valu
ripherals
Shadow 18
Default Values
es from CMOS
rogram
s
:
:
11 13 1 1
2 2 2 3
'3
33
5
5 8
4 5
6 7 8 1 2
iii
1
Introduction
The
SI54P
AIO is a Pentium TM PCI Bus 85C502, 85C503 system and
SMC 37
clud
e 4 AT Bus slots a
up
to 12
C665Super1/0
nd
8MB, and cache siz
mainboard,
chipset, CMD
PCI0640B PCI Bus IDETuntroller,
Controller. Other on
4 PCI slots, 2 me
mory banks with memory sizes of
es from 256KB to lMB.
It
uses the
board
specifications in-
SiS
85C501
,
1.1
General Specifications
Processor:
Chlpset
External Cache:
Memory Size
BIO
Slots
Con
Form Fa
:
S:
:
nectors:
ctor
Intel Pentiumn.t
Sis 85C501 SiS 85C502 ( SiS 85C503 (PCI Sys CMD
PCI0640B
SMC 37C665 (Super 1/0 Controller)
UMC 8
2C865 (1/0
2
56/512 KB
ba
ck or
vvrit
:
:
2
banks
up to 128MB, all s
\
Phoenix
Four 1 6-bit Four
Power Keylock & Pow Hardware Rese
S
peaker Turbo Turbo Switch Sus HDD
Baby-AT
of
PCI slot
LED
pend
LED
75/90/l
(PCl/ISA
PCI
or 1 MB
e-through policies
DRAM with
ISA slots
s
er t
00
Cache Me
Local Data
tem
(PCI Bus
1/0)
IDE
TIL
Integration)
cache
memory
upporting
LED
supporting
mory
Buffer)
Controller)
double-sided SIMMs
Controller)
vvrit
size
capacity of
e
PCB
:
4
layers
1
Sl54P AIO
User
's
Manual
System C
hipset
SIS85C501
Supports Pentium'?" process
Integrated sec
writethrough
direct
supports standard and
supports 1 Z8KB to ZMB
ca
che read/write cycl
SRAM at 6GMHz
Integrated DRAM controller
supports ZMB to 1 Z
1 level pos
concurrent
CAS#
beforeRAS# tra
Z5GK/
programmable DRAM speed
ond
level (LZ) cache
and
writeback cach
mapped organi
8MB of cac
ted write bu
write
bac
lM/ 4M/ 1 GM*N
or at 59/GO!GG
mod
e modes
zation
burst
SRAM
s
cache siz
e of
ffer o
k
nsparent DRAM refresh
70ns fast pa
es
3ZZZ or 4333 using standard
heable main memory
f 4 Qwo
rds deep
ge mode DRAM support
SIS85C502
Three integrated posted write buffers and s
ystem pe
1 level
4 levels
1 level
1 level Memto
1 level MemtoPCl read buffer with 1 Qword de
Provides a 64 bus
Operates sync clocks
Pr
ovides pa
rforman
Cl'UtoMem
CPUto
PCItoMern posted writ
ce
posted write buffer with 4 Qwords deep
PCI post
Cl'U read
bit Pe
hronously to the G
rity g
ener
ntium
ati
on for
ed
writ
buffer
TM
,
e buffer with 4 Dwords deep e buffer with 1 Qword deep
with 1 Qword de
DRAM dat
G. 7MH
memor
y writes
MHz bus speed
es
two
a bus
z CPU
read
buffers increase
ep
ep
and 32
and 33.
bit PCI data
3MHz PCI
2
SI
S85C503
Integrated
translates PCI Bus
translat
provid
Integrated
Supports
terrupt
Supports Flash ROM
CMD PCI0
Fully
The most complete 32 Windows 3.1 Pas 32bit
Programmable data transfer timing supports customized setting for 4 IDE devices
Readahead and writeback buffers enhance transfer rates low concurrent
Suitable for PCI motherboard or PCI expansion card applications
Fully supports and surpasses
Supports program
brid
ge between PCI Bus and
es
ISA master
es
PCItolSA
ISA Bus compatible logic
reroutability of four PCI interrupts to any unused IRQ
640B
compatibl
driver support)
e with the
t Disk, Windows NT,
operation
SJ54P AJO
ISA
Bus
cycles into
or DMA cycles into PCI Bus cycles
memor
bit driver support
I/O
ISA
Bus cycles
y one Dword posted write buffer
latest PCI IDE
·
s
enhance IDE ModeS
function
and
ATAPI specifications
in
the industry (DOS,
OSIZ
,
Novell & SCO Unix
User's
Manual
in
and al
SM
C3JC665
Super
Two
One
I/O
controller
I6C550 compatible
multimode parallel po
UART
s
rt
which include
EPP
and
ECP
support
3
SJ
54P AJO
User's Manual
2 System Memory
SI54P AIO bo
ard. There are two memory banks which supp
1/
2/4
Important: DRAM inse
/8/
accepts
16 MB
a minimum of 2MB a
72
pin typ
e, singleand/ or
rtion on every bank should come in pa
of
the same type. For instance,
DRAM module
s,
nd a
you cannot ins in socket SIM1 and another DRAM type on S
IM3. Likewise, memory type mixing is NOT al
lowed within a bank.
Th
e following
the t
otal me
SIM3 256Kx 36 256Kx 36
512Kx 36 5
12K
512Kx 36
1M x 36 1M x 36 1M 1M x 3 2Mx36 2Mx36 2Mx36 4Mx36 8Mx36
8M x
Ta
ble 21.
table lists
mory amount for
Bank
O
SIM4
256K~_36 256K x
512Kx 3
6
I
512Kx 36 512K~
8Mx3~ 8M
x 36
x 36
36
Memory
all the possible DRAM module
each op
.
J
36
·--··
6
~
-
-
_ __ L ---
1Mx 36 1M
x36·-
1
2Mx
36 2M x 36 2M x36 2Mx 36
··- ·-· -··
4M
x 36
x36
Configuration
!
.
I
~
r
; i
I
i !
I
I
i
I
I
tion.
SIM1
None
256K x 36
·
None
512Kx 36
4M x
36
Non
1M x
36
4M
x36
None None
4M x
36
4M x36
None
8M x36
s and
maxim
um of 128
ort 256/ 512 KB or
doubledensity modules.
if
you only have two
tall one DRAM
module of the same
combinations an
Ba
nk1
SIM2
None
25
6Kx
36
None
512Kx 36
4Mx36
e
Requirement
None 1Mx36 4Mx
36
2Mx36 4Mx
36
4Mx
36
Non
8Mx36
e
s
MB on
modul
Tota
Memo
ry Si
2 4MB 4
8M
36MB
8 16MB 36 16MB 32MB 48 64M 64
128MB
ir and
e
d
l
ze
MB
MB
B
MB
MB
MB
B
MB
I
4
SJ54P AIO User's Manual
Cache Memo
Cac
he Si
ze
2
56KB
512KB
1MB
Table 2
3
3.1
The table below
AIO.
CPU Clock Sele
CPU Signal Select
External Cache Memory
2. Second Level Cache Memory Configurations
Jumper
Setting the Jumpers
Sett
ing
ry Su
bsystems
Dirty RAM
(U28
) 32Kx8 (5V) 32Kx8 (5V) 32Kx8 (3.3V) 32Kx8 (5V)
3
2Kx8 (5
V) 32Kx8 (5V) 128Kx8 (3.
TAG RAM
(U27)
32Kx8 (5V)
Settings and Connectors
summar
.
ct
s
izes the
F
unction
50MHz (for 75MH 6
0MHz (for 90MH
66MH
z (for Internal Internal Cache
t
hrough
Always invalidated
Write to invalidated
2
56KB (with 32
SRAMs)
512KB
SRAMs)
1
MB (wi
functions a
Cache Write-back JP12 short 1-2
(with 64Kx8 JP11 short
th
128
nd
jumper
z CPU) JP7 short 2-3, 5-6, 7-8
z CPU)
100MH
z CPU)
Write
-
Kx8
Kx8 SRAMs)
sett
ings on the
Jumper Setting
J
P7 short 2-3, 4-5, 8-9
J
P7 short 1-2, 5-6,
JP12 short 2-3
JP1
4 short 1-2
JP1
4 short 2-
JP11
open
JP10 open
JP10 open J
P11
short
JP10short
Data (U23-26
(U
34- U3
7)
64Kx8 (3.
3V)
3V)
s
7-8
3
)
SIS4
P
Table 41.
Jumper Settings (Continued ....
.)
5
SJ
54P AIO
ROM BIOSSe
On-boa
rd PCI I
On-boa
rd 1/0
E
CP
Mod
DRAM Par
Memory Sele
User's M
lection
e
ity Ch
ct
DE
eck
anual
F
unction
For Programming Flash ROM (+SV) use
For Programming Flash R (+12V) use
EPROM Enable ID Disable Enabled Disabled J P3 short 2- E
DACK1 ECP Mode
DACK3 Selec
E Disabled All
modul All
modules double are single densit
d
d
.
E
IDE
CP Mode Parallel Port DRQ1 J P1
Selection
Parallel Port DRQ3 JP1
tion
nabl
ed
SIMMs are single density
es
SIM
Ms are double density
or SIMMs 3/4 are
dens
ity
and SIMMs 1 /
y
OM
2
JPS short 1-2
J
PS short 2-3
J
PS open JP4 open JP4 short J
P3 short 1-2
J P2 short 2-3
J
P2s J
PS short J
PS open
JP5
J P5
Jumper S
3
short 1-
2
short 2-3
hort1-
2
short 2-3
sho
rt 1-
2, 3-4
etting
s
T
able 41. Jumper Settings
If
Note1
:
a flash ROM is installed on the mainboard,
fer to the RE before programming the Flash ROM BIOS.
Note2
Note3
:
Before P Diskette
:
1. JPB
installing the driver
C/064
0B), consult the
.
open for EPROM and Flash ROM normal us
2. ltllhen you update your system BIO utility, please set the JPB to short 1
ROM or JPB to short 2
3.
After
updated the system BIOS,
the jumper
6
please re
ADME.DOC file in the Flash Utility diskette
for on
board PC/ /DE (GMO
readme fife in the GMO Driver
e.
S with Flash ROM
2 for +5V Flash
3 for +12V Fl
ash ROM.
you should remove
JPB
.
3.2 Connectors
There
are
listed
several
below
connectors located on
.
the
SJ54PAIO
SI54P
AIO. Their functions are
User's Manual
Connecto
J2 J4 J5
J6
J7 J8
J9
JlO
Jll Jl2 Jl
3
r
Function
AT
Keyboard Power Floppy COM l Port C
OM2 Printer I
DE
Primary
I
DE
Secondary Power HDD
LED Connector
2X10
r===
1 1 12 13 14 15 16 17 18 19 20
Connector
Connector
Connecto
Port
Port
Connector (For 3.3V)
JUMPER BLOCK
KEYLOCK
r Connector Connector
Connector
Connector
Connector
==-1
®085800000
'
~~~9~9Q~9a
TB. LED SMI
pin 2-3: Turbo pin 4-5: Suspend Pus PIN
6-7: Turbo
pin 9-
10:
pin
1 1- 13:
pin 17-20: Speake
LED
Switch
Hardware Reset
System Power LED
r
h Button
TB.S
W
(SMI)
& pin 14- 15 Keylock
Reset
Note
:
J1
3 {pin67),
a
.
S
hort 2
b. Set
the L 1
Through
c.
After
finishing Steps a & b, the H/Wturbo switch will function system in the
Turbo Switch Function Procedure:
3 for the jumper setting
of JP12.
Cache Update Mode into (WT) Write
within the BIOS Chi
normal and the Turbo LED wi
pset Features SETUP
ll
turn on/off when
Turbo/Deturbo mode.
.
.
7
SJ54P AIO
Use
rs Manua
l
3.3
0
(i)
c
0
'iii
c
C'll
.n
-
ii'i
(0
Board Layout
0
0
(i)
(i)
c
c
0
0
'iii
'
iii
c
c
C'll
C'll
x
.n
w
-
ii'i
I
<b
'"
$>
7
0
m
963
SMC UM82C
37C6
0
(i)
p
c
0
c
'iii
I
c
C'll
# # #
x
w
1
-
ii'i
cb
SiS
85C503
66
s
866
F
p p
c c
I I
2
3
CMD
PCI0640
85C501
SiS
w
e
Ba
--
SiS
85C502
nkO Bank1
.P.>~
1
l=3GND
--
l§j=3
Jl
PS
/2
+3.3V
Power
Supply
Conne
ctor
DALLAS
DS12887A
J1
\1~~Ag
~f~8
~
&.Ii~ Rutt ICOLED 
Figure 41.
8
Pentium™
CPU Socket
3
f~I~
+
§i
.
S/54P AIO Mainboard Layout
'
4 Built-i
n
BIOS SETUP Program
4.1
SETUP P
Phoenix Setup - Copyright 1'985-94 Phoenix
Tl
Fl Help
Figure 4-1. SETUP
It
is
highly recommended that y
gram
befor
e making any cha
the sys
tem back
Note:
System Setup-
inform
in
the eve
On-screen instructio plain ho
w to use the program
allows c
ation.
rogram
Ma
in
11enu.
Syste111
Setu
Yl
Aduan
Boot Options
Sec
Gree
Load Load Ua lues fron
Save
l'loue
Main Menu
nges. Doing so
nt of a
hecking or modification
p
xed Disk Setup
ced Syste
ur-
i ty
Setup
n
re
Featu
R Cl1 Default Values
Values to CM
Enter Selec
E
SC Exit
ou list down all the values of the
configuration memory
ns at the bottom of
rw. Setup
re
t
Technologi
Cl'IOS
OS
F10 Savc
will
save a lot of time restoring
B:t:xi
es
t
loss
Ltd
.
.
each screen ex-
.
of
general configuration
SLTUP
pro
Fixed
Disk
Setup-
allows for automatic detection of the hard disk drive type(s) including the number of cylinders and heads, s
ati
on
time, read/write head
track.
Also switches the LBA Mode feature
AdVanced
System Setup
cluding the Integrated Pe
Advanced Chipset
Boot
OpUons
ceed whe
-
n booting the ope
Control,
determines the se
landing zone, and number
-
sets the various system options for the user, in
ripherals, Memory Cache, Memory Shadow
and PCI
Devices
quenc
e with which the
rating system.
write precompen
of
sectors per
of
the hard disk to on or
.
system will pro
off
,
.
9
Sl54P AIO User's Manual
Security Se
tup-
provides special access for the use
r to
enter the ope ing system and Setup program, and restricts unauthorized access to the floppy disk drives.
Graan
PC
Faablras
STANDBY and RESUME modes.
-
allows the timer ssttinqs for the
It
also lists the SMI events by
DOZE
which the system wakes up from ST AND BY or SUSPEND
modes. If the device
will slow down the CPU speed and bathe IDE
is
not
active, Power Management Function
and monitor will be
put into doze, standby, or suspend mode.
rat
,
Load
ROM Defau
lt Valu
as
-
allows for automatic configurat
above options using the values stored
Load
Values from CMOS
above options using the pr
Sava Val
ues to
CMOS
-
allows for automatic configuration
evious
-
saves the
changes you have made in the SETUP
program, then exits and reboots the system.
To choose
<Up
4.2
> and
System
f
.I.
an
item from the
<Down
ttoue
> arrow keys and press <Enter>.
P
hoenix
ESC
Fl He
SETIJP
main menu, move the cursor using the
Se
tup
Setup - Copyright 1985-91 Phoenix
Sys
te~ Setup
Systert T l
t1e
SysteA Dat
V
ideo
Syst
Extended He110
DisHette Dtskt:tte
Keybodro:
Exit
lp
:
e:
Syste11:
ert Met!!
ory
Dri
ve A:
Dr-l
UC"::
PgUp Pre PgDn Next Ua lu
:
ry:
B:
vious Valu
in
the ROM BIOS table.
values stored
Technalogies Ltd..
[16:513:591 [04/01/19!'1'1
[EGA / VGAI
[1.2
[Hot
[lnstdlledl
640
K B
7
MB
MB.
lns te l Ied I
e
e
5%"1
l
FS F6 De
ion of all the
of
all the
in the
CMO
S S
RAM.
Previous Conf igura.t ion
fault
Conf
iguratton
Figure 4-
10
2. System Setup Screen
Sl54P AIO User's Manua
l
Splem
utes, and seconds
Splem Dale
Time
-
sets the system's internal clock which includes hour,
.
-
allows
manual setting of the electronic calendar
board.
Video
Splem
Splam/Extended
tem configuration which includes the system They
are status detected by the BIOS is for viewing purpose only and manu
Diskette
stalled
KeVboanl
4.3
-
specifies the display adapter
Memorv
updated
DrlVe
in
your system
-
automatically by the
A:/B: -
specify the capacity
.
selects
Install/
Fixed Disk S
installed.
-
displays important
SETUP
information abo
and
extended memo
program
selftest. This section of the System
al
modifications are not allo
and
format of the floppy drives
Not Installed
for
keyboard device
etup
The Fixed Disk Setup provides auto configuration of the in the
system. After pressing the <Enter> key on this item in
menu, the
following screen is displayed.
P
hoenix Setup - Copyright 1985-91 Phoenix
Technologies
min-
on the main
ut your
ry
sizes
according to the
Setup screen
wed.
setting
.
hard
drive
installed
the main
Ltd
.
sys
.
in
Figu
re 4-3. Fi
IDE Adapter e !last IDE
Adopter e Slave
IDE
Ad.dpt er 1 rla.stel"
IDE Adopter 1 Slove
Lar-qe Di
sk Access
H
llo
ve
Fl Hel
p
xed Di
sk
Set
Fixed Disk Setup
er
CC :541 Mbl (Hanel
(Hone
)
(Hane
l
[Enabl
ftOde
:
Enter Select
ESC Exi
t
up Screen
ed]
F10 SauellExlt
1
11
Sl54P AIO User's Manual
Once the program detects the
typ
e of display the relative information such as compensation, landing mod
e control.
If
the program fails to de
not pressed
in
the Autotype Fixed Disk option, manual setting of the values
zone, number
tect the hard
is recommended.
Phoenix Setup - Copyright l'JBS-
Fixed Dis
k 0
Control
Figure
AUIOIVPe
4-4. Fixed Disk Setup Screen
Fixed
successful, it
Autotype Fi T
ype
Cylinders
Heads:
Sectors/Track
Wr
ll
llltl
L
HA "ode. Co
3Z Dit
U Fl
Disk
-
fills
the remaining fields on this
xed Disk: [Press Enter
:
:
l te
llovc Help
:
preec
ep
:
Sector Transfers: !Disabled]
ntra I :
l;O
:
Enter Select
ESC Exit
detects the type of fixed disk 0
hard
disk 0
and/
or 1 installed, it
the type,
cylinder, heads, write pre
of sectors per track, and the
will
LBA
disk type(s) or the <Enter> key was
94
Phoeni
x Tec
~TIJ
log
I
es
Ltd
.
CBoot Dri
vel
1
[User] [
667
]
[
Bl
[
33]
[Nonel
[Disabled] !Disabled]
rre
Sau
e<'!Exlt
2
and/
or 1 installed. If
menu
.
Type - 1
drives. "User" allows the the system auto detect IDE HDD Func
CVllnders Heads Seclors/Track
hard
Landing
to 45
fill
the
remainin
user to
-
specifies the
-
specifies the number of rea
-
provides the number of sectors per track defined for the
disk
drive
.
Zona
-
refers to the cylinder
number
g fields with values for
fill in the remaining
tion, if
you already
of
cylinders of the
d/write heads of the ha
number
where the disk drive heads
(read/write) are positioned to when the disk drive is
12
predefined dis
fields. "
Auto" allows
install IDE
hard
disk d
rd
parked.
k
HDD.
riv
e.
disk drive.
Sl54P AIO User's Manual
Write
Precomp
-
refers to the cylinder number, abo
ve which, disk drive op erations require reduced write current. Also specifies th ders at which to change the write timing.
e number of cylin
Large Di
5Z8MB) under UNIX. The default setting ofthis option is
Mu Id-Sector
multiple sector transfers. The available options are
"Auto" abled"
lBA Mod
Some HDD sizes support more
transfer
sk
Access
Mode
-
for Large Hard Disk Compatibility (l
issues, you must enable this item except when
"Disabled."
Transfers
which refers to th (default)
.
e Control -
.
If
your
-
determines the number of sectors per block for e size the disk returns when queried, and
tu
rns on or off the hard disk drive's
than
540MB and the
hard
disk supports
LBA
mode, you should enable (on) this
running
Z/
4/8/16 sectors
LBA
Mode
LBA
mode for data
arger than
the system
,
"Dis
support
option otherwise disable (off) it.
32 8111/0 -
it is only for PCI IDE card,
if
you want to use the
ISA
IDE
card
you have to disable it.
4.4
The Advanced System Setup parameters
Advanced System Setup
allows the user to program five main groups of
namely the Integrated
Peripherals, Memory Cache, Memory
Shadow, Advanced Chipset Control, and PCI Devices. This BIOS Setup pa
rameter
chipset
is
designed for programmers who
.
Phoenix Se
tup Copy.right 198594
wish to fine tune the on board
Phoenix Technologies Ltd
.
.
,
Figure 4-
Advance
d Syst.ea Se tup
Uarnlng
Jtens
on
this ne
could cau
se yo
l rrtegre ted
Menary Cache
11eno
Ad1J c
P CI Dcul
ti
trov
F1 He
lp
5.
Advanced System Setup Screen
ry Shadou
rnc
ed
e
Peripherals
Chipset Control
ccs
Enter Select
ur sy
ESC Ex
nu
,
it
r
if set
st.e.. to ee lrunct.
in
correctly
Ion
F10 SdueM:x
,
.
il
13
Sl54P AIO User's Manual
Integrated Peripheral
Selecting Integrated Peri menu
displ
ays
the
on the capabilities of your s
Pboen i x
fl
rtoue
E
s
pherals from the Advanced Syste
following screen. The actual featur
ystem
's ha
rdw
are
Se
tup - Copyright 1
CON1 Port: CON2 Port L
PT Port
:
Diskette
LP!
Exteoded Node
CMD Enh
anced Modr.:
SC Exit
Fl He
lp
:
Controller:
PgUp Previous Valu
PgDn Next Ua l
Integra
ted
:
:
985-94
Phoenix Technologies
Per
iph
erals
cllmWl1bl1 c
zra
[
3711
(Enabled]
[Sta.nddrd
CDlsabledl
e
ue
Figure 4-6. Integrated Peripherals Screen
COM1/2
ports onboar
Pon
-
assign the addresses of the primary and secondary serial
d.
The
available
Enabled (default)
Disabl
ed
options are:
m Setup main
es
displayed
.
Lt.d .
IRQ 3 I
IRQ
? l
]
F5 Previo F6 Default Configuration
us
Configuration
depend
LPT
Pon
-
assigns the addr
ess of the parallel port on
board. This option also
prevents the system from encountering any conflict when
with _Earalle
Enabled (default)
Disabled
Diskette
I/0 chip to either on or
Enabled (default)
Disabled
1
4
l port is ins
CODlrOller
talled in the
-
sets
the diskette controller mode of the SMC 3 7C66
future. The a
vailable options are:
off. The available options are:
an
addon ca
rd
5
lPT
Extended
register of
Mode
ECP mo
register as mode
Standard (default
EPP Mod
ECP Mode
ECP & EPP
CMD
Enhanced
port CMD DOS
-
In
de 100.
000. The
e
Mode
driver
"ECP & EPP"
mode,
"Standard"
available options are:
)
.
-
enables 32 Bit
.
Sl54P AIO User's Manual
EPP
can select
mode can be selected
I/O
and CMD Enhanced Mo
through
through
the
the
de to
ECR
ECR
sup
Memo
ry
Cache
Selecting the Memory Cache from the Advanced System Setup ma displays the foll capabilities of your system's
Figure 4-7. Memory Cache Screen
owing
Phoeni
External cache
Ll cache ur
L2
cache
Syste" BIOS ca.c
Cache speed:
Cache
Refresh
Ncn-cecheeb le ereeat.:
A I location
Region Region 1, size:
U
Move
ESC
screens. The actual features displayed depend on the
hardware
x Setup Copyright
:
i
te
back :
urite back:
heabl
e:
burst r/
1;,1
eye le:
RAS
act I ue t tee
of
rxm-oac
heab
1
1 atar-t addr-:
Exit
F1 fle
PgUp
lp
PgDn
.
198594
t1et1ory
Cach
:
l
e
ar
-eau L
Preu tous Valu
liext IJn lue
Phoenix Technologi
e
l
!ilmllll'llll
l
[Enabl
ed]
IEnabed
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[Slower]
[3Tl
1
6Tl
1Dis4blcdl [Local DH
:
e
Artl
[
ll HBl
C
61 HBl
FS
Previous Configuration
FD
Default
es
Ltd
.
9
Configuration
1
in
men
u
15
Sl54P AIO User's Manual
Phoenix Setup
fton
Al
Tl "oue
Figure 4-
8.
Memory Cache Screen
Externa l cache
.:
acheab le arcall1:
locat1
on
Re
gion
Re
gion 1. at ae
ESC Ex! t P!Jllp
Fl He
-
turns on or off the function of the external (LZ) cache
Copyrl11ht 199294 Phoenix Te
Menory Cache
or non-cacheab le areaal:
1.
etal't
add,.
:
:
lp
Preul nus U11lue
P11Dn Next U& Iu
e F6 Defll~ It
2
l
llimlllll'!J [Local I I
&'i !CBI
chnologi
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DHA"I
ll
!CBI
FS PreuJ
es
oue Conr i
Conf I
memory.
Enabled (defa
Disa
L
l
c
ache wrlle back
bled
ult)
-
switches the
writeback feature of the (Ll ) internal
cache of the Pentium™ CPU to either on or off. "Disabled" sets
into
write through
Enable
Disabled
mode. The available options are:
d (default)
Ltd
.
guratJ
1.111rat1
the L 1
..
on
on
cache
L2 cache Wrlle back
cach
e on board to either on or
through
mode. The
Ena
bled
Disable
-
switches the
available options are:
(default)
d
Sitstem BIOS cacheable -
Enable
Disable
Cache
mal
read/write ope
16
spaad -
Slower Faste
r
Fastes
d
d (default)
specifies the speed of
rations. Th
t
writeback feature of the (LZ) e
off. "Disabled" sets the LZ
con
trols the caching of the
the standard
e available option are:
cache into write
system BIOS area.
SRAM
cach
e during
xternal
nor
Cache
burstr/w
read/write
3T (de
2T
1T
CVCIB
cycles. The
fault)
-
defin
es the speed of the cache
available options a
re:
Sl54P
AIO User's
SRAM
burst
Manua
l
Ralrash RAS acdva
r
ow address strobe
ST
6T (defa
llma -
(RAS), du
ult)
llOD·C8ChaablB araa#1/#2
classified as
Enabled
A
llocallon
ca
cheable blocks. The
Loca
Region 1/2 slart
ory mapped into the IMB to 15.
ISA
the cycles in this address
This area
Rag
r this option must include the fra memory specified main memory. The
noncacheable,
Disabled (de
ol
l
AT
Bu
fault)
non-cachaabla
DRAM
(default)
s
addr
frame buffer), and de
is
not cacheable and
lon 1/2,
SIZB
-
ange
is
programmed below 1 GMB
64 KB (default)
128
KB 256KB 512
KB
1MB
2M
B 4MB 8MB
availabl
defines the size or Region 1/Z. If
in
the following options is remapped to the top of
options are:
defin
es the amount of
ring DRAM
-
a
llow a certain block of the local DRAM to be
The
availa
araa#1/#2
refresh
ble
-
activ
e time ne
eded for the
time, to be refreshed
-,
opti
ons are:
define the location of the non
e options are:
-
a
ccommodates
fin
es a hole in
spac
e to the PCI Bus ins
its default
ISA
devices that have their mem
5MB range (i.e., an
main memory that trans
tead of ma
is 0 KB.
and within main
me buffer
range. The amount of main
ISA LAN
in
the fra
me buffer
memory space
.
card or an
fer
s
memory.
,
17
Sl54P AIO User's
Manua
l
Memory Shadow
Selecting the Memory Shadow from the Advanced System Setup main menu displays the following screen. The actual features displayed depend on the capabilities of your system's ha
P
hoenix Setup Copyright
Syst Video
Shedo
tJ.
Mou
e
ESC
Exit
Fi Help
Figu
re 4-9. Mem
ory Shadow Scree
rdware
e" D IOS shado
DIOS s
hadow:
u Opt
ion ROM'S
ca00
crrr: D000 D7FF 00
00
orrr:
PgUp
Preo i
PgDn
Next Value
.
198594
ttenory
Shad
w: Enable
:
ou
s
n
Phoenix Jechnologles Ltd.
ou
d
[Enabled)
lDisabled
l
lDisa
bledl
[D
tseb
ted
I
Ua lue
FS
Preuious Conf
F6
Default
igurat
Configuratio
ian n
Syslam
proves the system
Video
BIOS
BIOS
shadow
shadow
-
allows shadowing of the system BIOS which im
performance. This option
-
sets the mode of the system's video BIOS shadowing
mode. The available options are
Shadow
fied blocks of
ance
,
Note
Opl l
on
ROM's
-
shadows the memory regions located
memory, which can likewise
:
Some opt
ion RO
18
is
always set as
"Enabled" (default) and
improve the system perform
Ms
do not work pro
"Enabled."
"Disabled."
in
the
speci
perly when shadowed
.
Sl54P AIO User's Manual
Advanced Chips
et Control
Selecting the Advanced Chipset Control from the Advanced System Setup main menu displays the following screens. The actual pend
on the capabilities of your system's hardware.
Phoenix Setup Copyrig
DRAl1
read DRA DRA DRAl1 RAS
DR At1
PC I M
GateAZO
Fast reset
Fast reset latency:
16b it
B-bit 16-bit nee , !Al tsa
CAS pul
l1
u
r-L
te
CAS pulse width
l1
CAS prech<lrge tine
RAS
prech<lrge ti
to
CAS
delay Tire
er-
Lte push to
aste
r access
enu latlon:
enu
IAJ
recovery tine
I.10
recove
Advanced
se u idth:
lation
ry tine:
ht 1985
ne: :
CAS
shad
:
i
t; s ta te
oe ~:
94
Chipset Control
[1Tl [3Tl
:
:
delay:
[2Tl 15Tl
[1!]
[2Tl !Dlsabledl !Enabled] !Enabled] 12
:
15 Dus lB
:
11 Wsl
Phoenix T
usl
Clkl
BusClkl
features
echnologies Ltd.
displayed de
PgUp
E
U
11ou
SC Exit
c
Fl Help
Previous Value
PgDn Next
Ua
Iue
Figure 4-10. Advanced Chips et Control Screen
Phoen Ix
Setup
Copyr
lght 198594
SJ ow
refresh
luck freque
for
to
PC I burst mem
to
PC I post Mem
cru
:
CPU
De-turbo switch: AJ
bus clock freque
PC] c
CAS
it width in
Latency CPU CPU Latency fron
Refresh
PCI
ADSn
in
Advanced
ncy:
to
hold
ncy:
l'!lo.ster
PC! write:
ory ~
ory wri
Ioca I r.>e
to
:
Chlpset Contra
erI'te
:
i
te
:
te:
11:
Phoen Ix
I
!Dlsab
led] !Always IPCICLIV41 ICPUCLJ</2l [lIJ [lII !Di sob le
d] !Disabled] [3Tl IDisab le
d]
FS
Previous Configuration
FD
Def au
l
t.
Configuration
1
Technologie
turbo]
s Ltd.
..
U
lla
Figure 4-11.
E
SC
Exit
ue
F1 He
lp
PgUp Preo lou PgDn
Nex
s Ualue
t Value
Advanced Chipset Control Screen
F5
Previous Conf lqurs t lun
F6 DeFault Configuration
2
19
Sl54P AIO User's Manual
DRAM
read
CAS
pu l
se
wldlh
-
determines the pulse width length of the
during DRAM read cycles. The available options are:
2T
3T
4T (defa
ult)
CAS
DRAM Mita C
AS pulse
width -
determines the pulse width length of the CAS
during DRAM write cycles. The ava
2T
DRAM
CAS
3T (defa
ult)
pracharga Uma -
s
ets the amount of time for DRAM
ery. The available options are:
1T
2T (default
DRAM
RAS
pracharga
ery.
The available options are:
4T
ST (defa
RAS to
CAS
CAS
# will
be succeeded by
3T
4T (default
DRAM Mita pu
DRAM to force the
ult)
de l
ay Uma -
sh to
)
time -
sets the amount of time for DRAM
defines the amount
RAS# signa
)
CAS dal
ay
-
CAS
to delay
pertains to the number of cycles needed by
thereb
cations. The available options are
1T
2T (default
PCI master acc
improved
performance. The available options are
Enabl
Disabl
)
esses
ed
ed (defa
shadow
ult)
RAM
ilable options are:
of time required
l.
The ava
ilable options are:
y matching the DRAM timing
:
-
enabl
es
the PCI ma
ster shadowing for
:
CAS
RAS
after
recov
recov
which a
specifi
20
Sl54P AIO User's Manual
Gal8A20 emuladon
feature incorporated
SiS85C501 responds the erwise, the cycle
to 8042 on the
Enabled (defa
Disabled
Fast
resat emul
the
assertion of
CPUCLK.
Fast
ware reset. The available options
16-blt 1/0 rec
time except for some
The available options ar
Enabl
Disabled
resat latency
2 µs (d
s
overy dme -
-
allows access and increases the speed of the Ga
in
the on
board
cycl
e by asserting
is
subtractively decoded by
ISA
Bus. The
atlon
INIT
or
ava
ilable options are:
ult)
-
enhances the speed of the
CPURST
by 2µs or s, and holding them for 25
e:
ed (defa
ult)
-
defines the time (in microseconds) required for
are
efa
ult)
used to specify the 16
addon cards that cannot work properly. mended to set this option at a "low" va The available options
2 Bus
3 BusClk
5 Bus
Clk
4 BusClk
Clk (defa
are
ult)
:
chip
set. When
DEVSEL#
SiS85C50S, and then
softwar
:
bit
II o command
lue to enhance the
enabled, the
in
slowest timing.
e reset by
It
I/ 0
performance.
te A2
is
passed
delayin
soft
recovery
is
recom
Oth
0
g
8-b
ltl/O racoverv
tlme -
time except for some mended to set
3 BusClk
4 Bus
5 Bus
8 BusC
this option at a "low"
Clk Clk
lk (defa
16-blt mem, 1/0 wall
serted to the 16bit
OWs
1 Ws (defa
ult)
used to specify the 8
addon cards that cannot work
valu
ult)
state
-
determines the number of wa
ISA
I/ O command. The available options are:
bit
e to
enhance the
I/O
command
properly.
recover
It
is
recom
II 0 per
formance.
it states to be
y
in
21
Sl54P AIO User's Manua
Slow
rerrash
-
a
llo
ws you to
l
off. The available options are:
Enabl
Disabl
ed ed (default
)
turn
the
DRAM's slo
w refresh feature to on or
De-turbo
AT
tem. The
PC I cl
CAS#wldth
PCI master writes to
Latencvror
sYtlltch
Always turbo (default
Enabled
bus
clock
rraquency -
available options are:
PCICLK/3
PCICLK/4 (default)
7.1
59MH
ock rre
quency
CPUCLK/1.5
CPUCLK/2 (default
14MHz
to PCI
1T (default
2T
CPU
to PCI
-
controls the
z
-
selects the timing of the PCI Bus clock.
mastervalta
DRAM. The
)
write
software's turbo and deturbo
)
specifies the spe
)
-
defines the pu
ava
-
pertains to the delay time before the CPU
ed of the AT
ilable
lse width of CAB# when the
options are:
features
Bus clock of the
writes data into the PCI Bus. The available options are:
CPU
to PCI
1T (default 2T
burst
)
memory
write
-
If
enabled, backtoback sequential CPU
memory write cycles to PCI are translated to PCI burst memory write
If
disabled, each single write to PCI
quence. The
Enabled
Disabl
available options are
ed (default
)
will
have
an
associated FRAME# se
:
.
sys
cycles
.
22
Sl54P AIO User's Manual
CPU
to PCI
post mem
be po
sted to PCI. also limits the com the PCI formance of the PCI sl
transacti
orvwrHe
Disa
bling this option not only disables the buffering bu
-
enabling all
ows up to 4 Dwords of data to
pletion of CPU write (CPU write does
on compl
etes).
ots when
In
general,
"Enabled" (
this option enh
default
).
Enabled
Di
sabled (default
Late
ncvrrom
ADS# to
speed. When this double word.
When this
is
local
set to
)
mem
-
determines the CPU to PCI Post write
"3T"
(default), the Post write
option
is
set to
"ZT", th
e rate is 4T per double
word. For a Qword PCI memory write, the post write
(3T)
.
2T
3T (default
)
not complete
ances the
rate
is
ST
rate
is
7T
per
for each
(ZT)
or 8T
unt
t
il
Refresh
state. The
CPU In hold -
available opt
Enabled
Disabled (default
enabl
ions
)
es the refres
are
:
h cycle when the
CPU
is in HOLD
PCI Devices
Sel
ecting the Advanced Chipset Control from the Advanced System Setup main menu displays the following screens. The actual features displayed de pend on the capabili
U
Moue
Figure 4-1
2. PCI
ties of your system's hardware
P
hoenix
Setup Copyrigh
IAJ
Address:
Base Base
11enory
M
ult
h1edia node
(Which)
Parity:
In
ter
rupt 1 se
PC!
Edge/Level Select:
I
nterrupt Z set ta:
PC!
Edge/Level Sel
l nterrupt
PC
I
Edge/Level Select:
ESC
Exit
Fl Help
Addre
3 s
ss:
:
't
ta:
ect
:
et to:
PgUp Previou PyDn
t 198591 Phoenix Teclmologios Ltd.
PCl
Hext Value
Devices Screen
Devices
s
u
1
[
3000 [0000B000B0 l [Disabled [D
isabled
[N
one
IL
EIJE
[
None
[Leve [
None]
[L
eve
a
lu
e
)
]
)
] LJ
]
ll
l
J
F5 F6
.
Previous Con Default Co
..
figuration
nfigurdtio
n
23
Sl54P AIO U
H
11oue ESC Exit
ser's Manual
Phoenix
Setup Copyright
PCJ Interrupt i set to:
Edge/Level Select:
P
CJ
Devices. Sl
Enable Device:
Enable. rlaster: Use
Latency
PCI Deufces , Slot
Enable
Enable rlaster:
Use Defa.ult Latency T irrier Val
ot
111:
Default Latency Tiner
T
freer-
V
alue
De:utce
Fl
Help PgDn Ne
112:
:
l.dtcncy Ii.~er Value:
ue:
PgUp
PCI Deulces
:
Previous
xt
196591
Phoenix Techno
llllml!I
[
Leue
ll
!Enabled [Enabled [Yes
l
Iue
.
[0010]
!
Enabled) !Ertabledl !
Ycsl
[0E)i0] y
ue
Iue
ue
ua
lue
J
I
)
F5 FD De
Previous
logies Ltd.
Canf
fault Con
iguratian
figuration
Figure 4-13. PCI Devi
Phoenix Setup Co
PCI De
Enable Deuice:
Enable
Use Der au
Le
PCI
Enable Deutce: Enable
U
se
La.tcncy Tin
fl
Moue
Figure 4-14. PCI Devi
Basa 1/0 Address
PCI device resource requests are
Basa
Memory
range
from which the PCI device resource requests are satisfied.
Mu
ldm
Addre
ad la mode
ces Screen
pyright
vice, Slot
tencu Tiner Value
Device, Slot
Default
ESC
Fl Hel
-
refers to the base of
tt3:
Hes
tcr-:
l t
Latency Timer
:
111
:
Master
:
Latency
er Value:
Exit PgUp Pr
p
PgDn
ces
Scree
Tiflle:r Value:
evious
next IJalue
satisfied
ss
-
pertains to the base of 32
-
enables or
disables
2
1985'H Phoenix
PCI
Deutces
Value: !Yes)
IJalu
Technologies
!
Enabled
]
!Enabled
)
[
004()]
[
Enabled]
!
Enabled
]
[
Yes
]
[
001()
)
e
FS Pre F6 Default Configuration
n 3
I/ O address ranges from which the
.
bit memory address
palette snooping for
card.
vio
us Co
Ltd
.
..
nfigura.tion
multimedia
Parity
-
24
enables
or
disables
the parity checking.
Sl54P AIO User's Manual
PCI Interrupt 1/
1, 2,
3 and 4.
14/15
Edge/Laval
Level/Edge sensitivity for a given
Note:
PCI
DIVICI, Slot #1/#2/#3/
Enable
Enable
whether
Use
fault value for the Latency Timer will be loaded or the succeeding La tencyTimer Value will be used. is needed
Yes (default)
latancv
clocks that
0000-00FS
2/3/4
sat
to
-
program
The available IRQs are
and None (default)
Select
-
programs the PCI IRQ to single edge or logic level.
is
programmed per controller. Every IRQ
bank
is either
When a PCI IDE add-on card
board, it will require the user to plug the card onto a
daughter board and to set this option to "EDGE" triggered.
"EDGE"
the IRQ associated with PCI
3/5/7 /9/10/11/
or
"LEVEL"
(default) triggered.
is
installed onto the main-
4#:
DBVICI
Enabled
Master
Enabled
Default
No
0040 (default)
-
enables
Disabl
ed
(default)
-
enables selected device as a PCI bus master
the
PCI
card
Disabled (default)
latancv
in
the Latency Timer Value option.
Timar Val
the
master may burst. The available options are:
the II o and
is a master or
Timar Val
ue
-
ue
-
determines whether or not
If
set to
pertains to the maximum
memory cycle
not
.
"Yes",
decoding
no
further programming
number
of PCI bus
and
Interrupt
input
.
checks
the de
25
Sl54P AIO User's Manual
4.5
Figure
Boot
erating sys
Boot Options
Phoenix Setup Co
1.l
t1ov
e ESC
4-15. Boot Options Scree
SIQUIDCI selects th
tem to
A: then C: (d
C: then A:
SETUP
prompt
displays the message during
chance to load the
Enabled (default)
Disabled
Boot se
SETUP prompt: !Enabled]
POST
Errors: !Enabled]
F
lappy ch
Sun
rta
ry
Exit
Fl Help
e drive where the
run
with. The
efault)
SLTIJP
program. The
pyright
196591.
Phoenix Technologies
Doot Opt ions
quence
:
CA
:
then
C: l
eck: !Enabled]
screen: [
Ena.bled
]
PgUp Previous Valu
PgDn Nex
't Value
e
n
system would search for the op
available options are:
bootup that giv
available options
FS Previ F6 Default
Ltd
ous
Configura
Configuration
are
.
tion
es you the :
POST
Enors
-
activates the PowerOnSelfTest error messages to be
played on the
screen
when detected. The
available options are:
Enabled (default)
Disabled
Boot
Up
Floppy
Saak
-
checks wh
tem a
re
correct or
m
agnetic heads of the floppy drives produce a so
test. The
available
Enabled (default
not. This option's options
)
ether the floppy drives
operati
are
:
Disabled
2 6
on
usually
installed on the sys
occurs
when the
und
during power on self
dis
Summa
ry screan -
play. The
enables (default) or disables the Summary Screen
Summary Screen descripts the system
Sl54P AIO User's
H/W
configuration
Manua
dis
.
l
4.6
Figure 4-16. S
S11111rvlsa
abled or disabled (de
User
Sec
urity Se
ecurity and
P
hoenix Se
u·110...,
n
Help
r
Password Is -
Passward Is -
tup
Anti-Virus Screen
tup Copyr
Supervisor Pesscoed is DIS<lble
Us
er Paasu
Set
Supervisor Passuord !
Set User Passt.ior
Pa
SU1
ord on boo
D lske
tte
Fi
xed disk boot
Enter Set/Change Password
ESC Ex
fault).
shows whether the user password is enabled or disabled
ight fiBS91 Phoenix Technologies
S
ecur
ity Se
tup
cr-d
i
s
d
t:
access:
sector:
it
shows whe
Disabled
Press
P
ress En
!Disabled) [Supervisor I
111
omo
ther the supervisor pa
d Enter)
ter
ll
FS
Preuiaus Configu
F6
Defou
lt
Conf
(default).
Il
l
SUPlrvlHr
Password -
requires a password when entering
passwords are not case sensitive. Pressing the <Enter> key message requiring for the supervisor pas phanumeric menus
characters. This option also gives full access to the Se
.
sword which can be up to seven al
Ltd
.
ra.
tion
lguro.tion
ssword is en
Setup. the
will
display a
tup
Il
l
User Password
-
Pressing the <Enter
> key
will
display a
messa
ge quiring for the user password which can be up to seven alphanumeric characters. This
option also gives
restricted access to the Setup menus and
requires the setting of the Supervisor Password first.
PaSSMnl
The option needs the setting of the Supervisor Password. word is set an
is booting.
an
bDOl
-
determines whether the password is required on boot.
d this option is disabled (de
fault), BIOS
If
Supervisor
assumes that the use
re
Pass
r
27
Sl54P AIO User's Manua
l
DlsktDI access
when se
will
access to the
4.7
t as Supervisor (de
req
uire the setting of the Sup
Green PC Feature
restricts the use of floppy drives only to the supervisor
floppy
Phoenix
P
o...,r Savi
Syn
""
Doze
Syst
Cll Standby Thier:
Syn ..
Suspend
Hard Di
sk St<indby
IJGA
"1th Pa....r Dmm f04ture:
P
c:Ner Savi
P
o....r Savi
Syste
Suspend
S..itch Select
tlav
ESC
e
U
Figure 4-17. Green
Phoenix Set
APl1 SHI Fu V6A
I'll MJnitorJRQ1JRQ15 Activi
nct
Access
J
RQJ (COll2
l
llQ1
(
COftl):
1
1115
CAlt. printer
l
llj6 (Diskette l
IRQ? (Pr
inter):
Hill CIRQ2 Redir
lllQ10 (User defined): IRQU , CUser defined l
fault).
drives
at any time.
Set
up Co
Jl!.lright 1~1l5'M Phoenix
ng no
de:
Thoer
:
Thi
er:
Tller
:
ng
in Doze
ng in Stan
f'lduonc .. t ti01
PC
ion Support
Detec
):
l'lode
dby tlodc:
ed P°"er er reload or
:
Exit PgUp
P
gDn
Fea
tur
up Copyright 1985
6reen
:
t!
on
:
):
: l:
:
Also, c
hoosing Supervisor for this option
ervisor
Gr
:
nanage01cnt Setup
Pre llcxt Value
een
vio
PC F
stop cl
us
Pas
ee tares
ock breek sel
Val
ue
es Screen
91 Phoenix Tcchoologi
PC
Features
ty
sword. Setting it as
Tech
nologi
es Lt
d.
iliDltmlmll IZ@ sec]
15
01in
l
11@ oi
nJ !Disobledl l
tlone
l
!Save 1/
ZI
!Save Z/
31
ect
I
E110ble
dJ
F5 Prevf ous Configura
F& Default Con
figurati
1
es
Ltd
lml!lm!m
l
CDi
sabled
l
COnl COnl COnl [On]
[On] [On] COnl COnl
User allows
tion
on
.
..
H
"°""
ESC Ex
Figure 4-18. Green
2
8
it
PC
PgUp Pr PgDn t!e
Fea
evious Value xt Value
tur
es Screen
F5 Previous Configuration
f& D
efault
2
Configuration
U
IRQ14 (Fi IRQ15
Hou e
Phoeni
x Setup - Copyright
xe d
Di s
(User
ESC Exit
k): COnl
defin
19115-9
1:
Green
PC featur
e d
):
PgUp Preuious Value PgDn t!ext
Valu
e
Sl54P AIO User's Manual
Phoenix Te
es
COnl
FS Pre F6 Def
chnologi
vious ault
es
Ltd.
Configurat
Configuration
..
ion
Figure 4-
PIWlr
fewature of the chipset. Once ena can
19. Green PC Features Screen
Saving Mode
-
enables or disables (default) the
bled, the values of the following options
beset.
System
the system enters DOZE
System
when the system events
System
when the system enters
Hard Di
Doze Ti
mar
-
sets the time interval after
mode. The a
20 sec (default) 40 sec
· 1
min 90 se
3 min Disable
StandbV Ti
20 sec 1 min
5 min (d
15 min 20 mi
30 min Disable
Suspend
mar
-
sets the time
enter
efaul
t)
Ti m
ar
-
s
STANDBY
sets the time interval after system ina
SUSPEND
20 sec 1 min
5 min
15 min 20 min
30 min Disable
sk
Standby
Tim
ar
-
se
ts
the time interval after HDD inactivity
vaialble options are
interval after system inactivity
10
mode. The
10 min (default
when the HDD enter standby mode. The options
Disabl
ed (d
efaul
t) 1-
3
power sa
system inactivity when
:
c
d
mode. The options are:
min
n
d
availabl
d
15 min
e options are
)
are
:
ving mode
ctivity
:
2 9
Sl54P
AIO Us
VGA
enters
er's Manual
wllh
Powe
SLEEP
None (d
VE
SADPMS
mode. The options are:
Power Saving In Boza
tem enters DOZE
Save 1/2 (d
Save 3/4
Power
Saving In
system
Suspend
Switch
APM
ating System(OS)
VGA
ent
ers STANDBY mode. The options are:
Save
Save 3/4
SWltch Sal act
.
Enabl
ed
SMI
Funcdon Su
Enabl
ed (de
Access Datacdon
Enabled Disabled (defa
r OONJ laature
efault
)
Mode -
-
sets the method by which the
Standard
sets the CPU
mode. The options are:
efault
)
Sla
ndbV
Mode -
1/2
-
enables or disables the function of
(default) Disabled
pport
-
APM
Function.
fault) Disabled
-
The
Save 2/3
sets the CPU Power Sa
Save 2/3
enables
APM
available options are:
power
Saving
(default)
Fun
cti
on control from
rat
e when
ving rate when
Suspend
ult)
VGA
Oper
chip
sys
PM
manltorlRQHRQ15
off)
IRQ3 (COM2
IRQ5
IRQ7 (P
IRQ
IRQ14 (Fixed Dis
(Al
10 (User de
3 0
Acllvltv
t.
printer)
rinter)
.
(Switch the following pa
)
fined)
k)
IRQ4 (CO
IRQ6 (Diskette
IRQ9 (IRQ2 Redir)
IRQ
IRQ15 (User defined)
ramet
M1)
)
11 (User defined
ers to on or
)
Sl54P AIO User's Manual
4.8
If,
the ke
Load ROM Default Values
during bootup, the BIOS program detects a
CMOS, it
y to
will
display a mes
sag
e asking you to either press the <
run Setup or the <Fl> key to resume
problem in the
booting. This probably means that the CMOS values have been corrupted or modified haps by an application
Press the R
OM de
<Fl>
key to
fault values already loa
changes before saving the
Phoenfx Se
F
igure 4-20. Load
program tha
resume the boot or <DEL
valu
tup - Copyright
t changes data stored in CMOS.
> to
ded
in the menus. You can ma
es
to CMOS.
1985-94 Phoen
l'la
in t1en
Syste1t Setup
Load Values fr
Saue ·Valu
es
u
on Cl103
to Cl1
ix Tec
0S
ROM Default Values Screen
run Setup with the
hno
lo!Ji
integrity of
DEL
incorrectly, per
ke other
es
Ltd
.
>
31
Sl54P AIO User's Manual
4.9
If, during a Setup
have not yet saved the values to
Load Valu
session, you change your mind about your
es from CM
CMOS, you can restore the
OS
sel
valu
ecti
es you pre
viously saved to CMOS.
Select Load Values from CMOS on the Main Menu and the program
display the following scree
Phoenix Setup Copyright 19B594 Phoenix T
F
igure 4-21.
Load Values from
n.
tta
in
Syste"
Set
up
N
Load Sa
Values fro
ue
Value
otice
s ta Cl10S
rceuw=
I
 
CMOS Screen
tfeoo
Ioorled
fl
echnologies Ltd.
J
cnos
ons
will
and
32
S
4
.10 Save Values to CMOS
l54P AIO
User's Manua
After making your selections on the Setup menus, always select Save Values to CMOS in order to make them operative. Unlike standard RAM memory, CMOS RAM is sustained by an onboard battery and stays on after you
your system
off.
turn
l
After you save your selections, the program
will
display the following
screen.
P
hoenix Se
Figure 4-22. Save Values to
If
you attempt to exit without saving, the program
tup Copyright 1911594 Phoenix Tec
Ila.
In
lle
nu
Systeoi Setup
Fl
Lo ue
.
Load
U.. lues frM
Save U..iu
es to Cll
CltOS
OS
p
rus
s
CMOS Screen
would like to save the changes made before exiting. During bootup,
in
the CMOS
BIOS
RAM.
for the chipset attempts to load the values you saved
If
the values saved in the CMOS cause the system boot to fail, reboot and press the <DEL> key to enter Se load the ROM default values change the values tha
t caused the boot to fail.
(as
described
in
the section 4.8) or
hnologies Ltd.
will
ask you
tup.
In
Setup, you may
if
try
you
to
33
Sl54P AIO User's Manual
4.11
After making all modifications
Values to CMOS" then press the <Enter> key or simply press the <FlO> key. The screen like to save and exit or not.
Use the arrow keys or press <Y> for
settings before exiting. Press <N> for No then the <Enter> key to exit
out saving.
If
program
or not. Press <Y> for
<N> then the <Enter> key to save your settings first before exiting Setup.
Quitting
you made changes to the CMOS values and then press the <ESC> key, the
will
Setup
in
the Setup program,go to the option
will
then display a message asking you whether you would
Yes
then the <Enter> key to save your
prompt you whether you would like to Quit without saving
Yes
then the <Enter> key to quit without saving, or press
"Save
with
34
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