ECS RS780LQ-CM Schematics rev1.0
5
RS780LQ-CM
D D
4
3
V1.0
2
09
/7/23
1
SCHEMATICS TABLE:
Page Index
------- ------------------------
1
COVER PAGE
BLOCK DIAGRAM
2
3
HT,CPU MEMORY
4
CPU CONTROL & MISC
5
CPU PWR & GND
6
C C
10
11
12
13
14
15
B B
16
*Reference Document:
42336_rs780_dg_nda_2.00
43303_sb700_dg_nda_1.05
DDR3 DIMM
7
RS740/RS780-HT LINK I/F
8
RS740/RS780-PCIE I/F
9
RS740/RS780-SYSTEM I/F
RS740/RS780-SPMEM/STRAPS
RS740/RS780-POWER
CLOCK GENERATOR-ICS9LPRS471
SB710-PCIE/PCI/CPU/LPC/CLK
SB710-ACPI/GPIO/USB/AUDIO
SB710-POWER & DECOUPLING
SB710-SATA/IDE/HWM/SPI
Page Index
------- ------------------------
L1:T
OPPCB STACK:
L2:PWR
L3:GND
L4:BOTTOM
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
SB710-STRAPS
CRT(D-sub)-VGA
PCIE-16X/1X SLOT
TPM, USB, 5VDUAL SWITCH
PCI SLOT
SIO IT8720-PS2/FDD/CIR
LPT/COM PORT
LAN 8103EL/8102EL/8111DL
AUDIO ALC662/ALC888
ALC662/ALC888(PANEL)
ISL6323B VCORE VOLTAGE
DC POWER, DDRIII POWER
NB CORE POWER
PANEL,ATX24P,SMRT FAN,BUZZER
POWER ENABLE
Attention
REVISION HISTORY:
Date Notes
Rev
---------- -------------- --------------------------------------------------------------------------------
V.A 2009.7.22 First release
A A
V1.0 2009.8.14
2009.914
5
P20, Modify GP40 pull-high to fix S3 issue
P29, Modify U20 VDDA circuit
P30, Modify Buzzer circuit
P09, Reserve the gate circuit to prevent from the glitch
4
Elitegroup Computer Systems
Elitegroup Computer Systems
<OrgAddr1>
<OrgAddr1>
<OrgAddr1>
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
3
2
Date: Sheet of
Elitegroup Computer Systems
Cover Page
Cover Page
Cover Page
RS780LQ-CM
RS780LQ-CM
RS780LQ-CM
1
1
1
32Tuesday, September 29, 2009
32Tuesday, September 29, 2009
1
32Tuesday, September 29, 2009
1.0
1.0
1.0
5
RS780LQ-CM
4
3
2
1
AMD
DDRIII 800,1066,1333
D D
Clock
Generator
ICS9LPR471
HyperTransport
Link
DVI/TMDS CON
(NA)
VGA CON
C C
USB-9
(NA)
USB-10
(NA)
B B
USB-8
(NA)
USB-11
(NA)
USB-5USB-6USB-7
1394
CON
(NA)
USB-1USB-2USB-3USB-4
VIA 6308P
(NA)
SPI ROM
USB-0
2CH TMDS
USB 2.0
PCI
SPI I/F
AM3
AM3 SOCKET
OUT
RS740/RS780
HyperTransport LINK0 CPU I/F
DX10 IGP( RS780)
LVDS/TVOUT/TMDS(RS780/740)
DISPLAY PORT X2 (RS780)
Side Port Memory(RS780/740)
1 X16 PCIE I/F
1 X4 PCIE I/F WITH SB
6 X1 PCIE I/F (4 X1 for RS740)
SB710
USB2.0 (12)+ 1.1(2)
SATA II (6 PORTS)
AZALIA HD AUDIO
ATA 66/100/133
SPI I/F
LPC I/F(S5)
ACPI 1.1
INT RTC
16x16
IN
4X PCIE ALink
128bit
DDRIII 800,1066,1333
Side port
16X
6 1X PCIE INTERFACE
PCIE GPP0
X1
HD AUDIO I/F
SATA II I/F
FRAME BUFFER
DDR3 (NA)
PCIE
SLOT
HD AUDIO HDR
SATA#0 SATA#1 SATA#2 SATA#3
UNBUFFERED DDRIII
DIMM A0(NA)
UNBUFFERED DDRIII
DIMM B0(NA)
DDRIII FIRST LOGICAL DIMM DDRIII SECOND LOGICAL DIMM
16X
PCIE GPP3
GIGABIT LAN
HD AUDIO
REAR CON
UNBUFFERED
DDRIII DIMM A1
UNBUFFERED
DDRIII DIMM B1
SATA#4
(NA)
SATA#5
(NA)
HW MONITOR
PCI/PCI BDGE
PCI SLOT
#2
PCI SLOT
#1
PCI
LPC I/F
ITE SIO IT8720
A A
KBD
MOUSE
5
4
FLOPPY
3
LPT
PORT
HW MONITOR I/F
TPM 1.2(TCM)
HW
MONITOR
2
Elitegroup Computer Systems
Elitegroup Computer Systems
<OrgAddr1>
<OrgAddr1>
<OrgAddr1>
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
Elitegroup Computer Systems
BLOCK DIAGRAM
BLOCK DIAGRAM
BLOCK DIAGRAM
RS780LQ-CM
RS780LQ-CM
RS780LQ-CM
2
2
2
32Tuesday, September 29, 2009
32Tuesday, September 29, 2009
1
32Tuesday, September 29, 2009
1.0
1.0
1.0
5
4
3
2
1
CPU Memory
DDR3 Memory Interface BDDR3 Memory Interface A
CPU1C
AK19
AL19
AL18
AE30
AC31
AF31
AD29
AE29
AB31
AG31
AD31
AC29
AC30
AB29
AA31
AA28
AE31
AA29
AA30
AK13
AK17
AK23
AL23
AL28
AL29
AH17
AK29
AJ19
U31
U30
W29
W28
Y31
Y30
V31
W31
A18
A19
C19
D19
B19
N31
M31
M29
N28
N29
N30
P29
P31
R29
R28
R31
R30
T31
T29
U29
U28
AJ13
AJ17
D31
C31
C24
C23
D17
C17
C14
C13
AJ14
AJ23
C30
A23
B17
B13
CPU1C
MB_CLK_H7
MB_CLK_L7
MB_CLK_H6
MB_CLK_L6
MB_CLK_H5
MB_CLK_L5
MB_CLK_H4
MB_CLK_L4
MB_CLK_H3
MB_CLK_L3
MB_CLK_H2
MB_CLK_L2
MB_CLK_H1
MB_CLK_L1
MB_CLK_H0
MB_CLK_L0
MB0_CS_L1
MB0_CS_L0
MB0_ODT1
MB0_ODT0
MB1_CS_L1
MB1_CS_L0
MB1_ODT1
MB1_ODT0
MB_RESET_L
MB_CAS_L
MB_WE_L
MB_RAS_L
MB_BANK2
MB_BANK1
MB_BANK0
MB_CKE1
MB_CKE0
MB_ADD15
MB_ADD14
MB_ADD13
MB_ADD12
MB_ADD11
MB_ADD10
MB_ADD9
MB_ADD8
MB_ADD7
MB_ADD6
MB_ADD5
MB_ADD4
MB_ADD3
MB_ADD2
MB_ADD1
MB_ADD0
MB_DQS_H7
MB_DQS_L7
MB_DQS_H6
MB_DQS_L6
MB_DQS_H5
MB_DQS_L5
MB_DQS_H4
MB_DQS_L4
MB_DQS_H3
MB_DQS_L3
MB_DQS_H2
MB_DQS_L2
MB_DQS_H1
MB_DQS_L1
MB_DQS_H0
MB_DQS_L0
MB_DM7
MB_DM6
MB_DM5
MB_DM4
MB_DM3
MB_DM2
MB_DM1
MB_DM0
AM3_SOCKET
AM3_SOCKET
3
MB_DATA63
MB_DATA62
MB_DATA61
MB_DATA60
MB_DATA59
MB_DATA58
MB_DATA57
MB_DATA56
MB_DATA55
MB_DATA54
MB_DATA53
MB_DATA52
MB_DATA51
MB_DATA50
MB_DATA49
MB_DATA48
MB_DATA47
MB_DATA46
MB_DATA45
MB_DATA44
MB_DATA43
MB_DATA42
MB_DATA41
MB_DATA40
MB_DATA39
MB_DATA38
MB_DATA37
MB_DATA36
MB_DATA35
MB_DATA34
MB_DATA33
MB_DATA32
MB_DATA31
MB_DATA30
MB_DATA29
MB_DATA28
MB_DATA27
MB_DATA26
MB_DATA25
MB_DATA24
MB_DATA23
MB_DATA22
MB_DATA21
MB_DATA20
MB_DATA19
MB_DATA18
MB_DATA17
MB_DATA16
MB_DATA15
MB_DATA14
MB_DATA13
MB_DATA12
MEM CHB
MEM CHB
MB_DATA11
MB_DATA10
MB_DATA9
MB_DATA8
MB_DATA7
MB_DATA6
MB_DATA5
MB_DATA4
MB_DATA3
MB_DATA2
MB_DATA1
MB_DATA0
MB_DQS_H8
MB_DQS_L8
MB_DM8
MB_CHECK7
MB_CHECK6
MB_CHECK5
MB_CHECK4
MB_CHECK3
MB_CHECK2
MB_CHECK1
MB_CHECK0
MB_EVENT_L
MB_DATA63
AH13
MB_DATA62
AL13
MB_DATA61
AL15
MB_DATA60
AJ15
MB_DATA59
AF13
MB_DATA58
AG13
MB_DATA57
AL14
MB_DATA56
AK15
MB_DATA55
AL16
MB_DATA54
AL17
MB_DATA53
AK21
MB_DATA52
AL21
MB_DATA51
AH15
MB_DATA50
AJ16
MB_DATA49
AH19
MB_DATA48
AL20
MB_DATA47
AJ22
MB_DATA46
AL22
MB_DATA45
AL24
MB_DATA44
AK25
MB_DATA43
AJ21
MB_DATA42
AH21
MB_DATA41
AH23
MB_DATA40
AJ24
MB_DATA39
AL27
MB_DATA38
AK27
MB_DATA37
AH31
MB_DATA36
AG30
MB_DATA35
AL25
MB_DATA34
AL26
MB_DATA33
AJ30
MB_DATA32
AJ31
MB_DATA31
E31
MB_DATA30
E30
MB_DATA29
B27
MB_DATA28
A27
MB_DATA27
F29
MB_DATA26
F31
MB_DATA25
A29
MB_DATA24
A28
MB_DATA23
A25
MB_DATA22
A24
MB_DATA21
C22
MB_DATA20
D21
MB_DATA19
A26
MB_DATA18
B25
MB_DATA17
B23
MB_DATA16
A22
MB_DATA15
B21
MB_DATA14
A20
MB_DATA13
C16
MB_DATA12
D15
MB_DATA11
C21
MB_DATA10
A21
MB_DATA9
A17
MB_DATA8
A16
MB_DATA7
B15
MB_DATA6
A14
MB_DATA5
E13
MB_DATA4
F13
MB_DATA3
C15
MB_DATA2
A15
MB_DATA1
A13
MB_DATA0
D13
J31
J30
J29
K29
K31
G30
G29
L29
L28
H31
G31
MB_EVENT_LMA_EVENT_L
V29
R930 1K-04R930 1K-04
1 2
MB_DATA[63..0] 6
MB_EVENT_L6
HT_CLKIN1_P7
HT_CLKIN1_N7
HT_CLKIN0_P7
HT_CLKIN0_N7
HT_CTLIN1_P7
HT_CTLIN1_N7
HT_CTLIN0_P7
HT_CTLIN0_N7
HT_CADIN15_P7
HT_CADIN15_N7
HT_CADIN14_P7
HT_CADIN14_N7
HT_CADIN13_P7
HT_CADIN13_N7
HT_CADIN12_P7
HT_CADIN12_N7
HT_CADIN11_P7
HT_CADIN11_N7
HT_CADIN10_P7
HT_CADIN10_N7
HT_CADIN9_P7
HT_CADIN9_N7
HT_CADIN8_P7
HT_CADIN8_N7
HT_CADIN7_P7
HT_CADIN7_N7
HT_CADIN6_P7
HT_CADIN6_N7
HT_CADIN5_P7
HT_CADIN5_N7
HT_CADIN4_P7
HT_CADIN4_N7
HT_CADIN3_P7
HT_CADIN3_N7
HT_CADIN2_P7
HT_CADIN2_N7
HT_CADIN1_P7
HT_CADIN1_N7
HT_CADIN0_P7
HT_CADIN0_N7
+HT_1P2V
2
CPU1B
D D
MA1_CLK_P16
MA1_CLK_N16
MA1_CLK_P06
MA1_CLK_N06
MA1_CS_L16
MA1_CS_L06
C C
MA1_ODT16
MA1_ODT06
MA_RESET_L6
MA_CAS_L6
MA_WE_L6
MA_RAS_L6
MA_BANK26
MA_BANK16
MA_BANK06
MA_CKE16
MA_CKE06
MA_ADD[15..0]6
B B
MA_DQS_P76
MA_DQS_N76
MA_DQS_P66
MA_DQS_N66
MA_DQS_P56
MA_DQS_N56
MA_DQS_P46
MA_DQS_N46
MA_DQS_P36
MA_DQS_N36
MA_DQS_P26
MA_DQS_N26
MA_DQS_P16
MA_DQS_N16
MA_DQS_P06
MA_DQS_N06
MA_DM[7..0]6
A A
MA_ADD15
MA_ADD14
MA_ADD13
MA_ADD12
MA_ADD11
MA_ADD10
MA_ADD9
MA_ADD8
MA_ADD7
MA_ADD6
MA_ADD5
MA_ADD4
MA_ADD3
MA_ADD2
MA_ADD1
MA_ADD0
MA_DM7
MA_DM6
MA_DM5
MA_DM4
MA_DM3
MA_DM2
MA_DM1
MA_DM0
CPU1B
AG21
MA_CLK_H7
AG20
MA_CLK_L7
AE20
MA_CLK_H6
AE19
MA_CLK_L6
U27
MA_CLK_H5
U26
MA_CLK_L5
V27
MA_CLK_H4
W27
MA_CLK_L4
W26
MA_CLK_H3
W25
MA_CLK_L3
U24
MA_CLK_H2
V24
MA_CLK_L2
G19
MA_CLK_H1
H19
MA_CLK_L1
G20
MA_CLK_H0
G21
MA_CLK_L0
AC25
MA0_CS_L1
AA24
MA0_CS_L0
AE28
MA0_ODT1
AC28
MA0_ODT0
AD27
MA1_CS_L1
AA25
MA1_CS_L0
AE27
MA1_ODT1
AC27
MA1_ODT0
E20
MA_RESET_L
AB25
MA_CAS_L
AB27
MA_WE_L
AA26
MA_RAS_L
N25
MA_BANK2
Y27
MA_BANK1
AA27
MA_BANK0
L27
MA_CKE1
M25
MA_CKE0
M27
MA_ADD15
N24
MA_ADD14
AC26
MA_ADD13
N26
MA_ADD12
P25
MA_ADD11
Y25
MA_ADD10
N27
MA_ADD9
R24
MA_ADD8
P27
MA_ADD7
R25
MA_ADD6
R26
MA_ADD5
R27
MA_ADD4
T25
MA_ADD3
U25
MA_ADD2
T27
MA_ADD1
W24
MA_ADD0
AD15
MA_DQS_H7
AE15
MA_DQS_L7
AG18
MA_DQS_H6
AG19
MA_DQS_L6
AG24
MA_DQS_H5
AG25
MA_DQS_L5
AG27
MA_DQS_H4
AG28
MA_DQS_L4
D29
MA_DQS_H3
C29
MA_DQS_L3
C25
MA_DQS_H2
D25
MA_DQS_L2
E19
MA_DQS_H1
F19
MA_DQS_L1
F15
MA_DQS_H0
G15
MA_DQS_L0
AF15
MA_DM7
AF19
MA_DM6
AJ25
MA_DM5
AH29
MA_DM4
B29
MA_DM3
E24
MA_DM2
E18
MA_DM1
H15
MA_DM0
AM3_SOCKET
AM3_SOCKET
5
MA_DATA63
MA_DATA62
MA_DATA61
MA_DATA60
MA_DATA59
MA_DATA58
MA_DATA57
MA_DATA56
MA_DATA55
MA_DATA54
MA_DATA53
MA_DATA52
MA_DATA51
MA_DATA50
MA_DATA49
MA_DATA48
MA_DATA47
MA_DATA46
MA_DATA45
MA_DATA44
MA_DATA43
MA_DATA42
MA_DATA41
MA_DATA40
MA_DATA39
MA_DATA38
MA_DATA37
MA_DATA36
MA_DATA35
MA_DATA34
MA_DATA33
MA_DATA32
MA_DATA31
MA_DATA30
MA_DATA29
MA_DATA28
MA_DATA27
MA_DATA26
MA_DATA25
MA_DATA24
MA_DATA23
MA_DATA22
MA_DATA21
MA_DATA20
MA_DATA19
MA_DATA18
MA_DATA17
MA_DATA16
MA_DATA15
MA_DATA14
MA_DATA13
MA_DATA12
MEM CHA
MEM CHA
MA_DATA11
MA_DATA10
MA_DATA9
MA_DATA8
MA_DATA7
MA_DATA6
MA_DATA5
MA_DATA4
MA_DATA3
MA_DATA2
MA_DATA1
MA_DATA0
MA_DQS_H8
MA_DQS_L8
MA_DM8
MA_CHECK7
MA_CHECK6
MA_CHECK5
MA_CHECK4
MA_CHECK3
MA_CHECK2
MA_CHECK1
MA_CHECK0
MA_EVENT_L
MA_DATA63
AE14
MA_DATA62
AG14
MA_DATA61
AG16
MA_DATA60
AD17
MA_DATA59
AD13
MA_DATA58
AE13
MA_DATA57
AG15
MA_DATA56
AE16
MA_DATA55
AG17
MA_DATA54
AE18
MA_DATA53
AD21
MA_DATA52
AG22
MA_DATA51
AE17
MA_DATA50
AF17
MA_DATA49
AF21
MA_DATA48
AE21
MA_DATA47
AF23
MA_DATA46
AE23
MA_DATA45
AJ26
MA_DATA44
AG26
MA_DATA43
AE22
MA_DATA42
AG23
MA_DATA41
AH25
MA_DATA40
AF25
MA_DATA39
AJ28
MA_DATA38
AJ29
MA_DATA37
AF29
MA_DATA36
AE26
MA_DATA35
AJ27
MA_DATA34
AH27
MA_DATA33
AG29
MA_DATA32
AF27
MA_DATA31
E29
MA_DATA30
E28
MA_DATA29
D27
MA_DATA28
C27
MA_DATA27
G26
MA_DATA26
F27
MA_DATA25
C28
MA_DATA24
E27
MA_DATA23
F25
MA_DATA22
E25
MA_DATA21
E23
MA_DATA20
D23
MA_DATA19
E26
MA_DATA18
C26
MA_DATA17
G23
MA_DATA16
F23
MA_DATA15
E22
MA_DATA14
E21
MA_DATA13
F17
MA_DATA12
G17
MA_DATA11
G22
MA_DATA10
F21
MA_DATA9
G18
MA_DATA8
E17
MA_DATA7
G16
MA_DATA6
E15
MA_DATA5
G13
MA_DATA4
H13
MA_DATA3
H17
MA_DATA2
E16
MA_DATA1
E14
MA_DATA0
G14
J28
J27
J25
K25
J26
G28
G27
L24
K27
H29
H27
W30
R929 1K-04R929 1K-04
MA_DATA[63..0] 6
MB1_CLK_P16
MB1_CLK_N16
MB1_CLK_P06
MB1_CLK_N06
MB1_CS_L16
MB1_CS_L06
MB1_ODT16
MB1_ODT06
MB_RESET_L6
MB_CAS_L6
MB_WE_L6
MB_RAS_L6
MB_BANK26
MB_BANK16
MB_BANK06
MB_CKE16
MB_CKE06
MB_ADD[15..0]6
MB_DQS_P76
MB_DQS_N76
MB_DQS_P66
MB_DQS_N66
MB_DQS_P56
MB_DQS_N56
MB_DQS_P46
MB_DQS_N46
MB_DQS_P36
MB_DQS_N36
MB_DQS_P26
MB_DQS_N26
MB_DQS_P16
MB_DQS_N16
MB_DQS_P06
MA_EVENT_L 6
+VDIMM +VDIMM
1 2
4
MB_DQS_N06
MB_DM[7..0]6
MB_ADD15
MB_ADD14
MB_ADD13
MB_ADD12
MB_ADD11
MB_ADD10
MB_ADD9
MB_ADD8
MB_ADD7
MB_ADD6
MB_ADD5
MB_ADD4
MB_ADD3
MB_ADD2
MB_ADD1
MB_ADD0
MB_DM7
MB_DM6
MB_DM5
MB_DM4
MB_DM3
MB_DM2
MB_DM1
MB_DM0
HT LINK
CPU1A
CPU1A
N6
L0_CLKIN_H1
P6
L0_CLKIN_L1
N3
L0_CLKIN_H0
N2
L0_CLKIN_L0
V4
L0_CTLIN_H1
V5
L0_CTLIN_L1
U1
L0_CTLIN_H0
V1
L0_CTLIN_L0
U6
L0_CADIN_H15
V6
L0_CADIN_L15
T4
L0_CADIN_H14
T5
L0_CADIN_L14
R6
L0_CADIN_H13
T6
L0_CADIN_L13
P4
L0_CADIN_H12
P5
L0_CADIN_L12
M4
L0_CADIN_H11
M5
L0_CADIN_L11
L6
L0_CADIN_H10
M6
L0_CADIN_L10
K4
L0_CADIN_H9
K5
L0_CADIN_L9
J6
L0_CADIN_H8
K6
L0_CADIN_L8
U3
L0_CADIN_H7
U2
L0_CADIN_L7
R1
L0_CADIN_H6
T1
L0_CADIN_L6
R3
L0_CADIN_H5
R2
L0_CADIN_L5
N1
L0_CADIN_H4
P1
L0_CADIN_L4
L1
L0_CADIN_H3
M1
L0_CADIN_L3
L3
L0_CADIN_H2
L2
L0_CADIN_L2
J1
L0_CADIN_H1
K1
L0_CADIN_L1
J3
L0_CADIN_H0
J2
L0_CADIN_L0
AM3_SOCKET
AM3_SOCKET
SR25 and SR26 stuff for RS740
RS740 stuff
SR25 51-1-04-OSR25 51-1-04-O
SR26 51-1-04-OSR26 51-1-04-O
RS740 stuff
L0_CLKOUT_H1
L0_CLKOUT_L1
L0_CLKOUT_H0
L0_CLKOUT_L0
L0_CTLOUT_H1
L0_CTLOUT_L1
L0_CTLOUT_H0
L0_CTLOUT_L0
L0_CADOUT_H15
L0_CADOUT_L15
L0_CADOUT_H14
L0_CADOUT_L14
L0_CADOUT_H13
L0_CADOUT_L13
L0_CADOUT_H12
L0_CADOUT_L12
L0_CADOUT_H11
L0_CADOUT_L11
L0_CADOUT_H10
L0_CADOUT_L10
L0_CADOUT_H9
L0_CADOUT_L9
L0_CADOUT_H8
L0_CADOUT_L8
L0_CADOUT_H7
L0_CADOUT_L7
L0_CADOUT_H6
L0_CADOUT_L6
L0_CADOUT_H5
L0_CADOUT_L5
L0_CADOUT_H4
L0_CADOUT_L4
HT LINK
HT LINK
L0_CADOUT_H3
L0_CADOUT_L3
L0_CADOUT_H2
L0_CADOUT_L2
L0_CADOUT_H1
L0_CADOUT_L1
L0_CADOUT_H0
L0_CADOUT_L0
1 2
1 2
<OrgAddr1>
<OrgAddr1>
<OrgAddr1>
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
AD5
AD4
AD1
AC1
Y6
W6
W2
W3
Y5
Y4
AB6
AA6
AB5
AB4
AD6
AC6
AF6
AE6
AF5
AF4
AH6
AG6
AH5
AH4
Y1
W1
AA2
AA3
AB1
AA1
AC2
AC3
AE2
AE3
AF1
AE1
AG2
AG3
AH1
AG1
HT_CTLIN1_P
HT_CTLIN1_N
Elitegroup Computer Systems
Elitegroup Computer Systems
Elitegroup Computer Systems
BLOCK DIAGRAM
BLOCK DIAGRAM
BLOCK DIAGRAM
HT_CLKOUT1_P 7
HT_CLKOUT1_N 7
HT_CLKOUT0_P 7
HT_CLKOUT0_N 7
HT_CTLOUT1_P7
HT_CTLOUT1_N 7
HT_CTLOUT0_P7
HT_CTLOUT0_N 7
HT_CADOUT15_P 7
HT_CADOUT15_N 7
HT_CADOUT14_P 7
HT_CADOUT14_N 7
HT_CADOUT13_P 7
HT_CADOUT13_N 7
HT_CADOUT12_P 7
HT_CADOUT12_N 7
HT_CADOUT11_P 7
HT_CADOUT11_N 7
HT_CADOUT10_P 7
HT_CADOUT10_N 7
HT_CADOUT9_P 7
HT_CADOUT9_N 7
HT_CADOUT8_P 7
HT_CADOUT8_N 7
HT_CADOUT7_P 7
HT_CADOUT7_N 7
HT_CADOUT6_P 7
HT_CADOUT6_N 7
HT_CADOUT5_P 7
HT_CADOUT5_N 7
HT_CADOUT4_P 7
HT_CADOUT4_N 7
HT_CADOUT3_P 7
HT_CADOUT3_N 7
HT_CADOUT2_P 7
HT_CADOUT2_N 7
HT_CADOUT1_P 7
HT_CADOUT1_N 7
HT_CADOUT0_P 7
HT_CADOUT0_N 7
RS780LQ-CM
RS780LQ-CM
RS780LQ-CM
1
3
3
3
1.0
1.0
1.0
32Tuesday, September 29, 2009
32Tuesday, September 29, 2009
32Tuesday, September 29, 2009
5
4
3
2
1
CPU Control and Miscellaneous
D D
VDDA_RUN_OUT
1 2
R938
R938
4.7K-04
4.7K-04
180P-04-O
180P-04-O
2 1
C920
C920
FB81 IND-.1u-12FB81 IND-.1u-12
C802
C802
4.7U-X5-08
4.7U-X5-08
2 1
C803
C803
.22U-16V-04
.22U-16V-04
2 1
CPU_VDD_FB_H27
CPU_VDD_FB_L27
+VDIMM
R940 39.2-1-04R940 39.2-1-04
1 2
R942 39.2-1-04R942 39.2-1-04
1 2
H_DBREQ_L
H_DBRDY
H_TCK
H_TMS
H_TDI
H_TRST_L
H_TDO
H_CLKIN_P
C801
C801
H_CLKIN_N
3300P-04
3300P-04
2 1
STP70STP70
STP53STP53
STP54STP54
STP74STP74
STP75STP75
STP76STP76
STP78STP78
STP20STP20
+VDIMM
R954
R954
300-04
300-04
CPU_PWRGD
LDT_STOPLDT_RST-
H_SIC
H_TDI
H_TRST_L
H_TCK
H_TMS
H_DBREQ_L
CPU_VDD_FB_H
CPU_VDD_FB_L
H_VTT_SENSE
H_M_VREF
H_M_ZN
H_M_ZP
H_TEST25_BYPASSCLK
H_TEST25_BYPASSCLK_L
H_TEST19_PLLTEST0
H_TEST18_PLLTEST1
H_TEST17_BP3
H_TEST16_BP2
H_TEST15_BP1
H_TEST14_BP0
H_TEST12_SCANSHIFTENB
+VDIMM
1
3
5
7
9
11
13
15
17
19
21
23
CPU_PWRGD13
LDT_STOP-9,13
LDT_RST-13
C322 3900P-04C322 3900P-04
21
21
C806
C806
1000P-04
1000P-04
C919
C919
180P-04-O
180P-04-O
2 1
12
R317
R317
169-1-04
169-1-04
180P-04-O
180P-04-O
2 1
C886
C886
H_CLKIN_P
H_CLKIN_N
+VDIMM
12
+VDIMM
+VDIMM
+VDIMM
+VDIMM
C804
C804
4.7U-08-O
4.7U-08-O
CPU_THERMTRIP-
CPU_CLKP
CPU_CLKN
+VDIMM
12
12
R946 300-04R946 300-04
1 2
R947 300-04R947 300-04
1 2
R948 300-04R948 300-04
1 2
R951 300-04R951 300-04
1 2
R952 1K-04R952 1K-04
1 2
R953 510-04R953 510-04
1 2
R955 510-04R955 510-04
1 2
CPU_CLKP12
CPU_CLKN12
CPU_THERMTRIP-14
C C
B B
A A
R957
R957
15-1
15-1
R959
R959
15-1
15-1
CLK Gen Test solution
C752
C752
6.8P-04
6.8P-04
2 1
C320 3900P-04C320 3900P-04
DS
Q88
Q88
G
FDV301N-S
FDV301N-S
FDV301N-S
03-050-530106
Place witin 500 mils
of the CPU socket.
H_M_VREF
C805
C805
.1U-16VX7-04
.1U-16VX7-04
2 1
2 1
CPU_PWRGD
LDT_STOPLDT_RST-
H_THERMTRIP_L_1.5
H_SIC
H_TEST25_BYPASSCLK
H_TEST25_BYPASSCLK_L
HDT Header
5
4
3
STP19STP19
C10
D10
A8
B8
C9
D8
C7
AL3
AL6
AK6
AK4
AL4
AL10
AJ10
AH10
AL9
A5
G2
G1
F3
E12
F12
AH11
AJ11
A10
B10
F10
E9
AJ7
F6
D6
E7
F8
C5
AH9
E5
AJ5
AH7
AJ6
C18
C20
F2
G24
G25
H25
L25
L26
HDT_HEADER1
HDT_HEADER1
KEY
KEY
ASP-68200-07-O-X
ASP-68200-07-O-X
Use buffered reset
CPU1D
CPU1D
VDDA_1
VDDA_2
CLKIN_H
CLKIN_L
PWROK
LDTSTOP_L
RESET_L
CPU_PRESENT_L
SIC
SID
SA0
ALERT_L
TDI
TRST_L
TCK
TMS
DBREQ_L
VDD_FB_H
VDD_FB_L
M_VDDIO_PWRGD
VDDR_SENSE
M_VREF
M_ZN
M_ZP
TEST25_H
TEST25_L
TEST19
TEST18
TEST13
TEST9
TEST17
TEST16
TEST15
TEST14
TEST12
TEST7
TEST6
TEST3
TEST2
RSVD1
RSVD2
RSVD3
RSVD4
RSVD5
INT. MISC.
INT. MISC.
RSVD6
RSVD7
RSVD8
AM3_SOCKET
AM3_SOCKET
2
4
6
8
VCC3
10
12
14
16
18
20
22
24
26
MISC.
MISC.
R956
R956
4.7K-04-O
4.7K-04-O
CORE_TYPE
SVC/VID3
SVD/VID2
PVIEN/VID1
THERMDC
THERMDA
THERMTRIP_L
PROCHOT_L
DBRDY
VDDIO_FB_H
VDDIO_FB_L
VDDNB_FB_H
VDDNB_FB_L
HTREF1
HTREF0
TEST29_H
TEST29_L
TEST24
TEST23
TEST22
TEST21
TEST20
TEST28_H
TEST28_L
TEST27
TEST26
TEST10
RSVD9
RSVD10
RSVD11
RSVD12
RSVD13
RSVD14
RSVD15
RSVD16
+VDIMM
G
D S
Q89
Q89
FDV301N-S-O
FDV301N-S-O
R958 0-04-OR958 0-04-O
2
VID5
VID4
VID0
PSI_L
TEST8
TDO
H_CORETYPE
G5
D2
D1
VRD_SVC
C1
VRD_SVD
E3
H_VID1_PVEN
E2
E1
AG9
AG8
H_THERMTRIP_L_1.5
AK7
AL7
H_TDO
AK10
H_DBRDY
B6
H_VDIMM_FBH_THERMTRIP_L_1.5
AK11
AL11
CPU_VDDNB_FB_H
G4
CPU_VDDNB_FB_L
G3
F1
H_HTREF1
V8
H_HTREF0
V7
H_TEST29_FBCLKOUT
C11
H_TEST29_FBCLKOUT_L
D11
H_TEST24_SCANCLK1
AK8
H_TEST23_TSTUPD
AH8
H_TEST22_SCANSHIFTEN
AJ9
H_TEST21_SCANEN
AL8
H_TEST20
AJ8
J10
H9
H_TEST27_SINGLECHAIN
AK9
AK5
G7
D4
L30
L31
AD25
AE24
AE25
AJ18
AJ20
AK3
LDT_RST-
VRD_SVC
VRD_SVC 27
VRD_SVD
VRD_SVD 27
R931 1K-04R931 1K-04
1 2
R932 1K-04R932 1K-04
1 2
R933 1K-04R933 1K-04
1 2
R935 300-04R935 300-04
1 2
SR939 44.2-1-04SR939 44.2-1-04
1 2
SR941 44.2-1-04SR941 44.2-1-04
1 2
A1
+VDIMM
+VDIMM
CPU_PVEN 27
CPU_THERMDC 22
CPU_THERMDA 22
H_PROCHOT_L 13
+VDIMM
12
R937
R937
300-04
300-04
H_VDIMM_FB 28
CPU_VDDNB_FB_H 27
CPU_VDDNB_FB_L 27
+HT_1P2V
TP82TP82
TP83TP83
STP72STP72
STP73STP73
STP80STP80
STP81STP81
STP79STP79
STP84STP84
A31
AM3
Top View
AL1
Elitegroup Computer Systems
Elitegroup Computer Systems
<OrgAddr1>
<OrgAddr1>
<OrgAddr1>
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
Elitegroup Computer Systems
BLOCK DIAGRAM
BLOCK DIAGRAM
BLOCK DIAGRAM
AL31
RS780LQ-CM
RS780LQ-CM
RS780LQ-CM
1
4
4
4
32Tuesday, September 29, 2009
32Tuesday, September 29, 2009
32Tuesday, September 29, 2009
1.0
1.0
1.0
5
A3
A7
A9
A11
B4
B9
B11
B14
B16
B18
B20
B22
B24
B26
B28
B30
C3
D14
D16
D18
D20
D22
D24
D26
D28
D30
E11
F4
F14
F16
F18
F20
F22
F24
F26
F28
F30
G9
G11
H8
H10
H12
H14
H16
H18
H24
H26
H28
H30
J4
J5
J7
J9
J11
J13
J15
J17
J19
J21
J23
K2
K3
K8
K10
K12
K14
K16
K18
K20
K22
K24
K26
K28
K30
L7
L9
L11
L13
L15
L17
L19
L21
L23
M8
M10
SC151
SC151
22U-X5-08-O
22U-X5-08-O
SC170
SC170
22U-X5-08-X
22U-X5-08-X
SC186
SC186
22U-X5-08-X
22U-X5-08-X
+VCORE
T15
T17
T19
T21
T23
U8
U10
U12
U14
U16
U18
U20
U22
V9
V11
V13
V15
V17
V19
V21
V23
W4
W5
W8
W10
W12
W14
W16
W18
W20
W22
Y2
Y3
Y7
Y9
Y11
Y13
Y15
Y17
Y19
Y21
Y23
AA8
AA10
AA12
AA14
AA16
AA18
AA20
AA22
AB7
AB9
AB11
AB13
AB15
AB17
AB19
AB21
AB23
AC4
AC5
AC8
AC10
AC12
AC14
AC16
AC18
AC20
AC22
AD2
AD3
AD7
AD9
AD11
AD23
AE10
AE12
AF7
AF9
AF11
AG4
AG5
AG7
AH2
AH3
SC152
SC152
22U-X5-08-O
22U-X5-08-O
SC171
SC171
10U-X5-08-O
10U-X5-08-O
SC187
SC187
10U-X5-08-X
10U-X5-08-X
CPU1F
CPU1F
VDD_86
VDD_87
VDD_88
VDD_89
VDD_90
VDD_91
VDD_92
VDD_93
VDD_94
VDD_95
VDD_96
VDD_97
VDD_98
VDD_99
VDD_100
VDD_101
VDD_102
VDD_103
VDD_104
VDD_105
VDD_106
VDD_107
VDD_108
VDD_109
VDD_110
VDD_111
VDD_112
VDD_113
VDD_114
VDD_115
VDD_116
VDD_117
VDD_118
VDD_119
VDD_120
VDD_121
VDD_122
VDD_123
VDD_124
VDD_125
VDD_126
VDD_127
VDD_128
VDD_129
VDD_130
VDD_131
VDD_132
VDD_133
VDD_134
VDD_135
VDD_136
VDD_137
VDD_138
VDD_139
VDD_140
VDD_141
VDD_142
VDD_143
VDD_144
VDD_145
VDD_146
VDD_147
VDD_148
VDD_149
VDD_150
VDD_151
VDD_152
VDD_153
VDD_154
VDD_155
VDD_156
VDD_157
VDD_158
VDD_159
VDD_160
VDD_161
VDD_162
VDD_163
VDD_164
VDD_165
VDD_166
VDD_167
VDD_168
VDD_169
VDD_170
AM3_SOCKET
AM3_SOCKET
VSS_100
VSS_101
VSS_102
VSS_103
VSS_104
VSS_105
VSS_106
VSS_107
VSS_108
VSS_109
VSS_110
VSS_111
VSS_112
VSS_113
VSS_114
VSS_115
VSS_116
VSS_117
VSS_118
VSS_119
VSS_120
VSS_121
VSS_122
VSS_123
VSS_124
VSS_125
VSS_126
VSS_127
VSS_128
VSS_129
VSS_130
VSS_131
VSS_132
VSS_133
VSS_134
POWER/GND2
POWER/GND2
VSS_135
VSS_136
VSS_137
VSS_138
VSS_139
VSS_140
VSS_141
VSS_142
VSS_143
VSS_144
VSS_145
VSS_146
VSS_147
VSS_148
VSS_149
VSS_150
VSS_151
VSS_152
VSS_153
VSS_154
VSS_155
VSS_156
VSS_157
VSS_158
VSS_159
VSS_160
VSS_161
VSS_162
VSS_163
VSS_164
VSS_165
VSS_166
VSS_167
VSS_168
VSS_169
VSS_170
SC153
SC153
22U-X5-08-O
22U-X5-08-O
SC172
SC172
22U-X5-08-X
22U-X5-08-X
SC188
SC188
.01U-04-X
.01U-04-X
2 1
VSS_86
VSS_87
VSS_88
VSS_89
VSS_90
VSS_91
VSS_92
VSS_93
VSS_94
VSS_95
VSS_96
VSS_97
VSS_98
VSS_99
2 1
+VCORE
CPU1E
CPU1E
B3
VDD_1
C2
VDD_2
C4
VDD_3
D D
C C
B B
A A
D3
VDD_4
D5
VDD_5
E4
VDD_6
E6
VDD_7
F5
VDD_8
F7
VDD_9
G6
VDD_10
G8
VDD_11
H7
VDD_12
H11
VDD_13
H23
VDD_14
J8
VDD_15
J12
VDD_16
J14
VDD_17
J16
VDD_18
J18
VDD_19
J20
VDD_20
J22
VDD_21
J24
VDD_22
K7
VDD_23
K9
VDD_24
K11
VDD_25
K13
VDD_26
K15
VDD_27
K17
VDD_28
K19
VDD_29
K21
VDD_30
K23
VDD_31
L4
VDD_32
L5
VDD_33
L8
VDD_34
L10
VDD_35
L12
VDD_36
L14
VDD_37
L16
VDD_38
L18
VDD_39
L20
VDD_40
L22
VDD_41
M2
VDD_42
M3
VDD_43
M7
VDD_44
M9
VDD_45
M11
VDD_46
M13
VDD_47
M15
VDD_48
M17
VDD_49
M19
VDD_50
M21
VDD_51
M23
VDD_52
N8
VDD_53
N10
VDD_54
N12
VDD_55
N14
VDD_56
N16
VDD_57
N18
VDD_58
N20
VDD_59
N22
VDD_60
P7
VDD_61
P9
VDD_62
P11
VDD_63
P13
VDD_64
P15
VDD_65
P17
VDD_66
P19
VDD_67
P21
VDD_68
P23
VDD_69
R4
VDD_70
R5
VDD_71
R8
VDD_72
R10
VDD_73
R12
VDD_74
R14
VDD_75
R16
VDD_76
R18
VDD_77
R20
VDD_78
R22
VDD_79
T2
VDD_80
T3
VDD_81
T7
VDD_82
T9
VDD_83
T11
VDD_84
T13
VDD_85
AM3_SOCKET
AM3_SOCKET
+VCORE
Bottom Side Decoupling
SC148
SC148
22U-X5-08-O
22U-X5-08-O
SC148-SC158(AM3 SCH Checklist V1.3)22UF_X5R:04-807-226692
+VCORE
SC168
SC168
22U-X5-08-X
22U-X5-08-X
2009.9.29 V1.0 BOM
+VDIMM
Follow power team cost down suggestion
SC183
SC183
22U-X5-08-X
22U-X5-08-X
POWER/GND1
POWER/GND1
SC149
SC149
22U-X5-08-O
22U-X5-08-O
SC79
SC79
10U-X5-08-O
10U-X5-08-O
SC184
SC184
22U-X5-08-X
22U-X5-08-X
VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
VSS_10
VSS_11
VSS_12
VSS_13
VSS_14
VSS_15
VSS_16
VSS_17
VSS_18
VSS_19
VSS_20
VSS_21
VSS_22
VSS_23
VSS_24
VSS_25
VSS_26
VSS_27
VSS_28
VSS_29
VSS_30
VSS_31
VSS_32
VSS_33
VSS_34
VSS_35
VSS_36
VSS_37
VSS_38
VSS_39
VSS_40
VSS_41
VSS_42
VSS_43
VSS_44
VSS_45
VSS_46
VSS_47
VSS_48
VSS_49
VSS_50
VSS_51
VSS_52
VSS_53
VSS_54
VSS_55
VSS_56
VSS_57
VSS_58
VSS_59
VSS_60
VSS_61
VSS_62
VSS_63
VSS_64
VSS_65
VSS_66
VSS_67
VSS_68
VSS_69
VSS_70
VSS_71
VSS_72
VSS_73
VSS_74
VSS_75
VSS_76
VSS_77
VSS_78
VSS_79
VSS_80
VSS_81
VSS_82
VSS_83
VSS_84
VSS_85
SC150
SC150
22U-X5-08-X-O
22U-X5-08-X-O
SC169
SC169
22U-X5-08-X
22U-X5-08-X
SC185
SC185
22U-X5-08-X-O
22U-X5-08-X-O
4
Processor Power and Ground
+NB_VCORE
CPU1G
DHOLE1
DHOLE2
DHOLE3
DHOLE4
MT10
MT11
MT12
MT13
MT14
MT15
MT16
NB_VCORE
C822
C822
10U-X5-08
10U-X5-08
VLDT_A
C833
C833
10U-X5-08
10U-X5-08
SC156
SC156
22U-X5-08-X-O
22U-X5-08-X-O
SC178
SC178
.01U-04-X
.01U-04-X
2 1
A4
A6
B5
B7
C6
C8
D7
D9
E8
E10
F9
F11
G10
G12
MT1
MT2
MT3
MT4
MT5
MT6
MT7
MT8
MT9
B2
H20
AE7
2 1
CPU1G
VDDNB_1
VDDNB_2
VDDNB_3
VDDNB_4
VDDNB_5
VDDNB_6
VDDNB_7
VDDNB_8
VDDNB_9
VDDNB_10
VDDNB_11
VDDNB_12
VDDNB_13
VDDNB_14
DHOLE1
DHOLE2
DHOLE3
DHOLE4
MT1
MT2
MT3
MT4
MT5
MT6
MT7
MT8
MT9
MT10
MT11
MT12
MT13
MT14
MT15
MT16
NP/RSVD
NP/VSS1
NP/VSS2
AM3_SOCKET
AM3_SOCKET
C823
C823
10U-X5-08
10U-X5-08
C834
C834
10U-X5-08
10U-X5-08
SC157
SC157
22U-X5-08-O
22U-X5-08-O
SC179
SC179
180P-04-X
180P-04-X
2 1
C824
C824
4.7U-X5-08-X
4.7U-X5-08-X
2 1
C835
C835
4.7U-X5-08
4.7U-X5-08
2 1
MT17
MT17
SC158
SC158
22U-X5-08-X
22U-X5-08-X
SC174
SC174
4.7U-X5-08-X
4.7U-X5-08-X
2 1
MT18
MT18
MT19
MT19
MT20
MT20
MT21
2 1
+NB_VCORE
POWER/GND3
POWER/GND3
MT21
MT22
MT23
MT24
MT25
MT26
MT27
MT22
MT23
MT24
MT25
MT26
MT27
MT28
C825
C825
.22U-16V-04
.22U-16V-04
2 1
C836
C836
4.7U-X5-08
4.7U-X5-08
SC159
SC159
.22U-16V-04-X
.22U-16V-04-X
2 1
SC175
SC175
4.7U-X5-08-X
4.7U-X5-08-X
2 1
SC161
SC161
22U-X5-08-X
22U-X5-08-X
MT28
MT29
MT29
2 1
2 1
MT30
MT31
MT32
MT30
MT31
MT32
C826
C826
.22U-16V-04
.22U-16V-04
C837
C837
180P-04
180P-04
SC160
SC160
.22U-16V-04-X
.22U-16V-04-X
2 1
SC176
SC176
4.7U-X5-08-X
4.7U-X5-08-X
2 1
SC162
SC162
22U-X5-08-X
22U-X5-08-X
SC154
SC154
22U-X5-08-X-O
22U-X5-08-X-O
SC173
SC173
22U-X5-08-X
22U-X5-08-X
SC104
SC104
.01U-04-X
.01U-04-X
M12
M14
M16
M18
M20
M22
N4
N5
N7
N9
N11
N13
N15
N17
N19
N21
N23
P2
P3
P8
P10
P12
P14
P16
P18
P20
P22
R7
R9
R11
R13
R15
R17
R19
R21
R23
T8
T10
T12
T14
T16
T18
T20
T22
U4
U5
U7
U9
U11
U13
U15
+NB_VCORE
U17
U19
U21
U23
V2
V3
V10
V12
V14
V16
V18
V20
V22
W7
W9
W11
W13
W15
W17
W19
W21
W23
Y8
Y10
+HT_1P2V
Y12
Y14
Y16
Y18
Y20
Y22
AA4
AA5
2 1
AA7
AA9
SC155
SC155
22U-X5-08-O
22U-X5-08-O
SC177
SC177
.01U-04-X
.01U-04-X
2 1
SC191
SC191
180P-04-O
180P-04-O
2 1
VSS_171
VSS_172
VSS_173
VSS_174
VSS_175
VSS_176
VSS_177
VSS_178
VSS_179
VSS_180
VSS_181
VSS_182
VSS_183
VSS_184
VSS_185
VSS_186
VSS_187
VSS_188
VSS_189
VSS_190
VSS_191
VSS_192
VSS_193
VSS_194
VSS_195
VSS_196
VSS_197
VSS_198
VSS_199
VSS_200
VSS_201
VSS_202
VSS_203
VSS_204
VSS_205
VSS_206
VSS_207
VSS_208
VSS_209
VSS_210
VSS_211
VSS_212
VSS_213
VSS_214
3
AA11
AA13
AA15
AA17
AA19
AA21
AA23
AB2
AB3
AB8
AB10
AB12
AB14
AB16
AB18
AB20
AB22
AC7
AC9
AC11
AC13
AC15
AC17
AC19
AC21
AC23
AD8
AD10
AD12
AD14
AD16
AD20
AD22
AD24
AE4
AE5
AE11
AF2
AF3
AF8
AF10
AF12
AF14
AF16
C838
C838
180P-04
180P-04
2 1
SC163
SC163
.01U-04-X
.01U-04-X
2 1
2 1
SC164
SC164
.01U-04-X
.01U-04-X
+HT_1P2V
+HT_1P2V_C
+VDIMM
AB24
AB26
AB28
AB30
AC24
AD26
AD28
AD30
AF30
2 1
AJ1
AJ2
AJ3
AJ4
A12
B12
C12
D12
M24
M26
M28
M30
P24
P26
P28
P30
T24
T26
T28
T30
V25
V26
V28
V30
Y24
Y26
Y28
Y29
C827
C827
.01U-04
.01U-04
CPU1H
CPU1H
VLDT_A_1
VLDT_A_2
VLDT_A_3
VLDT_A_4
VDDR_1
VDDR_2
VDDR_3
VDDR_4
VDDIO_1
VDDIO_2
VDDIO_3
VDDIO_4
VDDIO_5
VDDIO_6
VDDIO_7
VDDIO_8
VDDIO_9
VDDIO_10
VDDIO_11
VDDIO_12
VDDIO_13
VDDIO_14
VDDIO_15
VDDIO_16
VDDIO_17
VDDIO_18
VDDIO_19
VDDIO_20
VDDIO_21
VDDIO_22
VDDIO_23
VDDIO_24
VDDIO_25
VDDIO_26
VDDIO_27
VDDIO_28
VDDIO_29
AM3_SOCKET
AM3_SOCKET
A1
AL1
2 1
C74
C74
180P-04-X
180P-04-X
HT1:0.5A
HT3:1.4A
1.75A
3.6A
POWER/GND4
POWER/GND4
AM3
Top View
VLDT_B_1
VLDT_B_2
VLDT_B_3
VLDT_B_4
VSS_215
VSS_216
VSS_217
VSS_218
VSS_219
VSS_220
VSS_221
VSS_222
VSS_223
VSS_224
VSS_225
VSS_226
VSS_227
VSS_228
VSS_229
VSS_230
VSS_231
VSS_232
VSS_233
VSS_234
VSS_235
VSS_236
VSS_237
VSS_238
VSS_239
VSS_240
VSS_241
VSS_242
A31
AL31
VDDR_5
VDDR_6
VDDR_7
VDDR_8
VDDR_9
2
+HT_1P2V_B
H1
H2
H5
H6
+HT_1P2V
AG12
AH12
AJ12
AK12
AL12
AF18
AF20
AF22
AF24
AF26
AF28
AG10
AG11
AH14
AH16
AH18
AH20
AH22
AH24
AH26
AH28
AH30
AK2
AK14
AK16
AK18
AK20
AK22
AK24
AK26
AK28
AK30
AL5
+HT_1P2V
C814
C814
22U-X5-08
22U-X5-08
+HT_1P2V_C
C828
C828
.01U-04
.01U-04
2 1
+HT_1P2V
SC83
SC83
4.7U-X5-08
4.7U-X5-08
2 1
Place as close
as possible to
CPU socket.
C807
C807
10U-X5-08
10U-X5-08
2 1
C815
C815
4.7U-X5-08
4.7U-X5-08
2 1
C829
C829
.01U-04
.01U-04
2 1
C840
C840
4.7U-X5-08
4.7U-X5-08
2 1
+VDIMM
+VDIMM
4.7uF:04-807-475696
EMC
SC165 2.2U-06-OSC165 2.2U-06-O
SC167 2.2U-06-OSC167 2.2U-06-O
+HT_1P2V +HT_1P2V
C846
C846
0.1U-10VX-04
0.1U-10VX-04
C808
C808
C809
C809
4.7U-X5-08-X
4.7U-X5-08-X
4.7U-X5-08-X
C811
C811
4.7U-X5-08-X
4.7U-X5-08-X
4.7U-X5-08-X
2 1
C812
C812
4.7U-X5-08-X
4.7U-X5-08-X
2 1
2 1
2 1
Place across each
VDIMM-GND plane split.
CPU_VDDR
C816
C816
C817
C817
4.7U-X5-08
4.7U-X5-08
.22U-16V-04
C841
C841
4.7U-X5-08
4.7U-X5-08
SC181
SC181
.01U-04-X
.01U-04-X
2 1
+VDIMM+VCORE
C8
C8
0.1U-10VX-04-X
0.1U-10VX-04-X
.22U-16V-04
2 1
C842
C842
4.7U-X5-08
4.7U-X5-08
2 1
21
21
2 1
2 1
+NB_VCORE
SC182
SC182
.22U-16V-04-X
.22U-16V-04-X
2 1
SC1
SC1
.22U-16V-04
.22U-16V-04
2 1
C2
.22U-16V-04C2.22U-16V-04
2 1
C818
C818
.22U-16V-04
.22U-16V-04
2 1
2 1
+VCORE
C847
C847
0.1U-10VX-04-O
0.1U-10VX-04-O
C810
C810
180P-04
180P-04
2 1
C813
C813
180P-04
180P-04
2 1
C819
C819
.22U-16V-04
.22U-16V-04
2 1
C843
C843
4.7U-X5-08
4.7U-X5-08
2 1
C848 2.2U-06-OC848 2.2U-06-O
C845
C845
4.7U-X5-08
4.7U-X5-08
21
1
C821
C821
10U-X5-08
10U-X5-08
2 1
2 1
+NB_VCORE
C820
C820
.22U-16V-04
.22U-16V-04
Elitegroup Computer Systems
Elitegroup Computer Systems
<OrgAddr1>
<OrgAddr1>
<OrgAddr1>
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
Elitegroup Computer Systems
CPU PWR & GND
CPU PWR & GND
CPU PWR & GND
RS780LQ-CM
RS780LQ-CM
Custom
Custom
Custom
RS780LQ-CM
1
1.0
1.0
1.0
5
5
5
32Tuesday, September 29, 2009
32Tuesday, September 29, 2009
32Tuesday, September 29, 2009
5
MA_EVENT_L
MA_EVENT_L3
+DDR_VTTR
D D
C C
+VDIMM
VCC3
+MEM_VREFCA
+MEM_VREFDQ
SCLK0
SCLK012,14
SDATA0
B B
MA_ADD[15..0]3 MB_ADD[15..0]3
A A
SDATA012,14
MA_BANK2
MA_BANK23
MA_BANK1
MA_BANK13
MA_BANK0
MA_BANK03
MA_CKE1
MA_CKE13
MA_CKE0
MA_CKE03
MA1_CS_L1
MA1_CS_L13
MA1_CS_L0
MA1_CS_L03
MA1_CLK_N1
MA1_CLK_N13
MA1_CLK_P1
MA1_CLK_P13
MA1_CLK_N0
MA1_CLK_N03
MA1_CLK_P0
MA1_CLK_P03
MA_ADD[15..0] MB_ADD[15..0]
MA_RESET_L
MA_RESET_L3
MA_CAS_L
MA_CAS_L3
MA_RAS_L
MA_RAS_L3
MA_WE_L
MA_WE_L3
5
MA_ADD0
MA_ADD1
MA_ADD2
MA_ADD3
MA_ADD4
MA_ADD5
MA_ADD6
MA_ADD7
MA_ADD8
MA_ADD9
MA_ADD10
MA_ADD11
MA_ADD12
MA_ADD13
MA_ADD14
MA_ADD15
198
187
49
48
240
120
239
235
232
229
226
223
220
217
214
211
208
205
202
199
166
163
160
157
154
151
148
145
142
139
136
133
130
127
124
121
119
116
113
110
107
104
101
98
95
92
89
86
83
80
47
44
41
38
35
32
29
26
23
20
17
14
11
8
5
2
197
194
191
189
186
183
182
179
176
173
170
78
75
72
69
66
65
62
60
57
54
51
236
67
1
118
238
237
117
52
190
71
169
50
76
193
64
63
185
184
188
181
61
180
59
58
178
56
177
175
70
55
174
196
172
171
168
74
192
73
DIMM1
DIMM1
FREE
FREE
FREE
FREE
VTT
VTT
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDDSPD
VREFCA
VREFDQ
SCL
SDA
SA1
SA0
BA2
BA1
BA0
CKE1
CKE0
S1*
S0*
CK1/NU*
CK1/NU
CK0*
CK0
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
A13
A14
A15
RESET*
CAS*
RAS*
WE*
DDR3-240P-GR
DDR3-240P-GR
RSVD
ODT1
ODT0
NC/PAR IN
NC/ERR OUT
NC/TEST4
CB(0)
CB(1)
CB(2)
CB(3)
CB(4)
CB(5)
CB(6)
CB(7)
DQS(0)
DQS*(0)
DSQ(1)
DSQ*(1)
DSQ(2)
DSQ*(2)
DSQ(3)
DSQ*(3)
DQS(4)
DQS*(4)
DQS(5)
DQS*(5)
DSQ(6)
DSQ*(6)
DQS(7)
DQS*(7)
DQS(8)
DQS*(8)
DM0/DQS9
NC/DQS9*
DM1/DQS10
NC/DQS10*
DM2/DQS11
NC/DQS11*
DM3/DQS12
NC/DQS12*
DM4/DQS13
NC/DQS13*
DM5/DQS14
NC/DQS14*
DM6/DQS15
NC/DQS15*
DM7/DQS16
NC/DQS16*
DM8/DQS17
NC/DQS17*
DQ(0)
DQ(1)
DQ(2)
DQ(3)
DQ(4)
DQ(5)
DQ(6)
DQ(7)
DQ(8)
DQ(9)
DQ(10)
DQ(11)
DQ(12)
DQ(13)
DQ(14)
DQ(15)
DQ(16)
DQ(17)
DQ(18)
DQ(19)
DQ(20)
DQ(21)
DQ(22)
DQ(23)
DQ(24)
DQ(25)
DQ(26)
DQ(27)
DQ(28)
DQ(29)
DQ(30)
DQ(31)
DQ(32)
DQ(33)
DQ(34)
DQ(35)
DQ(36)
DQ(37)
DQ(38)
DQ(39)
DQ(40)
DQ(41)
DQ(42)
DQ(43)
DQ(44)
DQ(45)
DQ(46)
DQ(47)
DQ(48)
DQ(49)
DQ(50)
DQ(51)
DQ(52)
DQ(53)
DQ(54)
DQ(55)
DQ(56)
DQ(57)
DQ(58)
DQ(59)
DQ(60)
DQ(61)
DQ(62)
DQ(63)
+VDIMM
4
79
MA1_ODT1
77
195
68
53
167
39
40
45
46
158
159
164
165
7
6
16
15
25
24
34
33
85
84
94
93
103
102
112
111
43
42
125
126
134
135
143
144
152
153
203
204
212
213
221
222
230
231
161
162
3
4
9
10
122
123
128
129
12
13
18
19
131
132
137
138
21
22
27
28
140
141
146
147
30
31
36
37
149
150
155
156
81
82
87
88
200
201
206
207
90
91
96
97
209
210
215
216
99
100
105
106
218
219
224
225
108
109
114
115
227
228
233
234
MA1_ODT0
MA_DQS_P0
MA_DQS_N0
MA_DQS_P1
MA_DQS_N1
MA_DQS_P2
MA_DQS_N2
MA_DQS_P3
MA_DQS_N3
MA_DQS_P4
MA_DQS_N4
MA_DQS_P5
MA_DQS_N5
MA_DQS_P6
MA_DQS_N6
MA_DQS_P7
MA_DQS_N7
MA_DM0
MA_DM1
MA_DM2
MA_DM3
MA_DM4
MA_DM5
MA_DM6
MA_DM7
MA_DATA0
MA_DATA1
MA_DATA2
MA_DATA3
MA_DATA4
MA_DATA5
MA_DATA6
MA_DATA7
MA_DATA8
MA_DATA9
MA_DATA10
MA_DATA11
MA_DATA12
MA_DATA13
MA_DATA14
MA_DATA15
MA_DATA16
MA_DATA17
MA_DATA18
MA_DATA19
MA_DATA20
MA_DATA21
MA_DATA22
MA_DATA23
MA_DATA24
MA_DATA25
MA_DATA26
MA_DATA27
MA_DATA28
MA_DATA29
MA_DATA30
MA_DATA31
MA_DATA32
MA_DATA33
MA_DATA34
MA_DATA35
MA_DATA36
MA_DATA37
MA_DATA38
MA_DATA39
MA_DATA40
MA_DATA41
MA_DATA42
MA_DATA43
MA_DATA44
MA_DATA45
MA_DATA46
MA_DATA47
MA_DATA48
MA_DATA49
MA_DATA50
MA_DATA51
MA_DATA52
MA_DATA53
MA_DATA54
MA_DATA55
MA_DATA56
MA_DATA57
MA_DATA58
MA_DATA59
MA_DATA60
MA_DATA61
MA_DATA62
MA_DATA63
MA1_ODT1 3
MA1_ODT0 3
MA_DQS_P0 3
MA_DQS_N0 3
MA_DQS_P1 3
MA_DQS_N1 3
MA_DQS_P2 3
MA_DQS_N2 3
MA_DQS_P3 3
MA_DQS_N3 3
MA_DQS_P4 3
MA_DQS_N4 3
MA_DQS_P5 3
MA_DQS_N5 3
MA_DQS_P6 3
MA_DQS_N6 3
MA_DQS_P7 3
MA_DQS_N7 3
MA_DM[7..0]
MA_DATA[63..0]
MA_DM[7..0] 3
MA_DATA[63..0] 3
DE-COULPING CAP FOR DIMMs
C856
C856
1U-X5-04
1U-X5-04
C857
C857
1U-X5-04
1U-X5-04
C858
C858
1U-X5-04
1U-X5-04
4
C859
C859
1U-X5-04
1U-X5-04
C860
C860
1U-X5-04
1U-X5-04
C861
C861
1U-X5-04
1U-X5-04
C862
C862
1U-X5-04
1U-X5-04
VCC3VCC3
3
+MEM_VREFDQ
C863
C863
1U-X5-04
1U-X5-04
3
MB_EVENT_L3
+MEM_VREFCA
MB1_CLK_N13
MB1_CLK_P13
MB1_CLK_N03
MB1_CLK_P03
MB_RESET_L3
MB_CAS_L3
MB_RAS_L3
MB_WE_L3
C866
C866
.1U-04
.1U-04
DIMM2
DIMM2
198
MB_ADD0
MB_ADD1
MB_ADD2
MB_ADD3
MB_ADD4
MB_ADD5
MB_ADD6
MB_ADD7
MB_ADD8
MB_ADD9
MB_ADD10
MB_ADD11
MB_ADD12
MB_ADD13
MB_ADD14
MB_ADD15
C864
C864
1U-X5-04
1U-X5-04
187
240
120
239
235
232
229
226
223
220
217
214
211
208
205
202
199
166
163
160
157
154
151
148
145
142
139
136
133
130
127
124
121
119
116
113
110
107
104
101
197
194
191
189
186
183
182
179
176
173
170
236
118
238
237
117
190
169
193
185
184
188
181
180
178
177
175
174
196
172
171
168
192
49
48
98
95
92
89
86
83
80
47
44
41
38
35
32
29
26
23
20
17
14
11
8
5
2
78
75
72
69
66
65
62
60
57
54
51
67
1
52
71
50
76
64
63
61
59
58
56
70
55
74
73
C865
C865
1U-X5-04
1U-X5-04
FREE
FREE
FREE
FREE
VTT
VTT
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDDSPD
VREFCA
VREFDQ
SCL
SDA
SA1
SA0
BA2
BA1
BA0
CKE1
CKE0
S1*
S0*
CK1/NU*
CK1/NU
CK0*
CK0
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
A13
A14
A15
RESET*
CAS*
RAS*
WE*
DDR3-240P-GR
DDR3-240P-GR
MB_EVENT_L
+DDR_VTTR
+VDIMM
VCC3
SCLK0
SCLK012,14
SDATA0
SDATA012,14
MB_BANK2
MB_BANK23
MB_BANK1
MB_BANK13
MB_BANK0
MB_BANK03
MB_CKE1
MB_CKE13
MB_CKE0
MB_CKE03
MB1_CS_L1
MB1_CS_L13
MB1_CS_L0
MB1_CS_L03
MB1_CLK_N1
MB1_CLK_P1
MB1_CLK_N0
MB1_CLK_P0
MB_RESET_L
MB_CAS_L
MB_RAS_L
MB_WE_L
+DDR_VTTR
2
RSVD
NC/PAR IN
NC/ERR OUT
NC/TEST4
DQS(0)
DQS*(0)
DSQ(1)
DSQ*(1)
DSQ(2)
DSQ*(2)
DSQ(3)
DSQ*(3)
DQS(4)
DQS*(4)
DQS(5)
DQS*(5)
DSQ(6)
DSQ*(6)
DQS(7)
DQS*(7)
DQS(8)
DQS*(8)
DM0/DQS9
NC/DQS9*
DM1/DQS10
NC/DQS10*
DM2/DQS11
NC/DQS11*
DM3/DQS12
NC/DQS12*
DM4/DQS13
NC/DQS13*
DM5/DQS14
NC/DQS14*
DM6/DQS15
NC/DQS15*
DM7/DQS16
NC/DQS16*
DM8/DQS17
NC/DQS17*
DQ(10)
DQ(11)
DQ(12)
DQ(13)
DQ(14)
DQ(15)
DQ(16)
DQ(17)
DQ(18)
DQ(19)
DQ(20)
DQ(21)
DQ(22)
DQ(23)
DQ(24)
DQ(25)
DQ(26)
DQ(27)
DQ(28)
DQ(29)
DQ(30)
DQ(31)
DQ(32)
DQ(33)
DQ(34)
DQ(35)
DQ(36)
DQ(37)
DQ(38)
DQ(39)
DQ(40)
DQ(41)
DQ(42)
DQ(43)
DQ(44)
DQ(45)
DQ(46)
DQ(47)
DQ(48)
DQ(49)
DQ(50)
DQ(51)
DQ(52)
DQ(53)
DQ(54)
DQ(55)
DQ(56)
DQ(57)
DQ(58)
DQ(59)
DQ(60)
DQ(61)
DQ(62)
DQ(63)
2
ODT1
ODT0
CB(0)
CB(1)
CB(2)
CB(3)
CB(4)
CB(5)
CB(6)
CB(7)
DQ(0)
DQ(1)
DQ(2)
DQ(3)
DQ(4)
DQ(5)
DQ(6)
DQ(7)
DQ(8)
DQ(9)
79
77
195
68
53
167
39
40
45
46
158
159
164
165
7
6
16
15
25
24
34
33
85
84
94
93
103
102
112
111
43
42
125
126
134
135
143
144
152
153
203
204
212
213
221
222
230
231
161
162
3
4
9
10
122
123
128
129
12
13
18
19
131
132
137
138
21
22
27
28
140
141
146
147
30
31
36
37
149
150
155
156
81
82
87
88
200
201
206
207
90
91
96
97
209
210
215
216
99
100
105
106
218
219
224
225
108
109
114
115
227
228
233
234
MB1_ODT1
MB1_ODT1 3
MB1_ODT0
MB1_ODT0 3
MB_DQS_P0
MB_DQS_N0
MB_DQS_P1
MB_DQS_N1
MB_DQS_P2
MB_DQS_N2
MB_DQS_P3
MB_DQS_N3
MB_DQS_P4
MB_DQS_N4
MB_DQS_P5
MB_DQS_N5
MB_DQS_P6
MB_DQS_N6
MB_DQS_P7
MB_DQS_N7
MB_DM0
MB_DM1
MB_DM2
MB_DM3
MB_DM4
MB_DM5
MB_DM6
MB_DM7
MB_DATA0
MB_DATA1
MB_DATA2
MB_DATA3
MB_DATA4
MB_DATA5
MB_DATA6
MB_DATA7
MB_DATA8
MB_DATA9
MB_DATA10
MB_DATA11
MB_DATA12
MB_DATA13
MB_DATA14
MB_DATA15
MB_DATA16
MB_DATA17
MB_DATA18
MB_DATA19
MB_DATA20
MB_DATA21
MB_DATA22
MB_DATA23
MB_DATA24
MB_DATA25
MB_DATA26
MB_DATA27
MB_DATA28
MB_DATA29
MB_DATA30
MB_DATA31
MB_DATA32
MB_DATA33
MB_DATA34
MB_DATA35
MB_DATA36
MB_DATA37
MB_DATA38
MB_DATA39
MB_DATA40
MB_DATA41
MB_DATA42
MB_DATA43
MB_DATA44
MB_DATA45
MB_DATA46
MB_DATA47
MB_DATA48
MB_DATA49
MB_DATA50
MB_DATA51
MB_DATA52
MB_DATA53
MB_DATA54
MB_DATA55
MB_DATA56
MB_DATA57
MB_DATA58
MB_DATA59
MB_DATA60
MB_DATA61
MB_DATA62
MB_DATA63
MB_DQS_P0 3
MB_DQS_N0 3
MB_DQS_P1 3
MB_DQS_N1 3
MB_DQS_P2 3
MB_DQS_N2 3
MB_DQS_P3 3
MB_DQS_N3 3
MB_DQS_P4 3
MB_DQS_N4 3
MB_DQS_P5 3
MB_DQS_N5 3
MB_DQS_P6 3
MB_DQS_N6 3
MB_DQS_P7 3
MB_DQS_N7 3
MB_DM[7..0]
MB_DM[7..0] 3
+VDIMM
R376
R376
15-1-04
15-1-04
R960
R960
15-1-04
15-1-04
Place within 500 mils of the DIMM socket
+VDIMM
R961
R961
15-1-04
15-1-04
R962
R962
22U-X5-08-O
22U-X5-08-O
15-1-04
15-1-04
Place within 500 mils of the DIMM socket
MB_DATA[63..0]
<OrgAddr1>
<OrgAddr1>
<OrgAddr1>
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
MB_DATA[63..0] 3
Elitegroup Computer Systems
Elitegroup Computer Systems
Elitegroup Computer Systems
DDR3 DIMM
DDR3 DIMM
DDR3 DIMM
Custom
Custom
Custom
C888
C888
.1U-04
.1U-04
C850
C850
22U-X5-08
22U-X5-08
C889
C889
.1U-04
.1U-04
C853
C853
1
+MEM_VREFCA
C852
C852
C851
C851
1000P-04
1000P-04
.1U-04
.1U-04
+MEM_VREFDQ
C854
C854
C855
C855
.1U-04
.1U-04
1000P-04
1000P-04
RS780LQ-CM
RS780LQ-CM
RS780LQ-CM
1
1.0
1.0
6
6
6
1.0
32Tuesday, September 29, 2009
32Tuesday, September 29, 2009
32Tuesday, September 29, 2009
5
D D
C C
RS740:1.2V
CPU_VDDHT
NB_VCC
4
HT_CADOUT0_P3
HT_CADOUT0_N3
HT_CADOUT1_P3
HT_CADOUT1_N3
HT_CADOUT2_P3
HT_CADOUT2_N3
HT_CADOUT3_P3
HT_CADOUT3_N3
HT_CADOUT4_P3
HT_CADOUT4_N3
HT_CADOUT5_P3
HT_CADOUT5_N3
HT_CADOUT6_P3
HT_CADOUT6_N3
HT_CADOUT7_P3
HT_CADOUT7_N3
HT_CADOUT8_P3
HT_CADOUT8_N3
HT_CADOUT9_P3
HT_CADOUT9_N3
HT_CADOUT10_P3
HT_CADOUT10_N3
HT_CADOUT11_P3
HT_CADOUT11_N3
HT_CADOUT12_P3
HT_CADOUT12_N3
HT_CADOUT13_P3
HT_CADOUT13_N3
HT_CADOUT14_P3
HT_CADOUT14_N3
HT_CADOUT15_P3
HT_CADOUT15_N3
HT_CLKOUT0_P3
HT_CLKOUT0_N3
HT_CLKOUT1_P3
HT_CLKOUT1_N3
HT_CTLOUT0_P3
HT_CTLOUT0_N3
HT_CTLOUT1_P3
HT_CTLOUT1_N3
R251 301-1-04R251 301-1-04
1 2
R233 49.9-1-04-OR233 49.9-1-04-O
1 2
R232 49.9-1-04-OR232 49.9-1-04-O
1 2
RS780
RS740
RS740
3
U19A
U19A
Y25
HT_RXCAD0P
Y24
V22
V23
V25
V24
U24
U25
T25
T24
P22
P23
P25
P24
N24
N25
AC24
AC25
AB25
AB24
AA24
AA25
Y22
Y23
W21
W20
V21
V20
U20
U21
U19
U18
T22
T23
AB23
AA22
M22
M23
R21
R20
HT_RXCALP HT_TXCALP
C23
HT_RXCALN
A24
RS780
RS780
HT_RXCAD0N
HT_RXCAD1P
HT_RXCAD1N
HT_RXCAD2P
HT_RXCAD2N
HT_RXCAD3P
HT_RXCAD3N
HT_RXCAD4P
HT_RXCAD4N
HT_RXCAD5P
HT_RXCAD5N
HT_RXCAD6P
HT_RXCAD6N
HT_RXCAD7P
HT_RXCAD7N
HT_RXCAD8P
HT_RXCAD8N
HT_RXCAD9P
HT_RXCAD9N
HT_RXCAD10P
HT_RXCAD10N
HT_RXCAD11P
HT_RXCAD11N
HT_RXCAD12P
HT_RXCAD12N
HT_RXCAD13P
HT_RXCAD13N
HT_RXCAD14P
HT_RXCAD14N
HT_RXCAD15P
HT_RXCAD15N
HT_RXCLK0P
HT_RXCLK0N
HT_RXCLK1P
HT_RXCLK1N
HT_RXCTL0P
HT_RXCTL0N
HT_RXCTL1P
HT_RXCTL1N
HT_RXCALP
HT_RXCALN
PART 1 OF 6
PART 1 OF 6
HYPER TRANSPORT CPU I/F
HYPER TRANSPORT CPU I/F
HT_TXCAD10P
HT_TXCAD10N
HT_TXCAD11P
HT_TXCAD11N
HT_TXCAD12P
HT_TXCAD12N
HT_TXCAD13P
HT_TXCAD13N
HT_TXCAD14P
HT_TXCAD14N
HT_TXCAD15P
HT_TXCAD15N
HT_TXCAD0P
HT_TXCAD0N
HT_TXCAD1P
HT_TXCAD1N
HT_TXCAD2P
HT_TXCAD2N
HT_TXCAD3P
HT_TXCAD3N
HT_TXCAD4P
HT_TXCAD4N
HT_TXCAD5P
HT_TXCAD5N
HT_TXCAD6P
HT_TXCAD6N
HT_TXCAD7P
HT_TXCAD7N
HT_TXCAD8P
HT_TXCAD8N
HT_TXCAD9P
HT_TXCAD9N
HT_TXCLK0P
HT_TXCLK0N
HT_TXCLK1P
HT_TXCLK1N
HT_TXCTL0P
HT_TXCTL0N
HT_TXCTL1P
HT_TXCTL1N
HT_TXCALP
HT_TXCALN
D24
D25
E24
E25
F24
F25
F23
F22
H23
H22
J25
J24
K24
K25
K23
K22
F21
G21
G20
H21
J20
J21
J18
K17
L19
J19
M19
L18
M21
P21
P18
M18
H24
H25
L21
L20
M24
M25
P19
R18
B24
B25
HT_TXCALN
HT_CADIN0_P 3
HT_CADIN0_N 3
HT_CADIN1_P 3
HT_CADIN1_N 3
HT_CADIN2_P 3
HT_CADIN2_N 3
HT_CADIN3_P 3
HT_CADIN3_N 3
HT_CADIN4_P 3
HT_CADIN4_N 3
HT_CADIN5_P 3
HT_CADIN5_N 3
HT_CADIN6_P 3
HT_CADIN6_N 3
HT_CADIN7_P 3
HT_CADIN7_N 3
HT_CADIN8_P 3
HT_CADIN8_N 3
HT_CADIN9_P 3
HT_CADIN9_N 3
HT_CADIN10_P 3
HT_CADIN10_N 3
HT_CADIN11_P 3
HT_CADIN11_N 3
HT_CADIN12_P 3
HT_CADIN12_N 3
HT_CADIN13_P 3
HT_CADIN13_N 3
HT_CADIN14_P 3
HT_CADIN14_N 3
HT_CADIN15_P 3
HT_CADIN15_N 3
HT_CLKIN0_P 3
HT_CLKIN0_N 3
HT_CLKIN1_P 3
HT_CLKIN1_N 3
HT_CTLIN0_P 3
HT_CTLIN0_N 3
HT_CTLIN1_P 3
1 2
HT_CTLIN1_N 3
R239 301-1-04R239 301-1-04
RS740:100ohm
RS780:301ohm
2
1
B B
HT LINK STITCHING CAPS.
+VCORE
C903
C903
0.1U-10VX-04
0.1U-10VX-04
2 1
A A
5
C904
C904
0.1U-10VX-04
0.1U-10VX-04
2 1
C905
C905
0.1U-10VX-04
0.1U-10VX-04
2 1
4
C906
C906
0.1U-10VX-04
0.1U-10VX-04
2 1
3
RX780/RS740/RS780 difference table (HT LINK)
SIGNALS
HT_RXCALP
HT_RXCALN
HT_TXCALP
HT_TXCALN
RS740 RX780
49.9R (GND)
49.9R (VDDHT)
1.21K
1.21K100R
2
RS780
301R
301R
Elitegroup Computer Systems
Elitegroup Computer Systems
<OrgAddr1>
<OrgAddr1>
<OrgAddr1>
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
Elitegroup Computer Systems
RS740/RS780-HT LINK I/F
RS740/RS780-HT LINK I/F
RS740/RS780-HT LINK I/F
RS780LQ-CM
RS780LQ-CM
RS780LQ-CM
1
7
7
7
32Tuesday, September 29, 2009
32Tuesday, September 29, 2009
32Tuesday, September 29, 2009
1.0
1.0
1.0
5
GFX_RX0P19
GFX_RX0N19
GFX_RX1P19
GFX_RX1N19
GFX_RX2P19
GFX_RX2N19
GFX_RX3P19
GFX_RX3N19
GFX_RX4P19
D D
C C
GFX_RX4N19
GFX_RX5P19
GFX_RX5N19
GFX_RX6P19
GFX_RX6N19
GFX_RX7P19
GFX_RX7N19
GFX_RX8P19
GFX_RX8N19
GFX_RX9P19
GFX_RX9N19
GFX_RX10P19
GFX_RX10N19
GFX_RX11P19
GFX_RX11N19
GFX_RX12P19
GFX_RX12N19
GFX_RX13P19
GFX_RX13N19
GFX_RX14P19
GFX_RX14N19
GFX_RX15P19
GFX_RX15N19
GPP_RX0P19
GPP_RX0N19
GPP_RX3P24
GPP_RX3N24
RS740 NC RS740 NC
A_RX0P13
A_RX0N13
A_RX1P13
A_RX1N13
A_RX2P13
A_RX2N13
A_RX3P13
A_RX3N13
4
U19B
U19B
AE3
AD4
AE2
AD3
AD1
AD2
AA8
AA7
AA5
AA6
D4
C4
A3
B3
C2
C1
E5
F5
G5
G6
H5
H6
L5
L6
M8
L8
P7
M7
P5
M5
R8
P8
R6
R5
P4
P3
T4
T3
V5
W6
U5
U6
U8
U7
Y8
Y7
W5
Y5
J6
J5
J7
J8
GFX_RX0P
GFX_RX0N
GFX_RX1P
GFX_RX1N
GFX_RX2P
GFX_RX2N
GFX_RX3P
GFX_RX3N
GFX_RX4P
GFX_RX4N
GFX_RX5P
GFX_RX5N
GFX_RX6P
GFX_RX6N
GFX_RX7P
GFX_RX7N
GFX_RX8P
GFX_RX8N
GFX_RX9P
GFX_RX9N
GFX_RX10P
GFX_RX10N
GFX_RX11P
GFX_RX11N
GFX_RX12P
GFX_RX12N
GFX_RX13P
GFX_RX13N
GFX_RX14P
GFX_RX14N
GFX_RX15P
GFX_RX15N
GPP_RX0P
GPP_RX0N
GPP_RX1P
GPP_RX1N
GPP_RX2P
GPP_RX2N
GPP_RX3P
GPP_RX3N
GPP_RX4P
GPP_RX4N
GPP_RX5P
GPP_RX5N
SB_RX0P
SB_RX0N
SB_RX1P
SB_RX1N
SB_RX2P
SB_RX2N
SB_RX3P
SB_RX3N
RS780
RS780
PART 2 OF 6
PART 2 OF 6
PCIE I/F GFX
PCIE I/F GFX
PCIE I/F GPP
PCIE I/F GPP
PCIE I/F SB
PCIE I/F SB
PCE_CALRP(PCE_BCALRP)
PCE_CALRN(PCE_BCALRN)
GFX_TX0P
GFX_TX0N
GFX_TX1P
GFX_TX1N
GFX_TX2P
GFX_TX2N
GFX_TX3P
GFX_TX3N
GFX_TX4P
GFX_TX4N
GFX_TX5P
GFX_TX5N
GFX_TX6P
GFX_TX6N
GFX_TX7P
GFX_TX7N
GFX_TX8P
GFX_TX8N
GFX_TX9P
GFX_TX9N
GFX_TX10P
GFX_TX10N
GFX_TX11P
GFX_TX11N
GFX_TX12P
GFX_TX12N
GFX_TX13P
GFX_TX13N
GFX_TX14P
GFX_TX14N
GFX_TX15P
GFX_TX15N
GPP_TX0P
GPP_TX0N
GPP_TX1P
GPP_TX1N
GPP_TX2P
GPP_TX2N
GPP_TX3P
GPP_TX3N
GPP_TX4P
GPP_TX4N
GPP_TX5P
GPP_TX5N
SB_TX0P
SB_TX0N
SB_TX1P
SB_TX1N
SB_TX2P
SB_TX2N
SB_TX3P
SB_TX3N
A5
B5
A4
B4
C3
B2
D1
D2
E2
E1
F4
F3
F1
F2
H4
H3
H1
H2
J2
J1
K4
K3
K1
K2
M4
M3
M1
M2
N2
N1
P1
P2
AC1
AC2
AB4
AB3
AA2
AA1
Y1
Y2
Y4
Y3
V1
V2
AD7
AE7
AE6
AD6
AB6
AC6
AD5
AE5
AC8
AB8
3
GFX_TX0P_CGFX_TX0P_C
GFX_TX0N_CGFX_TX0N_C
GFX_TX1P_CGFX_TX1P_C
GFX_TX1N_C
GFX_TX2P_CGFX_TX2P_C
GFX_TX2N_CGFX_TX2N_C
GFX_TX3P_CGFX_TX3P_C
GFX_TX3N_CGFX_TX3N_C
GFX_TX4P_CGFX_TX4P_C
GFX_TX4N_CGFX_TX4N_C
GFX_TX5P_CGFX_TX5P_C
GFX_TX5N_CGFX_TX5N_C
GFX_TX6P_CGFX_TX6P_C
GFX_TX6N_CGFX_TX6N_C
GFX_TX7P_CGFX_TX7P_C
GFX_TX7N_CGFX_TX7N_C
GFX_TX8P_CGFX_TX8P_C
GFX_TX8N_CGFX_TX8N_C
GFX_TX9P_C
GFX_TX9N_C
GFX_TX10P_C
GFX_TX10N_C
GFX_TX11P_C
GFX_TX11N_C
GFX_TX12P_C
GFX_TX12N_C
GFX_TX13P_C
GFX_TX13N_C
GFX_TX14P_C
GFX_TX14N_C
GFX_TX15P_C
GFX_TX15N_C
GPP_TX0P_C
GPP_TX0N_C
GPP_TX3P_C
GPP_TX3N_C
A_TX0P_CA_TX0P_C
A_TX0N_CA_TX0N_C
A_TX1P_CA_TX1P_C
A_TX1N_CA_TX1N_C
A_TX2P_C
A_TX2N_C
A_TX3P_C
A_TX3N_C
C180 .1U-16VX7-04C180 .1U-16VX7-04
2 1
C177 .1U-16VX7-04C177 .1U-16VX7-04
2 1
C182 .1U-16VX7-04C182 .1U-16VX7-04
2 1
C186 .1U-16VX7-04C186 .1U-16VX7-04
2 1
C193 .1U-16VX7-04C193 .1U-16VX7-04
2 1
C191 .1U-16VX7-04C191 .1U-16VX7-04
2 1
C197 .1U-16VX7-04C197 .1U-16VX7-04
2 1
C205 .1U-16VX7-04C205 .1U-16VX7-04
2 1
C210 .1U-16VX7-04C210 .1U-16VX7-04
2 1
C215 .1U-16VX7-04C215 .1U-16VX7-04
2 1
C228 .1U-16VX7-04C228 .1U-16VX7-04
2 1
C227 .1U-16VX7-04C227 .1U-16VX7-04
2 1
C248 .1U-16VX7-04C248 .1U-16VX7-04
2 1
C256 .1U-16VX7-04C256 .1U-16VX7-04
2 1
C257 .1U-16VX7-04C257 .1U-16VX7-04
2 1
C259 .1U-16VX7-04C259 .1U-16VX7-04
2 1
C260 .1U-16VX7-04C260 .1U-16VX7-04
2 1
C261 .1U-16VX7-04C261 .1U-16VX7-04
2 1
C300 .1U-16VX7-04C300 .1U-16VX7-04
2 1
C301 .1U-16VX7-04C301 .1U-16VX7-04
2 1
C318 .1U-16VX7-04C318 .1U-16VX7-04
2 1
C319 .1U-16VX7-04C319 .1U-16VX7-04
2 1
C333 .1U-16VX7-04C333 .1U-16VX7-04
2 1
C334 .1U-16VX7-04C334 .1U-16VX7-04
2 1
C343 .1U-16VX7-04C343 .1U-16VX7-04
2 1
C346 .1U-16VX7-04C346 .1U-16VX7-04
2 1
C350 .1U-16VX7-04C350 .1U-16VX7-04
2 1
C356 .1U-16VX7-04C356 .1U-16VX7-04
2 1
C362 .1U-16VX7-04C362 .1U-16VX7-04
2 1
C363 .1U-16VX7-04C363 .1U-16VX7-04
2 1
C415 .1U-16VX7-04C415 .1U-16VX7-04
2 1
C418 .1U-16VX7-04C418 .1U-16VX7-04
2 1
C176 .1U-16VX7-04C176 .1U-16VX7-04
2 1
C175 .1U-16VX7-04C175 .1U-16VX7-04
2 1
C355 .1U-16VX7-04C355 .1U-16VX7-04
2 1
C354 .1U-16VX7-04C354 .1U-16VX7-04
2 1
C359 .1U-16VX7-04C359 .1U-16VX7-04
2 1
C360 .1U-16VX7-04C360 .1U-16VX7-04
2 1
C364 .1U-16VX7-04C364 .1U-16VX7-04
2 1
C365 .1U-16VX7-04C365 .1U-16VX7-04
2 1
SC64 .1U-16VX7-04SC64 .1U-16VX7-04
2 1
SC63 .1U-16VX7-04SC63 .1U-16VX7-04
2 1
C357 .1U-16VX7-04C357 .1U-16VX7-04
2 1
C358 .1U-16VX7-04C358 .1U-16VX7-04
2 1
R330 1.27K-1-04R330 1.27K-1-04
12
R332 2K-1-04R332 2K-1-04
12
R330 value:
RS740 is 562ohm
RS780 is 1.27K
2
GFX_TX0P 19
GFX_TX0N 19
GFX_TX1P 19
GFX_TX1N 19
GFX_TX2P 19
GFX_TX2N 19
GFX_TX3P 19
GFX_TX3N 19
GFX_TX4P 19
GFX_TX4N 19
GFX_TX5P 19
GFX_TX5N 19
GFX_TX6P 19
GFX_TX6N 19
GFX_TX7P 19
GFX_TX7N 19
GFX_TX8P 19
GFX_TX8N 19
GFX_TX9P 19
GFX_TX9N 19
GFX_TX10P 19
GFX_TX10N 19
GFX_TX11P 19
GFX_TX11N 19
GFX_TX12P 19
GFX_TX12N 19
GFX_TX13P 19
GFX_TX13N 19
GFX_TX14P 19
GFX_TX14N 19
GFX_TX15P 19
GFX_TX15N 19
GPP_TX0P 19
GPP_TX0N 19
GPP_TX3P 24
GPP_TX3N 24
A_TX0P 13
A_TX0N 13
A_TX1P 13
A_TX1N 13
A_TX2P 13
A_TX2N 13
A_TX3P 13
A_TX3N 13
NB_VCC
1.2V(RS740) 1.1V(RX780;RS780)
1
B B
RS780 Display Port Support (muxed on GFX)
DP0
DP1
A A
GFX_TX0,TX1,TX2 and TX3
AUX0 and HPD0
GFX_TX4,TX5,TX6 and TX7
5
AUX1 and HPD1
4
RX780/RS740/RS780 GPP difference table
PCE_CALRP
GPP4
GPP5
RS740 RX780/RS780
562R (GND)
NC
NC
1.27K (GND)
GPP4
GPP5
3
RX780/RS740/RS780 GPP Routing table
GPP X4 CONNECTOR
GPP X1 CONNECTOR
GIGABIT ETHERNET GPP3
2
RS740 RX780/RS780
GPP[2:0] GPP[3:0]
GPP4
GPP5
Elitegroup Computer Systems
Elitegroup Computer Systems
<OrgAddr1>
<OrgAddr1>
<OrgAddr1>
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
Elitegroup Computer Systems
RS740/RS780-PCIE I/F
RS740/RS780-PCIE I/F
RS740/RS780-PCIE I/F
RS780LQ-CM
RS780LQ-CM
RS780LQ-CM
1
8
8
8
32Tuesday, September 29, 2009
32Tuesday, September 29, 2009
32Tuesday, September 29, 2009
1.0
1.0
1.0
5
If the external NB_PWG was used then the sureboot
would be lost . So the NB_PWG is still connected with
WD_PWG.
2009.9.23 just reserve the gate to prevent from the
glitch
SB_PWRGD14,22,27,29,31
R398
R398
0-04-O
D D
C C
B B
A A
RX780/RS740/RS780 difference table (Control signal)
NB_PWRGD
IN
ALLOW_LDTSTOP
OUT(default)/IN
LDT_STOP#
IN(default)/OUT
SYSTEMRESETb
IN
NB_PWRGD14
+1.8V
C890
C890
22U-08
22U-08
2 1
KG_NBHT_CLKP12
KG_NBHT_CLKN12
KG_NBGFX_CLKP12
KG_NBGFX_CLKN12
KG_NBREF_CLKP12
KG_NBREF_CLKN12
LDT_STOP-4,13
03-050-530106
SN74LVC1G08
SN74LVC1G08
RS740 RX780
3.3V IN
OD OD OD/3.3V IN
3.3V IN
3.3V IN 1.8V IN 3.3V IN
5
0-04-O
0-04-O
0-04-O
1 2
1 2
R399
R399
RS740 +1.2V
RS780+1.8V
+1.8V
740 stuff
Q32
Q32
G
FDV301N-S-O
FDV301N-S-O
DS
+1.8V
U45
U45
1
5
2
3 4
SINGLE 2-INPUT AND GATESN74LVC1G08(02-197-008133)
OD-BUFFER(NEED PULL HIGH)SN74LVC1G07
1.8V IN
1.8V IN 3.3V IN/OD
VCC3 +1.8V
780 stuff
RS780
1.8V IN
NB_PWRGDIN
RS740: Powered from the 3.3-V rail.
RS780: Powered from the 1.8-V rail
U48
U48
1
5
2
NB_PWRGDIN
3 4
74AHC1G08GVS-O
74AHC1G08GVS-O
0-04
0-04
1 2
R396
R396
1.2V(RS740) 1.1V(RX780;RS780)
NB_VCC
NB_VCC
RS780 used RefCLK_N
RS780 1k(1-2) 1.8V
RS740 4.7k(2-3) 3.3V
1
3
1K-04(1-2)
1K-04(1-2)
RJ32
RJ32
2
NB_LDT_STOP-
VCC3 +1.8V
1
3
0-04(1-2)
0-04(1-2)
RJ33-O
RJ33-O
2
BC14
BC14
.1U-04-O
.1U-04-O
2 1
BC13
BC13
33P-04-O
33P-04-O
2 1
SFB20 FB-600-S04SFB20 FB-600-S04
1 2
FB60 FB-600-S04FB60 FB-600-S04
1 2
SFB2 FB-600-S04SFB2 FB-600-S04
1 2
FB63 FB-600-S04FB63 FB-600-S04
1 2
RS780 stuff
FB64 FB-600-S04-OFB64 FB-600-S04-O
1 2
RS740 stuff
TRST
TMS(TP220)
TDI
TCK
TDO(TP218)
4
VCC3
+1.8V
+1.8V
ROUT18
GOUT18
BOUT18
HSYNC10,18
VSYNC10,18
DDCCLK18
DDCDATA18
65mA
20mA
20mA
120mA
SC137
SC137
2.2U-06
2.2U-06
NB_VCC
ATX change
2 1
RS740_DFT_GPIO210
RS740_DFT_GPIO310
RS740_DFT_GPIO110
R184 0-04R184 0-04
1 2
R152 49.9-1-04-OR152 49.9-1-04-O
1 2
RS740 stuff
RS740_DFT_GPIO4
PCIE_RST-10,13,22,24
OSC_14M_NB12
RX740/RS740/RS780 JTAG PIN MAPPING
RX780
TEST_EN
PCIE_RST3(TP222)
I2C_CLK I2C_CLK
PWM_GPIO6(TP219)
4
SFB1 FB-600-S04SFB1 FB-600-S04
1 2
SR498 0-04SR498 0-04
1 2
SFB3 FB600-04SFB3 FB600-04
1 2
SR16:740 150ohm,780 A13 140 ohm
SR16 140-1-04SR16 140-1-04
SR15 150-1-04SR15 150-1-04
SR14 150-1-04SR14 150-1-04
SC2
SC2
C179
C179
2.2U-06
2.2U-06
2.2U-06
2.2U-06
2 1
2 1
SR17 150-1-04SR17 150-1-04
1 2
I2C_CLK
I2C_DATA
DDC_DATA0
DDC_CLK0
RS740_DFT_GPIO2
VCC3
RS740_DFT_GPIO3
RS740_DFT_GPIO1
NB_RST-
C3
33P-04C333P-04
2 1
SC140
SC140
10P-04-O
10P-04-O
2 1
RS740/RS780
TEST_EN
DDC_DATA(TP223)
I2C_DATAI2C_DATA
TMDS_HPD(TP221)
AVDD
SC3
SC3
2.2U-06
2.2U-06
2 1
SC13
SC13
2.2U-06-O
2.2U-06-O
2 1
Check list
no-stuff
AVDDQ
SC8
SC8
2.2U-06
2.2U-06
2 1
1 2
1 2
1 2
PLLVDD
PLLVDD18
VDDA18HTPLL
VDDA18PCIEPLL
SC198
SC198
2.2U-06
2.2U-06
2 1
ALLOW_LDTSTOP13
SR17 and SR12
Stuff for RS780
No-stuff for RS740
3
110mA
SC4
SC4
.1U-04-O
.1U-04-O
2 1
Check list
no-stuff
20mA
SC144
SC144
.1U-04
.1U-04
2 1
4mA
SR22 715-1-04SR22 715-1-04
1 2
NB_RSTNB_PWRGDIN
NB_LDT_STOPALLOW_LDTSTOP
REFCLK_INP
REFCLK_INN
RS780RS780
SR12 150-1-04SR12 150-1-04
1 2
RS740 Stuff
R207 10K-04-OR207 10K-04-O
1 2
I2C_CLK19
RS740:(2-3) 3.3V
RS780:reserve(1-2) 5V
DDC_DATA019
DDC_CLK019
3
I2C_CLK
I2C_DATAREFCLK_INP
DDC_DATA0
DDC_CLK0
U19C
U19C
F12
AVDD1(NC)
E12
AVDD2(NC)
F14
AVDDDI(NC)
G15
AVSSDI(NC)
H15
AVDDQ(NC)
H14
AVSSQ(NC)
E17
C_Pr(DFT_GPIO5)
F17
Y(DFT_GPIO2)
F15
COMP_Pb(DFT_GPIO4)
G18
RED(DFT_GPIO0)
G17
REDb(NC)
E18
GREEN(DFT_GPIO1)
F18
GREENb(NC)
E19
BLUE(DFT_GPIO3)
F19
BLUEb(NC)
A11
DAC_HSYNC(PWM_GPIO4)
B11
DAC_VSYNC(PWM_GPIO6)
F8
DAC_SCL(PCE_RCALRN)
E8
DAC_SDA(PCE_TCALRN)
G14
DAC_RSET(PWM_GPIO1)
A12
PLLVDD(NC)
D14
PLLVDD18(NC)
B12
PLLVSS(NC)
H17
VDDA18HTPLL
D7
VDDA18PCIEPLL1
E7
VDDA18PCIEPLL2
D8
SYSRESETb
A10
POWERGOOD
C10
LDTSTOPb
C12
ALLOW_LDTSTOP
C25
HT_REFCLKP
C24
HT_REFCLKN
E11
REFCLK_P/OSCIN(OSCIN)
F11
REFCLK_N(PWM_GPIO3)
T2
GFX_REFCLKP
T1
GFX_REFCLKN
U1
GPP_REFCLKP
U2
GPP_REFCLKN
V4
GPPSB_REFCLKP(SB_REFCLKP)
V3
GPPSB_REFCLKN(SB_REFCLKN)
B9
I2C_CLK
A9
I2C_DATA
B8
DDC_CLK0/AUX0P(NC)
A8
DDC_DATA0/AUX0N(NC)
B7
DDC_CLK1/AUX1P(NC)
A7
DDC_DATA1/AUX1N(NC)
B10
STRP_DATA
G11
RSVD
C8
AUX_CAL(NC)
RS780
RS780
RJ26
RJ26
2 3
1
4.7K-04-O(1-2)
4.7K-04-O(1-2)
RJ28
RJ28
2 3
1
4.7K-04-O(1-2)
4.7K-04-O(1-2)
RJ25
RJ25
2 3
1
4.7K-04(1-2)
4.7K-04(1-2)
RS740:(2-3) 3.3V
RS780:(1-2) 5V
R1008
R1008
1 2
4.7K-04
4.7K-04
RS740 no stuff
2
PART 3 OF 6
PART 3 OF 6
TXOUT_U1P(PCIE_RESET_GPIO3)
TXOUT_U1N(PCIE_RESET_GPIO2)
TXOUT_U3P(PCIE_RESET_GPIO5)
CRT/TVOUT
CRT/TVOUT
TXCLK_UP(PCIE_RESET_GPIO4)
TXCLK_UN(PCIE_RESET_GPIO1)
LVTM
LVTM
PMCLOCKs PLL PWR
PMCLOCKs PLL PWR
MIS.
MIS.
VCC3
VCC
VCC3
VCC
VCC3
VCC
VCC
2
TXOUT_L0P(NC)
TXOUT_L0N(NC)
TXOUT_L1P(NC)
TXOUT_L1N(NC)
TXOUT_L2P(NC)
TXOUT_L2N(DBG_GPIO0)
TXOUT_L3P(NC)
TXOUT_L3N(DBG_GPIO2)
TXOUT_U0P(NC)
TXOUT_U0N(NC)
TXOUT_U2P(NC)
TXOUT_U2N(NC)
TXOUT_U3N(NC)
TXCLK_LP(DBG_GPIO1)
TXCLK_LN(DBG_GPIO3)
VDDLTP18(NC)
VSSLTP18(NC)
VDDLT18_1(NC)
VDDLT18_2(NC)
VDDLT33_1(NC)
VDDLT33_2(NC)
VSSLT1(VSS)
VSSLT2(VSS)
VSSLT3(VSS)
VSSLT4(VSS)
VSSLT5(VSS)
VSSLT6(VSS)
VSSLT7(VSS)
LVDS_DIGON(PCE_TCALRP)
LVDS_BLON(PCE_RCALRP)
LVDS_ENA_BL(PWM_GPIO2)
TMDS_HPD(NC)
SUS_STAT#(PWM_GPIO5)
HPD(NC)
THERMALDIODE_P
THERMALDIODE_N
TESTMODE
1
A22
B22
A21
B21
B20
A20
A19
B19
B18
A18
A17
B17
D20
D21
D18
D19
B16
A16
D16
D17
15mA
A13
B13
A15
B15
A14
B14
C14
D15
C16
C18
C20
E20
C22
E9
F7
G12
GPIO2:LVDS_ENA_BL/GPIO4 for RS740 &RS780
D9
D10
D12
AE8
AD8
TEST_EN
D13
<OrgAddr1>
<OrgAddr1>
<OrgAddr1>
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
Not using LVDS/TMDS, VGA and TV-out
interfaces can connect VDDLT18,
VDDLTP18, AVDDQ, AVDDDI
and AVDD balls directly to power
rails without filtering and decoupling
capacitors
300mA
reservation
FB79 0-OFB79 0-O
1 2
RS740:Stuff
RS780:no-stuff
TMDS_HPD0 19
RS740_DFT_GPIO5 10,19
SUS_STAT- 10,14
SR6
SR6
1.8K-04
1.8K-04
1 2
Elitegroup Computer Systems
Elitegroup Computer Systems
Elitegroup Computer Systems
RS740/RS780-SYSTEM I/F
RS740/RS780-SYSTEM I/F
RS740/RS780-SYSTEM I/F
RS780LQ-CM
RS780LQ-CM
RS780LQ-CM
1
9
9
9
+1.8V
VCC3
32Tuesday, September 29, 2009
32Tuesday, September 29, 2009
32Tuesday, September 29, 2009
1.0
1.0
1.0
5
4
3
2
1
RS740/RS780 STRAPS
R1009
R1009
RS740_DFT_GPIO19
internal pull-up
D D
D8
D8
P N
1N4148-S-O
1N4148-S-O
12
150-04
150-04
740 no stuff
PCIE_RST- 9,13,22,24SUS_STAT-9,14
RS740/RS780: LOAD_EEPROM_STRAPS
Selects Loading of STRAPS from EPROM
1 : Bypass the loading of EEPROM straps and use Hardware Default Values
0 : I2C Master can load strap values from EEPROM if connected, or use
default values if not connected
RS740: pin DFT_GPIO1
RX780: pin DFT_GPIO1
RS780: pin SUS_STAT#
RJ19
VSYNC9,18
pull-down are default
U19D
U19D
PAR 4 OF 6
MEM_A0(NC)
MEM_A1(NC)
MEM_A2(NC)
MEM_A3(NC)
MEM_A4(NC)
MEM_A5(NC)
MEM_A6(NC)
MEM_A7(NC)
MEM_A8(NC)
MEM_A9(NC)
MEM_A10(NC)
MEM_A11(NC)
MEM_A12(NC)
MEM_A13(NC)
MEM_BA0(NC)
MEM_BA1(NC)
MEM_BA2(NC)
MEM_RASb(NC)
MEM_CASb(NC)
MEM_WEb(NC)
MEM_CSb(NC)
MEM_CKE(NC)
MEM_ODT(NC)
MEM_CKP(NC)
MEM_CKN(NC)
MEM_COMPP(NC)
MEM_COMPN(NC)
PAR 4 OF 6
MEM_DQ0/DVO_VSYNC(NC)
MEM_DQ1/DVO_HSYNC(NC)
MEM_DQ2/DVO_DE(NC)
MEM_DQ3/DVO_D0(NC)
MEM_DQ4(NC)
MEM_DQ5/DVO_D1(NC)
MEM_DQ6/DVO_D2(NC)
MEM_DQ7/DVO_D4(NC)
MEM_DQ8/DVO_D3(NC)
MEM_DQ9/DVO_D5(NC)
MEM_DQ10/DVO_D6(NC)
MEM_DQ11/DVO_D7(NC)
MEM_DQ12(NC)
MEM_DQ13/DVO_D9(NC)
MEM_DQ14/DVO_D10(NC)
MEM_DQ15/DVO_D11(NC)
MEM_DQS0P/DVO_IDCKP(NC)
MEM_DQS0N/DVO_IDCKN(NC)
MEM_DQS1P(NC)
MEM_DQS1N(NC)
MEM_DM0(NC)
MEM_DM1/DVO_D8(NC)
SBD_MEM/DVO_I/F
SBD_MEM/DVO_I/F
IOPLLVDD18(NC)
IOPLLVDD(NC)
IOPLLVSS(NC)
MEM_VREF(NC)
AA18
AA20
AA19
Y19
V17
AA17
AA15
Y15
AC20
AD19
AE22
AC18
AB20
AD22
AC22
AD21
Y17
W18
AD20
AE21
W17
AE19
AE23
AE24
AD23
AE18
15mA
26mA
NB_VCC+1.8V
RS740 +1.2V RS780+1.1V
AB12
AE16
V11
AE15
AA12
AB16
AB14
AD14
AD13
AD15
AC16
C C
B B
AE13
AC14
AD16
AE17
AD17
W12
AD18
AB13
AB18
W14
AE12
AD12
Y14
Y12
V14
V15
RS780
RS780
RS740_DFT_GPIO59,19
pull-down are default
RS740_DFT_GPIO49
RS740_DFT_GPIO39
RS740_DFT_GPIO29
pull-up are default
HSYNC9,18
RJ19
2 3
1
3K-04(2-3)
3K-04(2-3)
RS740 no stuff
R1010
R1010
12
3K-04-O
3K-04-O
Reserved for RS740,but no sfuff
Reserve SR12 pull-low for GPIO4
SR7
SR7
3K-04-O
3K-04-O
1 2
Reserve for 740 but no stuff
R1014
R1014
12
3K-04
3K-04
RS740 no-stuff
VCC3
1 2
VCC3
R1013
R1013
3K-04-O
3K-04-O
RS740/RX780/RS780: STRAP_DEBUG_BUS_GPIO_ENABLE
Enables the Test Debug Bus using GPIO and/or memory IO
1 : Disable (RS740/RS780); Enable (RX780)
0 : Enable (RS740/RS780); Disable(RX780)
RS740: pin DFT_GPIO5
RX780: pin DFT_GPIO5
RS780: pin VSYNC
1-1-1-1-1-1 Mode L default
1-1-1-1-1-1 Mode L
RS780: STRAP_PCIE_GPP_CFG[2:0]
(configure thru register setting)
2-0-2-0-2-0 Mode C2
2-0-2-0-1-1 Mode K
2-0-1-1-1-1 Mode E
1-1-1-1-1-1 Mode L
4-0-0-0-1-1 Mode C
4-0-0-0-2-0 Mode B
RS740: STRAP_PCIE_SB/GPP_CFG[2:0] (Pins: RS740_DFT_GPIO[4:2])
These pin straps are used to configure PCI-E GPP mode.
111: register defined (register default to Config E) default
110: 4-0-0-0-0 Config A
101: 4-4-0-0-0 Config B
100: 4-2-2-0-0 Config C
011: 4-2-1-1-0 Config D
010: 4-1-1-1-1 Config E
others: register defined (default to Config E)
RS740/RX780/RS780: SIDE-PORT MEMORY ENABLE
Enables Side port memory
1. Disable (RS740/RS780)
0 : Enable (RS740/RS780)
RS740: pin DFT_GPIO0
RS780: pin HSYNC
RX780: Not Appicable
RX780/RS780: STRAP_DEBUG_BUS_PCIE_ENABLE
Enables Test debug bus
using PCIE bus
1. Disable (can be enabled
thru nbcfg register)
0 : Enable
RX780: pin DFT_GPIO0
RS780: configurable thru register
setting only
RS740: Not supported
A A
Elitegroup Computer Systems
Elitegroup Computer Systems
<OrgAddr1>
<OrgAddr1>
<OrgAddr1>
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
Elitegroup Computer Systems
RS740/RS780-SPMEM/STRAPS
RS740/RS780-SPMEM/STRAPS
RS740/RS780-SPMEM/STRAPS
RS780LQ-CM
RS780LQ-CM
RS780LQ-CM
1
10
10
10
1.0
1.0
1.0
32Tuesday, September 29, 2009
32Tuesday, September 29, 2009
32Tuesday, September 29, 2009
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