ECS RS780CM-M5 Schematics rev1.0
5
4
3
2
1
RS780CM-M5
D D
SCHEMATICS TABLE:
Page Index
------- ------------------------
1
COVER PAGE
BLOCK DIAGRAM2
HT,CPU MEMORY
3
4
CPU CONTROL & MISC
5
CPU PWR & GND
6
C C
10
11
12
13
14
15
B B
16
17
DDR2 DIMM A CHANNEL
7
DDR2 DIMM B CHANNEL
8
DDR2 DIMM POWER
9
DDR2 DIMM TERMINATIONS
RS740/RS780-HT LINK I/F
RS740/RS780-PCIE I/F
RS740/RS780-SYSTEM I/F
RS740/RS780-SPMEM/STRAPS
RS740/RS780-POWER
CLOCK GENERATOR-ICS9LPRS471
SB700-PCIE/PCI/CPU/LPC/CLK
SB700-ACPI/GPIO/USB/AUDIO
Page Index
------- ------------------------
18
19
20
21
22
23
24
25
26
27
28 AUDIO VIA1708B/ALC662
29
30
31
32
33
34
35
SB700-POWER & DECOUPLING
SB700-SATA/IDE/HWM/SPI
SB700-STRAPS
CRT(D-sub)-VGA
PCIE-16X/1X SLOT
TPM, USB, 5VDUAL SWITCH
PCI SLOT
SIO IT8720,PS2,FDD,CIR
LPT/COM PORT
LAN 8101E/8111C
VIA1708B/ALC662(PANEL)
ISL6323 VCORE VOLTAGE
DC POWER, DDRII POWER
NB CORE POWER
PANEL,ATX24P,SMRT FAN,BUZZER
POWER ENABLE
Attention
REVISION HISTORY:
Rev Date Notes
---------- -------------- --------------------------------------------------------------------------------
V 1.0
08/212/'08
L1:TOPPCB STACK:
L2:PWR
5
L3:GND
L4:BOTTOM
Elitegroup Computer Systems
Elitegroup Computer Systems
Elitegroup Computer Systems
Title
Title
Title
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Date: Sheet
Date: Sheet
4
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Date: Sheet
Cover Page
Cover Page
Cover Page
RS780CM-M5
RS780CM-M5
RS780CM-M5
1
1.0
1.0
1
1
1
1.0
of
35Wednesday, August 27, 2008
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35Wednesday, August 27, 2008
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35Wednesday, August 27, 2008
A A
5
RS780CM-M5
4
3
2
1
AMD
DDRII 400,533,667,800, 1066
D D
Clock
Generator
ICS9LPR471
HyperTransport
Link
DVI/TMDS CON
(NA)
2CH TMDS
AM2/AM2g2
AM2 SOCKET
IN
16x16
OUT
RS740/RS780
HyperTransport LINK0 CPU I/F
DX10 IGP( RS780)
LVDS/TVOUT/TMDS(RS780/740)
DISPLAY PORT X2 (RS780)
128bit
DDRII 400,533,667,800, 1066
FRAME BUFFER
Side port
16X
DDR2 (NA)
PCIE
SLOT
UNBUFFERED
DDRII DIMM1
UNBUFFERED
DDRII DIMM2
DDRII FIRST LOGICAL DIMM DDRII SECOND LOGICAL DIMM
16X
UNBUFFERED
DDRII DIMM3(NA)
UNBUFFERED
DDRII DIMM4(NA)
Side Port Memory(RS780/740)
VGA CON
C C
1 X16 PCIE I/F
1 X4 PCIE I/F WITH SB
6 X1 PCIE I/F (4 X1 for RS740)
6 1X PCIE INTERFACE
PCIE GPP0
X1
PCIE GPP3
GIGABIT LAN
4X PCIE ALink
USB-9
(NA)
USB-10
(NA)
B B
USB-8
(NA)
USB-11
(NA)
USB-5USB-6USB-7
USB-1USB-2USB-3USB-4
1394
CON
(NA)
USB-0
VIA 6308P
(NA)
SPI ROM
USB 2.0
PCI
SPI I/F
SB700/SB750
USB2.0 (12)+ 1.1(2)
SATA II (6 PORTS)
AZALIA HD AUDIO
ATA 66/100/133
SPI I/F
LPC I/F(S5)
ACPI 1.1
INT RTC
HD AUDIO I/F
SATA II I/F
HD AUDIO HDR
SATA#0 SATA#1 SATA#2 SATA#3
HD AUDIO
REAR CON
SATA#4
(NA)
SATA#5
(NA)
HW MONITOR
PCI/PCI BDGE
PCI SLOT
#2
PCI SLOT
#1
PCI
LPC I/F
ITE SIO IT8720
A A
KBD
MOUSE
5
4
FLOPPY
3
LPT
PORT
HW MONITOR I/F
TPM 1.2(TCM)
HW
MONITOR
2
Elitegroup Computer Systems
Elitegroup Computer Systems
<OrgAddr1>
<OrgAddr1>
<OrgAddr1>
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
Elitegroup Computer Systems
BLOCK DIAGRAM
BLOCK DIAGRAM
BLOCK DIAGRAM
RS780CM-M5
RS780CM-M5
RS780CM-M5
2
2
2
of
35Wednesday, August 27, 2008
of
35Wednesday, August 27, 2008
of
1
35Wednesday, August 27, 2008
1.0
1.0
1.0
5
4
3
2
1
CPU Memory
HT LINK
DDR2 Memory Interface A DDR2 Memory Interface B
U21A
U21B
D D
MEM_MA0_CLK2_P6,9
MEM_MA0_CLK2_N6,9
MEM_MA0_CLK0_P6,9
MEM_MA0_CLK0_N6,9
MEM_MA0_CLK1_P6,9
MEM_MA0_CLK1_N6,9
MEM_MA0_CS_L16,9
MEM_MA0_CS_L06,9
MEM_MA0_ODT06,9
MEM_MA_CAS-6,9
MEM_MA_WE-6,9
MEM_MA_RAS-6,9
C C
MEM_MA_BANK26,9
MEM_MA_BANK16,9
MEM_MA_BANK06,9
MEM_MA_ADD[15..0]6,9 MEM_MB_ADD[15..0]7,9
MEM_MA_DQS7_P6
MEM_MA_DQS7_N6
MEM_MA_DQS6_P6
MEM_MA_DQS6_N6
MEM_MA_DQS5_P6
MEM_MA_DQS5_N6
MEM_MA_DQS4_P6
MEM_MA_DQS4_N6
MEM_MA_DQS3_P6
MEM_MA_DQS3_N6
MEM_MA_DQS2_P6
MEM_MA_DQS2_N6
B B
MEM_MA_DQS1_P6
MEM_MA_DQS1_N6
MEM_MA_DQS0_P6
MEM_MA_DQS0_N6
MEM_MA_DM[7..0]6 MEM_MB_DM[7..0]7
MEM_MA_ADD15
MEM_MA_ADD14
MEM_MA_ADD13
MEM_MA_ADD12
MEM_MA_ADD11
MEM_MA_ADD10
MEM_MA_ADD9
MEM_MA_ADD8
MEM_MA_ADD7
MEM_MA_ADD6
MEM_MA_ADD5
MEM_MA_ADD4
MEM_MA_ADD3
MEM_MA_ADD2
MEM_MA_ADD1
MEM_MA_ADD0
MEM_MA_DM7
MEM_MA_DM6
MEM_MA_DM5
MEM_MA_DM4
MEM_MA_DM3
MEM_MA_DM2
MEM_MA_DM1
MEM_MA_DM0
U21B
AG21
MA_CLK_H7
AG20
MA_CLK_L7
AE20
MA_CLK_H6
AE19
MA_CLK_L6
U27
MA_CLK_H5
U26
MA_CLK_L5
V27
MA_CLK_H4
W27
MA_CLK_L4
W26
MA_CLK_H3
W25
MA_CLK_L3
U24
MA_CLK_H2
V24
MA_CLK_L2
G19
MA_CLK_H1
H19
MA_CLK_L1
G20
MA_CLK_H0
G21
MA_CLK_L0
AC25
MA0_CS_L1
AA24
MA0_CS_L0
AE28
MA0_ODT1
AC28
MA0_ODT0
AD27
MA1_CS_L1
AA25
MA1_CS_L0
AE27
MA1_ODT1
AC27
MA1_ODT0
E20
MA_RESET_L
AB25
MA_CAS_L
AB27
MA_WE_L
AA26
MA_RAS_L
N25
MA_BANK2
Y27
MA_BANK1
AA27
MA_BANK0
L27
MA_CKE1
M25
MA_CKE0
M27
MA_ADD15
N24
MA_ADD14
AC26
MA_ADD13
N26
MA_ADD12
P25
MA_ADD11
Y25
MA_ADD10
N27
MA_ADD9
R24
MA_ADD8
P27
MA_ADD7
R25
MA_ADD6
R26
MA_ADD5
R27
MA_ADD4
T25
MA_ADD3
U25
MA_ADD2
T27
MA_ADD1
W24
MA_ADD0
AD15
MA_DQS_H7
AE15
MA_DQS_L7
AG18
MA_DQS_H6
AG19
MA_DQS_L6
AG24
MA_DQS_H5
AG25
MA_DQS_L5
AG27
MA_DQS_H4
AG28
MA_DQS_L4
D29
MA_DQS_H3
C29
MA_DQS_L3
C25
MA_DQS_H2
D25
MA_DQS_L2
E19
MA_DQS_H1
F19
MA_DQS_L1
F15
MA_DQS_H0
G15
MA_DQS_L0
AF15
MA_DM7
AF19
MA_DM6
AJ25
MA_DM5
AH29
MA_DM4
B29
MA_DM3
E24
MA_DM2
E18
MA_DM1
H15
MA_DM0
MA_DATA63
MA_DATA62
MA_DATA61
MA_DATA60
MA_DATA59
MA_DATA58
MA_DATA57
MA_DATA56
MA_DATA55
MA_DATA54
MA_DATA53
MA_DATA52
MA_DATA51
MA_DATA50
MA_DATA49
MA_DATA48
MA_DATA47
MA_DATA46
MA_DATA45
MA_DATA44
MA_DATA43
MA_DATA42
MA_DATA41
MA_DATA40
MA_DATA39
MA_DATA38
MA_DATA37
MA_DATA36
MA_DATA35
MA_DATA34
MA_DATA33
MA_DATA32
MA_DATA31
MA_DATA30
MA_DATA29
MA_DATA28
MA_DATA27
MA_DATA26
MA_DATA25
MA_DATA24
MA_DATA23
MA_DATA22
MA_DATA21
MA_DATA20
MA_DATA19
MA_DATA18
MA_DATA17
MA_DATA16
MA_DATA15
MA_DATA14
MA_DATA13
MA_DATA12
MEM CHA
MEM CHA
MA_DATA11
MA_DATA10
MA_DATA9
MA_DATA8
MA_DATA7
MA_DATA6
MA_DATA5
MA_DATA4
MA_DATA3
MA_DATA2
MA_DATA1
MA_DATA0
MA_DQS_H8
MA_DQS_L8
MA_DM8
MA_CHECK7
MA_CHECK6
MA_CHECK5
MA_CHECK4
MA_CHECK3
MA_CHECK2
MA_CHECK1
MA_CHECK0
AE14
AG14
AG16
AD17
AD13
AE13
AG15
AE16
AG17
AE18
AD21
AG22
AE17
AF17
AF21
AE21
AF23
AE23
AJ26
AG26
AE22
AG23
AH25
AF25
AJ28
AJ29
AF29
AE26
AJ27
AH27
AG29
AF27
E29
E28
D27
C27
G26
F27
C28
E27
F25
E25
E23
D23
E26
C26
G23
F23
E22
E21
F17
G17
G22
F21
G18
E17
G16
E15
G13
H13
H17
E16
E14
G14
J28
J27
J25
K25
J26
G28
G27
L24
K27
H29
H27
MEM_MA_DATA63
MEM_MA_DATA62
MEM_MA_DATA61
MEM_MA_DATA60
MEM_MA_DATA59
MEM_MA_DATA58
MEM_MA_DATA57
MEM_MA_DATA56
MEM_MA_DATA55
MEM_MA_DATA54
MEM_MA_DATA53
MEM_MA_DATA52
MEM_MA_DATA51
MEM_MA_DATA50
MEM_MA_DATA49
MEM_MA_DATA48
MEM_MA_DATA47
MEM_MA_DATA46
MEM_MA_DATA45
MEM_MA_DATA44
MEM_MA_DATA43
MEM_MA_DATA42
MEM_MA_DATA41
MEM_MA_DATA40
MEM_MA_DATA39
MEM_MA_DATA38
MEM_MA_DATA37
MEM_MA_DATA36
MEM_MA_DATA35
MEM_MA_DATA34
MEM_MA_DATA33
MEM_MA_DATA32
MEM_MA_DATA31
MEM_MA_DATA30
MEM_MA_DATA29
MEM_MA_DATA28
MEM_MA_DATA27
MEM_MA_DATA26
MEM_MA_DATA25
MEM_MA_DATA24
MEM_MA_DATA23
MEM_MA_DATA22
MEM_MA_DATA21
MEM_MA_DATA20
MEM_MA_DATA19
MEM_MA_DATA18
MEM_MA_DATA17
MEM_MA_DATA16
MEM_MA_DATA15
MEM_MA_DATA14
MEM_MA_DATA13
MEM_MA_DATA12
MEM_MA_DATA11
MEM_MA_DATA10
MEM_MA_DATA9
MEM_MA_DATA8
MEM_MA_DATA7
MEM_MA_DATA6
MEM_MA_DATA5
MEM_MA_DATA4
MEM_MA_DATA3
MEM_MA_DATA2
MEM_MA_DATA1
MEM_MA_DATA0
MEM_MA_CHECK7
MEM_MA_CHECK5
MEM_MA_CHECK4
MEM_MA_CHECK3
MEM_MA_CHECK2
MEM_MA_CHECK1
MEM_MA_CHECK0
MEM_MA_DATA[63..0] 6 MEM_MB_DATA[63..0] 7
MEM_MA_DQS8_P 6
MEM_MA_DQS8_N 6
MEM_MA_DM8 6
MEM_MA_CHECK[7..0] 6
MEM_MB0_CLK2_P7,9
MEM_MB0_CLK2_N7,9
MEM_MB0_CLK0_P7,9
MEM_MB0_CLK0_N7,9
MEM_MB0_CLK1_P7,9
MEM_MB0_CLK1_N7,9
MEM_MB0_CS_L17,9
MEM_MB0_CS_L07,9
MEM_MB0_ODT07,9
MEM_MB_CAS-7,9
MEM_MB_WE-7,9
MEM_MB_RAS-7,9
MEM_MB_BANK27,9
MEM_MB_BANK17,9
MEM_MB_BANK07,9
MEM_MB_CKE07,9MEM_MA_CKE06,9
MEM_MB_DQS7_P7
MEM_MB_DQS7_N7
MEM_MB_DQS6_P7
MEM_MB_DQS6_N7
MEM_MB_DQS5_P7
MEM_MB_DQS5_N7
MEM_MB_DQS4_P7
MEM_MB_DQS4_N7
MEM_MB_DQS3_P7
MEM_MB_DQS3_N7
MEM_MB_DQS2_P7
MEM_MB_DQS2_N7
MEM_MB_DQS1_P7
MEM_MB_DQS1_N7
MEM_MB_DQS0_P7
MEM_MB_DQS0_N7
MEM_MB_ADD15
MEM_MB_ADD14
MEM_MB_ADD13
MEM_MB_ADD12
MEM_MB_ADD11
MEM_MB_ADD10
MEM_MB_ADD9
MEM_MB_ADD8
MEM_MB_ADD7
MEM_MB_ADD6
MEM_MB_ADD5
MEM_MB_ADD4
MEM_MB_ADD3
MEM_MB_ADD2
MEM_MB_ADD1
MEM_MB_ADD0
MEM_MB_DM7
MEM_MB_DM6
MEM_MB_DM5
MEM_MB_DM4
MEM_MB_DM3
MEM_MB_DM2
MEM_MB_DM1
MEM_MB_DM0
AL19
AL18
AC31
AF31
AD29
AE29
AB31
AG31
AD31
AC29
AC30
AB29
AA31
AA28
AE31
AA29
AA30
AK13
AK17
AK23
AL23
AL28
AL29
AH17
AK29
AJ19
AK19
W29
W28
W31
AE30
AJ13
AJ17
AJ14
AJ23
U31
U30
Y31
Y30
V31
A18
A19
C19
D19
B19
N31
M31
M29
N28
N29
N30
P29
P31
R29
R28
R31
R30
T31
T29
U29
U28
D31
C31
C24
C23
D17
C17
C14
C13
C30
A23
B17
B13
U21C
U21C
MB_CLK_H7
MB_CLK_L7
MB_CLK_H6
MB_CLK_L6
MB_CLK_H5
MB_CLK_L5
MB_CLK_H4
MB_CLK_L4
MB_CLK_H3
MB_CLK_L3
MB_CLK_H2
MB_CLK_L2
MB_CLK_H1
MB_CLK_L1
MB_CLK_H0
MB_CLK_L0
MB0_CS_L1
MB0_CS_L0
MB0_ODT1
MB0_ODT0
MB1_CS_L1
MB1_CS_L0
MB1_ODT1
MB1_ODT0
MB_RESET_L
MB_CAS_L
MB_WE_L
MB_RAS_L
MB_BANK2
MB_BANK1
MB_BANK0
MB_CKE1
MB_CKE0
MB_ADD15
MB_ADD14
MB_ADD13
MB_ADD12
MB_ADD11
MB_ADD10
MB_ADD9
MB_ADD8
MB_ADD7
MB_ADD6
MB_ADD5
MB_ADD4
MB_ADD3
MB_ADD2
MB_ADD1
MB_ADD0
MB_DQS_H7
MB_DQS_L7
MB_DQS_H6
MB_DQS_L6
MB_DQS_H5
MB_DQS_L5
MB_DQS_H4
MB_DQS_L4
MB_DQS_H3
MB_DQS_L3
MB_DQS_H2
MB_DQS_L2
MB_DQS_H1
MB_DQS_L1
MB_DQS_H0
MB_DQS_L0
MB_DM7
MB_DM6
MB_DM5
MB_DM4
MB_DM3
MB_DM2
MB_DM1
MB_DM0
MB_DATA63
MB_DATA62
MB_DATA61
MB_DATA60
MB_DATA59
MB_DATA58
MB_DATA57
MB_DATA56
MB_DATA55
MB_DATA54
MB_DATA53
MB_DATA52
MB_DATA51
MB_DATA50
MB_DATA49
MB_DATA48
MB_DATA47
MB_DATA46
MB_DATA45
MB_DATA44
MB_DATA43
MB_DATA42
MB_DATA41
MB_DATA40
MB_DATA39
MB_DATA38
MB_DATA37
MB_DATA36
MB_DATA35
MB_DATA34
MB_DATA33
MB_DATA32
MB_DATA31
MB_DATA30
MB_DATA29
MB_DATA28
MB_DATA27
MB_DATA26
MB_DATA25
MB_DATA24
MB_DATA23
MB_DATA22
MB_DATA21
MB_DATA20
MB_DATA19
MB_DATA18
MB_DATA17
MB_DATA16
MB_DATA15
MB_DATA14
MB_DATA13
MB_DATA12
MEM CHB
MEM CHB
MB_DATA11
MB_DATA10
MB_DATA9
MB_DATA8
MB_DATA7
MB_DATA6
MB_DATA5
MB_DATA4
MB_DATA3
MB_DATA2
MB_DATA1
MB_DATA0
MB_DQS_H8
MB_DQS_L8
MB_DM8
MB_CHECK7
MB_CHECK6
MB_CHECK5
MB_CHECK4
MB_CHECK3
MB_CHECK2
MB_CHECK1
MB_CHECK0
AH13
AL13
AL15
AJ15
AF13
AG13
AL14
AK15
AL16
AL17
AK21
AL21
AH15
AJ16
AH19
AL20
AJ22
AL22
AL24
AK25
AJ21
AH21
AH23
AJ24
AL27
AK27
AH31
AG30
AL25
AL26
AJ30
AJ31
E31
E30
B27
A27
F29
F31
A29
A28
A25
A24
C22
D21
A26
B25
B23
A22
B21
A20
C16
D15
C21
A21
A17
A16
B15
A14
E13
F13
C15
A15
A13
D13
J31
J30
J29
K29
K31
G30
G29
L29
L28
H31
G31
MEM_MB_DATA63
MEM_MB_DATA62
MEM_MB_DATA61
MEM_MB_DATA60
MEM_MB_DATA59
MEM_MB_DATA58
MEM_MB_DATA57
MEM_MB_DATA56
MEM_MB_DATA55
MEM_MB_DATA54
MEM_MB_DATA53
MEM_MB_DATA52
MEM_MB_DATA51
MEM_MB_DATA50
MEM_MB_DATA49
MEM_MB_DATA48
MEM_MB_DATA47
MEM_MB_DATA46
MEM_MB_DATA45
MEM_MB_DATA44
MEM_MB_DATA43
MEM_MB_DATA42
MEM_MB_DATA41
MEM_MB_DATA40
MEM_MB_DATA39
MEM_MB_DATA38
MEM_MB_DATA37
MEM_MB_DATA36
MEM_MB_DATA35
MEM_MB_DATA34
MEM_MB_DATA33
MEM_MB_DATA32
MEM_MB_DATA31
MEM_MB_DATA30
MEM_MB_DATA29
MEM_MB_DATA28
MEM_MB_DATA27
MEM_MB_DATA26
MEM_MB_DATA25
MEM_MB_DATA24
MEM_MB_DATA23
MEM_MB_DATA22
MEM_MB_DATA21
MEM_MB_DATA20
MEM_MB_DATA19
MEM_MB_DATA18
MEM_MB_DATA17
MEM_MB_DATA16
MEM_MB_DATA15
MEM_MB_DATA14
MEM_MB_DATA13
MEM_MB_DATA12
MEM_MB_DATA11
MEM_MB_DATA10
MEM_MB_DATA9
MEM_MB_DATA8
MEM_MB_DATA7
MEM_MB_DATA6
MEM_MB_DATA5
MEM_MB_DATA4
MEM_MB_DATA3
MEM_MB_DATA2
MEM_MB_DATA1
MEM_MB_DATA0
MEM_MB_CHECK7
MEM_MB_CHECK6
MEM_MB_CHECK5
MEM_MB_CHECK4
MEM_MB_CHECK3
MEM_MB_CHECK2
MEM_MB_CHECK1
MEM_MB_CHECK0
MEM_MB_DQS8_P 7
MEM_MB_DQS8_N 7
MEM_MB_DM8 7
MEM_MB_CHECK[7..0] 7
HT_CLKIN1_P10 HT_CLKOUT1_P 10
HT_CLKIN1_N10
HT_CLKIN0_P10
HT_CLKIN0_N10
HT_CTLIN1_P10
HT_CTLIN1_N10
HT_CTLIN0_P10
HT_CTLIN0_N10
HT_CADIN15_P10
HT_CADIN15_N10
HT_CADIN14_P10
HT_CADIN14_N10
HT_CADIN13_P10
HT_CADIN13_N10
HT_CADIN12_P10
HT_CADIN12_N10
HT_CADIN11_P10
HT_CADIN11_N10
HT_CADIN10_P10
HT_CADIN10_N10
HT_CADIN9_P10
HT_CADIN9_N10
HT_CADIN8_P10
HT_CADIN8_N10
HT_CADIN7_P10
HT_CADIN7_N10
HT_CADIN6_P10
HT_CADIN6_N10
HT_CADIN5_P10
HT_CADIN5_N10
HT_CADIN4_P10
HT_CADIN4_N10
HT_CADIN3_P10
HT_CADIN3_N10
HT_CADIN2_P10
HT_CADIN2_N10
HT_CADIN1_P10
HT_CADIN1_N10
HT_CADIN0_P10
HT_CADIN0_N10
U21A
N6
L0_CLKIN_H1
P6
L0_CLKIN_L1
N3
L0_CLKIN_H0
N2
L0_CLKIN_L0
V4
L0_CTLIN_H1
V5
L0_CTLIN_L1
U1
L0_CTLIN_H0
V1
L0_CTLIN_L0
U6
L0_CADIN_H15
V6
L0_CADIN_L15
T4
L0_CADIN_H14
T5
L0_CADIN_L14
R6
L0_CADIN_H13
T6
L0_CADIN_L13
P4
L0_CADIN_H12
P5
L0_CADIN_L12
M4
L0_CADIN_H11
M5
L0_CADIN_L11
L6
L0_CADIN_H10
M6
L0_CADIN_L10
K4
L0_CADIN_H9
K5
L0_CADIN_L9
J6
L0_CADIN_H8
K6
L0_CADIN_L8
U3
L0_CADIN_H7
U2
L0_CADIN_L7
R1
L0_CADIN_H6
T1
L0_CADIN_L6
R3
L0_CADIN_H5
R2
N1
P1
L1
M1
L3
L2
J1
K1
J3
J2
L0_CADIN_L5
L0_CADIN_H4
L0_CADIN_L4
L0_CADIN_H3
L0_CADIN_L3
L0_CADIN_H2
L0_CADIN_L2
L0_CADIN_H1
L0_CADIN_L1
L0_CADIN_H0
L0_CADIN_L0
ZIF-940P-S
ZIF-940P-S
HT LINK
HT LINK
SR25 and SR26 stuff for RS740
CPU_VDDHT
RS740 stuff
SR25 49.9-1-04-0SR25 49.9-1-04-0
1 2
SR26 49.9-1-04-0SR26 49.9-1-04-0
1 2
RS740 stuff
L0_CLKOUT_H1
L0_CLKOUT_L1
L0_CLKOUT_H0
L0_CLKOUT_L0
L0_CTLOUT_H1
L0_CTLOUT_L1
L0_CTLOUT_H0
L0_CTLOUT_L0
L0_CADOUT_H15
L0_CADOUT_L15
L0_CADOUT_H14
L0_CADOUT_L14
L0_CADOUT_H13
L0_CADOUT_L13
L0_CADOUT_H12
L0_CADOUT_L12
L0_CADOUT_H11
L0_CADOUT_L11
L0_CADOUT_H10
L0_CADOUT_L10
L0_CADOUT_H9
L0_CADOUT_L9
L0_CADOUT_H8
L0_CADOUT_L8
L0_CADOUT_H7
L0_CADOUT_L7
L0_CADOUT_H6
L0_CADOUT_L6
L0_CADOUT_H5
L0_CADOUT_L5
L0_CADOUT_H4
L0_CADOUT_L4
L0_CADOUT_H3
L0_CADOUT_L3
L0_CADOUT_H2
L0_CADOUT_L2
L0_CADOUT_H1
L0_CADOUT_L1
L0_CADOUT_H0
L0_CADOUT_L0
AD5
AD4
AD1
AC1
Y6
W6
W2
W3
Y5
Y4
AB6
AA6
AB5
AB4
AD6
AC6
AF6
AE6
AF5
AF4
AH6
AG6
AH5
AH4
Y1
W1
AA2
AA3
AB1
AA1
AC2
AC3
AE2
AE3
AF1
AE1
AG2
AG3
AH1
AG1
HT_CTLIN1_PMEM_MA_CHECK6
HT_CTLIN1_N
HT_CLKOUT1_N 10
HT_CLKOUT0_P 10
HT_CLKOUT0_N 10
HT_CTLOUT1_P 10
HT_CTLOUT1_N 10
HT_CTLOUT0_P 10
HT_CTLOUT0_N 10
HT_CADOUT15_P 10
HT_CADOUT15_N 10
HT_CADOUT14_P 10
HT_CADOUT14_N 10
HT_CADOUT13_P 10
HT_CADOUT13_N 10
HT_CADOUT12_P 10
HT_CADOUT12_N 10
HT_CADOUT11_P 10
HT_CADOUT11_N 10
HT_CADOUT10_P 10
HT_CADOUT10_N 10
HT_CADOUT9_P 10
HT_CADOUT9_N 10
HT_CADOUT8_P 10
HT_CADOUT8_N 10
HT_CADOUT7_P 10
HT_CADOUT7_N 10
HT_CADOUT6_P 10
HT_CADOUT6_N 10
HT_CADOUT5_P 10
HT_CADOUT5_N 10
HT_CADOUT4_P 10
HT_CADOUT4_N 10
HT_CADOUT3_P 10
HT_CADOUT3_N 10
HT_CADOUT2_P 10
HT_CADOUT2_N 10
HT_CADOUT1_P 10
HT_CADOUT1_N 10
HT_CADOUT0_P 10
HT_CADOUT0_N 10
MEMORY CLOCK TRANSLATION
DDR2 Memory Signal
DIMM
DIMM A0
MEM_MA0_CLK2
MEM_MA0_CLK1
MEM_MA0_CLK0 MA_CLK5
DIMM A1
MEM_MA1_CLK2 MA_CLK6
(NA)
MEM_MA1_CLK1 MA_CLK0
A A
5
MEM_MA1_CLK0 MA_CLK4
MEM_MB0_CLK2 MB_CLK7
DIMM B0
MEM_MB0_CLK1 MB_CLK1
MEM_MB0_CLK0 MB_CLK5
DIMM B1
MEM_MB1_CLK2 MB_CLK6
(NA)
MEM_MB1_CLK1 MB_CLK0
MEM_MB1_CLK0 MB_CLK4
CPU Signal
MA_CLK7
MA_CLK1
Elitegroup Computer Systems
Elitegroup Computer Systems
<OrgAddr1>
<OrgAddr1>
<OrgAddr1>
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
4
3
2
Date: Sheet
Elitegroup Computer Systems
HT,CPU MEMORY
HT,CPU MEMORY
HT,CPU MEMORY
RS780CM-M5
RS780CM-M5
Custom
Custom
Custom
RS780CM-M5
1
1.0
1.0
3
3
3
1.0
of
35Wednesday, August 27, 2008
of
35Wednesday, August 27, 2008
of
35Wednesday, August 27, 2008
5
4
3
2
1
CPU Control and Miscellaneous
D D
C322 3900P-04C322 3900P-04
CPU_CLKP15
CPU_CLKN15
C C
B B
21
R317
R317
C320 3900P-04C320 3900P-04
21
Cap to CPU :<1250mils
Rst to CPU :<600mils
Layout: Keep trace to resistors
less than 1" from CPU pins.
1 2
169-1-04
169-1-04
CPU_VDDIO_SUS
SR33 39.2-1-04SR33 39.2-1-04
R323 39.2-1-04R323 39.2-1-04
SR496 300-04SR496 300-04
SR497 300-04SR497 300-04
CPU_VDDA_RUN
CPU_PWRGD16
LDT_STOP-12,16
LDT_RST-5,16
CPU_PRESENT_L is internally connected to VSS.
SA[0] is one address bit used for SB-TSI interface.
This pin should be tied to VSS.
CPU_TDI5
CPU_TRST-5
CPU_TCK5
CPU_TMS5
CPU_DBREQ-5
CPU_VDD_FB_H30
CPU_VDD_FB_L30
CPU_M_VREF_SUS
12
1 2
1 2
1 2
TEST12 & TEST20 $ TEST24
105-B277xx-00D:pull low to 300ohm
But AMD review don't need pull low
CPU_CLKIN_SC_P
CPU_CLKIN_SC_N
CPU_PWRGD
LDT_STOPÂLDT_RST-
CPU_SIC
CPU_TDI
CPU_TRSTÂCPU_TCK
CPU_TMS
CPU_DBREQÂCPU_VDD_FB_H
CPU_VDD_FB_L
VTT may not have a feedback connection.
In these cases, the processor’s
VTT_SENSE pin may be
left unconnected.
CPU_M_ZN
CPU_M_ZP
CPU_TEST25_H_BYPASSCLK_H
CPU_TEST25_H_BYPASSCLK_L
STP63STP63
1
Internal pullup
STP62STP62
STP4STP4
STP6STP6
STP10STP10
STP3STP3
STP11STP11
U21D
U21D
C10
VDDA_1
D10
VDDA_2
MISC.
CLKIN_H
CLKIN_L
PWROK
LDTSTOP_L
RESET_L
CPU_PRESENT_L
SIC
SID
SA0
ALERT_L
TDI
TRST_L
TCK
TMS
DBREQ_L
VDD_FB_H
VDD_FB_L
VTT_SENSE
M_VREF
M_ZN
M_ZP
TEST25_H
TEST25_L
TEST19
TEST18
TEST13
TEST9
TEST17
TEST16
TEST15
TEST14
TEST12
TEST7
TEST6
TEST3
TEST2
RSVD1
RSVD2
RSVD3
RSVD4
INT. MISC.
INT. MISC.
RSVD5
RSVD6
RSVD9
RSVD10
ZIF-940P-S
ZIF-940P-S
MISC.
PLATFORM_TYPE
A8
B8
C9
D8
C7
AL3
AL6
AK6
AK4
AL4
AL10
AJ10
AH10
AL9
A5
G2
G1
E12
1
F12
AH11
AJ11
A10
B10
F10
E9
AJ7
F6
D6
1
E7
1
F8
1
C5
1
AH9
1
E5
AJ5
AH7
AJ6
AD25
AE24
AE25
AJ18
AJ20
AK3
C18
C20
KEY/VSS1
KEY/VSS2
CORE_TYPE
SVC/VID3
SVD/VID2
PVIEN/VID1
THERMDC
THERMDA
THERMTRIP_L
PROCHOT_L
DBRDY
VDDIO_FB_H
VDDIO_FB_L
VDDNB_FB_H
VDDNB_FB_L
PSI_L
HTREF1
HTREF0
TEST29_H
TEST29_L
TEST24
TEST23
TEST22
TEST21
TEST20
TEST28_H
TEST28_L
TEST27
TEST26
TEST10
TEST8
RSVD11
RSVD12
RSVD13
RSVD14
RSVD15
RSVD16
RSVD17
RSVD18
RSVD19
RSVD20
H22
AE9
F2
G5
D2
VID5
D1
VID4
C1
E3
E2
E1
VID0
AG9
AG8
AK7
AL7
AK10
TDO
B6
AK11
AL11
G4
G3
F1
V8
V7
C11
D11
AK8
AH8
AJ9
AL8
AJ8
J10
H9
AK9
AK5
G7
D4
L30
L31
V29
W30
F3
G24
G25
H25
L25
L26
CPU_PLATFORM_TYPE
CPU_CORE_TYPE
CPU_VID5
CPU_VID4
CPU_SVC
CPU_SVD
CPU_PVEN
CPU_VID0_R
CPU_THERMDC
CPU_THERMDA
CPU_THERMTRIP-_1.8
CPU_PROCHOT-_1.8_L
CPU_TDO
CPU_DBRDY
R325 300-04-OR325 300-04-O
1 2
1
STP1STP1
CPU_HTREF1
R309 44.2-1-04R309 44.2-1-04
CPU_HTREF0
SR31 44.2-1-04SR31 44.2-1-04
R733 80.6-1-04R733 80.6-1-04
Layout: Route as 80 ohms diff impedance.
Keep trace to resistor < 1" from CPU pins.
1
STP5STP5
1
STP7STP7
1
STP8STP8
STP14STP14
1
12
R502 300-04R502 300-04
1 2
R498 300-04R498 300-04
1 2
TEST26
1
STP2STP2
CPU_CORE_TYPE 30
CPU_VID5 30
CPU_VID4 30
VRD_SVC 30
VRD_SVD 30
CPU_PVEN 30
CPU_VID0 30
CPU_THERMDC 25
CPU_THERMDA 25
CPU_PROCHOT-_1.8 16
CPU_TDO 5
CPU_DBRDY 5
VDDIO_FB_H 31
CPU_VDDNB_FB_H 30
CPU_VDDNB_FB_L 30
12
12
CPU_VDDHT
Layout: Keep CPU_HTREF0,1
less than 1.5" from in length.
TEST22:
AMD review don't need pull low,but A.P note
and 105-B277xx-00D requestion pull low
TEST27:
105-B277xx-00D:pull high to 300ohm
But AMD review don't need pull high
CORE_TYPE:Indicates that the processor is
capable of split Northbridge and core voltage
plane operation. If open, the processor requires
a unified core and Northbridge voltage plane.
If shorted to VSS, split core and Northbridge
voltage plan operation is supported.
CPU_M_VREF_SUS
CPU_VDDIO_SUS
CPU_PWRGD
LDT_STOPÂLDT_RST-
CPU_PROCHOT-_1.8_L
CPU_THERMTRIP-_1.8
TEST26
CPU_SVC
CPU_SVD
If the AMD SB-TSI bus is not used,
the SID and ALERT_L pins can be left
unconnected. SIC still would need its
1K-Ω pull up resistor.
CPU_SIC
R863 390-04R863 390-04
1 2
CPU_CORE_TYPE
AMD review :CORE_TYPE signal
need pull high(R864 stuff) ,VID1 signal
doesn't need pull-up(R305 no-stuff)
105-B277xx-00D requestion CORE_TYPE pull high
(R864 stuff) and VID1 pull high(R305 stuff)
R864 300-04-OR864 300-04-O
RS740 stuff
21
C328
C328
0.1u-10VX-04
0.1u-10VX-04
2008.08.12
CPU_M_VREF_SUS
21
C329
C329
1000P-04
1000P-04
Imax >500 mA
21
C327
C327
4.7U-08-X5R
4.7U-08-X5R
Layout: Place within 500
mils of the CPU socket.
CPU_VDDA_RUNVDDA_RUN_OUT
21
C326
C326
.22U-04-X5R
.22U-04-X5R
21
C325
C325
3300P-04
3300P-04
4
R327
R327
15-1
15-1
1 2
R326
R326
15-1
15-1
1 2
A A
FB67 IND-.1u-12FB67 IND-.1u-12
1 2
Inductor 30-300 nH
5
RN37
RN37
1 2
3 4
5 6
7 8
RN38
RN38
1 2
3 4
5 6
7 8
RN39
RN39
1 2
3 4
5 6
7 8
1 2
CPU_VDDIO_SUS
300-8P4R
300-8P4R
300-8P4R
300-8P4R
1K-8P4R
1K-8P4R
1K
3
CPU_VDDIO_SUS
12
R321
R321
4.7K-04
4.7K-04
CPU_VDDIO_SUS
CPU_FETGATE
B
E C
R319 510-04R319 510-04
12
R318 510-04R318 510-04
12
2008.07.21
Q39
Q39
2N3904-S
2N3904-S
105-B277xx-00D:FDV301N
CPU_THERMTRIP-_1.8
CPU_TEST25_H_BYPASSCLK_H
CPU_TEST25_H_BYPASSCLK_L
2
CPU_THERMTRIP- 17
CPU_THERMDC
CPU_THERMDA
Elitegroup Computer Systems
Elitegroup Computer Systems
<OrgAddr1>
<OrgAddr1>
<OrgAddr1>
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
Elitegroup Computer Systems
CPU CONTROL & MISC
CPU CONTROL & MISC
CPU CONTROL & MISC
CPU_THERMDC 25
CPU_THERMDA 25
RS780CM-M5
RS780CM-M5
RS780CM-M5
1
4
4
4
of
35Wednesday, August 27, 2008
of
35Wednesday, August 27, 2008
of
35Wednesday, August 27, 2008
1.0
1.0
1.0
5
4
3
2
1
Processor Power and Ground
CPU_VTT_SUS
21
C562
C562
4.7U-08-X5R-O
4.7U-08-X5R-O
CPU_VDDNB_RUN
AD18
AD19
dhole1
dhole2
dhole3
dhole4
CPU_VTT_SUS
21
C564
C564
4.7U-08-X5R-O
4.7U-08-X5R-O
U21H
U21G
U21G
A4
VDDNB_1
A6
VDDNB_2
B5
VDDNB_3
B7
VDDNB_4
C6
VDDNB_5
C8
VDDNB_6
D7
VDDNB_7
D9
VDDNB_8
E8
VDDNB_9
E10
VDDNB_10
F9
VDDNB_11
F11
VDDNB_12
G10
VDDNB_13
G12
VDDNB_14
H3
NC1
H4
NC2
H20
NC3
H21
NC4
NC6
NC7
AE7
NC8
AE8
NC9
dhole1
dhole2
dhole3
dhole4
ZIF-940P-S
ZIF-940P-S
21
C603
C603
.01U-04-O
.01U-04-O
VSS_171
VSS_172
VSS_173
VSS_174
VSS_175
VSS_176
VSS_177
VSS_178
VSS_179
VSS_180
VSS_181
VSS_182
VSS_183
VSS_184
VSS_185
VSS_186
VSS_187
VSS_188
VSS_189
VSS_190
VSS_191
VSS_192
VSS_193
VSS_194
VSS_195
VSS_196
VSS_197
VSS_198
VSS_199
VSS_200
VSS_201
POWER/GND3
POWER/GND3
VSS_202
VSS_203
VSS_204
VSS_205
VSS_206
VSS_207
VSS_208
VSS_209
VSS_210
VSS_211
VSS_212
VSS_213
VSS_214
AA11
AA13
AA15
AA17
AA19
AA21
AA23
AB2
AB3
AB8
AB10
AB12
AB14
AB16
AB18
AB20
AB22
AC7
AC9
AC11
AC13
AC15
AC17
AC19
AC21
AC23
AD8
AD10
AD12
AD14
AD16
AD20
AD22
AD24
AE4
AE5
AE11
AF2
AF3
AF8
AF10
AF12
AF14
AF16
CPU_VDDNB_RUN
C264
C264
CPU_VDDHT
CPU_VTT_SUS
CPU_VDDIO_SUS
10U-X5-08
10U-X5-08
U21H
AJ1
VLDT_A_1
AJ2
VLDT_A_2
AJ3
VLDT_A_3
AJ4
VLDT_A_4
A12
VTT_1
B12
VTT_2
C12
VTT_3
D12
VTT_4
M24
VDDIO_1
M26
VDDIO_2
M28
VDDIO_3
M30
VDDIO_4
P24
VDDIO_5
P26
VDDIO_6
P28
VDDIO_7
P30
VDDIO_8
T24
VDDIO_9
T26
VDDIO_10
T28
VDDIO_11
T30
VDDIO_12
V25
VDDIO_13
V26
VDDIO_14
V28
VDDIO_15
V30
VDDIO_16
Y24
VDDIO_17
Y26
VDDIO_18
Y28
VDDIO_19
Y29
VDDIO_20
AB24
VDDIO_21
AB26
VDDIO_22
AB28
VDDIO_23
AB30
VDDIO_24
AC24
VDDIO_25
AD26
VDDIO_26
AD28
VDDIO_27
AD30
VDDIO_28
AF30
VDDIO_29
ZIF-940P-S
ZIF-940P-S
VLDT_B_1
VLDT_B_2
VLDT_B_3
VLDT_B_4
VTT_5
VTT_6
VTT_7
VTT_8
VTT_9
VSS_215
VSS_216
VSS_217
VSS_218
VSS_219
VSS_220
VSS_221
VSS_222
VSS_223
VSS_224
VSS_225
VSS_226
VSS_227
VSS_228
POWER/GND4
POWER/GND4
VSS_229
VSS_230
VSS_231
VSS_232
VSS_233
VSS_234
VSS_235
VSS_236
VSS_237
VSS_238
VSS_239
VSS_240
VSS_241
VSS_242
CPU_VDDNB_RUN CPU_VTT_SUS
21
21
21
C309
C263
C263
C309
C271
C271
10U-X5-08
10U-X5-08
4.7U-08-X5R-O
4.7U-08-X5R-O
21
C270
C270
C262
C262
.01U-04
.01U-04
.22U-04-X5R
.22U-04-X5R
.22U-04-X5R-O
.22U-04-X5R-O
H1
H2
H5
H6
CPU_VTT_SUS
AG12
AH12
AJ12
AK12
AL12
AF18
AF20
AF22
AF24
AF26
AF28
AG10
AG11
AH14
AH16
AH18
AH20
AH22
AH24
AH26
AH28
AH30
AK2
AK14
AK16
AK18
AK20
AK22
AK24
AK26
AK28
AK30
AL5
VLDT_HT3_RUN_B
CPU_VTT_SUS
C411
C411
10U-X5-08
10U-X5-08
21
C254
C254
C368
C368
4.7U-08-X5R
4.7U-08-X5R
CPU_VTT_SUS
C337
C337
21
4.7U-08-X5R-O
4.7U-08-X5R-O
21
4.7U-08-X5R
4.7U-08-X5R
21
C561
C561
4.7U-08-X5R
4.7U-08-X5R
CPU_VTT_SUS
21
C338
C338
4.7U-08-X5R
4.7U-08-X5R
21
C339
C339
C330
C330
.22U-04-X5R
.22U-04-X5R
21
21
C342
C342
C565
C565
4.7U-08-X5R
4.7U-08-X5R
4.7U-08-X5R
4.7U-08-X5R
21
21
21
C341
C341
C347
C347
.22U-04-X5R-O
.22U-04-X5R-O
.22U-04-X5R
.22U-04-X5R
.22U-04-X5R
.22U-04-X5R
CPU_VDD_RUN CPU_VDD_RUN
U21E
U21E
B3
VDD_1
C2
VDD_2
C4
D D
C C
B B
VDD_3
D3
VDD_4
D5
VDD_5
E4
VDD_6
E6
VDD_7
F5
VDD_8
F7
VDD_9
G6
VDD_10
G8
VDD_11
H7
VDD_12
H11
VDD_13
H23
VDD_14
J8
VDD_15
J12
VDD_16
J14
VDD_17
J16
VDD_18
J18
VDD_19
J20
VDD_20
J22
VDD_21
J24
VDD_22
K7
VDD_23
K9
VDD_24
K11
VDD_25
K13
VDD_26
K15
VDD_27
K17
VDD_28
K19
VDD_29
K21
VDD_30
K23
VDD_31
L4
VDD_32
L5
VDD_33
L8
VDD_34
L10
VDD_35
L12
VDD_36
L14
VDD_37
L16
VDD_38
L18
VDD_39
L20
VDD_40
L22
VDD_41
M2
VDD_42
M3
VDD_43
M7
VDD_44
M9
VDD_45
M11
VDD_46
M13
VDD_47
M15
VDD_48
M17
VDD_49
M19
VDD_50
M21
VDD_51
M23
VDD_52
N8
VDD_53
N10
VDD_54
N12
VDD_55
N14
VDD_56
N16
VDD_57
N18
VDD_58
N20
VDD_59
N22
VDD_60
P7
VDD_61
P9
VDD_62
P11
VDD_63
P13
VDD_64
P15
VDD_65
P17
VDD_66
P19
VDD_67
P21
VDD_68
P23
VDD_69
R4
VDD_70
R5
VDD_71
R8
VDD_72
R10
VDD_73
R12
VDD_74
R14
VDD_75
R16
VDD_76
R18
VDD_77
R20
VDD_78
R22
VDD_79
T2
VDD_80
T3
VDD_81
T7
VDD_82
T9
VDD_83
T11
VDD_84
T13
VDD_85
A3
VSS_1
A7
VSS_2
A9
VSS_3
A11
VSS_4
B4
VSS_5
B9
VSS_6
B11
VSS_7
B14
VSS_8
B16
VSS_9
B18
VSS_10
B20
VSS_11
B22
VSS_12
B24
VSS_13
B26
VSS_14
B28
VSS_15
B30
VSS_16
C3
VSS_17
D14
VSS_18
D16
VSS_19
D18
VSS_20
D20
VSS_21
D22
VSS_22
D24
VSS_23
D26
VSS_24
D28
VSS_25
D30
VSS_26
E11
VSS_27
F4
VSS_28
F14
VSS_29
F16
VSS_30
F18
VSS_31
F20
VSS_32
F22
VSS_33
F24
VSS_34
F26
VSS_35
F28
VSS_36
F30
VSS_37
G9
VSS_38
G11
VSS_39
H8
VSS_40
H10
VSS_41
H12
VSS_42
H14
VSS_43
H16
VSS_44
H18
VSS_45
H24
VSS_46
H26
VSS_47
H28
VSS_48
H30
VSS_49
J4
VSS_50
POWER/GND1
POWER/GND1
J5
VSS_51
J7
VSS_52
J9
VSS_53
J11
VSS_54
J13
VSS_55
J15
VSS_56
J17
VSS_57
J19
VSS_58
J21
VSS_59
J23
VSS_60
K2
VSS_61
K3
VSS_62
K8
VSS_63
K10
VSS_64
K12
VSS_65
K14
VSS_66
K16
VSS_67
K18
VSS_68
K20
VSS_69
K22
VSS_70
K24
VSS_71
K26
VSS_72
K28
VSS_73
K30
VSS_74
L7
VSS_75
L9
VSS_76
L11
VSS_77
L13
VSS_78
L15
VSS_79
L17
VSS_80
L19
VSS_81
L21
VSS_82
L23
VSS_83
M8
VSS_84
M10
VSS_85
U21F
U21F
T15
VDD_86
T17
VDD_87
T19
VDD_88
T21
VDD_89
T23
VDD_90
U8
VDD_91
U10
VDD_92
U12
VDD_93
U14
VDD_94
U16
VDD_95
U18
VDD_96
U20
VDD_97
U22
VDD_98
V9
VDD_99
V11
VDD_100
V13
VDD_101
V15
VDD_102
V17
VDD_103
V19
VDD_104
V21
VDD_105
V23
VDD_106
W4
VDD_107
W5
VDD_108
W8
VDD_109
W10
VDD_110
W12
VDD_111
W14
VDD_112
W16
VDD_113
W18
VDD_114
W20
VDD_115
W22
VDD_116
Y2
VDD_117
Y3
VDD_118
Y7
VDD_119
Y9
VDD_120
Y11
VDD_121
Y13
VDD_122
Y15
VDD_123
Y17
VDD_124
Y19
VDD_125
Y21
VDD_126
Y23
VDD_127
AA8
VDD_128
AA10
VDD_129
AA12
VDD_130
AA14
VDD_131
AA16
VDD_132
AA18
VDD_133
AA20
VDD_134
AA22
VDD_135
AB7
VDD_136
AB9
VDD_137
AB11
VDD_138
AB13
VDD_139
AB15
VDD_140
AB17
VDD_141
AB19
VDD_142
AB21
VDD_143
AB23
VDD_144
AC4
VDD_145
AC5
VDD_146
AC8
VDD_147
AC10
VDD_148
AC12
VDD_149
AC14
VDD_150
AC16
VDD_151
AC18
VDD_152
AC20
VDD_153
AC22
VDD_154
AD2
VDD_155
AD3
VDD_156
AD7
VDD_157
AD9
VDD_158
AD11
VDD_159
AD23
VDD_160
AE10
VDD_161
AE12
VDD_162
AF7
VDD_163
AF9
VDD_164
AF11
VDD_165
AG4
VDD_166
AG5
VDD_167
AG7
VDD_168
AH2
VDD_169
AH3
VDD_170
M12
VSS_86
M14
VSS_87
M16
VSS_88
M18
VSS_89
M20
VSS_90
M22
VSS_91
N4
VSS_92
N5
VSS_93
N7
VSS_94
N9
VSS_95
N11
VSS_96
N13
VSS_97
N15
VSS_98
N17
VSS_99
N19
VSS_100
N21
VSS_101
N23
VSS_102
P2
VSS_103
P3
VSS_104
P8
VSS_105
P10
VSS_106
P12
VSS_107
P14
VSS_108
P16
VSS_109
P18
VSS_110
P20
VSS_111
P22
VSS_112
R7
VSS_113
R9
VSS_114
R11
VSS_115
R13
VSS_116
R15
VSS_117
R17
VSS_118
R19
VSS_119
R21
VSS_120
R23
VSS_121
T8
VSS_122
T10
VSS_123
T12
VSS_124
T14
VSS_125
T16
VSS_126
T18
VSS_127
T20
VSS_128
T22
VSS_129
U4
VSS_130
U5
VSS_131
U7
VSS_132
U9
VSS_133
U11
VSS_134
U13
POWER/GND2
POWER/GND2
VSS_135
U15
VSS_136
U17
VSS_137
U19
VSS_138
U21
VSS_139
U23
VSS_140
V2
VSS_141
V3
VSS_142
V10
VSS_143
V12
VSS_144
V14
VSS_145
V16
VSS_146
V18
VSS_147
V20
VSS_148
V22
VSS_149
W7
VSS_150
W9
VSS_151
W11
VSS_152
W13
VSS_153
W15
VSS_154
W17
VSS_155
W19
VSS_156
W21
VSS_157
W23
VSS_158
Y8
VSS_159
Y10
VSS_160
Y12
VSS_161
Y14
VSS_162
Y16
VSS_163
Y18
VSS_164
Y20
VSS_165
Y22
VSS_166
AA4
VSS_167
AA5
VSS_168
AA7
VSS_169
AA9
VSS_170
Bottom Side Decoupling
CPU_VDDIO_SUS
21
21
SC73
SC71
SC70
SC70
22uF 22uF 22uF 22uF
CPU_VDD_RUN
SC43
SC43
22uF 22uF 22uF 22uF 22uF 22uF 22uF 22uF 22uF 22uF 22uF
CPU_VDD_RUN
SC48
A A
SC48
CPU_VDDNB_RUN
C311
C311
22uF
SC71
SC77
SC77
10U-X5-08
10U-X5-08
SC67
SC67
10U-X5-08
10U-X5-08
SC52
SC52
10U-X5-08
10U-X5-08
C313
C313
10U-X5-08-O
10U-X5-08-O
SC72
SC72
10U-X5-08
10U-X5-08
10U-X5-08-O
10U-X5-08-O
SC56
SC56
SC61
SC61
10U-X5-08
10U-X5-08
10U-X5-08
10U-X5-08
10U-X5-08
10U-X5-08
SC59
SC59
SC44
10U-X5-08
SC44
10U-X5-08
21
C312
C312
C310
C310
.01U-04
.01U-04
10U-X5-08
10U-X5-08
5
SC73
SC69
SC69
10U-X5-08
10U-X5-08
10U-X5-08
10U-X5-08
SC51
SC51
SC41
SC41
10U-X5-08
10U-X5-08
4.7U-08-X5R
4.7U-08-X5R
SC62
SC62
SC65
10U-X5-08
SC65
10U-X5-08
10U-X5-08
10U-X5-08
CPU_VDD_RUN CPU_VDDIO_SUS CPU_VDD_RUN CPU_VDDNB_RUN
21
SC79 2.2U-06-OSC79 2.2U-06-O
.01U-04-O
.01U-04-O
2 1
SC78 2.2U-06-OSC78 2.2U-06-O
2 1
21
.01U-04
.01U-04
SC76
SC76
SC74
SC74
.01U-04
.01U-04
10U-X5-08-O
10U-X5-08-O
10U-X5-08
10U-X5-08
.22U-04-X5R-O
.22U-04-X5R-O
SC36
SC36
SC66
SC66
10U-X5-08
10U-X5-08
10U-X5-08
10U-X5-08
21
SC54
SC54
SC42
10U-X5-08
SC42
10U-X5-08
4.7U-08-X5R
4.7U-08-X5R
21
SC80
SC80
SC60
SC60
21
SC57
SC57
EMC
CPU_VTT_SUS
21
SC75
SC75
180P-04
180P-04
.22U-04-X5R
.22U-04-X5R
SC68
SC68
10U-X5-08
10U-X5-08
10U-X5-08
10U-X5-08
21
SC55
SC55
4.7U-08-X5R
4.7U-08-X5R
4.7U-08-X5R-O
4.7U-08-X5R-O
C258 2.2U-06-OC258 2.2U-06-O
2 1
21
21
C335
C335
C336
C349
C349
22uF
SC50
SC50
SC34
SC34
C336
.01U-04
.01U-04
.22U-04-X5R
.22U-04-X5R
10U-X5-08-O
10U-X5-08-O
21
21
SC35
SC35
SC32
SC32
10U-X5-08
10U-X5-08
.22U-04-X5R
.22U-04-X5R
.22U-04-X5R
.22U-04-X5R
21
21
21
.01U-04
.01U-04
SC37
.01U-04-O
SC37
.01U-04-O
SC38
SC38
180P-04
180P-04
4
CPU_VDDIO_SUS
C503
C503
CPU_VDDIO_SUS
C476
C476
CPU_VDDHT
21
21
C299
C299
C298
C298
4.7U-08-X5R
4.7U-08-X5R
10-Uf X7R 10-Uf X7R
CPU_VDDIO_SUS
21
21
C475
C475
4.7U-08-X5R-O
4.7U-08-X5R-O
21
21
C513
C513
4.7U-08-X5R
4.7U-08-X5R
VLDT_HT3_RUN
21
C279
C279
C277
C277
4.7U-08-X5R
4.7U-08-X5R
.22U-04-X5R-O
.22U-04-X5R-O
21
C489
C489
180P-04
180P-04
4.7U-08-X5R
4.7U-08-X5R
21
C493
C493
180P-04
180P-04
4.7U-08-X5R-O
4.7U-08-X5R-O
CPU_VDDIO_SUS CPU_VDDIO_SUS
CPU_DBREQ-4
CPU_DBRDY4
CPU_TCK4
CPU_TMS4
CPU_TDI4
CPU_TRST-4
CPU_TDO4
1K-04-O
1K-04-O
1K-04-O
1K-04-O
1K-04-O
1K-04-O
SR27
SR27
SR28
SR28
SR32
SR32
HDT Header
1K-04-O
1K-04-O
SR29
SR29
R879 300-04R879 300-04
105-B277xx-00D:1K-O
HDT Connector
SJ1
SJ1
1
3
5
7
9
11
13
15
17
19
21
23
KEY
KEY
ASP-68200-07-O
ASP-68200-07-O
2
4
6
8
10
12
14
16
18
20
22
24
26
VCC3
R328
R328
4.7K-04-O
4.7K-04-O
CPU_VDDIO_SUS
G
D S
Q42 FDV301N-OQ42 FDV301N-O
R329 0-04-OR329 0-04-O
LDT_RST- 4,16
Use buffered reset
21
21
21
C303
C303
C306
C306
180P-04
180P-04
180P-04-O
.22U-04-X5R
.22U-04-X5R
180P-04-O
3
2
Elitegroup Computer Systems
Elitegroup Computer Systems
Elitegroup Computer Systems
<OrgAddr1>
<OrgAddr1>
<OrgAddr1>
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet
CPU PWR & GND
CPU PWR & GND
CPU PWR & GND
RS780CM-M5
RS780CM-M5
RS780CM-M5
1
5
5
5
of
35Wednesday, August 27, 2008
35Wednesday, August 27, 2008
35Wednesday, August 27, 2008
1.0
1.0
1.0
5
4
3
2
1
VCC3
MEM_MA_ADD[15..0]
MEM_MA_DM[7..0]
MEM_MA_ADD0
MEM_MA_ADD1
MEM_MA_ADD2
MEM_MA_ADD3
MEM_MA_ADD4
MEM_MA_ADD5
MEM_MA_ADD6
MEM_MA_ADD7
MEM_MA_ADD8
MEM_MA_ADD9
MEM_MA_ADD10
MEM_MA_ADD11
MEM_MA_ADD12
MEM_MA_ADD13
MEM_MA_ADD14
MEM_MA_ADD15
MEM_MA_BANK0
MEM_MA_BANK1
MEM_MA_BANK2
MEM_MA_DM0
MEM_MA_DM1
MEM_MA_DM2
MEM_MA_DM3
MEM_MA_DM4
MEM_MA_DM5
MEM_MA_DM6
MEM_MA_DM7
MEM_MA_DM8
MEM_MA_ADD[15..0]3,9
D D
MEM_MA_BANK03,9
MEM_MA_BANK13,9
MEM_MA_BANK23,9
MEM_MA_DM[7..0]3
MEM_MA_DM83
MEM_MA_DQS0_N3
MEM_MA_DQS0_P3
MEM_MA_DQS1_N3
MEM_MA_DQS1_P3
MEM_MA_DQS2_N3
C C
B B
MEM_MA_DQS2_P3
MEM_MA_DQS3_N3
MEM_MA_DQS3_P3
MEM_MA_DQS4_N3
MEM_MA_DQS4_P3
MEM_MA_DQS5_N3
MEM_MA_DQS5_P3
MEM_MA_DQS6_N3
MEM_MA_DQS6_P3
MEM_MA_DQS7_N3
MEM_MA_DQS7_P3
MEM_MA_DQS8_N3
MEM_MA_DQS8_P3
MEM_MA_RAS-3,9
MEM_MA_CAS-3,9
MEM_MA_WE-3,9
MEM_MA0_CS_L03,9
MEM_MA0_CS_L13,9
MEM_MA_CKE03,9
MEM_MA0_ODT03,9
MEM_MA0_CLK0_P3,9
MEM_MA0_CLK0_N3,9
MEM_MA0_CLK1_P3,9
MEM_MA0_CLK1_N3,9
MEM_MA0_CLK2_P3,9
MEM_MA0_CLK2_N3,9
SCLK07,15,17
SDATA07,15,17
SMBus Addressing
DIMM1A
DIMM1A
188
183
63
182
61
60
180
58
179
177
70
57
176
196
174
173
71
190
54
125
134
146
155
202
211
223
232
164
6
7
15
16
27
28
36
37
83
84
92
93
104
105
113
114
45
46
192
74
73
193
76
52
171
195
77
185
186
137
138
220
221
239
240
101
120
119
238
102
55
18
19
68
DDR2-240P-PU
DDR2-240P-PU
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
A13
A14
A15
BA0
BA1
A16/BA2
DQMB0
DQMB1
DQMB2
DQMB3
DQMB4
DQMB5
DQMB6
DQMB7
NC/DQMB8
DQS0
DQS0
DQS1
DQS1
DQS2
DQS2
DQS3
DQS3
DQS4
DQS4
DQS5
DQS5
DQS6
DQS6
DQS7
DQS7
NC/DQS8
NC/DQS8
RAS
CAS
WE
S0
S1
CKE0
CKE1
ODT0
ODT1
CK0
CK0
CK1
CK1
CK2
CK2
SA0
SA1
SA2
SCL
VDDQ=
VDDQ=
SDA
VDDSPD
NC/TEST
RC0
RC1
NC5
NC4
VDD VDDQ VDDID
VDD VDDQ VDDID
3.3V 3.3V OPEN
3.3V 3.3V OPEN
3.3V 2.5V VSS
3.3V 2.5V VSS
2.5V 2.5V OPEN
2.5V 2.5V OPEN
2.5V 1.8V VSS
2.5V 1.8V VSS
1.8V 1.8V OPEN
1.8V 1.8V OPEN
VOLTAGE KEY
VOLTAGE KEY
2.5V 1.8V 3.3V
2.5V 1.8V 3.3V
FRONT VIEW
FRONT VIEW
MEM_MA_DATA0
3
DQ0
MEM_MA_DATA1
4
DQ1
MEM_MA_DATA2
9
DQ2
MEM_MA_DATA3
10
DQ3
MEM_MA_DATA4
122
DQ4
MEM_MA_DATA5
123
DQ5
MEM_MA_DATA6
128
DQ6
MEM_MA_DATA7
129
DQ7
MEM_MA_DATA8
12
DQ8
MEM_MA_DATA9
13
DQ9
MEM_MA_DATA10
21
DQ10
MEM_MA_DATA11
22
DQ11
MEM_MA_DATA12
131
DQ12
MEM_MA_DATA13
132
DQ13
MEM_MA_DATA14
140
DQ14
MEM_MA_DATA15
141
DQ15
MEM_MA_DATA16
24
DQ16
MEM_MA_DATA17
25
DQ17
MEM_MA_DATA18
30
DQ18
MEM_MA_DATA19
31
DQ19
MEM_MA_DATA20
143
DQ20
MEM_MA_DATA21
144
DQ21
MEM_MA_DATA22
149
DQ22
MEM_MA_DATA23
150
DQ23
MEM_MA_DATA24
33
DQ24
MEM_MA_DATA25
34
DQ25
MEM_MA_DATA26
39
DQ26
MEM_MA_DATA27
40
DQ27
MEM_MA_DATA28
152
DQ28
MEM_MA_DATA29
153
DQ29
MEM_MA_DATA30
158
DQ30
MEM_MA_DATA31
159
DQ31
MEM_MA_DATA32
80
DQ32
MEM_MA_DATA33
81
DQ33
MEM_MA_DATA34
86
DQ34
MEM_MA_DATA35
87
DQ35
MEM_MA_DATA36
199
DQ36
MEM_MA_DATA37
200
DQ37
MEM_MA_DATA38
205
DQ38
MEM_MA_DATA39
206
DQ39
MEM_MA_DATA40
89
DQ40
MEM_MA_DATA41
90
DQ41
MEM_MA_DATA42
95
DQ42
MEM_MA_DATA43
96
DQ43
MEM_MA_DATA44
208
DQ44
MEM_MA_DATA45
209
DQ45
MEM_MA_DATA46
214
DQ46
MEM_MA_DATA47
215
DQ47
MEM_MA_DATA48
98
DQ48
MEM_MA_DATA49
99
DQ49
MEM_MA_DATA50
107
DQ50
MEM_MA_DATA51
108
DQ51
MEM_MA_DATA52
217
DQ52
MEM_MA_DATA53
218
DQ53
MEM_MA_DATA54
226
DQ54
MEM_MA_DATA55
227
DQ55
MEM_MA_DATA56
110
DQ56
MEM_MA_DATA57
111
DQ57
MEM_MA_DATA58
116
DQ58
MEM_MA_DATA59
117
DQ59
MEM_MA_DATA60
229
DQ60
DQ61
DQ62
DQ63
CB0
CB1
CB2
CB3
CB4
CB5
CB6
CB7
MEM_MA_DATA61
230
MEM_MA_DATA62
235
MEM_MA_DATA63
236
MEM_MA_CHECK0
42
MEM_MA_CHECK1
43
MEM_MA_CHECK2
48
MEM_MA_CHECK3
49
MEM_MA_CHECK4
161
MEM_MA_CHECK5
162
MEM_MA_CHECK6
167
MEM_MA_CHECK7
168
126
135
147
156
203
212
224
233
165
PIN 93 PIN 144 PIN 145 PIN 184
PIN 93 PIN 144 PIN 145 PIN 184
BACK
BACK
PIN 1 PIN 52 PIN 53 PIN 92
PIN 1 PIN 52 PIN 53 PIN 92
FRONT
FRONT
NC/DQS9
NC/DQS10
NC/DQS11
NC/DQS12
NC/DQS13
NC/DQS14
NC/DQS15
NC/DQS16
NC/DQS17
MEM_MA_DATA[63..0]
MEM_MA_CHECK[7..0]
MEM_MA_DATA[63..0] 3
MEM_MA_CHECK[7..0] 3
SMBus 0
A A
Device 8-bit Address (hex)
DIMMA0
DIMMB0
DIMMA1
DIMMB1
5
A0
A2
A4
A6
Elitegroup Computer Systems
Elitegroup Computer Systems
<OrgAddr1>
<OrgAddr1>
<OrgAddr1>
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
4
3
2
Date: Sheet
Elitegroup Computer Systems
DDR2 DIMM A CHANNEL
DDR2 DIMM A CHANNEL
DDR2 DIMM A CHANNEL
RS780CM-M5
RS780CM-M5
RS780CM-M5
6
6
6
of
35Wednesday, August 27, 2008
of
35Wednesday, August 27, 2008
of
1
35Wednesday, August 27, 2008
1.0
1.0
1.0
5
4
3
2
1
SCLK06,15,17
VCC3
VCC3
MEM_MB_ADD[15..0]
MEM_MB_DM[7..0]
MEM_MB_ADD0
MEM_MB_ADD1
MEM_MB_ADD2
MEM_MB_ADD3
MEM_MB_ADD4
MEM_MB_ADD5
MEM_MB_ADD6
MEM_MB_ADD7
MEM_MB_ADD8
MEM_MB_ADD9
MEM_MB_ADD10
MEM_MB_ADD11
MEM_MB_ADD12
MEM_MB_ADD13
MEM_MB_ADD14
MEM_MB_ADD15
MEM_MB_BANK0
MEM_MB_BANK1
MEM_MB_BANK2
MEM_MB_DM0
MEM_MB_DM1
MEM_MB_DM2
MEM_MB_DM3
MEM_MB_DM4
MEM_MB_DM5
MEM_MB_DM6
MEM_MB_DM7
MEM_MB_DM8
MEM_MB_ADD[15..0]3,9
D D
MEM_MB_BANK03,9
MEM_MB_BANK13,9
MEM_MB_BANK23,9
MEM_MB_DM[7..0]3
MEM_MB_DM83
MEM_MB_DQS0_N3
MEM_MB_DQS0_P3
C C
B B
MEM_MB_DQS1_N3
MEM_MB_DQS1_P3
MEM_MB_DQS2_N3
MEM_MB_DQS2_P3
MEM_MB_DQS3_N3
MEM_MB_DQS3_P3
MEM_MB_DQS4_N3
MEM_MB_DQS4_P3
MEM_MB_DQS5_N3
MEM_MB_DQS5_P3
MEM_MB_DQS6_N3
MEM_MB_DQS6_P3
MEM_MB_DQS7_N3
MEM_MB_DQS7_P3
MEM_MB_DQS8_N3
MEM_MB_DQS8_P3
MEM_MB_RAS-3,9
MEM_MB_CAS-3,9
MEM_MB_WE-3,9
MEM_MB0_CS_L03,9
MEM_MB0_CS_L13,9
MEM_MB_CKE03,9
MEM_MB0_ODT03,9
MEM_MB0_CLK0_P3,9
MEM_MB0_CLK0_N3,9
MEM_MB0_CLK1_P3,9
MEM_MB0_CLK1_N3,9
MEM_MB0_CLK2_P3,9
MEM_MB0_CLK2_N3,9
SDATA06,15,17
DIMM2A
DIMM2A
188
183
63
182
61
60
180
58
179
177
70
57
176
196
174
173
71
190
54
125
134
146
155
202
211
223
232
164
6
7
15
16
27
28
36
37
83
84
92
93
104
105
113
114
45
46
192
74
73
193
76
52
171
195
77
185
186
137
138
220
221
239
240
101
120
119
238
102
55
18
19
68
DDR2-240P-PU
DDR2-240P-PU
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
A13
A14
A15
BA0
BA1
A16/BA2
DQMB0
DQMB1
DQMB2
DQMB3
DQMB4
DQMB5
DQMB6
DQMB7
NC/DQMB8
DQS0
DQS0
DQS1
DQS1
DQS2
DQS2
DQS3
DQS3
DQS4
DQS4
DQS5
DQS5
DQS6
DQS6
DQS7
DQS7
NC/DQS8
NC/DQS8
RAS
CAS
WE
S0
S1
CKE0
CKE1
ODT0
ODT1
CK0
CK0
CK1
CK1
CK2
CK2
SA0
SA1
SA2
SCL
VDDQ=
VDDQ=
SDA
VDDSPD
NC/TEST
RC0
RC1
NC5
NC4
VDD VDDQ VDDID
VDD VDDQ VDDID
3.3V 3.3V OPEN
3.3V 3.3V OPEN
3.3V 2.5V VSS
3.3V 2.5V VSS
2.5V 2.5V OPEN
2.5V 2.5V OPEN
2.5V 1.8V VSS
2.5V 1.8V VSS
1.8V 1.8V OPEN
1.8V 1.8V OPEN
VOLTAGE KEY
VOLTAGE KEY
2.5V 1.8V 3.3V
2.5V 1.8V 3.3V
FRONT VIEW
FRONT VIEW
MEM_MB_DATA0
3
DQ0
MEM_MB_DATA1
4
DQ1
MEM_MB_DATA2
9
DQ2
MEM_MB_DATA3
10
DQ3
MEM_MB_DATA4
122
DQ4
MEM_MB_DATA5
123
DQ5
MEM_MB_DATA6
128
DQ6
MEM_MB_DATA7
129
DQ7
MEM_MB_DATA8
12
DQ8
MEM_MB_DATA9
13
DQ9
MEM_MB_DATA10
21
DQ10
MEM_MB_DATA11
22
DQ11
MEM_MB_DATA12
131
DQ12
MEM_MB_DATA13
132
DQ13
MEM_MB_DATA14
140
DQ14
MEM_MB_DATA15
141
DQ15
MEM_MB_DATA16
24
DQ16
MEM_MB_DATA17
25
DQ17
MEM_MB_DATA18
30
DQ18
MEM_MB_DATA19
31
DQ19
MEM_MB_DATA20
143
DQ20
MEM_MB_DATA21
144
DQ21
MEM_MB_DATA22
149
DQ22
MEM_MB_DATA23
150
DQ23
MEM_MB_DATA24
33
DQ24
MEM_MB_DATA25
34
DQ25
MEM_MB_DATA26
39
DQ26
MEM_MB_DATA27
40
DQ27
MEM_MB_DATA28
152
DQ28
MEM_MB_DATA29
153
DQ29
MEM_MB_DATA30
158
DQ30
MEM_MB_DATA31
159
DQ31
MEM_MB_DATA32
80
DQ32
MEM_MB_DATA33
81
DQ33
MEM_MB_DATA34
86
DQ34
MEM_MB_DATA35
87
DQ35
MEM_MB_DATA36
199
DQ36
MEM_MB_DATA37
200
DQ37
MEM_MB_DATA38
205
DQ38
MEM_MB_DATA39
206
DQ39
MEM_MB_DATA40
89
DQ40
MEM_MB_DATA41
90
DQ41
MEM_MB_DATA42
95
DQ42
MEM_MB_DATA43
96
DQ43
MEM_MB_DATA44
208
DQ44
MEM_MB_DATA45
209
DQ45
MEM_MB_DATA46
214
DQ46
MEM_MB_DATA47
215
DQ47
MEM_MB_DATA48
98
DQ48
MEM_MB_DATA49
99
DQ49
MEM_MB_DATA50
107
DQ50
MEM_MB_DATA51
108
DQ51
MEM_MB_DATA52
217
DQ52
MEM_MB_DATA53
218
DQ53
MEM_MB_DATA54
226
DQ54
MEM_MB_DATA55
227
DQ55
MEM_MB_DATA56
110
DQ56
MEM_MB_DATA57
111
DQ57
MEM_MB_DATA58
116
DQ58
MEM_MB_DATA59
117
DQ59
MEM_MB_DATA60
229
DQ60
DQ61
DQ62
DQ63
CB0
CB1
CB2
CB3
CB4
CB5
CB6
CB7
MEM_MB_DATA61
230
MEM_MB_DATA62
235
MEM_MB_DATA63
236
MEM_MB_CHECK0
42
MEM_MB_CHECK1
43
MEM_MB_CHECK2
48
MEM_MB_CHECK3
49
MEM_MB_CHECK4
161
MEM_MB_CHECK5
162
MEM_MB_CHECK6
167
MEM_MB_CHECK7
168
126
135
147
156
203
212
224
233
165
PIN 93 PIN 144 PIN 145 PIN 184
PIN 93 PIN 144 PIN 145 PIN 184
BACK
BACK
PIN 1 PIN 52 PIN 53 PIN 92
PIN 1 PIN 52 PIN 53 PIN 92
FRONT
FRONT
NC/DQS9
NC/DQS10
NC/DQS11
NC/DQS12
NC/DQS13
NC/DQS14
NC/DQS15
NC/DQS16
NC/DQS17
MEM_MB_DATA[63..0]
MEM_MB_DATA[63..0] 3
MEM_MB_CHECK[7..0] 3
A A
Elitegroup Computer Systems
Elitegroup Computer Systems
<OrgAddr1>
<OrgAddr1>
<OrgAddr1>
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
Elitegroup Computer Systems
DDR2 DIMM B CHANNEL
DDR2 DIMM B CHANNEL
DDR2 DIMM B CHANNEL
RS780CM-M5
RS780CM-M5
RS780CM-M5
7
7
7
of
35Wednesday, August 27, 2008
of
35Wednesday, August 27, 2008
of
1
35Wednesday, August 27, 2008
1.0
1.0
1.0
5
D D
4
3
2
1
DIMM1B
DIMM1B
2
VSS1
5
VSS2
8
VSS3
11
VSS4
14
VSS5
17
VSS6
20
VSS7
23
VSS8
26
VSS9
29
VSS10
32
VSS11
35
VSS12
38
VSS13
41
VSS14
44
VSS15
47
VSS16
50
VSS17
65
VSS18
66
VSS19
79
VSS20
82
VSS21
85
C C
B B
88
91
94
97
100
103
106
109
112
115
118
121
124
127
130
133
136
139
142
145
148
151
154
157
160
163
DDR2-240P-PU
DDR2-240P-PU
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VCC32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
CPU_VDDIO_SUS CPU_VDDIO_SUS
181
VDDQ1
62
VDDQ2
191
VDDQ3
72
VDDQ4
194
VDDQ5
75
VDDQ6
78
VDDQ7
170
VDDQ8
51
VDDQ9
175
VDDQ10
56
VDDQ11
53
VDD1
59
VDD2
64
VDD3
67
VDD4
69
VDD5
172
VDD6
178
VDD7
184
VDD8
187
VDD9
189
VDD10
197
VDD11
VREF
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
1
166
169
198
201
204
207
210
213
216
219
222
225
228
231
234
237
MEM_VREF_SUS MEM_VREF_SUS
DIMM2B
DIMM2B
2
5
8
11
14
17
20
23
26
29
32
35
38
41
44
47
50
65
66
79
82
85
88
91
94
97
100
103
106
109
112
115
118
121
124
127
130
133
136
139
142
145
148
151
154
157
160
163
DDR2-240P-PU
DDR2-240P-PU
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VCC32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9
VDDQ10
VDDQ11
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VDD10
VDD11
VREF
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
181
62
191
72
194
75
78
170
51
175
56
53
59
64
67
69
172
178
184
187
189
197
1
166
169
198
201
204
207
210
213
216
219
222
225
228
231
234
237
MEM_VREF_SUS
CPU_VDDIO_SUS MEM_VREF_SUS
R416
R416
15-1
15-1
1 2
A A
5
4
R411
R411
15-1
15-1
1 2
21
C537
C537
0.1U-10VX-04
0.1U-10VX-04
21
C540
C540
1000P-04
1000P-04
Layout: Place within 500
mils of the DIMMB1 socket.
Layout: Route these sense traces
as close to pin1 as possible.
3
Elitegroup Computer Systems
Elitegroup Computer Systems
<OrgAddr1>
<OrgAddr1>
<OrgAddr1>
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
2
Date: Sheet
Elitegroup Computer Systems
DDR2 DIMM POWER
DDR2 DIMM POWER
DDR2 DIMM POWER
RS780CM-M5
RS780CM-M5
RS780CM-M5
8
8
8
of
35Wednesday, August 27, 2008
of
35Wednesday, August 27, 2008
of
1
35Wednesday, August 27, 2008
1.0
1.0
1.0
5
4
3
2
1
CPU_VTT_SUS
D D
C C
B B
MEM_MA_ADD83,6
MEM_MA_ADD63,6
MEM_MA_ADD53,6
MEM_MA_ADD43,6
MEM_MA_BANK23,6
MEM_MA_ADD143,6
MEM_MA_ADD153,6
MEM_MA_CKE03,6
MEM_MA_ADD23,6
MEM_MA_ADD13,6
MEM_MB_ADD33,7
MEM_MA_ADD33,6
MEM_MB_BANK13,7
MEM_MB_ADD03,7
MEM_MB_ADD23,7
MEM_MB_ADD13,7
MEM_MA0_CS_L13,6
MEM_MA_ADD133,6
MEM_MB0_CS_L13,7
MEM_MB_ADD133,7
MEM_MA_ADD03,6
MEM_MA_ADD103,6
MEM_MA_BANK13,6
MEM_MA_BANK03,6
MEM_MA_CAS-3,6
MEM_MA_WE-3,6
MEM_MA0_CS_L03,6
MEM_MA_RAS-3,6
MEM_MA_ADD8
MEM_MA_ADD6
MEM_MA_ADD5
MEM_MA_ADD4
MEM_MA_BANK2
MEM_MA_ADD14
MEM_MA_ADD15
MEM_MA_CKE0
MEM_MA_ADD2
MEM_MA_ADD1
MEM_MB_ADD3
MEM_MA_ADD3
MEM_MB_BANK1
MEM_MB_ADD0
MEM_MB_ADD2
MEM_MB_ADD1
MEM_MA0_CS_L1
MEM_MA_ADD13
MEM_MB0_CS_L1
MEM_MB_ADD13
MEM_MA_ADD15
MEM_MA_ADD14
MEM_MA_ADD13
MEM_MA_ADD12
MEM_MA_ADD11
MEM_MA_ADD10
MEM_MA_ADD9
MEM_MA_ADD8
MEM_MA_ADD7
MEM_MA_ADD6
MEM_MA_ADD5
MEM_MA_ADD4
MEM_MA_ADD3
MEM_MA_ADD2
MEM_MA_ADD1
MEM_MA_ADD0
MEM_MA_BANK2
MEM_MA_BANK1
MEM_MA_BANK0
MEM_MA_CASÂMEM_MA_WEÂMEM_MA_RAS-
RN15 47-8P4RRN15 47-8P4R
7 8
5 6
3 4
1 2
RN17 47-8P4RRN17 47-8P4R
7 8
5 6
3 4
1 2
RN13 47-8P4RRN13 47-8P4R
7 8
5 6
3 4
1 2
RN16 47-8P4RRN16 47-8P4R
7 8
5 6
3 4
1 2
RN19 47-8P4RRN19 47-8P4R
7 8
5 6
3 4
1 2
RN21 47-8P4RRN21 47-8P4R
7 8
5 6
3 4
1 2
RN20 47-8P4RRN20 47-8P4R
7 8
5 6
3 4
1 2
CPU_VDDIO_SUS CPU_VDDIO_SUS
C486 22P-04C486 22P-04
C474 22P-04C474 22P-04
C487 22P-04C487 22P-04
C484 22P-04C484 22P-04
C471 22P-04C471 22P-04
C478 22P-04C478 22P-04
C483 22P-04C483 22P-04
C482 22P-04C482 22P-04
C470 22P-04C470 22P-04
C481 22P-04C481 22P-04
C469 22P-04C469 22P-04
C468 22P-04C468 22P-04
C480 22P-04C480 22P-04
C473 22P-04C473 22P-04
C485 22P-04C485 22P-04
C488 22P-04C488 22P-04
C472 22P-04C472 22P-04
C466 22P-04C466 22P-04
C477 22P-04C477 22P-04
C467 22P-04C467 22P-04
C479 22P-04C479 22P-04
C465 22P-04C465 22P-04
C588 0.1u-10VX-04C588 0.1u-10VX-04
C614 0.1u-10VX-04C614 0.1u-10VX-04
C567 0.1U-10VX-04C567 0.1U-10VX-04
C615 0.1u-10VX-04C615 0.1u-10VX-04
C579 0.1u-10VX-04-OC579 0.1u-10VX-04-O C589 .1u-04-OC589 .1u-04-O
C598 0.1u-10VX-04C598 0.1u-10VX-04
C584 0.1U-10VX-04-OC584 0.1U-10VX-04-O
C600 .1u-04-OC600 .1u-04-O
C582 0.1U-10VX-04C582 0.1U-10VX-04
C602 0.1u-10VX-04C602 0.1u-10VX-04
C563 .1u-04-OC563 .1u-04-O
C608 0.1u-10VX-04C608 0.1u-10VX-04
C566 .1u-04-OC566 .1u-04-O
C601 .1u-04-OC601 .1u-04-O
C591 .1u-04-OC591 .1u-04-O
C612 0.1u-10VX-04C612 0.1u-10VX-04
CPU_VDDIO_SUS
CPU_VDDIO_SUS
CPU_VDDIO_SUS
CPU_VDDIO_SUS
CPU_VDDIO_SUS
CPU_VDDIO_SUS
CPU_VDDIO_SUS
CPU_VDDIO_SUS
2008.07.14
MEM_MA_ADD123,6
MEM_MA_ADD93,6
MEM_MA_ADD113,6
MEM_MA_ADD73,6
MEM_MB_ADD73,7
MEM_MB_ADD113,7
MEM_MB_ADD93,7
MEM_MB_ADD123,7
MEM_MB_ADD43,7
MEM_MB_ADD53,7
MEM_MB_ADD63,7
MEM_MB_ADD83,7
MEM_MB0_CS_L03,7
MEM_MB_RAS-3,7
MEM_MB_BANK03,7
MEM_MB_ADD103,7
MEM_MB_BANK23,7
MEM_MB_ADD143,7
MEM_MB_ADD153,7
MEM_MB_CKE03,7
MEM_MA0_ODT03,6
MEM_MB0_ODT03,7
MEM_MB_CAS-3,7
MEM_MB_WE-3,7
MEM_MA_ADD12
MEM_MA_ADD9
MEM_MA_ADD11
MEM_MA_ADD7
MEM_MB_ADD7
MEM_MB_ADD11
MEM_MB_ADD9
MEM_MB_ADD12
MEM_MB_ADD4
MEM_MB_ADD5
MEM_MB_ADD6
MEM_MB_ADD8
MEM_MB0_CS_L0
MEM_MB_RASÂMEM_MB_BANK0
MEM_MB_ADD10
MEM_MB_ADD15
MEM_MB_ADD14
MEM_MB_ADD13
MEM_MB_ADD12
MEM_MB_ADD11
MEM_MB_ADD10
MEM_MB_ADD9
MEM_MB_ADD8
MEM_MB_ADD7
MEM_MB_ADD6
MEM_MB_ADD5
MEM_MB_ADD4
MEM_MB_ADD3
MEM_MB_ADD2
MEM_MB_ADD1
MEM_MB_ADD0
MEM_MB_BANK2
MEM_MB_BANK1
MEM_MB_BANK0
MEM_MB_CASÂMEM_MB_WEÂMEM_MB_RAS-
RN10 47-8P4RRN10 47-8P4R
RN18 47-8P4RRN18 47-8P4R
RN14 47-8P4RRN14 47-8P4R
RN12 47-8P4RRN12 47-8P4R
RN23 47-8P4RRN23 47-8P4R
RN11 47-8P4RRN11 47-8P4R
C514 22P-04C514 22P-04
C502 22P-04C502 22P-04
C500 22P-04C500 22P-04
C512 22P-04C512 22P-04
C497 22P-04C497 22P-04
C491 22P-04C491 22P-04
C511 22P-04C511 22P-04
C510 22P-04C510 22P-04
C496 22P-04C496 22P-04
C509 22P-04C509 22P-04
C495 22P-04C495 22P-04
C494 22P-04C494 22P-04
C508 22P-04C508 22P-04
C499 22P-04C499 22P-04
C507 22P-04C507 22P-04
C501 22P-04C501 22P-04
C498 22P-04C498 22P-04
C505 22P-04C505 22P-04
C490 22P-04C490 22P-04
C492 22P-04C492 22P-04
C506 22P-04C506 22P-04
C504 22P-04C504 22P-04
7 8
5 6
3 4
1 2
7 8
5 6
3 4
1 2
7 8
5 6
3 4
1 2
7 8
5 6
3 4
1 2
7 8
5 6
3 4
1 2
7 8
5 6
3 4
1 2
CPU_VTT_SUS
C586 0.1u-10VX-04C586 0.1u-10VX-04
C617 .1u-04-OC617 .1u-04-O
C587 .1u-04-OC587 .1u-04-O
C610 .1u-04-OC610 .1u-04-O
C613 .1u-04-OC613 .1u-04-O
C585 .1u-04-OC585 .1u-04-O
C604 .1u-04-OC604 .1u-04-O
C592 .1u-04-OC592 .1u-04-O
C609 .1u-04-OC609 .1u-04-O
C590 0.1u-10VX-04C590 0.1u-10VX-04
C595 0.1u-10VX-04C595 0.1u-10VX-04
C568 .1u-04-OC568 .1u-04-O
C606 .1u-04-OC606 .1u-04-O
C594 0.1u-10VX-04C594 0.1u-10VX-04
C596 .1u-04-OC596 .1u-04-O
CPU_VDDIO_SUS
CPU_VDDIO_SUS
CPU_VDDIO_SUS
CPU_VDDIO_SUS
CPU_VDDIO_SUS
CPU_VDDIO_SUS
CPU_VDDIO_SUS
CPU_VDDIO_SUS
MEM_MA0_CLK2_P3,6
C424
C424
1.5P-04
C616 .1u-04-OC616 .1u-04-O
A A
C618 .1u-04-OC618 .1u-04-O
C559 .1u-04-OC559 .1u-04-O
C619 .1u-04-OC619 .1u-04-O
C560 .1u-04-OC560 .1u-04-O
CPU_VDDIO_SUS CPU_VDDIO_SUS
C655 .1u-04-OC655 .1u-04-O
C658 .1u-04-OC658 .1u-04-O
C657 .1u-04-OC657 .1u-04-O
C656 .1u-04-OC656 .1u-04-O
SC138 .1u-04-OSC138 .1u-04-O
MEM_MA0_CLK2_N3,6
MEM_MA0_CLK1_P3,6
MEM_MA0_CLK1_N3,6
MEM_MA0_CLK0_P3,6
EMI decoupling cap, place evenly around CPU_VDDIO_SUS
MEM_MA0_CLK0_N3,6
5
4
3
1.5P-04
C410
C410
1.5P-04
1.5P-04
C461
C461
1.5P-04
1.5P-04
MEM_MB0_CLK2_P3,7
C433
C433
1.5P-04
MEM_MB0_CLK2_N3,7
MEM_MB0_CLK1_P3,7
MEM_MB0_CLK1_N3,7
MEM_MB0_CLK0_P3,7
MEM_MB0_CLK0_N3,7
1.5P-04
C435
C435
1.5P-04
1.5P-04
Elitegroup Computer Systems
Elitegroup Computer Systems
<OrgAddr1>
<OrgAddr1>
<OrgAddr1>
Title
Title
C458
C458
1.5P-04
1.5P-04
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
Elitegroup Computer Systems
DDR2 DIMM TERMINATIONS
DDR2 DIMM TERMINATIONS
DDR2 DIMM TERMINATIONS
RS780CM-M5
RS780CM-M5
RS780CM-M5
9
9
9
of
of
1
of
1.0
1.0
1.0
35Wednesday, August 27, 2008
35Wednesday, August 27, 2008
35Wednesday, August 27, 2008
5
D D
C C
RS740:1.2V
NB_VCC
CPU_VDDHT
4
HT_CADOUT0_P3
HT_CADOUT0_N3
HT_CADOUT1_P3
HT_CADOUT1_N3
HT_CADOUT2_P3
HT_CADOUT2_N3
HT_CADOUT3_P3
HT_CADOUT3_N3
HT_CADOUT4_P3
HT_CADOUT4_N3
HT_CADOUT5_P3
HT_CADOUT5_N3
HT_CADOUT6_P3
HT_CADOUT6_N3
HT_CADOUT7_P3
HT_CADOUT7_N3
HT_CADOUT8_P3
HT_CADOUT8_N3
HT_CADOUT9_P3
HT_CADOUT9_N3
HT_CADOUT10_P3
HT_CADOUT10_N3
HT_CADOUT11_P3
HT_CADOUT11_N3
HT_CADOUT12_P3
HT_CADOUT12_N3
HT_CADOUT13_P3
HT_CADOUT13_N3
HT_CADOUT14_P3
HT_CADOUT14_N3
HT_CADOUT15_P3
HT_CADOUT15_N3
HT_CLKOUT0_P3
HT_CLKOUT0_N3
HT_CLKOUT1_P3
HT_CLKOUT1_N3
HT_CTLOUT0_P3
HT_CTLOUT0_N3
HT_CTLOUT1_P3
HT_CTLOUT1_N3
R251 300-1-04R251 300-1-04
1 2
R233 49.9-1-04-OR233 49.9-1-04-O
1 2
R232 49.9-1-04-OR232 49.9-1-04-O
1 2
RS780
RS740
RS740
3
U19A
U19A
Y25
HT_RXCAD0P
Y24
V22
V23
V25
V24
U24
U25
T25
T24
P22
P23
P25
P24
N24
N25
AC24
AC25
AB25
AB24
AA24
AA25
Y22
Y23
W21
W20
V21
V20
U20
U21
U19
U18
T22
T23
AB23
AA22
M22
M23
R21
R20
HT_RXCALP HT_TXCALP
C23
HT_RXCALN
A24
RS780
RS780
HT_RXCAD0N
HT_RXCAD1P
HT_RXCAD1N
HT_RXCAD2P
HT_RXCAD2N
HT_RXCAD3P
HT_RXCAD3N
HT_RXCAD4P
HT_RXCAD4N
HT_RXCAD5P
HT_RXCAD5N
HT_RXCAD6P
HT_RXCAD6N
HT_RXCAD7P
HT_RXCAD7N
HT_RXCAD8P
HT_RXCAD8N
HT_RXCAD9P
HT_RXCAD9N
HT_RXCAD10P
HT_RXCAD10N
HT_RXCAD11P
HT_RXCAD11N
HT_RXCAD12P
HT_RXCAD12N
HT_RXCAD13P
HT_RXCAD13N
HT_RXCAD14P
HT_RXCAD14N
HT_RXCAD15P
HT_RXCAD15N
HT_RXCLK0P
HT_RXCLK0N
HT_RXCLK1P
HT_RXCLK1N
HT_RXCTL0P
HT_RXCTL0N
HT_RXCTL1P
HT_RXCTL1N
HT_RXCALP
HT_RXCALN
PART 1 OF 6
PART 1 OF 6
HT_TXCAD0P
HT_TXCAD0N
HT_TXCAD1P
HT_TXCAD1N
HT_TXCAD2P
HT_TXCAD2N
HT_TXCAD3P
HT_TXCAD3N
HT_TXCAD4P
HT_TXCAD4N
HT_TXCAD5P
HT_TXCAD5N
HT_TXCAD6P
HT_TXCAD6N
HT_TXCAD7P
HT_TXCAD7N
HT_TXCAD8P
HT_TXCAD8N
HT_TXCAD9P
HT_TXCAD9N
HT_TXCAD10P
HT_TXCAD10N
HT_TXCAD11P
HT_TXCAD11N
HT_TXCAD12P
HT_TXCAD12N
HT_TXCAD13P
HT_TXCAD13N
HT_TXCAD14P
HT_TXCAD14N
HT_TXCAD15P
HT_TXCAD15N
HT_TXCLK0P
HT_TXCLK0N
HYPER TRANSPORT CPU I/F
HYPER TRANSPORT CPU I/F
HT_TXCLK1P
HT_TXCLK1N
HT_TXCTL0P
HT_TXCTL0N
HT_TXCTL1P
HT_TXCTL1N
HT_TXCALP
HT_TXCALN
D24
D25
E24
E25
F24
F25
F23
F22
H23
H22
J25
J24
K24
K25
K23
K22
F21
G21
G20
H21
J20
J21
J18
K17
L19
J19
M19
L18
M21
P21
P18
M18
H24
H25
L21
L20
M24
M25
P19
R18
B24
B25
HT_TXCALN
HT_CADIN0_P 3
HT_CADIN0_N 3
HT_CADIN1_P 3
HT_CADIN1_N 3
HT_CADIN2_P 3
HT_CADIN2_N 3
HT_CADIN3_P 3
HT_CADIN3_N 3
HT_CADIN4_P 3
HT_CADIN4_N 3
HT_CADIN5_P 3
HT_CADIN5_N 3
HT_CADIN6_P 3
HT_CADIN6_N 3
HT_CADIN7_P 3
HT_CADIN7_N 3
HT_CADIN8_P 3
HT_CADIN8_N 3
HT_CADIN9_P 3
HT_CADIN9_N 3
HT_CADIN10_P 3
HT_CADIN10_N 3
HT_CADIN11_P 3
HT_CADIN11_N 3
HT_CADIN12_P 3
HT_CADIN12_N 3
HT_CADIN13_P 3
HT_CADIN13_N 3
HT_CADIN14_P 3
HT_CADIN14_N 3
HT_CADIN15_P 3
HT_CADIN15_N 3
HT_CLKIN0_P 3
HT_CLKIN0_N 3
HT_CLKIN1_P 3
HT_CLKIN1_N 3
HT_CTLIN0_P 3
HT_CTLIN0_N 3
HT_CTLIN1_P 3
1 2
HT_CTLIN1_N 3
R239 300-1-04R239 300-1-04
RS740:100ohm
RS780:301ohm
2
1
B B
RX780/RS740/RS780 difference table (HT LINK)
1.21K
1.21K100R
RS780
301R
301R
Elitegroup Computer Systems
Elitegroup Computer Systems
<OrgAddr1>
<OrgAddr1>
<OrgAddr1>
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
3
2
Date: Sheet
Elitegroup Computer Systems
RS740/RS780-HT LINK I/F
RS740/RS780-HT LINK I/F
RS740/RS780-HT LINK I/F
RS780CM-M5
RS780CM-M5
RS780CM-M5
1
10
10
10
of
35Wednesday, August 27, 2008
of
35Wednesday, August 27, 2008
of
35Wednesday, August 27, 2008
1.0
1.0
1.0
SIGNALS
HT_RXCALP
HT_RXCALN
HT_TXCALP
HT_TXCALN
A A
5
RS740 RX780
49.9R (GND)
49.9R (VDDHT)
4
5
GFX_RX0P22
GFX_RX0N22
GFX_RX1P22
GFX_RX1N22
GFX_RX2P22
GFX_RX2N22
GFX_RX3P22
GFX_RX3N22
GFX_RX4P22
D D
C C
GFX_RX4N22
GFX_RX5P22
GFX_RX5N22
GFX_RX6P22
GFX_RX6N22
GFX_RX7P22
GFX_RX7N22
GFX_RX8P22
GFX_RX8N22
GFX_RX9P22
GFX_RX9N22
GFX_RX10P22
GFX_RX10N22
GFX_RX11P22
GFX_RX11N22
GFX_RX12P22
GFX_RX12N22
GFX_RX13P22
GFX_RX13N22
GFX_RX14P22
GFX_RX14N22
GFX_RX15P22
GFX_RX15N22
GPP_RX0P22
GPP_RX0N22
GPP_RX3P27
GPP_RX3N27
RS740 NC RS740 NC
A_RX0P16
A_RX0N16
A_RX1P16
A_RX1N16
A_RX2P16
A_RX2N16
A_RX3P16
A_RX3N16
4
U19B
U19B
AE3
AD4
AE2
AD3
AD1
AD2
AA8
AA7
AA5
AA6
G5
G6
M8
M7
M5
W6
W5
D4
C4
A3
B3
C2
C1
E5
F5
H5
H6
J6
J5
J7
J8
L5
L6
L8
P7
P5
R8
P8
R6
R5
P4
P3
T4
T3
V5
U5
U6
U8
U7
Y8
Y7
Y5
GFX_RX0P
GFX_RX0N
GFX_RX1P
GFX_RX1N
GFX_RX2P
GFX_RX2N
GFX_RX3P
GFX_RX3N
GFX_RX4P
GFX_RX4N
GFX_RX5P
GFX_RX5N
GFX_RX6P
GFX_RX6N
GFX_RX7P
GFX_RX7N
GFX_RX8P
GFX_RX8N
GFX_RX9P
GFX_RX9N
GFX_RX10P
GFX_RX10N
GFX_RX11P
GFX_RX11N
GFX_RX12P
GFX_RX12N
GFX_RX13P
GFX_RX13N
GFX_RX14P
GFX_RX14N
GFX_RX15P
GFX_RX15N
GPP_RX0P
GPP_RX0N
GPP_RX1P
GPP_RX1N
GPP_RX2P
GPP_RX2N
GPP_RX3P
GPP_RX3N
GPP_RX4P
GPP_RX4N
GPP_RX5P
GPP_RX5N
SB_RX0P
SB_RX0N
SB_RX1P
SB_RX1N
SB_RX2P
SB_RX2N
SB_RX3P
SB_RX3N
RS780
RS780
PART 2 OF 6
PART 2 OF 6
PCIE I/F GFX
PCIE I/F GFX
PCIE I/F GPP
PCIE I/F GPP
PCIE I/F SB
PCIE I/F SB
PCE_CALRP(PCE_BCALRP)
PCE_CALRN(PCE_BCALRN)
GFX_TX0P
GFX_TX0N
GFX_TX1P
GFX_TX1N
GFX_TX2P
GFX_TX2N
GFX_TX3P
GFX_TX3N
GFX_TX4P
GFX_TX4N
GFX_TX5P
GFX_TX5N
GFX_TX6P
GFX_TX6N
GFX_TX7P
GFX_TX7N
GFX_TX8P
GFX_TX8N
GFX_TX9P
GFX_TX9N
GFX_TX10P
GFX_TX10N
GFX_TX11P
GFX_TX11N
GFX_TX12P
GFX_TX12N
GFX_TX13P
GFX_TX13N
GFX_TX14P
GFX_TX14N
GFX_TX15P
GFX_TX15N
GPP_TX0P
GPP_TX0N
GPP_TX1P
GPP_TX1N
GPP_TX2P
GPP_TX2N
GPP_TX3P
GPP_TX3N
GPP_TX4P
GPP_TX4N
GPP_TX5P
GPP_TX5N
SB_TX0P
SB_TX0N
SB_TX1P
SB_TX1N
SB_TX2P
SB_TX2N
SB_TX3P
SB_TX3N
A5
B5
A4
B4
C3
B2
D1
D2
E2
E1
F4
F3
F1
F2
H4
H3
H1
H2
J2
J1
K4
K3
K1
K2
M4
M3
M1
M2
N2
N1
P1
P2
AC1
AC2
AB4
AB3
AA2
AA1
Y1
Y2
Y4
Y3
V1
V2
AD7
AE7
AE6
AD6
AB6
AC6
AD5
AE5
AC8
AB8
3
GFX_TX0P_CGFX_TX0P_C
GFX_TX0N_CGFX_TX0N_C
GFX_TX1P_CGFX_TX1P_C
GFX_TX1N_C
GFX_TX2P_CGFX_TX2P_C
GFX_TX2N_CGFX_TX2N_C
GFX_TX3P_CGFX_TX3P_C
GFX_TX3N_CGFX_TX3N_C
GFX_TX4P_CGFX_TX4P_C
GFX_TX4N_CGFX_TX4N_C
GFX_TX5P_CGFX_TX5P_C
GFX_TX5N_CGFX_TX5N_C
GFX_TX6P_CGFX_TX6P_C
GFX_TX6N_CGFX_TX6N_C
GFX_TX7P_CGFX_TX7P_C
GFX_TX7N_CGFX_TX7N_C
GFX_TX8P_CGFX_TX8P_C
GFX_TX8N_CGFX_TX8N_C
GFX_TX9P_C
GFX_TX9N_C
GFX_TX10P_C
GFX_TX10N_C
GFX_TX11P_C
GFX_TX11N_C
GFX_TX12P_C
GFX_TX12N_C
GFX_TX13P_C
GFX_TX13N_C
GFX_TX14P_C
GFX_TX14N_C
GFX_TX15P_C
GFX_TX15N_C
GPP_TX0P_C
GPP_TX0N_C
GPP_TX3P_C
GPP_TX3N_C
A_TX0P_CA_TX0P_C
A_TX0N_CA_TX0N_C
A_TX1P_CA_TX1P_C
A_TX1N_CA_TX1N_C
A_TX2P_C
A_TX2N_C
A_TX3P_C
A_TX3N_C
C180 .1U-04C180 .1U-04
2 1
C177 .1U-04C177 .1U-04
2 1
C182 .1U-04C182 .1U-04
2 1
C186 .1U-04C186 .1U-04
2 1
C193 .1U-04C193 .1U-04
2 1
C191 .1U-04C191 .1U-04
2 1
C197 .1U-04C197 .1U-04
2 1
C205 .1U-04C205 .1U-04
2 1
C210 .1U-04C210 .1U-04
2 1
C215 .1U-04C215 .1U-04
2 1
C228 .1U-04C228 .1U-04
2 1
C227 .1U-04C227 .1U-04
2 1
C248 .1U-04C248 .1U-04
2 1
C256 .1U-04C256 .1U-04
2 1
C257 .1U-04C257 .1U-04
2 1
C259 .1U-04C259 .1U-04
2 1
C260 .1U-04C260 .1U-04
2 1
C261 .1U-04C261 .1U-04
2 1
C300 .1U-04C300 .1U-04
2 1
C301 .1U-04C301 .1U-04
2 1
C318 .1U-04C318 .1U-04
2 1
C319 .1U-04C319 .1U-04
2 1
C333 .1U-04C333 .1U-04
2 1
C334 .1U-04C334 .1U-04
2 1
C343 .1U-04C343 .1U-04
2 1
C346 .1U-04C346 .1U-04
2 1
C350 .1U-04C350 .1U-04
2 1
C356 .1U-04C356 .1U-04
2 1
C362 .1U-04C362 .1U-04
2 1
C363 .1U-04C363 .1U-04
2 1
C415 .1U-04C415 .1U-04
2 1
C418 .1U-04C418 .1U-04
2 1
C176 .1U-04C176 .1U-04
2 1
C175 .1U-04C175 .1U-04
2 1
C355 .1U-04C355 .1U-04
2 1
C354 .1U-04C354 .1U-04
2 1
C359 .1U-04C359 .1U-04
2 1
C360 .1U-04C360 .1U-04
2 1
C364 .1U-04C364 .1U-04
2 1
C365 .1U-04C365 .1U-04
2 1
SC64 .1U-04SC64 .1U-04
2 1
SC63 .1U-04SC63 .1U-04
2 1
C357 .1U-04C357 .1U-04
2 1
C358 .1U-04C358 .1U-04
2 1
R330 1.27K-1-04R330 1.27K-1-04
R332 2K-1-04R332 2K-1-04
R330 value:
RS740 is 562ohm
RS780 is 1.27K
12
12
2
GFX_TX0P 22
GFX_TX0N 22
GFX_TX1P 22
GFX_TX1N 22
GFX_TX2P 22
GFX_TX2N 22
GFX_TX3P 22
GFX_TX3N 22
GFX_TX4P 22
GFX_TX4N 22
GFX_TX5P 22
GFX_TX5N 22
GFX_TX6P 22
GFX_TX6N 22
GFX_TX7P 22
GFX_TX7N 22
GFX_TX8P 22
GFX_TX8N 22
GFX_TX9P 22
GFX_TX9N 22
GFX_TX10P 22
GFX_TX10N 22
GFX_TX11P 22
GFX_TX11N 22
GFX_TX12P 22
GFX_TX12N 22
GFX_TX13P 22
GFX_TX13N 22
GFX_TX14P 22
GFX_TX14N 22
GFX_TX15P 22
GFX_TX15N 22
GPP_TX0P 22
GPP_TX0N 22
GPP_TX3P 27
GPP_TX3N 27
A_TX0P 16
A_TX0N 16
A_TX1P 16
A_TX1N 16
A_TX2P 16
A_TX2N 16
A_TX3P 16
A_TX3N 16
NB_VCC
1.2V(RS740) 1.1V(RX780;RS780)
1
B B
RS780 Display Port Support (muxed on GFX)
DP0
DP1
A A
GFX_TX0,TX1,TX2 and TX3
AUX0 and HPD0
GFX_TX4,TX5,TX6 and TX7
AUX1 and HPD1
5
4
RX780/RS740/RS780 GPP difference table
RS740 RX780/RS780
PCE_CALRP
GPP4
GPP5
562R (GND)
NC
NC
1.27K (GND)
GPP4
GPP5
3
RX780/RS740/RS780 GPP Routing table
RS740 RX780/RS780
GPP X4 CONNECTOR
GPP X1 CONNECTOR
GIGABIT ETHERNET GPP3
2
GPP[2:0] GPP[3:0]
GPP4
GPP5
Elitegroup Computer Systems
Elitegroup Computer Systems
<OrgAddr1>
<OrgAddr1>
<OrgAddr1>
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
Elitegroup Computer Systems
RS740/RS780-PCIE I/F
RS740/RS780-PCIE I/F
RS740/RS780-PCIE I/F
RS780CM-M5
RS780CM-M5
RS780CM-M5
1
11
11
11
of
35Wednesday, August 27, 2008
of
35Wednesday, August 27, 2008
of
35Wednesday, August 27, 2008
1.0
1.0
1.0
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