ECS rs485m-m Schematics

5
1
Cover Page
2
Block Diagram
3
Clock Generator
D D
C C
B B
A A
4
Power (CPU Vcore),
5
Power A(DC to DC)
6
Power B(DC to DC),PWR sequence&good
7
K8 - M2 CPU (HT) D
8
K8 - M2 CPU (MEM) A
9
K8 - M2 CPU (CTRL) B,C
10
K8 - M2 CPU (POWER,GND) E,F,G,H
11
NB - RS485(HT LINK0 IF) A
12
NB - RS485 (PCI-E LINK I/F) B
13
NB - RS485 (SYSTEM I/F) C
14
NB - RS485 (POWER & GND) D,E
15
DIMM1 & DIMM2(Dual Channel)
16
DIMM3 & DIMM4(Dual Channel)
17
DDR2 DIMMS POWER
18
DDR2 TERMINATION
19
PCI Express Slot x16 & x1
20
SB - ATI SB460/600(PCIE, PCI, CPU, LPC)
SB - ATI SB460/600(APIC, GPIO, AUDIO, USB)
21 22
SB - ATI SB460/600(SATA, IDE,HWM,SPI)
SB - ATI SB460/600(STRAPS, PWR, DECOUPLING)
23 24
LPC SIO-ITE8712F/IX, LPC ROM
25
PCI 1, PCI2 PCI Extender & VGA
26
USB, IDE
27 28
COM, LPT
29
Front Panel, FAN
30
LAN (RTL8100SB/8100C) 1394:VT6307/6308
31 32
AUDIO ALC883/655 (CHIP)
Intersil 6566(DCR Sense)
AUDIO ALC883/655 (PANEL)33 POWER DELIVERY CHART
34
CLOCK DISTRIBUTION
35
5
4
3
RS485M-M
VER:B ->C
1. FIX V_DIMM & GND SHORT BY THERMAL PAD IN LAYER3.
2. ADD D22...........................................................................P6
3. ADD C525............................................................ ..............P24
VER:C ->D
1. ADD R609,R610, CHANGE R554/R555 value....... ......................................P3
2. DEL U8,R586~R590. ADD R653~R655...................................................P7
3. CHANGE CODEC CIRCUIT TO STANDARD 655/883 CO LAY.. ...........................P21,P32
4. ADD TPM CIRCUIT..........................................................P21,P24,P26
5. ADD IR1 & R656................................................. .................P24
6. CHANGE CPU & SYS FAN TO 3/4 pin CO LAY.......................................P24,P29
7. ADD Q62 FOR MSG LED................................................ .............P29
8. ADD 6307/6308P CO LAY CIRCUIT................................ ...................P31
9. ADD 655/833 CO LAY CIRCUIT...................................................P32,P33
RS485-M940 VER:D ->RS485M-M VER:1.0
1. CHANGE AC97_OSCIN TO U6 PIN 54................... ................................P3
2. ADD C550 FOR EMI................................................ ..................P3
3. ADD Q67 & R678 FOR PWM UPDATE.....................................................P4
4. ADD C547................................................................. ........P6
5. ADD R668~R673 FOR ATi UPDATE......................................................P7
6. ADD C552 FOR EMI............................................. ...................P14
7. ADD C554~C556 FOR EMI...................................... .....................P20
8. ADD SR4 & SR5 FOR ATi UPDATE.....................................................P21
9. ADD C553 FOR EMI & IR1...........................................................P24
10. DEL C546 & FB11................................................ .................P27
11. ADD F8............................................................ .............P27
12. DEL 6308'S PME PIN FOR VIA UPDATE.............. .................................P31
13. ADD AUXIN ........................................................ .............P32
4
3
2
BASED ON RES485-M VER:A PCB:244mm*244mm
L2:PWR
Rev : 1.0
IDE Cable detect
-P66DET
G_LED1 G_LED2 SIO:GP53(PIN77)
BIOS_WP WT_BEEP SIO:GP16(PIN29)
GPO_1394 GPO_LAN
SB: GPIO9
LED Blinking
SIO:GP10(PIN84)
Other
SIO:GP41(PIN28)
SIO:GP40(PIN79)SIO_S4S5 SIO:GP31 SIO:GP30
L3:GND
2
1
Voltage Adjustment
VCC18
SIO_GPO20 SIO_GPO21
PCI Bus Resource
PCI1 AD16 REQ0 PCI2 REQ1INT F,GHE
LAN
1394
Elitegroup Computer Systems
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INT E,FGH AD17 AD21
INT G
INT H
AD24
Cover Page
Cover Page
Cover Page
RS485M-M
RS485M-M
RS485M-M
REQ3 REQ4
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1.0
1.0
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4
3
2
1
High Side*2 TO-252 Low Side*2 TO-252
PWM Intersil
ISL6566CR(DCR sense)
AMD-K8
M2 mPGA-940
D D
Clock Generator
ICS 951416
HyperTransport
LINK0
OUT
IN
16x16
DDR2 400,533,667
64bit
Dual Channel
DDR2 400,533,667
64bit
Unbuffered DDR2
DIMM1
Unbuffered DDR2
DIMM2
FIRST LOGICAL DIMM SECOND LOGICAL DIMM
NB:ATI RS485
PCIE X 16
PCIE 16X
HT LINK0 CPU I/F Integrated Graphics
Unbuffered DDR2
DIMM3
Unbuffered DDR2
DIMM4
K8 POWER UP SEQUENCE
RX480
1.-PS_ON 1.-PS_ON
2.V_DIMM DDRVTT
3.VCC25A
4.VCORE
5.VCC12
AMD DESIGN GUIDE
2.VDDIO(V_DIMM) VTT(DDRVTT)
3.VDDA(VCC25A)
4.VDD(VCORE)
5.VLDT(VCC12)
6.PWROK
1 16X PCIE VIDEO I/F 1 2X PCIE I/F with SB 4 1X PCIE I/F
2X/4X ALINK
C C
460 :*8 600 :*10
USB 2.0
SB:ATI SB460/600
USB2.0*10
ATA66/100/133
IDE*1
V_DIMM DDRVTT
VCC25A VCORE VCC12
SATA*4
AUDIO CODEC
ALC883
HD I/F
PCI BUS
1394
VT6307
LAN
RTL8110S/
PCI*2
RTL8100C
B B
2 Port
RJ45
AC97 2.3 & Azalia ATA 66/100/133 ACPI 2.0 LPC 1.1 MII PCI/PCI Bridge
ITE SIO 8712F/IX
Serial ATA
LPC BUS
BIOS
4M
SATA*4
RAID 0, 1, 0+1
TPM
NB RX480
PCI-E CORE&VCO VCC1.2 2.25A NB CORE NBCORE_1.2V 5A DAC Main Power
DAC-Q&PLL DAC Digital Power VDD_1.8A 0.3A
LVDS
VCC1.2 0.5AVDDHT
VCC3 VCCA1.8
VDD_1.8A 0.1A
0.2A
0.1A
Layout width/space
USB(45/90)
LAN(50/100)
SATA(50/100)
PCI-E(50/100)
1394(55/110)
(37.5)
R.G.B
PCB 2116
20/8/8/8/20 20/8/8/8/20 layout(47/87)
20/8/12/8/20 20/8/10/8/20
20/6/6/6/20 (57/98) 20/5/7/5/20 layout(62/111)
20/6/6/6/20 20/5/7/5/20 layout(62/111)
20/6/9/6/20 20/6/9/6/20 layout(56/105)
20/9/18/9/18/9/20 ATI DEMO 25/5/25/5/25/5/25 layout Put 75 ohm on NB (Impedence=37.5 ohm)
(47/87)
(47/91)
layout(47/90)
(57/98)
(56/105)
KB/ MOUSE
22U/25DE 100U/16DE
A A
470U/16DE 1000U/10DE 8*14 mm 1500U/16DE 10*25 mm 3300U/25DE 10*25 mm
5*7 mm
6.3*11 mm
6.3*11 mm220U/10DE 8*11 mm
5
2
3S
1
TO-263
B55QS03
D
G
TO-263
2SK3296
D
G TO-252
20N03 45N03
FDD6030L
4
C
S
B C E
TO-251
HI772(1.4W) (PNP)
D
G
SOT-23
2N7002 SI2303S SI2301S
S
FLOPPY
C
B
SOT-23
2N3904 2N3906 MMBT2907A
3
3
2
1
3
1
SOT-23
BAT54C
2
T0-92
LM431 78L05-DTM3055TL-S LM432
E
B
E
C
T0-92
2N2222A 2N2097ABAT54S
B
EC
T0-92
HSD882-D
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Elitegroup Computer Systems
Block Diagram
Block Diagram
Block Diagram
RS485M-M
RS485M-M
RS485M-M
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1.0
1.0
1.0
5
4
3
2
1
SRC(=PCI-E):Serial Reference Clock
VCC3 VCC3_CK
FB68
FB68 FB600P-08
FB600P-08
1 2
C508
C508 10U-08
10U-08
2 1
D D
改
TC42
TC42 22U/25V
22U/25V
FOOTPRINT 20051222
12
C509
C509 .1U-04
.1U-04
C510
C510 .1U-04
.1U-04
C511
C511 .1U-04
.1U-04
C512
C512 .1U-04
.1U-04
C513
C513 .1U-04
.1U-04
ATIGCLK Divider Selection
ATIG_Div(3:0)
1000 0011 TBD 0010
ATIG_Div(3:0)
(MHz)
100.00
114.29
133.33
160.00
1- PLACE ALL SERIAL TERMINATION RESISTORS CLOSE TO CLOCK GEN
2- PUT DECOUPLING CAPS CLOSE TO CLOCK GEN POWER PIN
FB70
FB70
VCC3
1 2
FB120
FB120
C516
C516
C C
B B
2 1
56P
56P C517
C517
2 1
56P
56P
NB_OSC17
12
R568 33-04R568 33-04
Ioh = 5 * Iref (2.32mA) Voh = 0.71V @ 60 ohm
EXT CLK FREQUENCY SELECT TABLE(MHZ)
FS2
0 0 0 0 0 1
A A
0 1 0 0 1 1 1 0 0 1 0 1 1 1 1
*
CPUFS1
Hi-Z X
180.00
220.00
100.00
133.33
200.00
SRCCLK
HTTFS0 PCI
[2:1]
Hi-Z Hi-Z100.00 Reserved
100.00
100.00
100.00
100.00
100.00
100.00
X/6X/3
30.0060.00
36.56 73.12
66.66 33.33
66.66 33.33
66.66 33.33
COMMENT
USB
48.00
48.00
Reserved Reserved
48.00 Reserved
48.00 Reserved
48.00 Reserved
48.00 Normal ATHLON64 operation
48.00
C515
C515 .1U-04
.1U-04
X6
X6
14.318MHZ
14.318MHZ
3
SMBCK11,12,19,21,24,26 SMBDT11,12,19,21,24,26
R574 0-04-OR574 0-04-O R575 0-04-OR575 0-04-O
VCC3_CK
OSC14M
U6
U6
43
VDDCPU
14
VDDSRC3
21
VDDSRC2
32
VDDSRC1
35
VDD_SRC0
51
VDD_PCI
3
VDD48
48
VDDHTT
56
VDDREF
5
GND1
55
GND2
36
GNDSRC0
31
GNDSRC1
26
GNDSRC2
20
GNDSRC3
15
GNDSRC4
49
GNDPCI
46
GNDHTT
42
GNDCPU
1
X1
2
X2
6
NC
7
SCLK
8
SDATA
52
REF2
37
R569
R569 475-1-04
475-1-04
IREF
11
CLKREQB#
10
CLKREQA#
ICS951416
ICS951416
ICS 951416(Programmable)
CUSTOMER CAN ALSO USE CY28RS480 CLOCK GENERATOR TO REPLACE ICS951412 WITHOUT HARDWARE CHANGE. BOTH CHIPs HAVE THE SAME FOOTPRINT.
FS0
R577 10K-04R577 10K-04
FS1
R579 10K-04R579 10K-04
FS2
R578 10K-04R578 10K-04
VDDA GNDA
CPUCLK8T0 CPUCLK8C0 CPUCLK8T1 CPUCLK8C1
SRCCLKT7 SRCCLKC7 SRCCLKT6 SRCCLKC6 SRCCLKT5 SRCCLKC5 SRCCLKT4 SRCCLKC4 SRCCLKT3
SRCCLKC3 ATIGCLKT1 ATIGCLKC1 ATIGCLKT0 ATIGCLKC0
SRCCLKT0 SRCCLKC0
PCICLK0
FS0/REF0 FS1/REF1
USB_48MHz
HTTCLK0
VCC3_CK
FS2
39 38
45 44 41 40
12 13 16 17 18 19 22 23 24 25 27 28 30 29 34 33
50
54 53 9
4 47
TSSOP56
N1 N2 N3 N4
FS0 FS1 FS2
VCC3_CKPLL
R554 47-04R554 47-04 R555 47-04R555 47-04
R601 33-04R601 33-04 R602 33-04R602 33-04 R557 33-04R557 33-04 R556 33-04R556 33-04
R610 33-04R610 33-04 R570 33-04R570 33-04
R571 33-04R571 33-04 R573 33-04R573 33-04 R572 33-04R572 33-04
12
C514
C514 .1U-04
.1U-04
20060209
RN38 33-8P4R-04RN38 33-8P4R-04
4 5 3 6 2 7 1 8
R603 33-04R603 33-04 R604 33-04R604 33-04
20051129
20060331
20060331
FS0,1,2 internal pull low(120K ohm)
5
4
3
VCC3
FB69
FB69
1 2
FB120
FB120
TC43
TC43
改
FOOTPRINT
22U/25V-O
22U/25V-O
20051222
R609 261-1-04R609 261-1-04
R558 49.9-1-04R558 49.9-1-04
AC97_OSCIN 32
SB_OSC14 21
SIO_CLK48 24 CLK_48M_USB 21
HTREFCLK 17
R576
R576 51-1-04
51-1-04
R560 49.9-1-04R560 49.9-1-04
R561 49.9-1-04R561 49.9-1-04
R559 49.9-1-04R559 49.9-1-04
AC97_OSCIN NB_OSC SB_OSC14 CLK_48M_USB SIO_CLK48 HTREFCLK
CPUCLK 7 CPUCLK- 7
R563 49.9-1-04R563 49.9-1-04
R562 49.9-1-04R562 49.9-1-04
20060403
C550 22P-04C550 22P-04 C518 10P-04-OC518 10P-04-O C519 10P-04-OC519 10P-04-O C520 10P-04-OC520 10P-04-O C521 10P-04-OC521 10P-04-O C522 10P-04-OC522 10P-04-O
2
R564 49.9-1-04R564 49.9-1-04
R565 49.9-1-04R565 49.9-1-04
21 21 21 21 21 21
R566 49.9-1-04R566 49.9-1-04
R567 49.9-1-04R567 49.9-1-04
SBSRC_CLKP 20 SBSRC_CLKN 20 GPP_CLK0P 19 GPP_CLK0N 19
GFX_CLKP 19 GFX_CLKN 19 NBSRC_CLKP 17 NBSRC_CLKN 17 SBLINK_CLKP 17 SBLINK_CLKN 17
H8THH8
1 2 3 4
H6THH6
1 2 3 4
TH
9
H3THH3
1 2 3 4
TH
9
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Elitegroup Computer Systems
Elitegroup Computer Systems
Elitegroup Computer Systems
Clock Generator
Clock Generator
Clock Generator RS485M-M
RS485M-M
RS485M-M
8 7 6 5
TH
9
H5THH5
8 7 6 5
TH
9
H1THH1
8 7 6 5
TH
9
1
1 2 3 4
1 2 3 4
1 2 3 4
335Friday, April 07, 2006
335Friday, April 07, 2006
335Friday, April 07, 2006
H7THH7
H4THH4
H2THH2
AUGND
8 7 6 5
TH
9
8 7 6 5
TH
9
8 7 6 5
TH
9
1.0
1.0
1.0
of
of
of
5
VCC3
12
R245
R245 10K
10K
D D
C C
B B
VID Codes
VID[4:0]
A A
VCC_CORE
00000 00001 00010 00011 00100 00101 00110 00111 10111 01000 01001 01010 01011 01100 01101 0.825 01110 01111
1.550
1.525
1.500
1.475
1.450
1.425
1.400
1.375
1.350
1.325
1.300
1.275
1.250
1.225
1.200
1.175
PG_VCORE6,21
C226
2 1
12
R256
R256 10K
10K
12
> 0.63V
R2591KR259
20060221
1K
VCORE
12
R241
R241 100
100
12
R249
R249 100
100
Place RT2 close to L3.
VCC_CORE
1.150
1.125
1.100
1.075
1.050
1.025
1.000
C226 220P
220P
+12V_4P
EN_VCORE6
CPU_COREFB+7
CPU_COREFB-7
VID[4:0]
10000 10001 10010 10011 10100 10101 10110
0.975 11000 11001 11010 11011 11100
0.950
0.925
0.900
0.875
0.850 11101 11110
11111
5
0.800
No CPU
20050412 20050922
VCC
1 2
2.2K-8P4R-O
2.2K-8P4R-O
VID47 VID37 VID27 VID17 VID07
R266
R266 10K
10K
1 2
C230 56PC230 56P
R267 1KR267 1K
C249
C249 560P-O
560P-O
1 2
R265
R265 0-O
0-O
R246 1.5KR246 1.5K
R238 0R238 0
1 2
RT1
RT1
1 2
10KT-O
10KT-O
RN9
RN9
2 1
1 2
21
R247
R247 150K
150K
20051004
1 2
R232
R232 0-O
0-O
21
C215
C215 .022U
.022U
V_DIMM
78
C229
C229 5600P
5600P
2 1
1 2
R268
R268 750-O
750-O
C218
C218 1000P-O
1000P-O
2 1
12
R228 30KR228 30K
1 2
.01U
.01U
4
123456
12
R260
R260
2.2K-O
2.2K-O
38 39 40
35 37
10
12
11
12
R270
R270 20K
20K
36
C227
C227 .01U
.01U
2 1
13
14
20051004
15
21
16
C213
C213
R213 120KR213 120K R224 120KR224 120K R230 120KR230 120K
4
U11
U11 ISL6566CR
ISL6566CR
VID4 VID3 VID2
1
VID1
2
VID0
3
DACSEL/VID5 PGOOD ENLL
8
COMP
9
FB
VDIFF
VSEN
RGND
6
OFST
FS
5
REF
4
VRM10 OCSET
ICOMP
ISUM IREF
1 2 1 2 1 2
20051004
TC17
TC17
VCC
Q67
Q67
2N3906
2N3906
+12V_4P
VCORE
12
1500U/6.3V-RLX
1500U/6.3V-RLX
EC
12
7
VCC
GND
41
R26910R269 10
PHASE1 PHASE2 PHASE3
L7
0.9UHL70.9UH
B
C2281UC228 1U
2 1
PVCC1 BOOT1
UGATE1
PHASE1
ISEN1
LGATE1
PVCC2 BOOT2
UGATE2
PHASE2
ISEN2
LGATE2
PVCC3 BOOT3
UGATE3
PHASE3
ISEN3
LGATE3
TC22
TC22
R678
R678
8.2K-04
8.2K-04
33 30
1 2
R217
R217
2.2
2.2
UG_1
31
29
32
1 2
R226 1.8K-1R226 1.8K-1
LG_1
34
B to 1.0(12/23)
24 26
1 2
R214
R214
2.2
2.2
UG_2
27
28
25
1 2
R215 1.8K-1R215 1.8K-1
LG_2
23
18 21
1 2
R218
R218
2.2
2.2
UG_3
20
22
19
1 2
R223 1.8K-1R223 1.8K-1
LG_3
17
Bottom Pad Connect To GND Through 10 vias.
VIN
21
12
TC5
TC5
1500U/16V
1500U/16V
12
TC23
TC23
1500U/6.3V-RLX
1500U/6.3V-RLX
3
1.UG,PHASE,LG change layer < 3
2.Change layer(via hole = 2).
3.Under PWM IC cut a power plane to be GND for thermal.
+12V_4P
TC16
TC16
2 1
2 1
2 1
C208
C208 1U-08
1U-08
C212
C212 1U-08
1U-08
C204
C204 1U-08
1U-08
12
TC4
TC4
1500U/16V
1500U/16V
12
1500U/6.3V-RLX
1500U/6.3V-RLX
3
Near MOS
R124 2.2-08R124 2.2-08
1 2
R152 0-08R152 0-08
1 2
R134 2.2-08R134 2.2-08
1 2
R150 0-08R150 0-08
1 2
R135 2.2-08R135 2.2-08
1 2
R141 0-08R141 0-08
1 2
TC18
TC18
C202
C202 .1U-04
.1U-04
20060221
+12V_4P
C203
C203 .1U-04
.1U-04
20060221
+12V_4P
C205
C205 .1U-04
.1U-04
20060221
12
TC6
TC6
1500U/16V
1500U/16V
12
1500U/6.3V-RLX
1500U/6.3V-RLX
12
30-50mil
30-50mil
30-50mil
20050922
12
30-50mil
30-50mil
30-50mil
20050922
12
30-50mil
30-50mil
30-50mil
20051124
12
TC44
TC44
1500U/16V
1500U/16V
12
TC19
TC19
1500U/6.3V-RLX
1500U/6.3V-RLX
R92
R92 10K
10K
UG1
G
PHASE1
LG1
G
R96
R96 10K
10K
UG2
G
PHASE2
LG2
G
R91
R91 10K
10K
UG3
G
PHASE3
LG3
G
12
1500U/6.3V-RLX
1500U/6.3V-RLX
1000P-O
1000P-O
VIN
DS
DS
2SK3919
2SK3919
VIN
DS
DS
2SK3919
2SK3919
VIN
DS
DS
2SK3919
2SK3919
TC21
TC21
+12V_4P
C145
C145
20060222
Q16
Q16 06N03-O
06N03-O
G
Q24
Q24
G
Q29
Q29 06N03
06N03
G
Q35
Q35
G
20060222
Q17
Q17 06N03-O
06N03-O
G
Q26
Q26
G
12
1500U/6.3V-RLX
1500U/6.3V-RLX
ATX12V
ATX12V
3
+12V +12V4GND
CONN-WAFER4P2R
CONN-WAFER4P2R
2 1
EMI
B to 1.0(12/28)
MC2
MC2
4.7U-08
4.7U-08
2 1
DS
Q28
Q28 06N03
06N03
12
R99
R99
DS
Q34
Q34
2.2
2.2
2SK3919
2SK3919
C101
C101 4700P
4700P
2 1
MC1
MC1
4.7U-08
4.7U-08
2 1
DS
20060222
Q18
Q18 06N03-O
06N03-O
12
R100
R100
DS
Q25
Q25
2.2
2.2
2SK3919
2SK3919
C102
C102 4700P
4700P
2 1
MC3
MC3
4.7U-08
4.7U-08
2 1
DS
Q30
Q30 06N03
06N03
12
DS
Q33
Q33
R101
R101
2SK3919
2SK3919
2.2
2.2
C103
C103 4700P
4700P
2 1
12
TC20
TC20
1500U/6.3V-RLX
1500U/6.3V-RLX
2
1
GND
2
L8
L8
CK-0.6UH-SQ
CK-0.6UH-SQ
20051124
L9
L9
CK-0.6UH-SQ
CK-0.6UH-SQ
20051124
L10
L10
CK-0.6UH-SQ
CK-0.6UH-SQ
20051124
2
VCORE
21
21
21
1
VCORE
C163
C163
C164
C164
10U-08
10U-08
10U-08
10U-08
2 1
2 1
Near TC19,TC22
0.8V~1.55V/80A
20050922
Elitegroup Computer Systems
Elitegroup Computer Systems
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
Elitegroup Computer Systems
Power (CPU Vcore)
Power (CPU Vcore)
Power (CPU Vcore)
RS485M-M
RS485M-M
RS485M-M
1
1.0
1.0
4
4
4
1.0
of
35Friday, April 07, 2006
of
35Friday, April 07, 2006
of
35Friday, April 07, 2006
5
20050922
D D
U15
5VSB
MC4
MC4 1U-O
1U-O
5VSB 1.8VSB
C C
U15
INSOUT
12
TC35
TC35 100U/16V-O
100U/16V-O
2 1
AMS1086
AMS1086
TO-223 & TO-252 CO-LAY Vo=1.25(1+Rb/Rt) AMS1086(SOT223)=1.5A
U12
U12
INIOUT
MC51UMC5 1U
2 1
EZ1117-S
EZ1117-S
Vo=1.25(1+Rb/Rt)
ADJ
ADJ
D
G
O
A
3VSB
3VSB
12
12
ER23
ER23 110-1
110-1
12
ER24
ER24 180-1
180-1
1.8VSB
CHANGE TO 1.2VSB FOR SB600.
12
12
ER20
ER20 124-1
124-1
ER21
ER21
20060221
54.9-1-04
54.9-1-04
TC37
TC37 100U/16V
100U/16V
TC34
TC34 100U/16V
100U/16V
4
TargetStatus
AC plug 5V_DUAL=0 SIO_S4S5=O.D=1
S0,S1
5V_DUAL=VCC
5V_DUAL=5VSB SIO_S4S5=0
S3
5V_DUAL=5VSB
S4,S5 S4,S5
R303
R303
4.7K-04
4.7K-04
Q48
Q48
Q49
Q49 2N7002
2N7002
20060221
G
5V_DUAL=0
SIO_S4S524
R1181KR118 1K
1 2 DS
Q47
Q47 2N7002
2N7002
*
20050923
5VSB +12V
DS
2N7002
2N7002
ATX_PWRGD6,29
-OFFPWRS321,24
G
DS
G
Super I/O F/GXS
SIO_S4S5=1
SIO_S4S5=0 SIO_S4S5=1
DUALSW
5VSB
3
4 3 2 1
Q45
Q45
G2
G2
P
P
S2
S2
G1
G1
N
N
S1
S1
APM4500
APM4500
Q27
Q27
G
20N03
20N03
5V_DUAL
5V_DUAL
D2
D2
5
D2
D2
6
D1
D1
7
D1
D1
8
DS
20051122
5V_DUAL
D2 D2
D1 D1
VCC
R94 0-08-OR94 0-08-O
1 2
R85 0-08-OR85 0-08-O
1 2
FOR FRONT
VCC
R307 0-08-OR307 0-08-O
1 2
R294 0-08-OR294 0-08-O
1 2
5VSB
12
20060221
R3051KR305
R306
R306
1K
4.7K-04
4.7K-04
B
1 2
R304
R304 10K
10K
FOR REAR CONN
5V_DUAL
EC
Q46
Q46
2N3906
2N3906
5VSB
VCC
VCC
G2 S2 G1 S1
2
1 2
C482
C482 .1U-04
.1U-04
R512
R512 220
220
B C
VREF25VCC3
E
D18
D18 LM431
LM431
EN_VCC25A6
VREF25
20050923
R509
R509
1 2
10K
10K
R495
R495 10K-O
10K-O
1 2
12
20051003
20050923
VCC25A
20050923
411
U23A
U23A
3
+
+
1
2
-
-
LM324
LM324
30mil
R4940R494 0
100 FOR 2.525V
1
VCC3+12V
DS
Q38
Q38 2N7002
2N7002
G
Near CPU.
VCC25A
12
TC24
TC24
100U/16V
100U/16V
+12V
5VSB
R497
R497 10-O
10-O
1 2
C430
C430
.1U-04
.1U-04
3
GND
COMP/OCSET
6
FB
RT9214
RT9214
1 2
R464 1K-OR464 1K-O
12 12
1
2
D17
D17 BAT54C
BAT54C
3
5
BOOT
VCC
UGATE
PHASE
LGATE
C427
C427 4700P-O
4700P-O
1 2
R463 249-1R463 249-1
5VSB
B
E C
U21
U21
1 2 8 7 4
21
R496
R496
4.7K-04
4.7K-04
20060221
Q55
Q55 2N3904
2N3904
5VSB
1
2
D16
D16 BAT54C
BAT54C
3
1 2
DS
Q56
Q56 2N7002
2N7002
G
3
DDRREF
MC71UMC7 1U
V_DIMM
12
1 2
R501
R501 10K
10K
DDRVTT
ER26
ER26 10K-1-04
10K-1-04
VTT_DDR
20060221
ER27
ER27 10K-1-04
10K-1-04
20060221
Q57
Q57 SI2301S
SI2301S
D S
G
R505
R505 20K
20K
1 2
12
EC8
EC8
1000U/6.3V-O
1000U/6.3V-O
12
EC7
EC7
1000U/6.3V
1000U/6.3V
SIO_GP20 V_DIMM
11
00
4
SIO_GP2024
SIO_GP2124
SIO_GP21
-OFFPWRS4_S521,29
-SUSC_S56
10 01
20060221
Normal +50mV +100mV +150mV
20051122
R465
R465 200-04
200-04
R485
R485
1 2
4.02K-1
4.02K-1 R4842KR484
1 2
2K
20060221
R491 22KR491 22K R583 22K-OR583 22K-O
20051011
3VSB
8 7 6 5
B B
A A
12
EC10
EC10
100U/16V-O
100U/16V-O
VCC 5VSB
Q54 45N02Q54 45N02
Vcntl Vcntl Vcntl Vcntl
G9G10G11G12G
1 2
R488 0-08-OR488 0-08-O
1 2
R489 0-08-OR489 0-08-O
G
RT9173
RT9173
GND
REFEN
VOUT
DS
DUALSW
U20
U20
VIN
13
1 2 3 4
5VDUAL_IN
5
R499
R499 24K-O
24K-O
20060221
.1U-04C453 .1U-04C453
R4860R486
0
R490
R490
30K
30K
R4800R480
1 2
0
12
12
5VDUAL_IN
G
G
L15
L15 FBX2
FBX2
1 2
EC12
EC12
1000U/6.3V
1000U/6.3V
DS
Q53
Q53 20N03
20N03
DS
Q52
Q52 20N03
20N03
12
1000U/6.3V
1000U/6.3V
12
L14
L14
4.0UH
4.0UH
1 2
R483
R483
2.2
2.2
1 2
C460
C460 .01U
.01U
2 1
EC6
EC6
20060221
20051003
C454
C454 10U-08
10U-08
V_DIMM
V_DIMM
12
EC9
EC9
1000U/6.3V
1000U/6.3V
12
EC11
EC11
1000U/6.3V
1000U/6.3V
2
Elitegroup Computer Systems
Elitegroup Computer Systems
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
Elitegroup Computer Systems
Power A(DC to DC)
Power A(DC to DC)
Power A(DC to DC)
RS485M-M
RS485M-M
RS485M-M
5
5
5
of
35Friday, April 07, 2006
of
35Friday, April 07, 2006
of
1
35Friday, April 07, 2006
1.0
1.0
1.0
5
4
3
2
1
20060221
D D
C C
VCC1.8
2SK3570
2SK3570
VCC1.8
80 mil
TC27
TC27
Q40
Q40
VCC3
DS
12
1000U/6.3V
1000U/6.3V
G
+12V
20050923
VREF18
411
U23B
U23B
5
+
+
7
6
-
-
LM324
LM324
For VCC3 vs VCC1.8 power seq.
VREF25
12
12
R511
R511
1.4K-1
1.4K-1
R510
R510
3.6K-1
3.6K-1
EN_VCC12
R659
R659
4.7K-04
4.7K-04
20060623
K8 Power Sequence
VCC25A
VCC1.2V_DIMM
U17
U17
1
B B
5VSB
12
R349
R349 10K
10K
-ATX_PSON_SIO24
ASIC_CPUPWRGD7
PG_VCORE4,21 EN_VCORE 4
ASIC_CPUPWRGD
S3_STATE21
As GPO pin:Need BIOS programming.
2 3 4
11
5 6
VCORE_GD VLDT_12 VDDA_25 VDIMM_STR
CPU_PWRGD
SB_PSON# ACPI_S3
MC6
MC6
21
10U-08
10U-08
16
VCORE_EN
5VSB
VDIMM_STR_EN
ATX_PSON#
ATX_PWRGD
GND
8
VDDA_EN
VLDT_EN
RSTBTN#
IT8282M
IT8282M
13 12 14 15
9 7
10
Unused
5VSB
5VSB
12
R329
R329 1K-O
1K-O
5VSB 5VSB5VSB
12
R3301KR330 1K
-ATX_PSON 29
ATX_PWRGD 5,29
1 2
R331 1K-OR331 1K-O
12
R328
R328 1K-O
1K-O
5VSB
12
R3271KR327 1K
3VSB
-HW_RST 21,24,29
EN_VCORE
-SUSC_S5 EN_VCC25A EN_VCC12
20051122
G
20051122
5VSB
20060623
R657
R657
4.7K-04
4.7K-04
DS
Q65
Q65 2N7002
2N7002
-SUSC_S5 5 EN_VCC25A 5
B
Q63
Q63 2N3904
2N3904
E C
ASIC_CPUPWRGD
R658
R658
10.5K-1
10.5K-1
R660
R660 10K-1
10K-1
20060221
VREF25
1 2
C5471UC547 1U
2 1
1 2
20060331
ASIC_CPUPWRGD
1 2
R3990R399 0
20060221
+12V
84
U26A
U26A
3
+
+
1
2
-
-
LM358
LM358
20060221
R434
R434
4.7K-04
4.7K-04
1 2
R5840R584 0
20060221
5VSB 5VSB5VSB
VCC
R585
R585
R407
R407
4.7K-04-O
4.7K-04-O
4.7K-04
4.7K-04
AND_ASICGD
AND_ASICGD
Q64
Q64
2SK3570
2SK3570
G
G
20051122
V_DIMM
C523
C523 10U-08-O
10U-08-O
2 1
C395
C395 10U-08-O
10U-08-O
2 1
12
DS
DS
Q66
Q66
2SK3570
2SK3570
5 6
7 14
5A 2.25A
TC36
TC36 1000U/6.3V
1000U/6.3V
20060221
1 2
Should keep these two invertor for making SB_PWRGD rising-edge faster.
1 2
U19C
U19C
74HCT14
74HCT14
VCC_NB 1.2V VCC1.2
C289
C289
4.7U-08
4.7U-08
VCC_NB
12
20050926
9 8
7 14
12
TC31
TC31
1000U/6.3V
1000U/6.3V
5VSB5VSB5VSB
3 4
7 14
U19D
U19D
74HCT14
74HCT14
U19B
U19B
74HCT14
74HCT14
20060221
R404
R404
4.7K-04
4.7K-04
TC30
TC30
1000U/6.3V
1000U/6.3V
U19A
U19A
74HCT14
74HCT14
7 14
R395
R395 0-O
0-O
L11
L11 FBX2
FBX2
20060221
R415
R415
4.7K-04
4.7K-04
R410
R410
8.2K-04
8.2K-04
20060221
VCC1.2
12
TC28
TC28 1000U/6.3V-O
1000U/6.3V-O
20060223
84
U26B
U26B
5
+
+
6
-
-
LM358
LM358
SB_PWRGD is 35mS after NB_PWRGD.
R416
R416
8.2K-04
8.2K-04
20060221
NB_PWRGD 17
C166
C166 .1U-04-O
.1U-04-O
7
C398
C398 .1U-04-O
.1U-04-O
SB_PWRGD 21
U19E
A A
11 10
5
U19E
74HCT14
74HCT14
7 14
4
3
2
Title
Title
Title
Power B(DC to DC),PWR Sequence&good
Power B(DC to DC),PWR Sequence&good
Power B(DC to DC),PWR Sequence&good
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
Elitegroup Computer Systems
Elitegroup Computer Systems
Elitegroup Computer Systems
RS485M-M
RS485M-M
RS485M-M
635Friday, April 07, 2006
635Friday, April 07, 2006
635Friday, April 07, 2006
of
of
1
of
1.0
1.0
1.0
A
B
C
D
E
20060209
DEL R586,R588,R587,R589,R590.
ATHLON Control and Debug
LAYOUT: Route VDDA trace approx.
Required for compatibility with future processors
V_DIMM
50 mils wide (use 2x25 mil traces to
VCC25A
FB44
FB44 FB120
C128
C128 .1U-04-O
.1U-04-O
20050927
LDT_STOP-17,20,21 LDT_RST-20
PN
R591 1KR591 1K
20051122
R250 220-04-OR250 220-04-O
R252 220-04-OR252 220-04-O
FB120
U7C
U7C
5 6
74LVC07A
74LVC07A
R668 0-04-OR668 0-04-O R669 0-04-OR669 0-04-O R670 0-04-OR670 0-04-O
VCC3
R1711KR171 1K
V_DIMM
R209 220-04-OR209 220-04-O
C210
U7D
U7D
9 8
U7E
U7E
11 10
U7F
U7F
13 12
C210 .22U
.22U
20051220
CPU_ALL_PWROK CPU_LDTSTOP­CPU_HT_RESET-
R170
R170 300
300
CPU_ALL_PWROK
R671 22K-04-OR671 22K-04-O
20060331 FOR SB600
CPU_LDTSTOP-
R672 22K-04-OR672 22K-04-O
20060331 FOR SB600
CPU_HT_RESET-
C221
C221
4.7U-08
4.7U-08
FOR SB600 20060331
R1731KR173 1K
74LVC07A
74LVC07A
74LVC07A
74LVC07A
74LVC07A
74LVC07A
HDT Connector
J1
J1
1 3 5 7
9 11 13 15 17 19 21 23
KEY
KEY
ASP-68200-07-O
ASP-68200-07-O
C214
C214 3300P-04
3300P-04
V_DIMM
4 4
3VSB
U7A
U7A
1 2
74LVC07A
74LVC07A
3 3
SB_CPUPWRGD20
2 2
ASIC_CPUPWRGD6
CPU_DBREQ-
1 1
CPU_DBRDY CPU_TCK CPU_TMS CPU_TDI CPU_TRST­CPU_TDO
NOTE: HDT termination is required for Rev Ax silicon only.
U7B
U7B
3 4
74LVC07A
74LVC07A
LDT_STOP-17,20,21
VCC3
LDT_RST-20
R257 220-04-OR257 220-04-O
7 14
SB_CPUPWRGD20
D8 1N4148-SD8 1N4148-S
V_DIMM
R251 220-04-OR251 220-04-O
A
exit ball field) and 500 mils long.
20060215
V_DIMM
20060215
CPU_SIC20
CPU_SID20
Keep trace to resistors
R653 300-04-OR653 300-04-O R225 300-04R225 300-04
R231 300-04R231 300-04
R654 0-04-OR654 0-04-O R655 0-04-OR655 0-04-O
VCC1.2
less than 1" from CPU pin
C207
C207 3900P-04
CPUCLK3
CPUCLK-3
3900P-04
C199
C199 3900P-04
3900P-04
R212
R212 169-1-04
169-1-04
Keep trace to resistor less than 1.25" from CPU pin
STP22STP22 STP27STP27 TP15TP15
20050926 20050926
STP15STP15 TP50TP50
CPU_THERMDC24 CPU_THERMDA24
R174
R174
R172
R172
300
300
300
300
V_DIMM
R222
R222 10K
10K
CPU_PH_G
R673 22K-04-OR673 22K-04-O
20060331
FOR SB600
CPU_PROCHOT_L_1.8
2 4 6 8 10 12 14 16 18 20 22
CPU_HT_RESET-
24 26
B
B
E C
Q39
Q39 2N3904
2N3904
R227 44.2-1-04R227 44.2-1-04 R205 44.2-1-04R205 44.2-1-04
CPU_COREFB+4
CPU_COREFB-4
CPU_CLKIN_SC_P CPU_CLKIN_SC_N
CPU_TEST17_BP3 CPU_TEST16_BP2 CPU_TEST15_BP1 CPU_TEST14_BP0 CPU_TEST12_SCANSHIFTENB
STP16STP16 STP19STP19
STP29STP29 STP23STP23
STP43STP43 STP46STP46 STP55STP55 STP50STP50
STP48STP48 STP45STP45 STP47STP47 STP42STP42 STP44STP44 STP49STP49
3VSB
R236
R236
4.7K-04
4.7K-04
20050926
CPU_HT_RESET­CPU_ALL_PWROK CPU_LDTSTOP-
CPU_HTREF1 CPU_HTREF0
CPU_VDD_RUN_FB_P CPU_VDD_RUN_FB_N
CPU_VDDIO_SUS_FB_P CPU_VDDIO_SUS_FB_N
CPU_DBRDY CPU_TMS
CPU_TCK CPU_TRST­CPU_TDI
CPU_TEST25_H_BYPASSCLK_P CPU_TEST25_H_BYPASSCLK_N
R219 300-04R219 300-04 R221 300-04R221 300-04
CPU_TEST07_ANALOG_T CPU_TEST6_DIECRACKMON CPU_TEST5_THERMDC CPU_TEST4_THERMDA CPU_TEST3_GATE0 CPU_TEST2_DRAIN0
CPU_RSVD_MA_CKE3 CPU_RSVD_MA_CKE2 CPU_RSVD_MB_CKE3 CPU_RSVD_MB_CKE2
CPU_RSVD_MA1_CLK3_P CPU_RSVD_MA1_CLK3_N CPU_RSVD_MA1_ODT1 CPU_RSVD_MA0_CLK3_P CPU_RSVD_MA0_CLK3_N CPU_RSVD_MA0_ODT1
20060221
-CPU_PROCHOT 21
20051122
CPU_THERMTRIP_L
C
R5941KR594 1K
C10 D10
AL6 AK6
AK11 AL11
AL9
AH10
AJ10
AL10
A10 B10 F10
AJ7
AH9
AJ5 AG9 AG8
AH7
AJ6
W26 W25
AE27
U24
V24
AE28 AD25
AE24 AE25
AJ18 AJ20
C18
C20 G24 G25
H25
V29 W30
C7 C9 D8
V8 V7
G2 G1
A8 B8
B6
E9 F6
D6
E7 F8
C5
E5
L25 L26 L31 L30
B
CPU1D
CPU1D
VDDA2 VDDA1
RESET_L PWROK LDTSTOP_L
SIC SID
HT_REF1 HT_REF0
CPU_PRESENT_L VDD_FB_H VDD_FB_L
VDDIO_FB_H VDDIO_FB_L
CLKIN_H CLKIN_L
DBRDY TMS
TCK TRST_L TDI
TEST25_H TEST25_L TEST19 TEST18 TEST13 TEST9 TEST17 TEST16 TEST15 TEST14 TEST12
TEST7 TEST6 TEST5 TEST4 TEST3 TEST2
RSVD0 RSVD1 RSVD2 RSVD3
RSVD4 RSVD5 RSVD6 RSVD7 RSVD8 RSVD9
RSVD10 RSVD11 RSVD12 RSVD13 RSVD14 RSVD15 RSVD16 RSVD17 RSVD18 RSVD19 RSVD20 RSVD21
AMD NPT M2 SOCKET Processor Socket
VCC3
R592
R592
4.7K-04
4.7K-04
Q60
Q60 2N3904
2N3904
E C
THERMTRIP_L
PROCHOT_L
VID5 VID4 VID3 VID2 VID1 VID0
PSI_L
NC#1 NC#2 NC#3 NC#4
DBREQ_L
TEST29_H TEST29_L
NC#5 NC#6 NC#7
NC#8 TEST24 TEST23 TEST22 TEST21 TEST20
TEST28_H TEST28_L
TEST27 TEST26 TEST10
TEST8
RSVD22 RSVD23
RSVD24 RSVD25 RSVD26
RSVD27 RSVD28
MISC
MISC
RSVD29 RSVD30 RSVD31
RSVD32 RSVD33 RSVD34 RSVD35 RSVD36 RSVD37
20060221
B
R5931KR593 1K
AK7 AL7
D2 D1 C1 E3 E2 E1
AL3 F1 H3
H4 H20 H21
A5
AK10
TDO
CPU_TEST29_H_FBCLKOUT_P
C11
CPU_TEST29_L_FBCLKOUT_N
D11 AE7 AD19 AE8 AD18 AK8 AH8 AJ9 AL8 AJ8
J10 H9 AK9 AK5 G7 D4
E20 B19
AL4 AK4 AK3
F2 F3
G4 G3 G5
Y31 Y30 AG31 V31 W31 AF31
-CPU_THERMTRIP 21
Q59
Q59 2N3904
2N3904
E C
R234
R234 300
300
CPU_THERMTRIP_L
CPU_PROCHOT_L_1.8
CPU_VID5 CPU_VID4 CPU_VID3 CPU_VID2 CPU_VID1 CPU_VID0
CPU_PRESENT­CPU_PSI-
CPU_DBREQ-
CPU_TDO
CPU_TEST24_SCANCLK1 CPU_TEST23_TSTUPD CPU_TEST22_SCANSHIFTEN CPU_TEST21_SCANEN CPU_TEST20_SCANCLK2
CPU_TEST28_H_PLLCHRZ_P CPU_TEST28_L_PLLCHRZ_N CPU_TEST27_SINGLECHAIN CPU_TEST26_BURNIN­CPU_TEST10_ANALOGOUT CPU_TEST08_DIG_T
CPU_MA_RESET­CPU_MB_RESET-
CPU_RSVD1 CPU_RSVD2 CPU_RSVD3
CPU_RSVD_VIDSTRB1 CPU_RSVD_VIDSTRB0
CPU_RSVD_VDDNB_FB_P CPU_RSVD_VDDNB_FB_N CPU_RSVD_CORE_TYPE
CPU_RSVD_MB1_CLK3_P CPU_RSVD_MB1_CLK3_N CPU_RSVD_MB1_ODT1 CPU_RSVD_MB0_CLK3_P CPU_RSVD_MB0_CLK3_N CPU_RSVD_MB0_ODT1
D
R240
R240
R206
R206
300
300
300
300
20060209
DEL U8.
STP6STP6
STP7STP7
R243 80.6-1-04R243 80.6-1-04
VID4 4 VID3 4 VID2 4 VID1 4 VID0 4
Route as 80-Ohm differential impedance Keep trace to resistor less than 1" from CPU pin
TP25TP25 STP34STP34 TP29TP29 TP27TP27 STP21STP21
STP37STP37 STP33STP33 STP35STP35
R237 300-04R237 300-04
STP28STP28 STP12STP12
STP40STP40 STP41STP41
STP14STP14 STP20STP20 STP11STP11
STP8STP8 STP9STP9
STP13STP13 STP10STP10 STP17STP17
STP54STP54 STP51STP51 STP56STP56 STP53STP53 STP52STP52 STP57STP57
CPU_PRESENT­CPU_TEST25_H_BYPASSCLK_P
CPU_TEST21_SCANEN CPU_TEST20_SCANCLK2 CPU_TEST24_SCANCLK1 CPU_TEST22_SCANSHIFTEN CPU_TEST12_SCANSHIFTENB CPU_TEST15_BP1 CPU_TEST14_BP0
CPU_TEST25_H_BYPASSCLK_N
Elitegroup Computer System
Elitegroup Computer System
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
C
C
C
Date: Sheet
Date: Sheet
Date: Sheet
Elitegroup Computer System
M2 HT I/F ,CTRL & DEBUG PART1
M2 HT I/F ,CTRL & DEBUG PART1
M2 HT I/F ,CTRL & DEBUG PART1
3VSB
V_DIMM
CPUCLK CPUCLK-
CPU_VDD_RUN_FB_P CPU_VDD_RUN_FB_N
CPU_TEST29_H_FBCLKOUT_P CPU_TEST29_L_FBCLKOUT_N
CPU_VDDIO_SUS_FB_P CPU_VDDIO_SUS_FB_N
CPU_ALL_PWROK CPU_LDTSTOP­CPU_HT_RESET-
-CPU_THERMTRIP
20050922
RS485M-M
RS485M-M
RS485M-M
E
3VSB
R169
R169
20060221
4.7K-04
4.7K-04
-CPU_THERMTRIP 21
VCC25A
R216 1KR216 1K R233 510R233 510
R242 300-04R242 300-04 R235 330-04-OR235 330-04-O R239 330-04-OR239 330-04-O R244 330-04-OR244 330-04-O R248 330-04-OR248 330-04-O R211 330-04-OR211 330-04-O R210 330-04-OR210 330-04-O
R229 510R229 510
735Friday, April 07, 2006
735Friday, April 07, 2006
735Friday, April 07, 2006
C154
C154 .1U-04-O
.1U-04-O
of
of
of
20050927
TP66TP66 TP10TP10
TP11TP11 TP26TP26
TP30TP30 TP28TP28
TP16TP16 STP38STP38
STP36STP36 STP30STP30 STP32STP32 STP26STP26 STP67STP67
V_DIMM
20050926
1.0
1.0
1.0
A
B
C
D
E
CPU HyperTransport Interface
VDDLDTRUNCPU is connected to the VDD_LDT_RUN power supply through the package or on the die. It is only connected
4 4
on the board to decoupling near the CPU package.
VCC1.2
HT_CADIN15_P15 HT_CADIN15_N15 HT_CADIN14_P15 HT_CADIN14_N15 HT_CADIN13_P15 HT_CADIN13_N15 HT_CADIN12_P15 HT_CADIN12_N15 HT_CADIN11_P15 HT_CADIN11_N15 HT_CADIN10_P15 HT_CADIN10_N15 HT_CADIN9_P15 HT_CADIN9_N15 HT_CADIN8_P15
3 3
VCC1.2
2 2
HT_CADIN8_N15 HT_CADIN7_P15 HT_CADIN7_N15 HT_CADIN6_P15 HT_CADIN6_N15 HT_CADIN5_P15 HT_CADIN5_N15 HT_CADIN4_P15 HT_CADIN4_N15 HT_CADIN3_P15 HT_CADIN3_N15 HT_CADIN2_P15 HT_CADIN2_N15 HT_CADIN1_P15 HT_CADIN1_N15 HT_CADIN0_P15 HT_CADIN0_N15
HT_CLKIN1_P15 HT_CLKIN1_N15
HT_CLKIN0_P15 HT_CLKIN0_N15
R220 49.9-1-04R220 49.9-1-04 R204 49.9-1-04R204 49.9-1-04
HT_CTLIN0_P15 HT_CTLIN0_N15
20051006
DHOLE1 DHOLE2 DHOLE3 DHOLE4
AJ4 AJ3 AJ2 AJ1
MT1 MT2 MT3 MT4 MT5 MT6 MT7 MT8
MT9 MT10 MT11 MT12 MT13 MT14 MT15 MT16
U6 V6 T4 T5 R6 T6 P4 P5 M4 M5
L6 M6 K4 K5
J6 K6 U3 U2 R1 T1 R3 R2 N1 P1
L1 M1
L3
L2
J1 K1
J3
J2 N6
P6 N3
N2 V4
V5 U1
V1
CPU1A
CPU1A
VLDT_06 VLDT_05 VLDT_02 VLDT_01
L0_CADIN_H15 L0_CADIN_L15 L0_CADIN_H14 L0_CADIN_L14 L0_CADIN_H13 L0_CADIN_L13 L0_CADIN_H12 L0_CADIN_L12 L0_CADIN_H11 L0_CADIN_L11 L0_CADIN_H10 L0_CADIN_L10 L0_CADIN_H9 L0_CADIN_L9 L0_CADIN_H8 L0_CADIN_L8 L0_CADIN_H7 L0_CADIN_L7 L0_CADIN_H6 L0_CADIN_L6 L0_CADIN_H5 L0_CADIN_L5 L0_CADIN_H4 L0_CADIN_L4 L0_CADIN_H3 L0_CADIN_L3 L0_CADIN_H2 L0_CADIN_L2 L0_CADIN_H1 L0_CADIN_L1 L0_CADIN_H0 L0_CADIN_L0
L0_CLKIN_H1 L0_CLKIN_L1
L0_CLKIN_H0 L0_CLKIN_L0
L0_CTLIN_H1 L0_CTLIN_L1
L0_CTLIN_H0 L0_CTLIN_L0
DHOLE1 DHOLE2 DHOLE3 DHOLE4
MT1 MT2 MT3 MT4 MT5 MT6 MT7 MT8 MT9 MT10 MT11 MT12 MT13 MT14 MT15 MT16
Athlon 64 M2 Processor Socket
VLDT_08 VLDT_07 VLDT_04 VLDT_03
L0_CADOUT_H15
L0_CADOUT_L15
L0_CADOUT_H14
L0_CADOUT_L14
L0_CADOUT_H13
L0_CADOUT_L13
L0_CADOUT_H12
L0_CADOUT_L12
L0_CADOUT_H11
L0_CADOUT_L11
L0_CADOUT_H10
L0_CADOUT_L10
L0_CADOUT_H9
L0_CADOUT_L9
L0_CADOUT_H8
L0_CADOUT_L8
L0_CADOUT_H7
L0_CADOUT_L7
L0_CADOUT_H6
L0_CADOUT_L6
L0_CADOUT_H5
L0_CADOUT_L5
L0_CADOUT_H4
HT LINK
HT LINK
L0_CADOUT_L4
L0_CADOUT_H3
L0_CADOUT_L3
L0_CADOUT_H2
L0_CADOUT_L2
L0_CADOUT_H1
L0_CADOUT_L1
L0_CADOUT_H0
L0_CADOUT_L0 L0_CLKOUT_H1
L0_CLKOUT_L1
L0_CLKOUT_H0
L0_CLKOUT_L0
L0_CTLOUT_H1
L0_CTLOUT_L1
L0_CTLOUT_H0
L0_CTLOUT_L0
MT17 MT18 MT19 MT20 MT21 MT22 MT23 MT24 MT25 MT26 MT27 MT28 MT29 MT30 MT31 MT32
VLDT_B
H6 H5 H2 H1
Y5 Y4 AB6 AA6 AB5 AB4 AD6 AC6 AF6 AE6 AF5 AF4 AH6 AG6 AH5 AH4 Y1 W1 AA2 AA3 AB1 AA1 AC2 AC3 AE2 AE3 AF1 AE1 AG2 AG3 AH1 AG1
AD5 AD4
AD1 AC1
HT_CPU_CTLOUT1_P
Y6
HT_CPU_CTLOUT1_N
W6 W2
W3
MT17 MT18 MT19 MT20 MT21 MT22 MT23 MT24 MT25 MT26 MT27 MT28 MT29 MT30 MT31 MT32
2005110920051109
C189
C189
4.7U-08
4.7U-08
HT_CADOUT15_P 15 HT_CADOUT15_N 15 HT_CADOUT14_P 15 HT_CADOUT14_N 15 HT_CADOUT13_P 15 HT_CADOUT13_N 15 HT_CADOUT12_P 15 HT_CADOUT12_N 15 HT_CADOUT11_P 15 HT_CADOUT11_N 15 HT_CADOUT10_P 15 HT_CADOUT10_N 15 HT_CADOUT9_P 15 HT_CADOUT9_N 15 HT_CADOUT8_P 15 HT_CADOUT8_N 15 HT_CADOUT7_P 15 HT_CADOUT7_N 15 HT_CADOUT6_P 15 HT_CADOUT6_N 15 HT_CADOUT5_P 15 HT_CADOUT5_N 15 HT_CADOUT4_P 15 HT_CADOUT4_N 15 HT_CADOUT3_P 15 HT_CADOUT3_N 15 HT_CADOUT2_P 15 HT_CADOUT2_N 15 HT_CADOUT1_P 15 HT_CADOUT1_N 15 HT_CADOUT0_P 15 HT_CADOUT0_N 15
HT_CLKOUT1_P 15 HT_CLKOUT1_N 15
HT_CLKOUT0_P 15 HT_CLKOUT0_N 15
HT_CTLOUT0_P 15 HT_CTLOUT0_N 15
STP24STP24 STP18STP18
VCC1.2
4.7U-08
4.7U-08
C198
C198
C201
C201
4.7U-08
4.7U-08
C195
C195 .22U
.22U
C197
C197 .22U
.22U
C194
C194 10P-04
10P-04
C196
C196 10P-04
10P-04
1 1
Elitegroup Computer System
Elitegroup Computer System
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
C
C
C
Date: Sheet
Date: Sheet
A
B
C
D
Date: Sheet
Elitegroup Computer System
M2 HT I/F,CTRL & DEBUG PART2
M2 HT I/F,CTRL & DEBUG PART2
M2 HT I/F,CTRL & DEBUG PART2
RS485M-M
RS485M-M
RS485M-M
E
of
of
of
835Friday, April 07, 2006
835Friday, April 07, 2006
835Friday, April 07, 2006
1.0
1.0
1.0
A
Processor DDR2 Memory Interface
CPU1C
MEM_MB_DATA[63..0]12
4 4
3 3
To upper DIMM sockets for each
Logical DIMM (DIMM2 and DIMM4).
2 2
1 1
MEM_MB_CHECK[7..0]12
MEM_MB_DM[8..0]12
MEM_MB_DQS8_P12 MEM_MB_DQS8_N12 MEM_MA_DQS8_N 11 MEM_MB_DQS7_P12 MEM_MB_DQS7_N12 MEM_MB_DQS6_P12 MEM_MB_DQS6_N12 MEM_MB_DQS5_P12 MEM_MB_DQS5_N12 MEM_MB_DQS4_P12 MEM_MB_DQS4_N12 MEM_MB_DQS3_P12 MEM_MB_DQS3_N12 MEM_MB_DQS2_P12 MEM_MB_DQS2_N12 MEM_MB_DQS1_P12 MEM_MB_DQS1_N12 MEM_MB_DQS0_P12 MEM_MB_DQS0_N12
A
MEM_MB_DATA63 MEM_MB_DATA62 MEM_MB_DATA61 MEM_MB_DATA60 MEM_MB_DATA59 MEM_MB_DATA58 MEM_MB_DATA57 MEM_MB_DATA56 MEM_MB_DATA55 MEM_MB_DATA54 MEM_MB_DATA53 MEM_MB_DATA52 MEM_MB_DATA51 MEM_MB_DATA50 MEM_MB_DATA49 MEM_MB_DATA48 MEM_MB_DATA47 MEM_MB_DATA46 MEM_MB_DATA45 MEM_MB_DATA44 MEM_MB_DATA43 MEM_MB_DATA42 MEM_MB_DATA41 MEM_MB_DATA40 MEM_MB_DATA39 MEM_MB_DATA38 MEM_MB_DATA37 MEM_MB_DATA36 MEM_MB_DATA35 MEM_MB_DATA34 MEM_MB_DATA33 MEM_MB_DATA32 MEM_MB_DATA31 MEM_MB_DATA30 MEM_MB_DATA29 MEM_MB_DATA28 MEM_MB_DATA27 MEM_MB_DATA26 MEM_MB_DATA25 MEM_MB_DATA24 MEM_MB_DATA23 MEM_MB_DATA22 MEM_MB_DATA21 MEM_MB_DATA20 MEM_MB_DATA19 MEM_MB_DATA18 MEM_MB_DATA17 MEM_MB_DATA16 MEM_MB_DATA15 MEM_MB_DATA14 MEM_MB_DATA13 MEM_MB_DATA12 MEM_MB_DATA11 MEM_MB_DATA10 MEM_MB_DATA9 MEM_MB_DATA8 MEM_MB_DATA7 MEM_MB_DATA6 MEM_MB_DATA5 MEM_MB_DATA4 MEM_MB_DATA3 MEM_MB_DATA2 MEM_MB_DATA1 MEM_MB_DATA0
MEM_MB_CHECK7 MEM_MB_CHECK6 MEM_MB_CHECK5 MEM_MB_CHECK4 MEM_MB_CHECK3 MEM_MB_CHECK2 MEM_MB_CHECK1 MEM_MB_CHECK0
MEM_MB_DM7 MEM_MB_DM6 MEM_MB_DM5 MEM_MB_DM4 MEM_MB_DM3 MEM_MB_DM2 MEM_MB_DM1 MEM_MB_DM0
AH13 AL13 AL15 AJ15 AF13 AG13 AL14 AK15 AL16 AL17 AK21 AL21 AH15 AJ16 AH19 AL20 AJ22 AL22 AL24 AK25 AJ21 AH21 AH23 AJ24 AL27 AK27 AH31 AG30 AL25 AL26 AJ30 AJ31
E31 E30 B27 A27 F29 F31 A29 A28 A25 A24 C22 D21 A26 B25 B23 A22 B21 A20 C16 D15 C21 A21 A17 A16 B15 A14 E13 F13 C15 A15 A13 D13
K29 K31 G30 G29 L29 L28 H31 G31
AJ14 AH17 AJ23 AK29
C30 A23 B17 B13
AK13 AJ13 AK17 AJ17 AK23 AL23 AL28 AL29
D31 C31 C24 C23 D17 C17 C14 C13
J29
J31 J30
CPU1C
MB_DATA63 MB_DATA62 MB_DATA61 MB_DATA60 MB_DATA59 MB_DATA58 MB_DATA57 MB_DATA56 MB_DATA55 MB_DATA54 MB_DATA53 MB_DATA52 MB_DATA51 MB_DATA50 MB_DATA49 MB_DATA48 MB_DATA47 MB_DATA46 MB_DATA45 MB_DATA44 MB_DATA43 MB_DATA42 MB_DATA41 MB_DATA40 MB_DATA39 MB_DATA38 MB_DATA37 MB_DATA36 MB_DATA35 MB_DATA34 MB_DATA33 MB_DATA32 MB_DATA31 MB_DATA30 MB_DATA29 MB_DATA28 MB_DATA27 MB_DATA26 MB_DATA25 MB_DATA24 MB_DATA23 MB_DATA22 MB_DATA21 MB_DATA20 MB_DATA19 MB_DATA18 MB_DATA17 MB_DATA16 MB_DATA15 MB_DATA14 MB_DATA13 MB_DATA12 MB_DATA11 MB_DATA10 MB_DATA9 MB_DATA8 MB_DATA7 MB_DATA6 MB_DATA5 MB_DATA4 MB_DATA3 MB_DATA2 MB_DATA1 MB_DATA0
MB_CHECK7 MB_CHECK6 MB_CHECK5 MB_CHECK4 MB_CHECK3 MB_CHECK2 MB_CHECK1 MB_CHECK0
MB_DM8 MB_DM7 MB_DM6 MB_DM5 MB_DM4 MB_DM3 MB_DM2 MB_DM1 MB_DM0
MB_DQS_H8 MB_DQS_L8 MB_DQS_H7 MB_DQS_L7 MB_DQS_H6 MB_DQS_L6 MB_DQS_H5 MB_DQS_L5 MB_DQS_H4 MB_DQS_L4 MB_DQS_H3 MB_DQS_L3 MB_DQS_H2 MB_DQS_L2 MB_DQS_H1 MB_DQS_L1 MB_DQS_H0 MB_DQS_L0
B
MA_DATA63 MA_DATA62 MA_DATA61 MA_DATA60 MA_DATA59 MA_DATA58 MA_DATA57 MA_DATA56 MA_DATA55 MA_DATA54 MA_DATA53 MA_DATA52 MA_DATA51 MA_DATA50 MA_DATA49 MA_DATA48 MA_DATA47 MA_DATA46 MA_DATA45 MA_DATA44 MA_DATA43 MA_DATA42 MA_DATA41 MA_DATA40 MA_DATA39 MA_DATA38 MA_DATA37
DDRII: DATA
DDRII: DATA
MA_DATA36 MA_DATA35 MA_DATA34 MA_DATA33 MA_DATA32 MA_DATA31 MA_DATA30 MA_DATA29 MA_DATA28 MA_DATA27 MA_DATA26 MA_DATA25 MA_DATA24 MA_DATA23 MA_DATA22 MA_DATA21 MA_DATA20 MA_DATA19 MA_DATA18 MA_DATA17 MA_DATA16 MA_DATA15 MA_DATA14 MA_DATA13 MA_DATA12 MA_DATA11 MA_DATA10
MA_DATA9 MA_DATA8 MA_DATA7 MA_DATA6 MA_DATA5 MA_DATA4 MA_DATA3 MA_DATA2 MA_DATA1 MA_DATA0
MA_CHECK7 MA_CHECK6 MA_CHECK5 MA_CHECK4 MA_CHECK3 MA_CHECK2 MA_CHECK1 MA_CHECK0
MA_DM8 MA_DM7 MA_DM6 MA_DM5 MA_DM4 MA_DM3 MA_DM2 MA_DM1 MA_DM0
MA_DQS_H8 MA_DQS_L8 MA_DQS_H7 MA_DQS_L7 MA_DQS_H6 MA_DQS_L6 MA_DQS_H5 MA_DQS_L5 MA_DQS_H4 MA_DQS_L4 MA_DQS_H3 MA_DQS_L3 MA_DQS_H2 MA_DQS_L2 MA_DQS_H1 MA_DQS_L1 MA_DQS_H0 MA_DQS_L0
Athlon 64 M2 Processor Socket
B
MEM_MA_DATA63
AE14
MEM_MA_DATA62
AG14
MEM_MA_DATA61
AG16
MEM_MA_DATA60
AD17
MEM_MA_DATA59
AD13
MEM_MA_DATA58
AE13
MEM_MA_DATA57
AG15
MEM_MA_DATA56
AE16
MEM_MA_DATA55
AG17
MEM_MA_DATA54
AE18
MEM_MA_DATA53
AD21
MEM_MA_DATA52
AG22
MEM_MA_DATA51
AE17
MEM_MA_DATA50
AF17
MEM_MA_DATA49
AF21
MEM_MA_DATA48
AE21
MEM_MA_DATA47
AF23
MEM_MA_DATA46
AE23
MEM_MA_DATA45
AJ26
MEM_MA_DATA44
AG26
MEM_MA_DATA43
AE22
MEM_MA_DATA42
AG23
MEM_MA_DATA41
AH25
MEM_MA_DATA40
AF25
MEM_MA_DATA39
AJ28
MEM_MA_DATA38
AJ29
MEM_MA_DATA37
AF29
MEM_MA_DATA36
AE26
MEM_MA_DATA35
AJ27
MEM_MA_DATA34
AH27
MEM_MA_DATA33
AG29
MEM_MA_DATA32
AF27
MEM_MA_DATA31
E29
MEM_MA_DATA30
E28
MEM_MA_DATA29
D27
MEM_MA_DATA28
C27
MEM_MA_DATA27
G26
MEM_MA_DATA26
F27
MEM_MA_DATA25
C28
MEM_MA_DATA24
E27
MEM_MA_DATA23
F25
MEM_MA_DATA22
E25
MEM_MA_DATA21
E23
MEM_MA_DATA20
D23
MEM_MA_DATA19
E26
MEM_MA_DATA18
C26
MEM_MA_DATA17
G23
MEM_MA_DATA16
F23
MEM_MA_DATA15
E22
MEM_MA_DATA14
E21
MEM_MA_DATA13
F17
MEM_MA_DATA12
G17
MEM_MA_DATA11
G22
MEM_MA_DATA10
F21
MEM_MA_DATA9
G18
MEM_MA_DATA8
E17
MEM_MA_DATA7
G16
MEM_MA_DATA6
E15
MEM_MA_DATA5
G13
MEM_MA_DATA4
H13
MEM_MA_DATA3
H17
MEM_MA_DATA2
E16
MEM_MA_DATA1
E14
MEM_MA_DATA0
G14
MEM_MA_CHECK7
K25
MEM_MA_CHECK6
J26
MEM_MA_CHECK5
G28
MEM_MA_CHECK4
G27
MEM_MA_CHECK3
L24
MEM_MA_CHECK2
K27
MEM_MA_CHECK1
H29
MEM_MA_CHECK0
H27
MEM_MA_DM8MEM_MB_DM8
J25
MEM_MA_DM7
AF15
MEM_MA_DM6
AF19
MEM_MA_DM5
AJ25
MEM_MA_DM4
AH29
MEM_MA_DM3
B29
MEM_MA_DM2
E24
MEM_MA_DM1
E18
MEM_MA_DM0
H15 J28
J27 AD15 AE15 AG18 AG19 AG24 AG25 AG27 AG28 D29 C29 C25 D25 E19 F19 F15 G15
C
MEM_MA_DATA[63..0] 11
AMD USE 39.2 OHM
Keep trace to resistors less than 1" from CPU pin
AMD USE 39.2 OHM
Logical DIMM (DIMM1 and DIMM3).
To lower DIMM sockets for each
MEM_MA_CHECK[7..0] 11
MEM_MA_DM[8..0] 11
MEM_MA_DQS8_P 11 MEM_MA_DQS7_P 11
MEM_MA_DQS7_N 11 MEM_MA_DQS6_P 11 MEM_MA_DQS6_N 11 MEM_MA_DQS5_P 11 MEM_MA_DQS5_N 11 MEM_MA_DQS4_P 11 MEM_MA_DQS4_N 11 MEM_MA_DQS3_P 11 MEM_MA_DQS3_N 11 MEM_MA_DQS2_P 11 MEM_MA_DQS2_N 11 MEM_MA_DQS1_P 11 MEM_MA_DQS1_N 11 MEM_MA_DQS0_P 11 MEM_MA_DQS0_N 11
C
D
VDD_VTT_SUS_CPU is connected to the VDD_VTT_SUS power supply through the package or on the die. It is only connected on the board to decoupling near the CPU package.
V_DIMM
R253
R253
40.2-1
40.2-1
R258
R258
40.2-1
40.2-1
STP39STP39
MEM_MA1_CS_L111,14 MEM_MA1_CS_L011,14 MEM_MA0_CS_L111,14 MEM_MA0_CS_L011,14
MEM_MB1_CS_L112,14 MEM_MB1_CS_L012,14 MEM_MB0_CS_L112,14 MEM_MB0_CS_L012,14
MEM_MB_CKE112,14 MEM_MB_CKE012,14 MEM_MA_CKE111,14 MEM_MA_CKE011,14
MEM_MA_BANK211,14 MEM_MA_BANK111,14 MEM_MA_BANK011,14
MEM_MA_RAS-11,14 MEM_MA_CAS-11,14 MEM_MA_WE-11,14
VTT_DDR
D12
VTT1
C12
VTT_DDR
CPU_M_VREF_SUS
CPU_VTT_SUS_SENSE
M_ZN M_ZP
MEM_MA_ADD15 MEM_MA_ADD14 MEM_MA_ADD13 MEM_MA_ADD12 MEM_MA_ADD11 MEM_MA_ADD10 MEM_MA_ADD9 MEM_MA_ADD8 MEM_MA_ADD7 MEM_MA_ADD6 MEM_MA_ADD5 MEM_MA_ADD4 MEM_MA_ADD3 MEM_MA_ADD2 MEM_MA_ADD1 MEM_MB_ADD1
B12 A12
AK12
AJ12 AH12 AG12
AL12
F12 E12
AH11
AJ11 AD27
AA25 AC25 AA24
AE29 AB31 AE30 AC31
M31 M29
M25 M27
N24
AC26
N26 P25 Y25 N27 R24 P27 R25 R26 R27 T25 U25 T27
W24
N25 Y27
AA27 AA26
AB25 AB27
L27
VTT2 VTT3 VTT4 VTT5 VTT6 VTT7 VTT8 VTT9
MEMVREF VTT_SENSE MEMZN
MEMZP MA1_CS_L1
MA1_CS_L0 MA0_CS_L1 MA0_CS_L0
MB1_CS_L1 MB1_CS_L0 MB0_CS_L1 MB0_CS_L0
MB_CKE1 MB_CKE0 MA_CKE1 MA_CKE0
MA_ADD15 MA_ADD14 MA_ADD13 MA_ADD12 MA_ADD11 MA_ADD10 MA_ADD9 MA_ADD8 MA_ADD7 MA_ADD6 MA_ADD5 MA_ADD4 MA_ADD3 MA_ADD2 MA_ADD1 MA_ADD0
MA_BANK2 MA_BANK1 MA_BANK0
MA_RAS_L MA_CAS_L MA_WE_L
Athlon 64 M2 Processor Socket
CPU1B
CPU1B
MA1_CLK_H2
MA1_CLK_L2
MA1_CLK_H1
MA1_CLK_L1
MA1_CLK_H0
MA1_CLK_L0
MA0_CLK_H2
MA0_CLK_L2
MA0_CLK_H1
MA0_CLK_L1
MA0_CLK_H0
MA0_CLK_L0
MB1_CLK_H2
MB1_CLK_L2
MB1_CLK_H1
MB1_CLK_L1
MB1_CLK_H0
MB1_CLK_L0
MB0_CLK_H2
MB0_CLK_L2
MB0_CLK_H1
MB0_CLK_L1
MB0_CLK_H0
MB0_CLK_L0
MB1_ODT0 MB0_ODT0 MA1_ODT0 MA0_ODT0
MB_ADD15 MB_ADD14 MB_ADD13 MB_ADD12 MB_ADD11
DDR II: CMD/CTRL/CLK
DDR II: CMD/CTRL/CLK
MB_ADD10
MB_BANK2 MB_BANK1 MB_BANK0
MB_RAS_L MB_CAS_L
VDD_VREF_SUS_CPU
V_DIMM
AMD USE 16.9 OHM
AMD USE 16.9 OHM
R255
R255 15-1
15-1
R254
R254 15-1
15-1
CPU_M_VREF_SUS
C222
C222
C223
C223
1000P-04
1000P-04
.1U-04
.1U-04
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
C
C
C
Date: Sheet
Friday, April 07, 2006
Date: Sheet
Friday, April 07, 2006
Date: Sheet
D
Friday, April 07, 2006
E
AE20 AE19 G20 G21 V27 W27 AG21 AG20 G19 H19 U27 U26
AL19 AL18 C19 D19 W29 W28 AJ19 AK19 A18 A19 U31 U30
AD31 AD29 AC27 AC28
MEM_MB_ADD15
N28
MEM_MB_ADD14
N29
MEM_MB_ADD13
AE31
MEM_MB_ADD12
N30
MEM_MB_ADD11
P29
MEM_MB_ADD10
AA29
MEM_MB_ADD9
P31
MB_ADD9 MB_ADD8 MB_ADD7 MB_ADD6 MB_ADD5 MB_ADD4 MB_ADD3 MB_ADD2 MB_ADD1 MB_ADD0
MB_WE_L
MEM_MB_ADD8
R29
MEM_MB_ADD7
R28
MEM_MB_ADD6
R31
MEM_MB_ADD5
R30
MEM_MB_ADD4
T31
MEM_MB_ADD3
T29
MEM_MB_ADD2
U29 U28
MEM_MB_ADD0MEM_MA_ADD0
AA30 N31
AA31 AA28
AB29 AC29 AC30
Elitegroup Computer System
Elitegroup Computer System
Elitegroup Computer System
M2 DDR2 MEMORY I/F
M2 DDR2 MEMORY I/F
M2 DDR2 MEMORY I/F
RS485M-M
RS485M-M
RS485M-M
MEM_MA1_CLK2_P 11,14 MEM_MA1_CLK2_N 11,14 MEM_MA1_CLK1_P 11,14 MEM_MA1_CLK1_N 11,14 MEM_MA1_CLK0_P 11,14 MEM_MA1_CLK0_N 11,14 MEM_MA0_CLK2_P 11,14 MEM_MA0_CLK2_N 11,14 MEM_MA0_CLK1_P 11,14 MEM_MA0_CLK1_N 11,14 MEM_MA0_CLK0_P 11,14 MEM_MA0_CLK0_N 11,14
MEM_MB1_CLK2_P 12,14 MEM_MB1_CLK2_N 12,14 MEM_MB1_CLK1_P 12,14 MEM_MB1_CLK1_N 12,14 MEM_MB1_CLK0_P 12,14 MEM_MB1_CLK0_N 12,14 MEM_MB0_CLK2_P 12,14 MEM_MB0_CLK2_N 12,14 MEM_MB0_CLK1_P 12,14 MEM_MB0_CLK1_N 12,14 MEM_MB0_CLK0_P 12,14 MEM_MB0_CLK0_N 12,14
MEM_MB1_ODT0 12,14 MEM_MB0_ODT0 12,14 MEM_MA1_ODT0 11,14 MEM_MA0_ODT0 11,14
MEM_MB_BANK2 12,14 MEM_MB_BANK1 12,14 MEM_MB_BANK0 12,14
MEM_MB_RAS- 12,14 MEM_MB_CAS- 12,14 MEM_MB_WE- 12,14
E
MEM_MB_ADD[15..0] 12,14MEM_MA_ADD[15..0]11,14
1.0
1.0
1.0
of
of
of
9
9
9
35
35
35
A
B
C
D
E
Processor Power and Ground
VCORE VCORE VCORE
4 4
3 3
2 2
AA8 AA10 AA12 AA14 AA16 AA18
AB7
AB9 AB11
AC4
AC5
AC8 AC10
AD2
AD3
AD7
AD9 AE10
AF7
AF9
AG4
AG5
AG7
AH2
AH3
G10
G12
H11
H23
A4 A6
B3 B5
B7 C2 C4 C6 C8 D3 D5 D7 D9 E4 E6 E8
E10
F5 F7 F9
F11
G6 G8
H7
CPU1E
CPU1E
VDD1 VDD2 VDD3 VDD4 VDD5 VDD6 VDD7 VDD8 VDD9 VDD10 VDD11 VDD12 VDD13 VDD14 VDD15 VDD16 VDD17 VDD18 VDD19 VDD20 VDD21 VDD22 VDD23 VDD24 VDD25 VDD26 VDD27 VDD28 VDD29 VDD30 VDD31 VDD32 VDD33 VDD34 VDD35 VDD36 VDD37 VDD38 VDD39 VDD40 VDD41 VDD42 VDD43 VDD44 VDD45 VDD46 VDD47 VDD48 VDD49 VDD50 VDD51 VDD52 VDD53
Athlon 64 M2 Processor Socket
R10
VDD106
R8
VDD105
R5
VDD104
R4
VDD103
P19
VDD102
P17
VDD101
P15
VDD100
P13
VDD99
P11
VDD98
P9
VDD97
P7
VDD96
N18
VDD95
N16
VDD94
N14
VDD93
N12
VDD92
N10
VDD91
N8
VDD90
M19
VDD89
M17
VDD88
M15
VDD87
M13
VDD86
M11
VDD85
M9
VDD84
M7
VDD83
M3
VDD82
M2
VDD81
L18
VDD80
L16
VDD79
L14
VDD78
Y19
VDD77
Y17
VDD76
POWER1
POWER1
L12
VDD75
L10
VDD74
L8
VDD73
L5
VDD72
L4
VDD71
K23
VDD70
K21
VDD69
K19
VDD68
K17
VDD67
K15
VDD66
K13
VDD65
K11
VDD64
K9
VDD63
K7
VDD62
J24
VDD61
J22
VDD60
J20
VDD59
J18
VDD58
J16
VDD57
J14
VDD56
J12
VDD55
J8
VDD54
R12 R14 R16 R18 R20
T11 T13 T15 T17 T19 T21
U10 U12 U14 U16 U18 U20
V11 V13 V15 V17 V19 V21
W10 W12 W14 W16 W18 W20
Y11 Y13 Y15
Y21 AA20 AA22 AB13 AB15 AB17 AB19 AB21 AB23
CPU1F
CPU1F
VDD107 VDD108 VDD109 VDD110 VDD111
T2
VDD112
T3
VDD113
T7
VDD114
T9
VDD115 VDD116 VDD117 VDD118 VDD119 VDD120 VDD121
U8
VDD122 VDD123 VDD124 VDD125 VDD126 VDD127 VDD128
V9
VDD129 VDD130 VDD131 VDD132 VDD133 VDD134 VDD135
W4
VDD136
W5
VDD137
W8
VDD138 VDD139 VDD140 VDD141 VDD142 VDD143 VDD144
Y2
VDD145
Y3
VDD146
Y7
VDD147
Y9
VDD148 VDD149 VDD150 VDD151 VDD152 VDD153 VDD154 VDD155 VDD156 VDD157 VDD158 VDD159 VDD160
VDDIO28 VDDIO27 VDDIO26 VDDIO25 VDDIO24 VDDIO23 VDDIO22 VDDIO21 VDDIO20 VDDIO19 VDDIO18 VDDIO17 VDDIO16 VDDIO15 VDDIO14 VDDIO13 VDDIO12 VDDIO11 VDDIO10
VDDIO9
VDDIO VDDIO8 VDDIO7 VDDIO6 VDDIO5 VDDIO4 VDDIO3 VDDIO2
POWER2
POWER2
VDDIO1 VDD184
VDD183 VDD182 VDD181 VDD180 VDD179 VDD178 VDD177 VDD176 VDD175 VDD174 VDD173 VDD172 VDD171 VDD170 VDD169 VDD168 VDD167 VDD166 VDD165 VDD164 VDD163 VDD162 VDD161
Y29 Y28 Y26 Y24 V30 V28 V26 V25 T30 T28 T26 T24 P30 P28 P26 P24 M30 M28 M26 M24 AF30 AD30 AD28 AD26 AC24 AB30 AB28 AB26 AB24
Y23 W22 V23 U22 T23 R22 P23 P21 N22 N20 M23 M21 L22 L20 AF11 AE12 AD23 AD11 AC22 AC20 AC18 AC16 AC14 AC12
V_DIMM
AA11 AA13 AA15 AA17 AA19 AA21 AA23
AB10 AB12 AB14 AB16 AB18 AB20 AB22
AC11 AC13 AC15 AC17 AC19 AC21 AC23
AD10 AD12 AD14 AD16 AD20 AD22 AD24
AE11
AF10 AF12 AF14 AF16 AF18 AF20 AF22 AF24 AF26 AF28
AG10
A11 AA4 AA5 AA7 AA9
AB2 AB3 AB8
AC7 AC9
AD8
AE4 AE5 AE9
AF2 AF3 AF8
CPU1H
CPU1G
CPU1G
A3
VSS1
A7
VSS2
A9
VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15 VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52 VSS53 VSS54 VSS55 VSS56 VSS57 VSS58 VSS59 VSS61
m2
m2
Athlon 64 M2 Processor Socket
VSS121 VSS120 VSS119 VSS118 VSS117 VSS116 VSS115 VSS114 VSS113 VSS112 VSS111 VSS110 VSS109 VSS108 VSS107 VSS106 VSS105 VSS104 VSS103 VSS102 VSS101 VSS100
VSS99 VSS98 VSS97 VSS96 VSS95 VSS94 VSS93 VSS92
GND1
GND1
VSS91 VSS90 VSS89 VSS88 VSS87 VSS86 VSS85 VSS84 VSS83 VSS82 VSS81 VSS80 VSS79 VSS78 VSS77 VSS76 VSS75 VSS74 VSS73 VSS72 VSS71 VSS70 VSS69 VSS68 VSS67 VSS66 VSS65 VSS64 VSS63 VSS62
H10 H8 G11 G9 F30 F28 F26 F24 F22 F20 F18 F16 F14 F4 E11 D30 D28 D26 D24 D22 D20 D18 D16 D14 C3 B30 B28 B26 B24 B22 B20 B18 B16 B14 B11 B9 B4 AL5 AK30 AK28 AK26 AK24 AK22 AK20 Y16 Y14 AK18 AK16 AK14 AK2 AH30 AH28 AH26 AH24 AH22 AH20 AH18 AH16 AH14 AG11
T22 T20 T18 T16 T14 T12 T10
R23 R21 R19 R17 R15 R13 R11
P22 P20 P18 P16 P14 P12 P10
N23 N21 N19 N17 Y18 K22 K20 K18 K16 K14 K12 K10
H30 H28 H26 H24 H22 H18 H16 H14 H12
CPU1H
VSS183 VSS182 VSS181 VSS180 VSS179 VSS178 VSS177
T8
VSS176 VSS175 VSS174 VSS173 VSS172 VSS171 VSS170 VSS169
R9
VSS168
R7
VSS167 VSS166 VSS165 VSS164 VSS163 VSS162 VSS161 VSS160
P8
VSS159
P3
VSS158
P2
VSS157 VSS156 VSS155 VSS154 VSS153 VSS152 VSS151 VSS150 VSS149 VSS148 VSS147 VSS146 VSS145
K8
VSS144
K3
VSS143
K2
VSS142
J23
VSS141
J21
VSS140
J19
VSS139
J17
VSS138
J15
VSS137
J13
VSS136
J11
VSS135
J9
VSS134
J7
VSS133
J5
VSS132
J4
VSS131 VSS130 VSS129 VSS128 VSS127 VSS126 VSS125 VSS124 VSS123 VSS122
m2
m2
VSS184 VSS185 VSS186 VSS187 VSS188 VSS189 VSS190 VSS191 VSS192 VSS193 VSS194 VSS195 VSS196 VSS197 VSS198 VSS199 VSS200 VSS201 VSS202 VSS203 VSS204 VSS205 VSS206 VSS207 VSS208 VSS209 VSS210 VSS211 VSS212 VSS213 VSS214 VSS215
GND2
GND2
VSS216 VSS217 VSS218 VSS219 VSS220 VSS221 VSS222 VSS223 VSS224 VSS225 VSS226 VSS227 VSS228 VSS229 VSS230 VSS231 VSS232 VSS233 VSS234 VSS235 VSS236 VSS237 VSS238 VSS239 VSS240 VSS241 VSS242 VSS243 VSS244 VSS245
U4 U5 U7 U9 U11 U13 U15 U17 U19 U21 U23 V2 V3 V10 V12 V14 V16 V18 V20 V22 W9 W11 W13 W15 W17 W19 W21 W23 Y8 Y10 Y12 W7 Y20 Y22 K24 K26 K28 K30 L7 L9 L11 L13 L15 L17 L19 L21 L23 M8 M10 M12 M14 M16 M18 M20 M22 N4 N5 N7 N9 N11 N13 N15
Bottomside Decoupling
20050926
VCORE
SC35
SC35 22U-08
22U-08
SC45
SC45 22U-08
22U-08
SC43
SC43 22U-08
22U-08
SC28
SC28 22U-08
22U-08
SC41
SC41 22U-08
22U-08
SC42
SC42 22U-08
22U-08
SC46
SC46 22U-08
22U-08
SC31
SC31 22U-08
22U-08
SC30
SC30 22U-08
22U-08
SC39
SC39 22U-08
22U-08
SC37
SC37 22U-08
22U-08
SC27
SC27 22U-08
22U-08
SC40
SC40 22U-08
22U-08
SC44
SC44 22U-08
22U-08
SC36
SC36 22U-08
22U-08
V_DIMM
C310
C310
4.7U-08
4.7U-08
C335
C335
4.7U-08
4.7U-08
C336
C336 .22U
.22U
C357
C357 .22U
.22U
Decoupling between processor and DIMMs Place as close to processor as possible
VCORE
SC21
SC25
SC25 .22U
.22U
SC55
SC55 22U-08
22U-08
SC21 .22U
.22U
SC53
SC53
4.7U-08
4.7U-08
SC24
SC24
SC38
SC38
.01U
.01U
10pF
10pF
20050926
SC48
SC47
SC47
SC50
.22U
.22U
SC50 .22U
.22U
SC51
SC51
4.7U-08
4.7U-08
A
SC52
SC52 .22U
.22U
SC48 .01U
.01U
SC54
SC54 10P
10P
B
SC20
SC20 .22U
.22U
1 1
V_DIMM
SC49
SC49
20050926
22U-08
22U-08
VTT_DDR
C238
C238
4.7U-08
4.7U-08
VTT_DDR
C272
C272
4.7U-08
4.7U-08
C248
C248
4.7U-08
4.7U-08
C266
C266
4.7U-08
4.7U-08
C
C234
C234 .22U
.22U
C277
C277 .22U
.22U
C245
C245 .22U
.22U
C268
C268 .22U
.22U
C241
C241 1000P
1000P
C274
C274 1000P
1000P
C251
C251 1000P
1000P
C260
C260 1000P
1000P
C232
C232 10P
10P
C256
C256 10P
10P
C250
C250 10P
10P
C257
C257 10P
10P
Elitegroup Computer System
Elitegroup Computer System
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
D
Date: Sheet
Elitegroup Computer System
M2 POWER & GND
M2 POWER & GND
M2 POWER & GND
RS485M-M
RS485M-M
Friday, April 07, 2006
Friday, April 07, 2006
Friday, April 07, 2006
RS485M-M
E
1.0
1.0
10
10
10
1.0
of
of
of
35
35
35
A
DIMM1A
MEM_MA_ADD[15..0]9,14
4 4
MEM_MA_BANK[2..0]9,14
MEM_MA_DM[8..0]9
MEM_MA_DQS0_N9 MEM_MA_DQS0_P9 MEM_MA_DQS1_N9 MEM_MA_DQS1_P9 MEM_MA_DQS2_N9 MEM_MA_DQS2_P9 MEM_MA_DQS3_N9 MEM_MA_DQS3_P9
3 3
MEM_MA_DQS4_N9 MEM_MA_DQS4_P9 MEM_MA_DQS5_N9 MEM_MA_DQS5_P9 MEM_MA_DQS6_N9 MEM_MA_DQS6_P9 MEM_MA_DQS7_N9 MEM_MA_DQS7_P9 MEM_MA_DQS8_N9 MEM_MA_DQS8_P9
MEM_MA_ADD0 MEM_MA_ADD1 MEM_MA_ADD2 MEM_MA_ADD3 MEM_MA_ADD4 MEM_MA_ADD5 MEM_MA_ADD6 MEM_MA_ADD7 MEM_MA_ADD8 MEM_MA_ADD9 MEM_MA_ADD10 MEM_MA_ADD11 MEM_MA_ADD12 MEM_MA_ADD13 MEM_MA_ADD14 MEM_MA_ADD15
MEM_MA_BANK0 MEM_MA_BANK1 MEM_MA_BANK2
MEM_MA_DM0 MEM_MA_DM1 MEM_MA_DM2 MEM_MA_DM3 MEM_MA_DM4 MEM_MA_DM5 MEM_MA_DM6 MEM_MA_DM7 MEM_MA_DM8
MEM_MA_RAS-9,14 MEM_MA_CAS-9,14
MEM_MA_WE-9,14
MEM_MA0_CS_L09,14 MEM_MA0_CS_L19,14
MEM_MA_CKE09,14
MEM_MA0_ODT09,14
MEM_MA0_CLK0_P9,14
MEM_MA0_CLK0_N9,14
MEM_MA0_CLK1_P9,14
MEM_MA0_CLK1_N9,14
2 2
MEM_MA0_CLK2_P9,14
MEM_MA0_CLK2_N9,14
SMBCK3,12,19,21,24,26
SMBDT3,12,19,21,24,26
VCC3 VCC3
DIMM1A
188
A0
183
A1
63
A2
182
A3
61
A4
60
A5
180
A6
58
A7
179
A8
177
A9
70
A10/AP
57
A11
176
A12
196
A13
174
A14
173
A15
71
BA0
190
BA1
54
A16/BA2
125
DQMB0
134
DQMB1
146
DQMB2
155
DQMB3
202
DQMB4
211
DQMB5
223
DQMB6
232
DQMB7
164
NC/DQMB8
6
DQS0
7
DQS0
15
DQS1
16
DQS1
27
DQS2
28
DQS2
36
DQS3
37
DQS3
83
DQS4
84
DQS4
92
DQS5
93
DQS5
104
DQS6
105
DQS6
113
DQS7
114
DQS7
45
NC/DQS8
46
NC/DQS8
192
RAS
74
CAS
73
WE
193
S0
76
S1
52
CKE0
171
CKE1
195
ODT0
77
ODT1
185
CK0
186
CK0
137
CK1
138
CK1
220
CK2
221
CK2
239
SA0
240
SA1
101
SA2
120
SCL
119
SDA
238
VDDSPD
102
NC/TEST
55
RC0
18
RC1
19
NC5
68
NC4
DDRII_DIMM_Socket
DDRII_DIMM_Socket
2.5V 1.8V 3.3V
2.5V 1.8V 3.3V
VDDQ=
VDDQ=
VDD VDDQ VDDID
VDD VDDQ VDDID
3.3V 3.3V OPEN
3.3V 3.3V OPEN
3.3V 2.5V VSS
3.3V 2.5V VSS
2.5V 2.5V OPEN
2.5V 2.5V OPEN
2.5V 1.8V VSS
2.5V 1.8V VSS
1.8V 1.8V OPEN
1.8V 1.8V OPEN
VOLTAGE KEY
VOLTAGE KEY
FRONT VIEW
FRONT VIEW
B
MEM_MA_DATA0
3
DQ0
MEM_MA_DATA1
4
DQ1
MEM_MA_DATA2
9
DQ2
MEM_MA_DATA3
10
DQ3
MEM_MA_DATA4
122
DQ4
MEM_MA_DATA5
123
DQ5
MEM_MA_DATA6
128
DQ6
MEM_MA_DATA7
129
DQ7
MEM_MA_DATA8
12
DQ8
MEM_MA_DATA9
13
DQ9
MEM_MA_DATA10
21
DQ10 DQ11 DQ12 DQ13 DQ14 DQ15
DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23
DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31
DQ32 DQ33 DQ34 DQ35 DQ36
PIN 93 PIN 144 PIN 145 PIN 184
PIN 93 PIN 144 PIN 145 PIN 184 BACK
BACK
DQ37 DQ38 DQ39
DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47
DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55
DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63
NC/DQS9 NC/DQS10 NC/DQS11 NC/DQS12 NC/DQS13 NC/DQS14 NC/DQS15 NC/DQS16 NC/DQS17
PIN 52 PIN 53 PIN 92
PIN 52 PIN 53 PIN 92
PIN 1
PIN 1
FRONT
FRONT
MEM_MA_DATA11
22
MEM_MA_DATA12
131
MEM_MA_DATA13
132
MEM_MA_DATA14
140
MEM_MA_DATA15
141
MEM_MA_DATA16
24
MEM_MA_DATA17
25
MEM_MA_DATA18
30
MEM_MA_DATA19
31
MEM_MA_DATA20
143
MEM_MA_DATA21
144
MEM_MA_DATA22
149
MEM_MA_DATA23
150
MEM_MA_DATA24
33
MEM_MA_DATA25
34
MEM_MA_DATA26
39
MEM_MA_DATA27
40
MEM_MA_DATA28
152
MEM_MA_DATA29
153
MEM_MA_DATA30
158
MEM_MA_DATA31
159
MEM_MA_DATA32
80
MEM_MA_DATA33
81
MEM_MA_DATA34
86
MEM_MA_DATA35
87
MEM_MA_DATA36
199
MEM_MA_DATA37
200
MEM_MA_DATA38
205
MEM_MA_DATA39
206
MEM_MA_DATA40
89
MEM_MA_DATA41
90
MEM_MA_DATA42
95
MEM_MA_DATA43
96
MEM_MA_DATA44
208
MEM_MA_DATA45
209
MEM_MA_DATA46
214
MEM_MA_DATA47
215
MEM_MA_DATA48
98
MEM_MA_DATA49
99
MEM_MA_DATA50
107
MEM_MA_DATA51
108
MEM_MA_DATA52
217
MEM_MA_DATA53
218
MEM_MA_DATA54
226
MEM_MA_DATA55
227
MEM_MA_DATA56
110
MEM_MA_DATA57
111
MEM_MA_DATA58
116
MEM_MA_DATA59
117
MEM_MA_DATA60
229
MEM_MA_DATA61
230
MEM_MA_DATA62
235
MEM_MA_DATA63
236
MEM_MA_CHECK0
42
CB0
MEM_MA_CHECK1
43
CB1
MEM_MA_CHECK2
48
CB2
MEM_MA_CHECK3 MEM_MA_CHECK3
49
CB3
MEM_MA_CHECK4
161
CB4
MEM_MA_CHECK5
162
CB5
MEM_MA_CHECK6
167
CB6
MEM_MA_CHECK7
168
CB7
126 135 147 156 203 212 224 233 165
MEM_MA_DATA[63..0] 9
MEM_MA_CHECK[7..0] 9
AMD USE 59 OHM
V_DIMM
R398
R398
49.9-1-04
49.9-1-04
20060221
MEM_MA_ADD[15..0]
MEM_MA_BANK[2..0]
MEM_MA_DM[8..0]
2005100320051003
C
MEM_MA_DQS0_N9 MEM_MA_DQS0_P9 MEM_MA_DQS1_N9 MEM_MA_DQS1_P9 MEM_MA_DQS2_N9 MEM_MA_DQS2_P9 MEM_MA_DQS3_N9 MEM_MA_DQS3_P9 MEM_MA_DQS4_N9 MEM_MA_DQS4_P9 MEM_MA_DQS5_N9 MEM_MA_DQS5_P9 MEM_MA_DQS6_N9 MEM_MA_DQS6_P9 MEM_MA_DQS7_N9 MEM_MA_DQS7_P9 MEM_MA_DQS8_N9 MEM_MA_DQS8_P9
MEM_MA1_CLK0_P9,14
MEM_MA1_CLK1_P9,14
MEM_MA1_CLK2_P9,14
C394
C394 .1U-04
.1U-04
MEM_MA1_CS_L09,14 MEM_MA1_CS_L19,14
MEM_MA1_CLK0_N9,14
MEM_MA1_CLK1_N9,14
MEM_MA1_CLK2_N9,14
MEM_MA_ADD0 MEM_MA_ADD1 MEM_MA_ADD2 MEM_MA_ADD3 MEM_MA_ADD4 MEM_MA_ADD5 MEM_MA_ADD6 MEM_MA_ADD7 MEM_MA_ADD8 MEM_MA_ADD9 MEM_MA_ADD10 MEM_MA_ADD11 MEM_MA_ADD12 MEM_MA_ADD13 MEM_MA_ADD14 MEM_MA_ADD15
MEM_MA_BANK0 MEM_MA_BANK1 MEM_MA_BANK2
MEM_MA_DM0 MEM_MA_DM1 MEM_MA_DM2 MEM_MA_DM3 MEM_MA_DM4 MEM_MA_DM5 MEM_MA_DM6 MEM_MA_DM7 MEM_MA_DM8
MEM_MA_RAS-9,14 MEM_MA_CAS-9,14
MEM_MA_WE-9,14
MEM_MA_CKE19,14
MEM_MA1_ODT09,14
20050920
SMBCK3,12,19,21,24,26
SMBDT3,12,19,21,24,26
MEM_M_VREF_SUS
VCC3
DIMM3A
DIMM3A
188
A0
183
A1
63
A2
182
A3
61
A4
60
A5
180
A6
58
A7
179
A8
177
A9
70
A10/AP
57
A11
176
A12
196
A13
174
A14
173
A15
71
BA0
190
BA1
54
A16/BA2
125
DQMB0
134
DQMB1
146
DQMB2
155
DQMB3
202
DQMB4
211
DQMB5
223
DQMB6
232
DQMB7
164
NC/DQMB8
6
DQS0
7
DQS0
15
DQS1
16
DQS1
27
DQS2
28
DQS2
36
DQS3
37
DQS3
83
DQS4
84
DQS4
92
DQS5
93
DQS5
104
DQS6
105
DQS6
113
DQS7
114
DQS7
45
NC/DQS8
46
NC/DQS8
192
RAS
74
CAS
73
WE
193
S0
76
S1
52
CKE0
171
CKE1
195
ODT0
77
ODT1
185
CK0
186
CK0
137
CK1
138
CK1
220
CK2
221
CK2
239
SA0
240
SA1
101
SA2
120
SCL
119
SDA
238
VDDSPD
102
NC/TEST
55
RC0
18
RC1
19
NC5
68
NC4
DDRII_DIMM_Socket
DDRII_DIMM_Socket
2.5V 1.8V 3.3V
2.5V 1.8V 3.3V
VDDQ=
VDDQ=
D
VDD VDDQ VDDID
VDD VDDQ VDDID
3.3V 3.3V OPEN
3.3V 3.3V OPEN
3.3V 2.5V VSS
3.3V 2.5V VSS
2.5V 2.5V OPEN
2.5V 2.5V OPEN
2.5V 1.8V VSS
2.5V 1.8V VSS
1.8V 1.8V OPEN
1.8V 1.8V OPEN
VOLTAGE KEY
VOLTAGE KEY
FRONT VIEW
FRONT VIEW
E
MEM_MA_DATA0
3
DQ0
MEM_MA_DATA1
4
DQ1
MEM_MA_DATA2
9
DQ2
MEM_MA_DATA3
10
DQ3
MEM_MA_DATA4
122
DQ4
MEM_MA_DATA5
123
DQ5
MEM_MA_DATA6
128
DQ6
MEM_MA_DATA7
129
DQ7
MEM_MA_DATA8
12
DQ8
MEM_MA_DATA9
13
DQ9
MEM_MA_DATA10
21
DQ10
MEM_MA_DATA11
22
DQ11
MEM_MA_DATA12
131
DQ12
MEM_MA_DATA13
132
DQ13
MEM_MA_DATA14
140
DQ14
MEM_MA_DATA15
141
DQ15
MEM_MA_DATA16
24
DQ16
MEM_MA_DATA17
25
DQ17
MEM_MA_DATA18
30
DQ18
MEM_MA_DATA19
31
DQ19
MEM_MA_DATA20
143
DQ20
MEM_MA_DATA21
144
DQ21
MEM_MA_DATA22
149
DQ22
MEM_MA_DATA23
150
DQ23
MEM_MA_DATA24
33
DQ24
MEM_MA_DATA25
34
DQ25
MEM_MA_DATA26
39
DQ26
MEM_MA_DATA27
40
DQ27
MEM_MA_DATA28
152
DQ28
MEM_MA_DATA29
153
DQ29
MEM_MA_DATA30
158
DQ30
MEM_MA_DATA31
159
DQ31
MEM_MA_DATA32
80
DQ32
MEM_MA_DATA33
81
DQ33
MEM_MA_DATA34
86
DQ34
MEM_MA_DATA35
87
DQ35
MEM_MA_DATA36
199
DQ36
MEM_MA_DATA37
200
DQ37
PIN 52 PIN 53 PIN 92
PIN 52 PIN 53 PIN 92
PIN 93 PIN 144 PIN 145 PIN 184
PIN 93 PIN 144 PIN 145 PIN 184 BACK
BACK
PIN 1
PIN 1
FRONT
FRONT
NC/DQS9 NC/DQS10 NC/DQS11 NC/DQS12 NC/DQS13 NC/DQS14 NC/DQS15 NC/DQS16 NC/DQS17
DQ38 DQ39
DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47
DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55
DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63
CB0 CB1 CB2 CB3 CB4 CB5 CB6 CB7
MEM_MA_DATA38
205
MEM_MA_DATA39
206
MEM_MA_DATA40
89
MEM_MA_DATA41
90
MEM_MA_DATA42
95
MEM_MA_DATA43
96
MEM_MA_DATA44
208
MEM_MA_DATA45
209
MEM_MA_DATA46
214
MEM_MA_DATA47
215
MEM_MA_DATA48
98
MEM_MA_DATA49
99
MEM_MA_DATA50
107
MEM_MA_DATA51
108
MEM_MA_DATA52
217
MEM_MA_DATA53
218
MEM_MA_DATA54
226
MEM_MA_DATA55
227
MEM_MA_DATA56
110
MEM_MA_DATA57
111
MEM_MA_DATA58
116
MEM_MA_DATA59
117
MEM_MA_DATA60
229
MEM_MA_DATA61
230
MEM_MA_DATA62
235
MEM_MA_DATA63
236
MEM_MA_CHECK0
42
MEM_MA_CHECK1
43
MEM_MA_CHECK2
48 49
MEM_MA_CHECK4
161
MEM_MA_CHECK5
162
MEM_MA_CHECK6
167
MEM_MA_CHECK7
168 126
135 147 156 203 212 224 233 165
MEM_MA_DATA[63..0]
MEM_MA_CHECK[7..0] 9
VDD_VREF_SUS_MEM
C393
C393
C391
1 1
AMD USE 59 OHM
R388
R388
49.9-1-04
49.9-1-04
20060221
C391
.1U-04
.1U-04
1000P-04
1000P-04
20060221 20060221
Elitegroup Computer System
Elitegroup Computer System
<OrgAddr1>
<OrgAddr1>
<OrgAddr1> Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
A
B
C
D
Date: Sheet
Elitegroup Computer System
DIMM1 & DIMM2 (184 PIN DDR)
DIMM1 & DIMM2 (184 PIN DDR)
DIMM1 & DIMM2 (184 PIN DDR)
RS485M-M
RS485M-M
RS485M-M
11 35Friday, April 07, 2006
11 35Friday, April 07, 2006
11 35Friday, April 07, 2006
E
1.0
1.0
1.0
of
of
of
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