ECS Q67H2-AD Schematics rev1.0
5
4
3
2
1
Q67H2-AD
D D
Rev : 1.0
TABLE OF CONTENTS
REVISION HISTORY:
Page Index
------- ------------------------
1
COVER PAGE
2
Block Diagram
3
GPIO Function Map
4
CPU - DMI/FDI/PEG
5
CPU - MISC
6
C C
10
11
12
13
14
15
B B
16
17
18
19
20
21
22
23
24
25
A A
NOTE:
CPU - DDR3
7
CPU - PWR
8
GND, CPU_RST_L
9
DDR3 - CHA DIMM0/1
DDR3 - CHB DIMM0/1
DDR3 - VREF
PCH - DMI/PCI/PE/USB
PCH - SATA, SATA CONN
PCH - MISC, Strap Function
PCH - CLK IO, SLG8XP421
PCH - NVRAM/FDI, CLR_CMOS
PCH - DP/VGA
PCH - PWR
PCH - GND
Slot - PCI-EX16/PCI-EX1
SPI ROM, SMBUS
LAN PHY - 82579, USBLAN
AUDIO ALC662-VC
Audio Connector(PANEL)
USB - PWR/CONN/HDR
Page Index
------- ------------------------
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
HDMI/ DVI CONNECTOR
VGA CONN
SIO IT8728F
FAN, COM
TPM, PS/2, LPT
F_PANEL, BUZ
SEQUENCE CKT
USB3.0 SIS 100
DC/DC 3VSB/3VDUAL/5VDUAL
DC/DC V1P05_PCH,ME/V1P8_SFR
DC/DC VDIMM/DDR_VTT
DC/DC VCCSA, ATXPWR
DC/DC CPU_VTT
DC/DC VCORE/VAXG1
DC/DC VCORE/VAXG2
XDP
Power Delivery
PWR Sequence, RST Diagram
Clock Distribution
Rev Date Notes
------ -------------- ---------------------------------------------------------------------------------
V.B 2010/08/24
V.C 2010/09/10
V.1.0 2010/09/16
2010/07/22V.A
Initial version
Elitegroup Computer Systems
Elitegroup Computer Systems
Elitegroup Computer Systems
Title
Title
Title
Cover Page
Cover Page
Cover Page
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Q67/ Q65/ H67/ H61 H2-AD
Q67/ Q65/ H67/ H61 H2-AD
Q67/ Q65/ H67/ H61 H2-AD
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
144Wednesday, January 12, 2011
144Wednesday, January 12, 2011
144Wednesday, January 12, 2011
1
V1.0
V1.0
V1.0
5
4
3
2
1
D D
PCI-E X16
Sandy
Bridge
Desktop Processor
Socket H2
FDI
DMI
PCI-E X1
C C
SATA 3.0
SATA 2.0
6Gbps
3Gbps
Cougar
Point
VGA
B B
Chipset
DDR3 Channel B
AUDIO CODEC:
ALC662VC
LAN:82579
Lewisville
DDR3
1333MHz/1066MHz
Total Max 16GB
Jack 3 in 1
MONO OUT
F_AUDIO
RJ-45 & USBx2
USB 4Ports
DDR3 Channel A
DVI/ HDMI
TPM:
ST19NP18
TPM HEADER
A A
5
4
SIO:
IT8728
LPT PS2
F_USB 8Ports
COM
3
Elitegroup Computer Systems
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Title
Title
Title
Block Diagram
Block Diagram
Block Diagram
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Q67/ Q65/ H67/ H61 H2-AD
Q67/ Q65/ H67/ H61 H2-AD
Q67/ Q65/ H67/ H61 H2-AD
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
244Wednesday, January 12, 2011
244Wednesday, January 12, 2011
244Wednesday, January 12, 2011
1
V1.0
V1.0
V1.0
5
4
3
2
1
CK_DIMM_A_[3:0]_H/L
D D
NOTE:
Sugar Bay Platform has two clock mode:
1.Integrated Clock Mode (Generate by PCH)
2.Buffer Through Mode (Generate by Clock Gen.)
If we choose Integrated Clock Mode, we should
unstuff Clock Gen. circuit.
Please refer to
Page.12 PCH - DMI/PCI/PE/USB for CLK IN PD
Sandy
Bridge
Desktop Processor
Socket H2
CK_DIMM_B_[3:0]_H/L
CK_CPU_100M_P/N
DDR3 Channel A
DDR3
1333MHz/1066MHz
DDR3 Channel B
Page.13 PCH - SATA, SATA CONN for CLK IN PD
Page.14 PCH - MISC, F/W Strap
Page.15 PCH - CLK IO, CKG - CV184 for Option
C C
CKG_CPU_P/N
CKG_DMI_P/N
PEX16_100M_P/N
PEX1_100M_P/N
PCI-E X16
PCI-E X1
Cougar
CK505
CKG_SATA_P/N
RESERVE
CKG_DOT96_P/N
Point
PCH
GLAN_CLK_P/N
LAN:82579
Lewisville
XTL 25M
B B
CKG_14M
TPM33M
TPM:
ST19WP18
PCI_33M_FB
TCM33M
XTL 14.318M
LDG33M
SIO33M
A A
XTL 32.768K
5
4
XTL 25M
3
SIO48M
TPM HEADER
LPC_DEBUG
SIO:
IT8728
2
Elitegroup Computer Systems
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Title
Title
Title
Clock Distribution
Clock Distribution
Clock Distribution
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Q67/ Q65/ H67/ H61 H2-AD
Q67/ Q65/ H67/ H61 H2-AD
Q67/ Q65/ H67/ H61 H2-AD
Date: Sheet of
Date: Sheet of
Date: Sheet of
44 44Wednesday, January 12, 2011
44 44Wednesday, January 12, 2011
44 44Wednesday, January 12, 2011
1
V1.0
V1.0
V1.0
5
PCH_1P05
RT8015
D D
5VDAUL_MEM
11
VDIMM NCP1587
11b
VCC
PCI-E X16PCI-E X1
20b20c
PCIRST1#
C C
SIO_PWRBTN_L
4
POWER BUTTON
75
PCIRST3#
PANSHW#
Super I/O
ITE 8728
6
3VSB
12
B B
ATX_PWRGD
3VSB
67
19
ATXPG
VIN[2..3]
97, 98
11
+VCC ( 12* VCC* VCC3 )
11b
PCIRST2#
LRESET
RSMRST#
SUSC# SLP_S3#(BM53)32
SUSB#
PWRON#
PWRGD3
PSON#
10
PSON_L
4
11c
VTT_DDR
APL5336
20a
18
17
85
8
9
32
33
72
CPUVTT_EN
TPM
TPM HEADER
R
GLAN 82579
PCH_PLTRST_L
RSMRST_L
R
SLP4_L
SLP3_L
4a
PCH_PWRBTN_L
13
PWRGD3
CHECK ATXPG AND DELAY 150/300ms
6a
LED CTRL
RESERVE TO CTRL VDIMM
RESERVE TO CTRL PCH_1P05
1
3
CPUVTT ISL95870
CPUVTT
11e
EN_VTT(40)
VCORE ISL6364
VR_READY
17
CLKG CV184
PLTRST#(BK48)
RSMRST#(BK38)
SLP_S3#(BM53)
PWRBTN#(BT43)
PWROK(BJ38)
RTCRST#
SRTCRST#
DPWROK
SLP_SUS#
CLOCKS
Cougar
Point
PCH
11d
V_SA
16
SVID
VR_READY
CLK
SYS_RESET#(G18)
PROCPWRGD(D53)
SYS_PWROK(BJ53)
DRAMPWROK
SLP_S5#
SUSWARN#
SUSACK#
SLP_LAN#
SLP_A#
APWROK
PCIRST#(AV14)
2
17
DRAM_PWROK
SLP5_L
7
SUSWARN_L
SUSACK_L
SLP_LAN_L
SLPAMT_L
19
20a
SIO_PCIRST3_L
15
CPU_PWROK
11a
EC NOT USED
ME TEST
5a
R
PCH_MEPWROK
RESET#(F36)
UNCOREPWRGOOD(J40)
SM_DRAMPWROK
AFTER CPU RECEIVE RESET SIGNAL,
CPU WILL USE SVID LET V_AXG WORK.
DEPEND ON PULL UP TO VDIMM
Sandy
Bridge
Desktop Processor
Socket H2
3VDUAL
PCH1P05_ME
NEVER GO HIGH LATER THAN SLP_S3
1
MOS
SWITCH
DPWROK
SLP_SUS_L
VCC3
VCC 12V
A A
PWROK
ATX_POWER
PS_ON
5VSB
2
SB_3VSB
ATX_5VSB
5
4
5c
3
5b
3VSB
5VSB
14
3
RSMRST
CIRCUIT
CLOCKS OUT
RSMRST_L
Elitegroup Computer Systems
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Elitegroup Computer Systems
Title
Title
Title
Power Sequence, Reset Diagram
Power Sequence, Reset Diagram
Power Sequence, Reset Diagram
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Q67/ Q65/ H67/ H61 H2-AD
Q67/ Q65/ H67/ H61 H2-AD
Q67/ Q65/ H67/ H61 H2-AD
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
43 44Wednesday, January 12, 2011
43 44Wednesday, January 12, 2011
43 44Wednesday, January 12, 2011
1
V1.0
V1.0
V1.0
5
4
3
2
1
ATX P/S WITH 1A STBY CURRENT
5V
5VSB
+/-5%
+/-5%
D D
LDO
3VSB
C C
B B
A A
X16 PCIE Slot per
3.3V
12V
3.3Vaux
12V
3.3V
+/-5%
+/-5%
3A(S0) 5A(S0)
5.5A(S0)
Total 1 Slot
5
ATX4P
12V
-12V
+/-5%
+/-5%
VCC
5VSB
X1 PCIE Slot per
3.3V
12V
3.3Vaux
Total 2 Slots
5VDUAL
P/N MOS
VCC
5VSB
3A(S0)
0.5A(S0)
0.375A
PCI Slot per
5V
0.5A(S0)
12V
0.375A0.375A
3.3Vaux
7.6A(S0)
3.3V
Total 1 Slot
4
Switching
ISL6364
4+1 phases
Switching
ISL95870B
1 phase
Switching
NCP1587
DDR3 DIMM (4) 1333MHz
VDDQ
V_SM_VTT
15A_S0
1.0A_S3
1.0A_S0
VCC3
3VSB
5VDUAL
Switch IC
UP7536
USB X4 Header
VDD
5VDual
2.0A
Vcore:0.65~1.3V
Vaxg:0.65~1.3V
V_CPU_VTT:1.05V
V_DIMM:1.5V
DDR_VTT:0.75V
USB_5V
Switching
RT8015A
Linear
LM324
3VDUAL
P/N MOS
USB X4 IO
VDD
5VDual
2.0A
112Amax
35Amax
17Amax
28.5Amax
Linear
LM324
V_ME:1.05V
V_SFR:1.8V
VCC3_EPW
VCC3_LAN
PS/2
5VDual
1.0A
3
VCC_SA:0.925V(0.85V)
Linear
LM324
LDO
APL5336
PCH_CORE:1.05V
Non AMT:
VccASW(ME) short to V1P05_PCH
1.8Amax
1.6Amax
Not support DSW mode:
VccDSW short to 3VSB
Extrenal from V1P05_PCH
3VSB
VCC3
VCC3
5VSB
12V 5V
LDO
8.8Amax
6.2Amax
Intel Sandy Bridge CPU
VID
0.25~1.52V
VCCP
VID
0.25~1.52V
VAXG
VTT
1.05V(1V)
0.925V(0.85V)VCC_SA 8.8A
VCCPLL 1.8V 1A
VDDQ
1.5V
Intel Cougar Point (TDP 5.5W)
V_PROC_IO
VccDMI
VccCORE
VccIO
VccADPLLA
VccADPLLB
VccCLKDMI
VccSSC
VccDIFFCLKN
VccASW(ME)
VccDFTERM
VccVRM
Vcc3_3
VccADAC
VccSPI
VccDSW3_3
VccSUS3_3
VccSUSHDA
VccRTC
V5REF
V5REF_SUS
1.05V
1.05V
1.05V 1.6A
1.05V
1.05V
1.05V
1.05V 0.02A
1.05V 0.105A
1.05V
1.8V
1.8V
3.3V
3.3V 0.068A
3.3V
3.3V
5V
LAN INTEL_82579
VDD3P3 3.3V
VDD1P0
CTRL1P0 internal LVR Output
1V
SUPER I/O IT8723
3VSB
VCC3
BAT 3.3V
3.3V
3.3V
3.3V
AUDIO ALC662-VC
DVDD 3.3V
AVDD
2
3.3V 23mA
85A(95W)
25A
8.5A
4.5A
1mA
0.057A
4.07A
0.1A
0.1A
0.055A
1.61A1.05V
0.2A
0.159A
0.409A
0.02A
0.003A3.3V
0.097A
0.01A3.3V
6uA(G3)3.3V
1mA5V
1mA
90mA
332mA
TBD
TBD
TBD
38mA5V
Fans
12V_200mA
SPI
VCC3_30mA
CRT
VCC_1A fuse
HDMI/DP
VCC3_0.5A fuse x 2
HDMI L.S.
VCC3_180mA
Flash/NVM
VCC3 _0.3A
1.8V_0.1A
Battery
3V
Elitegroup Computer Systems
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Elitegroup Computer Systems
Title
Title
Title
Power Delivery
Power Delivery
Power Delivery
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
C
C
C
Q67/ Q65/ H67/ H61 H2-AD
Q67/ Q65/ H67/ H61 H2-AD
Q67/ Q65/ H67/ H61 H2-AD
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
42 44Wednesday, January 12, 2011
42 44Wednesday, January 12, 2011
42 44Wednesday, January 12, 2011
V1.0
V1.0
V1.0
5
CPU1A
CPU1A
BALLMAP_REV=1.4
PEG_RX_P020
PEG_RX_N020
PEG_RX_P120
PEG_RX_N120
PEG_RX_P220
PEG_RX_N220
D D
C C
CPU_VTT
PEG_RX_P320
PEG_RX_N320
PEG_RX_P420
PEG_RX_N420
PEG_RX_P520
PEG_RX_N520
PEG_RX_P620
PEG_RX_N620
PEG_RX_P720
PEG_RX_N720
PEG_RX_P820
PEG_RX_N820
PEG_RX_P920
PEG_RX_N920
PEG_RX_P1020
PEG_RX_N1020
PEG_RX_P1120
PEG_RX_N1120
PEG_RX_P1220
PEG_RX_N1220
PEG_RX_P1320
PEG_RX_N1320
PEG_RX_P1420
PEG_RX_N1420
PEG_RX_P1520
PEG_RX_N1520
DMI_RX_P012
DMI_RX_N012
DMI_RX_P112
DMI_RX_N112
DMI_RX_P212
DMI_RX_N212
DMI_RX_P312
DMI_RX_N312
R169 24.9-1-04R169 24.9-1-04
1 2
RQ
PEG_RX_P0
PEG_RX_N0
PEG_RX_P1
PEG_RX_N1
PEG_RX_P2
PEG_RX_N2
PEG_RX_P3
PEG_RX_N3
PEG_RX_P4
PEG_RX_N4
PEG_RX_P5
PEG_RX_N5
PEG_RX_P6
PEG_RX_N6
PEG_RX_P7
PEG_RX_N7
PEG_RX_P8
PEG_RX_N8
PEG_RX_P9
PEG_RX_N9
PEG_RX_P10
PEG_RX_N10
PEG_RX_P11
PEG_RX_N11
PEG_RX_P12
PEG_RX_N12
PEG_RX_P13
PEG_RX_N13
PEG_RX_P14
PEG_RX_N14
PEG_RX_P15
PEG_RX_N15
DMI_RX_P0
DMI_RX_N0
DMI_RX_P1
DMI_RX_N1
DMI_RX_P2
DMI_RX_N2
DMI_RX_P3
DMI_RX_N3
PEG_COMP
B11
B12
D12
D11
C10
E10
AA4
AA5
C9
E9
B8
B7
C6
C5
A5
A6
E2
E1
F4
F3
G2
G1
H3
H4
J1
J2
K3
K4
L1
L2
M3
M4
N1
N2
W5
W4
V3
V4
Y3
Y4
P3
P4
R2
R1
T4
T3
U2
U1
B5
C4
B4
PEG_RX_0
PEG_RX#_0
PEG_RX_1
PEG_RX#_1
PEG_RX_2
PEG_RX#_2
PEG_RX_3
PEG_RX#_3
PEG_RX_4
PEG_RX#_4
PEG_RX_5
PEG_RX#_5
PEG_RX_6
PEG_RX#_6
PEG_RX_7
PEG_RX#_7
PEG_RX_8
PEG_RX#_8
PEG_RX_9
PEG_RX#_9
PEG_RX_10
PEG_RX#_10
PEG_RX_11
PEG_RX#_11
PEG_RX_12
PEG_RX#_12
PEG_RX_13
PEG_RX#_13
PEG_RX_14
PEG_RX#_14
PEG_RX_15
PEG_RX#_15
DMI_RX_0
DMI_RX#_0
DMI_RX_1
DMI_RX#_1
DMI_RX_2
DMI_RX#_2
DMI_RX_3
DMI_RX#_3
PE_RX_0
PE_RX#_0
PE_RX_1
PE_RX#_1
PE_RX_2
PE_RX#_2
PE_RX_3
PE_RX#_3
PEG_ICOMPO
PEG_RCOMPO
PEG_COMPI
SKT_H2_CRB
SKT_H2_CRB
BALLMAP_REV=1.4
PEGDMIGEN
PEGDMIGEN
PEG_TX_0
PEG_TX#_0
PEG_TX_1
PEG_TX#_1
PEG_TX_2
PEG_TX#_2
PEG_TX_3
PEG_TX#_3
PEG_TX_4
PEG_TX#_4
PEG_TX_5
PEG_TX#_5
PEG_TX_6
PEG_TX#_6
PEG_TX_7
PEG_TX#_7
PEG_TX_8
PEG_TX#_8
PEG_TX_9
PEG_TX#_9
PEG_TX_10
PEG_TX#_10
PEG_TX_11
PEG_TX#_11
PEG_TX_12
PEG_TX#_12
PEG_TX_13
PEG_TX#_13
PEG_TX_14
PEG_TX#_14
PEG_TX_15
PEG_TX#_15
DMI_TX_0
DMI_TX#_0
DMI_TX_1
DMI_TX#_1
DMI_TX_2
DMI_TX#_2
DMI_TX_3
DMI_TX#_3
PE_TX_0
PE_TX#_0
PE_TX_1
PE_TX#_1
PE_TX_2
PE_TX#_2
PE_TX_3
PE_TX#_3
1 OF 10
1 OF 10
4
PEG_TX_P0
C13
C14
E14
E13
G14
G13
F12
F11
J14
J13
D8
D7
D3
C3
E6
E5
F8
F7
G10
G9
G5
G6
K7
K8
J5
J6
M8
M7
L6
L5
N5
N6
V7
V6
W7
W8
Y6
Y7
AA7
AA8
P8
P7
T7
T8
R6
R5
U5
U6
PEG_TX_N0
PEG_TX_P1
PEG_TX_N1
PEG_TX_P2
PEG_TX_N2
PEG_TX_P3
PEG_TX_N3
PEG_TX_P4
PEG_TX_N4
PEG_TX_P5
PEG_TX_N5
PEG_TX_P6
PEG_TX_N6
PEG_TX_P7
PEG_TX_N7
PEG_TX_P8
PEG_TX_N8
PEG_TX_P9
PEG_TX_N9
PEG_TX_P10
PEG_TX_N10
PEG_TX_P11
PEG_TX_N11
PEG_TX_P12
PEG_TX_N12
PEG_TX_P13
PEG_TX_N13
PEG_TX_P14
PEG_TX_N14
PEG_TX_P15
PEG_TX_N15
DMI_TX_P0
DMI_TX_N0
DMI_TX_P1
DMI_TX_N1
DMI_TX_P2
DMI_TX_N2
DMI_TX_P3
DMI_TX_N3
PEG_TX_P0 20
PEG_TX_N0 20
PEG_TX_P1 20
PEG_TX_N1 20
PEG_TX_P2 20
PEG_TX_N2 20
PEG_TX_P3 20
PEG_TX_N3 20
PEG_TX_P4 20
PEG_TX_N4 20
PEG_TX_P5 20
PEG_TX_N5 20
PEG_TX_P6 20
PEG_TX_N6 20
PEG_TX_P7 20
PEG_TX_N7 20
PEG_TX_P8 20
PEG_TX_N8 20
PEG_TX_P9 20
PEG_TX_N9 20
PEG_TX_P10 20
PEG_TX_N10 20
PEG_TX_P11 20
PEG_TX_N11 20
PEG_TX_P12 20
PEG_TX_N12 20
PEG_TX_P13 20
PEG_TX_N13 20
PEG_TX_P14 20
PEG_TX_N14 20
PEG_TX_P15 20
PEG_TX_N15 20
DMI_TX_P0 12
DMI_TX_N0 12
DMI_TX_P1 12
DMI_TX_N1 12
DMI_TX_P2 12
DMI_TX_N2 12
DMI_TX_P3 12
DMI_TX_N3 12
3
FDI_FSYNC016
FDI_LSYNC016
FDI_FSYNC116
FDI_LSYNC116
FDI_INT16
R262 24.9-1-04R262 24.9-1-04
CPU_VTT
1 2
Close to CPU
FDI_FSYNC0
FDI_LSYNC0
FDI_FSYNC1
FDI_LSYNC1
FDI_INT
FDI_COMP
AC5
AC4
AE5
AE4
AG3
AE2
AE1
AB7
AD37
AG4
AJ29
AJ30
AJ31
AV34
AW34
R34
R36
R38
R40
AU40
AW38
P35
P37
P39
A38
C2
D1
CPU1B
CPU1B
BALLMAP_REV=1.4
BALLMAP_REV=1.4
FDI_FSYNC_0
FDI_LSYNC_0
FDI_FSYNC_1
FDI_LSYNC_1
FDI_INT
FDI_COMPIO
FDI_ICOMPO
RSVD_04
RSVD_05
RSVD_08
RSVD_10
RSVD_11
RSVD_12
RSVD_19
RSVD_21
RSVD_43
RSVD_44
RSVD_45
RSVD_46
RSVD_47
RSVD_48
RSVD_49
NCTF_01
NCTF_02
NCTF_03
NCTF_04
NCTF_05
SKT_H2_CRB
SKT_H2_CRB
2
FDI LINK
FDI LINK
SB_DIMM_DQVREF
SA_DIMM_DQVREF
2 OF 10
2 OF 10
FDI_TX_0
FDI_TX#_0
FDI_TX_1
FDI_TX#_1
FDI_TX_2
FDI_TX#_2
FDI_TX_3
FDI_TX#_3
FDI_TX_4
FDI_TX#_4
FDI_TX_5
FDI_TX#_5
FDI_TX_6
FDI_TX#_6
FDI_TX_7
FDI_TX#_7
RSVD_15
RSVD_14
RSVD_13
RSVD_17
RSVD_22
RSVD_07
RSVD_03
RSVD_06
RSVD_09
RSVD_27
RSVD_26
RSVD_25
RSVD_31
RSVD_41
FDI_TX_P0
AC8
FDI_TX_N0
AC7
FDI_TX_P1
AC2
FDI_TX_N1
AC3
FDI_TX_P2
AD2
FDI_TX_N2
AD1
FDI_TX_P3
AD4
FDI_TX_N3
AD3
FDI_TX_P4
AD7
FDI_TX_N4
AD6
FDI_TX_P5
AE7
FDI_TX_N5
AE8
FDI_TX_P6
AF3
FDI_TX_N6
AF2
FDI_TX_P7
AG2
FDI_TX_N7
AG1
DIMM_DQ_CPU_VREF_B
AH1
DIMM_DQ_CPU_VREF_A
AH4
AT11
AP20
AN20
AU10
AY10
AF4
AB6
AE6
AJ11
D38
C39
C38
J34
N34
FDI_TX_P0 16
FDI_TX_N0 16
FDI_TX_P1 16
FDI_TX_N1 16
FDI_TX_P2 16
FDI_TX_N2 16
FDI_TX_P3 16
FDI_TX_N3 16
FDI_TX_P4 16
FDI_TX_N4 16
FDI_TX_P5 16
FDI_TX_N5 16
FDI_TX_P6 16
FDI_TX_N6 16
FDI_TX_P7 16
FDI_TX_N7 16
C273
C273
.1U-04
.1U-04
2 1
GND GND
2010 WW04 P.04
1
DIMM_DQ_CPU_VREF_B 11
DIMM_DQ_CPU_VREF_A 11
C270
C270
.1U-04
.1U-04
2 1
SHORT B4 & C4 TOGETHER, ROUTE AS A SINGLE 4MIL TRACE TO RQ.
B B
1 ROUTE B5 TO RQ. 1 AS A SEPERATE 12MIL TRACE.
A A
Elitegroup Computer Systems
Elitegroup Computer Systems
Elitegroup Computer Systems
Title
Title
Title
CPU - DMI/FDI/PEG
CPU - DMI/FDI/PEG
CPU - DMI/FDI/PEG
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Q67/ Q65/ H67/ H61 H2-AD
Q67/ Q65/ H67/ H61 H2-AD
Q67/ Q65/ H67/ H61 H2-AD
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
444Wednesday, January 12, 2011
444Wednesday, January 12, 2011
444Wednesday, January 12, 2011
1
V1.0
V1.0
V1.0
5
4
3
2
1
VCC1.8
CRB 1.0 P.10 RC FILTER
SR57
SR57
2.2K-04-X
2.2K-04-X
1 2
PROC_SEL
D D
C C
21
C171
C171
DMI/FDI TERMINATION VOLTAGE
.1U-04
.1U-04
DC COUPLED: TX/RX TO VCC ISF SAMPLED HIGH
DC COUPLED: TX/RX TO VSS IF SAMPLED LOW
GND
PDG 1.0 P.242 RES is 200&120 ohm
CRB 1.0 is 1.1K ohm
AC COUPLED: TX SET TO VCC/2, RX SET TO VSS REGARDLESS OF THIS STRAP
VR_HOT_L39
CPU_PWROK14,32,41
CPU_RST_L8,41
DRAM_PWROK14
CPU_RST_L
DRAM_PWROK
R156 0-04R156 0-04
R191 0-04R191 0-04
R162 0-04R162 0-04
R272 0-04R272 0-04
1 2
1 2
1 2
1 2
CPU_VTT
PROCHOT_LVR_HOT_L
CPU_PWROK_RCCPU_PWROK
CPU_RST_L_RC
DRAM_PWROK_RC
C189
C189
C177
C177
.1U-04-O
.1U-04-O
.1U-04-O
.1U-04-O
2 1
GND GND GND
R158 90.9-1-04-OR158 90.9-1-04-O
1 2
R163 110-1-04R163 110-1-04
1 2
R161 75-1-04R161 75-1-04
1 2
Close to CPU
VR_SVID_CK39
VR_SVID_DATAOUT39
VR_SVID_ALERT_L39
2"~3"
C266
C266
.1U-04-O
.1U-04-O
2 1
2 1
VR_SVID_CK
VR_SVID_DATAOUT
VR_SVID_ALERT_L
VR_SVID_CK
VR_SVID_DATAOUT
CK_CPU_100M_P15
CK_CPU_100M_N15
R160 44.2-1-04R160 44.2-1-04
1 2
PM_SYNC13
H_PECI28
CPU_THERMTRIP_L13
H_SKTOCC_L14,39
PROC_SEL16
R220 1K-04-OR220 1K-04-O
R168 1K-04-OR168 1K-04-O
R176 1K-04-OR176 1K-04-O
R182 1K-04-OR182 1K-04-O
R175 1K-04-OR175 1K-04-O
R202 1K-04-OR202 1K-04-O
R174 1K-04-OR174 1K-04-O
R203 1K-04-OR203 1K-04-O
R166 1K-04-OR166 1K-04-O
R181 1K-04-OR181 1K-04-O
R204 1K-04-OR204 1K-04-O
R201 1K-04-OR201 1K-04-O
R208 1K-04-OR208 1K-04-O
R207 1K-04-OR207 1K-04-O
R214 1K-04-OR214 1K-04-O
R213 1K-04-OR213 1K-04-O
R167 1K-04-OR167 1K-04-O
R164 1K-04-OR164 1K-04-O
GND
VIDALERT_R_LVR_SVID_ALERT_L
Near CPU
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
CFG_041
CK_CPU_100M_P
CK_CPU_100M_N
CPU_PWROK_RC
DRAM_PWROK_RC
CPU_RST_L_RC
PM_SYNC
H_PECI
CATERR_L
PROCHOT_L
CPU_THERMTRIP_L
H_SKTOCC_L
PROC_SEL
DIMM_VREF_CPU
CFG_0
CFG_1
CFG_2
CFG_3
CFG_4
CFG_5
CFG_6
CFG_7
CFG_8
CFG_9
CFG_10
CFG_11
CFG_12
CFG_13
CFG_14
CFG_15
CFG_16
CFG_17
CFG_0
W2
BCLK_0
W1
BCLK#_0
C37
VIDSCLK
B37
VIDSOUT
A37
VIDALERT#
J40
UNCOREPWRGOOD
AJ19
SM_DRAMPWROK
F36
RESET#
E38
PM_SYNC
J35
PECI
E37
CATERR#
H34
PROCHOT#
G35
THERMTRIP#
AJ33
SKTOCC#
K32
PROC_SEL
AJ22
SM_VREF
H36
CFG_0
J36
CFG_1
J37
CFG_2
K36
CFG_3
L36
CFG_4
N35
CFG_5
L37
CFG_6
M36
CFG_7
J38
CFG_8
L35
CFG_9
M38
CFG_10
N36
CFG_11
N38
CFG_12
N39
CFG_13
N37
CFG_14
N40
CFG_15
G37
CFG_16
G36
CFG_17
AT14
RSVD_016
AY3
RSVD_023
H7
RSVD_028
H8
RSVD_029
CPU1E
CPU1E
SKT_H2_CRB
SKT_H2_CRB
BALLMAP_REV=1.4
BALLMAP_REV=1.4
VCCP_SELECT
VCCSA_SENSE
VCC_SENSE
VSS_SENSE
VCCIO_SENSE
VSSIO_SENSE
VCCAXG_SENSE
VSSAXG_SENSE
5 OF 10
5 OF 10
VCCSA_VID
TDO
TCK
TMS
TRST#
PRDY#
PREQ#
DBR#
RSVD_001
RSVD_002
BPM#_0
BPM#_1
BPM#_2
BPM#_3
BPM#_4
BPM#_5
BPM#_6
BPM#_7
RSVD_024
RSVD_030
RSVD_037
RSVD_036
RSVD_033
RSVD_040
RSVD_039
RSVD_018
RSVD_020
RSVD_038
RSVD_032
RSVD_034
RSVD_035
RSVD_050
RSVD_053
RSVD_051
RSVD_052
VCC
R152
R152
10K-04
10K-04
VTT_SEL
P33
VCCSA_VID
P34
VCCSA_SEN
T2
VCC_SEN
A36
VSS_SEN
B36
VCCIO_SEN
AB4
VSSIO_SEN
AB3
VCCAXG_SEN
L32
VSSAXG_SEN
M32
H_TDO
L39
H_TDI
L40
TDI
M40
L38
J39
K38
K40
E39
C40
D40
H40
H38
G38
G40
G39
F38
E40
F40
B39
J33
L34
L33
K34
N33
M34
AV1
AW2
L9
J9
K9
L31
J31
K31
AD34
AD35
H_TCK
H_TMS
H_TRST_L
H_PRDY_L
H_PREQ_L
H_DBR
XDP_H_CLK_DP
XDP_H_CLK_DN
BPM_L_0
BPM_L_1
BPM_L_2
BPM_L_3
BPM_L_4
BPM_L_5
BPM_L_6
BPM_L_7
VCCSA_VID 38
VCCSA_SEN 38
VCC_SEN 39
VSS_SEN 39
VCCIO_SEN 36
VSSIO_SEN 36
VCCAXG_SEN 39
VSSAXG_SEN 39
H_TDO 41
H_TDI 41
H_TCK 41
H_TMS 41
H_TRST_L 41
H_PRDY_L 41
H_PREQ_L 41
XDP_H_CLK_DP 41
XDP_H_CLK_DN 41
BPM_L_[0..7]
CBR 1.0 P.10
GND
R196
R196
1K-04
1K-04
1 2
R151
R151
4.7K-04
4.7K-04
1 2
GND
1 2
R286 0-04R286 0-04
BPM_L_[0..7] 41
H_TRST_L
H_TMS
H_TDI
H_TCK
Layout SWAP needed
CPU_PWROK
12
H_PECI
CATERR_L
PROCHOT_L
CPU_THERMTRIP_L
VTT_SEL 36
3VSB
R297
R297
220-04-O
220-04-O
1 2
SYS_RST_L
CRB 1.0 P.10
1 2
3 4
5 6
7 8
1 2
1 2
1 2
1 2
1 2
CPU_VTT
RN9 51-8P4RRN9 51-8P4R
Close to CPU
R195 51.1-04-OR195 51.1-04-O
R159 1K-04-OR159 1K-04-O
R165 1K-04-OR165 1K-04-O
R155 51-04R155 51-04
R154 51-04-OR154 51-04-O
For XDP
SYS_RST_L 14,31,41
GND
CPU_VTT
CATERR_L,
CPU_THERMTRIP_L
Pull Up Resistor
2010 MoW05 Remove
B B
PcpuMcpu
VDIMM
R313
R313
100-1-04
100-1-04
1 2
R315
R315
100-1-04
100-1-04
1 2
Place Pcpu in
Socket Cavity.
SC72
SC72
.1U-04-X
.1U-04-X
2 1
GNDGNDGND
BC41
BC41
1U-6V3X-04-O
1U-6V3X-04-O
2 1
GND
5VDAUL_MEMVDIMM3VSB
C295
C295
1U-25V-08-O
1U-25V-08-O
2 1
84
GND
3
+
+
2
-
-
GND
1
U31A
U31A
LM358DS-O
LM358DS-O
DIMM_VREF_CPU_2
R319
R319
12.1K-1-04-O
12.1K-1-04-O
1 2
GND
R317
R317
MCPU_NCPU DIMM_VREF_CPU
1 2
2.2-04-O
2.2-04-O
2 1
BC42
BC42
1U-04-O
1U-04-O
Ncpu
R314
R314
1 2
0-04-O
0-04-O
Address:??ch
U30
BC34
BC34
.1U-X7-04-O
.1U-X7-04-O
2 1
GND
A A
1
2
3
U30
VDD
GND
SCL
AD5247-O
AD5247-O
A
W
SDA
6
DIMM_VREF_CPU_1
5
SMBDATA_STBYSMBCLK_STBY
4
Programmable DIMM_VREF_CPU CIRCUIT
12
12
GND
ER5
ER5
12.1K-1-04-O
12.1K-1-04-O
ER6
ER6
12.1K-1-04-O
12.1K-1-04-O
Layout Note:
All Parts Close yo CPU
SMBCLK_STBY
SMBDATA_STBY
SMBCLK_STBY 11,14,20,21
SMBDATA_STBY 11,14,20,21
10 mils
DIMM_VREF_CPU Control Mode:
Control
Mode
Divider
Part
Mcpu
Ncpu
Pcpu V
X
X
PCH +
Controller
V
V
X
Default
DIMM_VREF_CPU Control Circuit
5
4
3
2
CFG H L
01reserved
reserved reserved
2
NORMAL PEGLANE REVERSAL[0], X16
3
reserved reserved
4
reserved reserved
5
6
7
reserved reserved reserved
8
reserved
9
reserved
10
reserved
11
reserved reserved reserved
12
reserved
13
reserved
14
reserved
15
reserved
CFG_[0..17] HAVE INTERNAL PULL-UPS
PCIE CONFIG
1 X 16
*
2 X 8
Title
Title
Title
CPU - MISC
CPU - MISC
CPU - MISC
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Q67/ Q65/ H67/ H61 H2-AD
Q67/ Q65/ H67/ H61 H2-AD
Q67/ Q65/ H67/ H61 H2-AD
Date: Sheet of
Date: Sheet of
Date: Sheet of
reserved
reserved
REVERSE
reserved
reserved
*
*
*
*
reserved
reserved
reserved reserved
reserved
reserved
reserved
reserved
SEL0 SEL1
0111
Elitegroup Computer Systems
Elitegroup Computer Systems
Elitegroup Computer Systems
DESCRIPTION
reserved
PEOFGSEL[0]
PEOFGSEL[1]
reserved
reserved
reserved
reserved
reserved
reserved
CFG[5:6]:
11=DEFAULT X16,
01=2X8,
10=RESERVED,
00=X8,X4,X4
544Wednesday, January 12, 2011
544Wednesday, January 12, 2011
544Wednesday, January 12, 2011
1
V1.0
V1.0
V1.0
5
M_DATA_A[0..63]9
M_DQS_A_P[0..7]9
M_DQS_A_N[0..7]9
D D
M_MA_A[0..15]9
M_BS_A[0..2]9
M_CS_A_L[0..3]9
M_CKE_A[0..3]9
M_ODT_A[0..3]9
M_CLK_A_P[0..3]9
M_CLK_A_N[0..3]9
M_WE_A_L9
M_CAS_A_L9
M_RAS_A_L9
M_DATA_A[0..63]
M_DQS_A_P[0..7]
M_DQS_A_N[0..7]
M_MA_A[0..15]
M_BS_A[0..2]
M_CS_A_L[0..3]
M_CKE_A[0..3]
M_ODT_A[0..3]
M_CLK_A_P[0..3]
M_CLK_A_N[0..3]
M_WE_A_L
M_CAS_A_L
M_RAS_A_L
DDR3 CH.A
DDR3_DRAMRST_L9,10
C C
M_DATA_B[0..63]10
M_DQS_B_P[0..7]10
M_DQS_B_N[0..7]10
M_MA_B[0..15]10
M_BS_B[0..2]10
M_CS_B_L[0..3]10
M_CKE_B[0..3]10
M_ODT_B[0..3]10
M_CLK_B_P[0..3]10
M_CLK_B_N[0..3]10
M_WE_B_L10
M_CAS_B_L10
M_RAS_B_L10
DDR3_DRAMRST_L
M_DATA_B[0..63]
M_DQS_B_P[0..7]
M_DQS_B_N[0..7]
M_MA_B[0..15]
M_BS_B[0..2]
M_CS_B_L[0..3]
M_CKE_B[0..3]
M_ODT_B[0..3]
M_CLK_B_P[0..3]
M_CLK_B_N[0..3]
M_WE_B_L
M_CAS_B_L
M_RAS_B_L
DDR3 CH.B
B B
4
M_DATA_A0
M_DATA_A1
M_DATA_A2
M_DATA_A3
M_DATA_A4
M_DATA_A5
M_DATA_A6
M_DATA_A7
M_DATA_A8
M_DATA_A9
M_DATA_A10
M_DATA_A11
M_DATA_A12
M_DATA_A13
M_DATA_A14
M_DATA_A15
M_DATA_A16
M_DATA_A17
M_DATA_A18
M_DATA_A19
M_DATA_A20
M_DATA_A21
M_DATA_A22
M_DATA_A23
M_DATA_A24
M_DATA_A25
M_DATA_A26
M_DATA_A27
M_DATA_A28
M_DATA_A29
M_DATA_A30
M_DATA_A31
M_DATA_A32
M_DATA_A33
M_DATA_A34
M_DATA_A35
M_DATA_A36
M_DATA_A37
M_DATA_A38
M_DATA_A39
M_DATA_A40
M_DATA_A41
M_DATA_A42
M_DATA_A43
M_DATA_A44
M_DATA_A45
M_DATA_A46
M_DATA_A47
M_DATA_A48
M_DATA_A49
M_DATA_A50
M_DATA_A51
M_DATA_A52
M_DATA_A53
M_DATA_A54
M_DATA_A55
M_DATA_A56
M_DATA_A57
M_DATA_A58
M_DATA_A59
M_DATA_A60
M_DATA_A61
M_DATA_A62
M_DATA_A63
M_DQS_A_P0
M_DQS_A_P1
M_DQS_A_P2
M_DQS_A_P3
M_DQS_A_P4
M_DQS_A_P5
M_DQS_A_P6
M_DQS_A_P7
M_DQS_A_N0
M_DQS_A_N1
M_DQS_A_N2
M_DQS_A_N3
M_DQS_A_N4
M_DQS_A_N5
M_DQS_A_N6
M_DQS_A_N7
AN1
AN4
AR3
AR4
AN2
AN3
AR2
AR1
AV2
AW3
AV5
AW5
AU2
AU3
AU5
AY5
AY7
AU7
AV9
AU9
AV7
AW7
AW9
AY9
AU35
AW37
AU39
AU36
AW35
AY36
AU38
AU37
AR40
AR37
AN38
AN37
AR39
AR38
AN39
AN40
AL40
AL37
AJ38
AJ37
AL39
AL38
AJ39
AJ40
AG40
AG37
AE38
AE37
AG39
AG38
AE39
AE40
AK3
AP3
AW4
AV8
AV37
AP38
AK38
AF38
AK2
AP2
AV4
AW8
AV36
AP39
AK39
AF39
AJ3
AJ4
AL3
AL4
AJ2
AJ1
AL2
AL1
CPU1C
CPU1C
BALLMAP_REV=1.4
BALLMAP_REV=1.4
SA_DQ_0
SA_DQ_1
SA_DQ_2
SA_DQ_3
SA_DQ_4
SA_DQ_5
SA_DQ_6
SA_DQ_7
SA_DQ_8
SA_DQ_9
SA_DQ_10
SA_DQ_11
SA_DQ_12
SA_DQ_13
SA_DQ_14
SA_DQ_15
SA_DQ_16
SA_DQ_17
SA_DQ_18
SA_DQ_19
SA_DQ_20
SA_DQ_21
SA_DQ_22
SA_DQ_23
SA_DQ_24
SA_DQ_25
SA_DQ_26
SA_DQ_27
SA_DQ_28
SA_DQ_29
SA_DQ_30
SA_DQ_31
SA_DQ_32
SA_DQ_33
SA_DQ_34
SA_DQ_35
SA_DQ_36
SA_DQ_37
SA_DQ_38
SA_DQ_39
SA_DQ_40
SA_DQ_41
SA_DQ_42
SA_DQ_43
SA_DQ_44
SA_DQ_45
SA_DQ_46
SA_DQ_47
SA_DQ_48
SA_DQ_49
SA_DQ_50
SA_DQ_51
SA_DQ_52
SA_DQ_53
SA_DQ_54
SA_DQ_55
SA_DQ_56
SA_DQ_57
SA_DQ_58
SA_DQ_59
SA_DQ_60
SA_DQ_61
SA_DQ_62
SA_DQ_63
SA_DQS_0
SA_DQS_1
SA_DQS_2
SA_DQS_3
SA_DQS_4
SA_DQS_5
SA_DQS_6
SA_DQS_7
SA_DQS#_0
SA_DQS#_1
SA_DQS#_2
SA_DQS#_3
SA_DQS#_4
SA_DQS#_5
SA_DQS#_6
SA_DQS#_7
SKT_H2_CRB
SKT_H2_CRB
3
Pay Attention to
This Part!
SA_MA_0
SA_MA_1
SA_MA_2
SA_MA_3
SA_MA_4
SA_MA_5
SA_MA_6
SA_MA_7
SA_MA_8
SA_MA_9
SA_MA_10
SA_MA_11
SA_MA_12
SA_MA_13
SA_MA_14
SA_MA_15
SA_WE#
SA_CAS#
SA_RAS#
SA_BS_0
SA_BS_1
SA_BS_2
SA_CS#_0
SA_CS#_1
SA_CS#_2
SA_CS#_3
SA_CKE_0
SA_CKE_1
SA_CKE_2
SA_CKE_3
SA_ODT_0
SA_ODT_1
SA_ODT_2
SA_ODT_3
SA_CK_0
SA_CK#_0
SA_CK_1
SA_CK#_1
SA_CK_2
SA_CK#_2
SA_CK_3
SA_CK#_3
SM_DRAMRST#
SA_DQS_8
SA_DQS#_8
SA_ECC_CB_0
SA_ECC_CB_1
SA_ECC_CB_2
SA_ECC_CB_3
SA_ECC_CB_4
SA_ECC_CB_5
SA_ECC_CB_6
SA_ECC_CB_7
DDR_0
DDR_0
3 OF 10
3 OF 10
M_MA_A0
AV27
M_MA_A1
AY24
M_MA_A2
AW24
M_MA_A3
AW23
M_MA_A4
AV23
M_MA_A5
AT24
M_MA_A6
AT23
M_MA_A7
AU22
M_MA_A8
AV22
M_MA_A9
AT22
M_MA_A10
AV28
M_MA_A11
AU21
M_MA_A12
AT21
M_MA_A13
AW32
M_MA_A14
AU20
M_MA_A15
AT20
M_WE_A_L
AW29
M_CAS_A_L
AV30
M_RAS_A_L
AU28
M_BS_A0
AY29
M_BS_A1
AW28
M_BS_A2
AV20
M_CS_A_L0
AU29
M_CS_A_L1
AV32
M_CS_A_L2
AW30
M_CS_A_L3
AU33
M_CKE_A0
AV19
M_CKE_A1
AT19
M_CKE_A2
AU18
M_CKE_A3
AV18
M_ODT_A0
AV31
M_ODT_A1
AU32
M_ODT_A2
AU30
M_ODT_A3
AW33
M_CLK_A_P0
AY25
M_CLK_A_N0
AW25
M_CLK_A_P1
AU24
M_CLK_A_N1
AU25
M_CLK_A_P2
AW27
M_CLK_A_N2
AY27
M_CLK_A_P3
AV26
M_CLK_A_N3
AW26
DDR3_DRAMRST_R_L
AW18
AV13
AV12
AU12
AU14
AW13
AY13
AU13
AU11
AY12
AW12
1 2
R303 0-04R303 0-04
10'06'28 ADD for TRACE Length
DDR3_DRAMRST_L
C290
C290
2 1
.1U-04-O
.1U-04-O
GND
For RC Filter
Desktop dosen't support
ECC
M_DATA_B0
M_DATA_B1
M_DATA_B2
M_DATA_B3
M_DATA_B4
M_DATA_B5
M_DATA_B6
M_DATA_B7
M_DATA_B13
M_DATA_B9
M_DATA_B11
M_DATA_B15
M_DATA_B12
M_DATA_B8
M_DATA_B14
M_DATA_B10
M_DATA_B16
M_DATA_B17
M_DATA_B18
M_DATA_B19
M_DATA_B20
M_DATA_B21
M_DATA_B22
M_DATA_B23
M_DATA_B24
M_DATA_B25
M_DATA_B26
M_DATA_B27
M_DATA_B28
M_DATA_B29
M_DATA_B30
M_DATA_B31
M_DATA_B32
M_DATA_B33
M_DATA_B34
M_DATA_B35
M_DATA_B36
M_DATA_B37
M_DATA_B38
M_DATA_B39
M_DATA_B40
M_DATA_B41
M_DATA_B42
M_DATA_B43
M_DATA_B44
M_DATA_B45
M_DATA_B46
M_DATA_B47
M_DATA_B48
M_DATA_B52
M_DATA_B55
M_DATA_B51
M_DATA_B54
M_DATA_B49
M_DATA_B53
M_DATA_B50
M_DATA_B56
M_DATA_B57
M_DATA_B58
M_DATA_B59
M_DATA_B60
M_DATA_B61
M_DATA_B62
M_DATA_B63
M_DQS_B_P0
M_DQS_B_P1
M_DQS_B_P2
M_DQS_B_P3
M_DQS_B_P4
M_DQS_B_P5
M_DQS_B_P6
M_DQS_B_P7
M_DQS_B_N0
M_DQS_B_N1
M_DQS_B_N2
M_DQS_B_N3
M_DQS_B_N4
M_DQS_B_N5
M_DQS_B_N6
M_DQS_B_N7
DDR3 CH.A DDR3 CH.B
2
CPU1D
CPU1D
BALLMAP_REV=1.4
AG7
AG8
AG5
AG6
AM7
AM10
AL10
AM6
AM9
AP7
AR7
AP10
AR10
AP6
AR6
AP9
AR9
AM12
AM13
AR13
AP13
AL12
AL13
AR12
AP12
AR28
AR29
AL28
AL29
AP28
AP29
AM28
AM29
AP32
AP31
AP35
AP34
AR32
AR31
AR35
AR34
AM32
AM31
AL35
AL32
AM34
AL31
AM35
AL34
AH35
AH34
AE34
AE35
AJ35
AJ34
AF33
AF35
AH7
AM8
AR8
AN13
AN29
AP33
AL33
AG35
AH6
AP8
AN12
AN28
AR33
AM33
AG34
AJ9
AJ8
AJ6
AJ7
AL7
AL6
AL9
AL8
BALLMAP_REV=1.4
SB_DQ_0
SB_DQ_1
SB_DQ_2
SB_DQ_3
SB_DQ_4
SB_DQ_5
SB_DQ_6
SB_DQ_7
SB_DQ_8
SB_DQ_9
SB_DQ_10
SB_DQ_11
SB_DQ_12
SB_DQ_13
SB_DQ_14
SB_DQ_15
SB_DQ_16
SB_DQ_17
SB_DQ_18
SB_DQ_19
SB_DQ_20
SB_DQ_21
SB_DQ_22
SB_DQ_23
SB_DQ_24
SB_DQ_25
SB_DQ_26
SB_DQ_27
SB_DQ_28
SB_DQ_29
SB_DQ_30
SB_DQ_31
SB_DQ_32
SB_DQ_33
SB_DQ_34
SB_DQ_35
SB_DQ_36
SB_DQ_37
SB_DQ_38
SB_DQ_39
SB_DQ_40
SB_DQ_41
SB_DQ_42
SB_DQ_43
SB_DQ_44
SB_DQ_45
SB_DQ_46
SB_DQ_47
SB_DQ_48
SB_DQ_49
SB_DQ_50
SB_DQ_51
SB_DQ_52
SB_DQ_53
SB_DQ_54
SB_DQ_55
SB_DQ_56
SB_DQ_57
SB_DQ_58
SB_DQ_59
SB_DQ_60
SB_DQ_61
SB_DQ_62
SB_DQ_63
SB_DQS_0
SB_DQS_1
SB_DQS_2
SB_DQS_3
SB_DQS_4
SB_DQS_5
SB_DQS_6
SB_DQS_7
SB_DQS#_0
SB_DQS#_1
SB_DQS#_2
SB_DQS#_3
SB_DQS#_4
SB_DQS#_5
SB_DQS#_6
SB_DQS#_7
SKT_H2_CRB
SKT_H2_CRB
SB_MA_0
SB_MA_1
SB_MA_2
SB_MA_3
SB_MA_4
SB_MA_5
SB_MA_6
SB_MA_7
SB_MA_8
SB_MA_9
SB_MA_10
SB_MA_11
SB_MA_12
SB_MA_13
SB_MA_14
SB_MA_15
SA_CK[2]
SA_CK[1]
SA_ODT[2]
SB_BS_0
SB_BS_1
SB_BS_2
SB_CS#_0
SB_CS#_1
SB_CS#_2
SB_CS#_3
SB_CKE_0
SB_CKE_1
SB_CKE_2
SB_CKE_3
SB_ODT_0
SB_ODT_1
SB_ODT_2
SB_ODT_3
SB_CK_0
SB_CK#_0
SB_CK_1
SB_CK#_1
SB_CK_2
SB_CK#_2
SB_CK_3
SB_CK#_3
SB_DQS_8
SB_DQS#_8
SB_ECC_CB_0
SB_ECC_CB_1
SB_ECC_CB_2
SB_ECC_CB_3
SB_ECC_CB_4
SB_ECC_CB_5
SB_ECC_CB_6
SB_ECC_CB_7
DDR_1
DDR_1
4 OF 10
4 OF 10
AK24
AM20
AM19
AK18
AP19
AP18
AM18
AL18
AN18
AY17
AN23
AU17
AT18
AR26
AY16
AV16
AR25
AK25
AP24
AP23
AM24
AW17
AN25
AN26
AL25
AT26
AU16
AY15
AW15
AV15
AL26
AP26
AM26
AK26
AL21
AL22
AL20
AK20
AL23
AM22
AP21
AN21
AN16
AN15
AL16
AM16
AP16
AR16
AL15
AM15
AR15
AP15
1
M_MA_B0
M_MA_B1
M_MA_B2
M_MA_B3
M_MA_B4
M_MA_B5
M_MA_B6
M_MA_B7
M_MA_B8
M_MA_B9
M_MA_B10
M_MA_B11
M_MA_B12
M_MA_B13
M_MA_B14
M_MA_B15
M_WE_B_L
M_CAS_B_L
M_RAS_B_L
M_BS_B0
M_BS_B1
M_BS_B2
M_CS_B_L0
M_CS_B_L1
M_CS_B_L2
M_CS_B_L3
M_CKE_B0
M_CKE_B1
M_CKE_B2
M_CKE_B3
M_ODT_B0
M_ODT_B1
M_ODT_B2
M_ODT_B3
M_CLK_B_P0
M_CLK_B_N0
M_CLK_B_P1
M_CLK_B_N1
M_CLK_B_P2
M_CLK_B_N2
M_CLK_B_P3
M_CLK_B_N3
Desktop dosen't support
ECC
A A
Elitegroup Computer Systems
Elitegroup Computer Systems
Elitegroup Computer Systems
Title
Title
Title
CPU - DDR3
CPU - DDR3
CPU - DDR3
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Q67/ Q65/ H67/ H61 H2-AD
Q67/ Q65/ H67/ H61 H2-AD
Q67/ Q65/ H67/ H61 H2-AD
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
644Wednesday, January 12, 2011
644Wednesday, January 12, 2011
644Wednesday, January 12, 2011
1
V1.0
V1.0
V1.0
5
4
3
2
1
CPU_VTT
C514
C514
BC21
BC21
.1U-04
.1U-04
.1U-04
.1U-04
2 1
2 1
BC16
BC16
SC61
SC61
.1U-04
.1U-04
.1U-04-X-O
.1U-04-X-O
2 1
2 1
SC62
SC60
SC60
.1U-04-X-O
.1U-04-X-O
SC62
.1U-04-X-O
.1U-04-X-O
2 1
BC17
BC17
.1U-04
.1U-04
2 1
10'06'30 10'06'30
2 1
DECOUPLING & STITCHING CAPS.
V_SACPU_VTT
21
SC66
SC66
22U-X5-08-X
22U-X5-08-X
GND
PLACE NEAR SKT EDGE
OUTSIDE CAVITY.
CPU_VCORE
21
C218
C218
22U-X5-08
22U-X5-08
PLACE NEAR SKT EDGE
OUTSIDE CAVITY.
21
SC68
SC68
22U-X5-08-X-O
22U-X5-08-X-O
21
SC65
SC65
22U-X5-08-X
22U-X5-08-X
21
SC52
SC52
22U-X5-08-X-O
22U-X5-08-X-O
21
2
21
GND
C220
C220
22U-X5-08
22U-X5-08
21
21
21
SC40
SC40
22U-X5-08-X
22U-X5-08-X
SC53
SC53
22U-X5-08-O
22U-X5-08-O
SC58
SC58
22U-X5-08-X
22U-X5-08-X
SC50
SC50
22U-X5-08-X
22U-X5-08-X
BC22
BC22
.1U-04
.1U-04
2 1
2 1
BC19
BC19
.1U-04
.1U-04
2 1
2 1
2 1
C515
C515
.1U-04
.1U-04
2 1
21
21
C169
C219
C219
22U-X5-08
22U-X5-08
C169
22U-X5-08
22U-X5-08
GND GND
21
SC38
SC38
22U-X5-08-X
22U-X5-08-X
21
SC67
SC67
22U-X5-08-X-O
22U-X5-08-X-O
21
C196
C196
22U-X5-08-O
22U-X5-08-O
SC63
SC63
.1U-04-X-O
.1U-04-X-O
SC64
SC64
.1U-04-X-O
.1U-04-X-O
BC20
BC20
.1U-04
.1U-04
21
SC56
SC56
22U-X5-08-X-O
22U-X5-08-X-O
GND
21
C226
C226
22U-X5-08
22U-X5-08
21
SC54
SC54
22U-X5-08-X-O
22U-X5-08-X-O
GND
2 1
BC18
BC18
.1U-04
.1U-04
VCC1.8
2 1
21
SC49
SC49
22U-X5-08-X
22U-X5-08-X
21
C236
C236
22U-X5-08
22U-X5-08
21
SC55
SC55
22U-X5-08-X-O
22U-X5-08-X-O
BC24
BC24
.1U-X7-04
.1U-X7-04
V_AXGCPU_VTT
2 1
21
SC59
SC59
22U-X5-08-X
22U-X5-08-X
GND
21
SC48
SC48
22U-X5-08-X
22U-X5-08-X
GND
21
SC51
SC51
22U-X5-08-X-O
22U-X5-08-X-O
GND
10'06'30
C254
C254
22U-X5-08
22U-X5-08
PLACE ALL 0805 CAPS INSIDE CPU SOCKET CAVITY, BACKSIDE.
Elitegroup Computer Systems
Elitegroup Computer Systems
Elitegroup Computer Systems
Title
Title
Title
CPU - PWR
CPU - PWR
CPU - PWR
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Q67/ Q65/ H67/ H61 H2-AD
Q67/ Q65/ H67/ H61 H2-AD
Q67/ Q65/ H67/ H61 H2-AD
Date: Sheet of
Date: Sheet of
Date: Sheet of
744Wednesday, January 12, 2011
744Wednesday, January 12, 2011
744Wednesday, January 12, 2011
1
V1.0
V1.0
V1.0
VDDQ_01
VDDQ_02
VDDQ_04
VDDQ_05
VDDQ_06
VDDQ_07
VDDQ_08
VDDQ_09
VDDQ_10
VDDQ_11
VDDQ_12
VDDQ_13
VDDQ_14
VDDQ_15
VDDQ_16
VDDQ_17
VDDQ_18
VDDQ_19
VDDQ_20
VDDQ_21
VDDQ_22
VDDQ_23
VDDQ_03
21
21
C242
C242
22U-X5-08
22U-X5-08
C246
C246
22U-X5-08
22U-X5-08
21
SC46
SC46
22U-X5-08-X
22U-X5-08-X
21
C168
C168
22U-X5-08
22U-X5-08
1.5V
MAX 4.5A
In
AJ13
AJ14
AJ23
AJ24
AR20
AR21
AR22
AR23
AR24
AU19
AU23
AU27
AU31
AV21
AV24
AV25
AV29
AV33
AW31
AY23
AY26
AY28
AJ20
21
C243
C243
22U-X5-08
22U-X5-08
GND
21
C221
C221
22U-X5-08
22U-X5-08
21
C170
C170
22U-X5-08
22U-X5-08
21
C216
C216
22U-X5-08
22U-X5-08
21
SC39
SC39
22U-X5-08-X
22U-X5-08-X
MAX 35A
In
V_AXG
21
GND
AB33
AB34
AB35
AB36
AB37
AB38
AB39
AB40
AC33
AC34
AC35
AC36
AC37
AC38
AC39
AC40
T33
T34
T35
T36
T37
T38
T39
T40
U33
U34
U35
U36
U37
U38
U39
U40
W33
W34
W35
W36
W37
W38
Y33
Y34
Y35
Y36
Y37
Y38
21
C225
C225
22U-X5-08
22U-X5-08
21
SC47
SC47
22U-X5-08-X
22U-X5-08-X
C215
C215
22U-X5-08-O
22U-X5-08-O
21
SC69
SC69
22U-X5-08-X-O
22U-X5-08-X-O
GND
CPU1H
CPU1H
VBALLMAP_REV=1.4
VBALLMAP_REV=1.4
VCCAXG_01
VCCAXG_02
VCCAXG_03
VCCAXG_04
VCCAXG_05
VCCAXG_06
VCCAXG_07
VCCAXG_08
VCCAXG_09
VCCAXG_10
VCCAXG_11
VCCAXG_12
VCCAXG_13
VCCAXG_14
VCCAXG_15
VCCAXG_16
VCCAXG_17
VCCAXG_18
VCCAXG_19
VCCAXG_20
VCCAXG_21
VCCAXG_22
VCCAXG_23
VCCAXG_24
VCCAXG_25
VCCAXG_26
VCCAXG_27
VCCAXG_28
VCCAXG_29
VCCAXG_30
VCCAXG_31
VCCAXG_32
VCCAXG_33
VCCAXG_34
VCCAXG_35
VCCAXG_36
VCCAXG_37
VCCAXG_38
VCCAXG_39
VCCAXG_40
VCCAXG_41
VCCAXG_42
VCCAXG_43
VCCAXG_44
SKT_H2_CRB
SKT_H2_CRB
21
C247
C247
22U-X5-08
22U-X5-08
21
C235
C235
22U-X5-08
22U-X5-08
VDIMM
GND
21
C255
C255
22U-X5-08
22U-X5-08
8 OF 10
8 OF 10
21
C251
C251
22U-X5-08
22U-X5-08
21
C302
C302
22U-X5-08-O
22U-X5-08-O
21
C258
C258
22U-X5-08
22U-X5-08
21
GND
SC57
SC57
22U-X5-08-X
22U-X5-08-X
21
C257
C257
22U-X5-08
22U-X5-08
1.05V/1.00V
MAX 8.8A
In
CPU_VTT V_AXGCPU_VCORE VDIMM
0.925V/0.85V
MAX 8.8A
In
V_SA
1.8V
MAX 1A
In
VCC1.8
CPU_VTT
CPU_VCORE
21
SC41
SC41
22U-X5-08-X
22U-X5-08-X
21
SC43
SC43
22U-X5-08-X
22U-X5-08-X
21
C256
C256
22U-X5-08
22U-X5-08
21
21
M13
A11
A7
AA3
AB8
AF8
AG33
AJ16
AJ17
AJ26
AJ28
AJ32
AK15
AK17
AK19
AK21
AK23
AK27
AK29
AK30
B9
D10
D6
E3
E4
G3
G4
J3
J4
J7
J8
L3
L4
L7
N3
N4
N7
R3
R4
R7
U3
U4
U7
V8
W3
H10
H11
H12
J10
K10
K11
L11
L12
M10
M11
M12
AK11
AK12
SC44
SC44
22U-X5-08-X
22U-X5-08-X
C167
C167
22U-X5-08
22U-X5-08
21
21
CPU1G
CPU1G
BALLMAP_REV=1.4
BALLMAP_REV=1.4
VCCIO_34
VCCIO_01
VCCIO_02
VCCIO_03
VCCIO_04
VCCIO_05
VCCIO_06
VCCIO_07
VCCIO_08
VCCIO_09
VCCIO_10
VCCIO_11
VCCIO_12
VCCIO_13
VCCIO_14
VCCIO_15
VCCIO_16
VCCIO_17
VCCIO_18
VCCIO_19
VCCIO_20
VCCIO_21
VCCIO_22
VCCIO_23
VCCIO_24
VCCIO_25
VCCIO_26
VCCIO_27
VCCIO_28
VCCIO_29
VCCIO_30
VCCIO_31
VCCIO_32
VCCIO_33
VCCIO_35
VCCIO_36
VCCIO_37
VCCIO_38
VCCIO_39
VCCIO_40
VCCIO_41
VCCIO_42
VCCIO_43
VCCIO_44
VCCIO_45
VCCSA_01
VCCSA_02
VCCSA_03
VCCSA_04
VCCSA_05
VCCSA_06
VCCSA_07
VCCSA_08
VCCSA_09
VCCSA_10
VCCSA_11
VCCPLL_01
VCCPLL_02
SKT_H2_CRB
SKT_H2_CRB
C241
C241
22U-X5-08
22U-X5-08
C245
C245
22U-X5-08
22U-X5-08
21
21
SC45
SC45
22U-X5-08-X
22U-X5-08-X
C223
C223
22U-X5-08
22U-X5-08
21
C248
C248
22U-X5-08
22U-X5-08
21
C244
C244
22U-X5-08
22U-X5-08
21
21
POWER
POWER
7 OF 10
7 OF 10
SC42
SC42
22U-X5-08-X
22U-X5-08-X
C222
C222
22U-X5-08
22U-X5-08
VCC_082
VCC_083
VCC_084
VCC_085
VCC_086
VCC_087
VCC_088
VCC_089
VCC_090
VCC_091
VCC_092
VCC_093
VCC_094
VCC_095
VCC_096
VCC_097
VCC_098
VCC_099
VCC_100
VCC_101
VCC_102
VCC_103
VCC_104
VCC_105
VCC_106
VCC_107
VCC_108
VCC_109
VCC_110
VCC_111
VCC_112
VCC_113
VCC_114
VCC_115
VCC_116
VCC_117
VCC_118
VCC_119
VCC_120
VCC_121
VCC_122
VCC_123
VCC_124
VCC_125
VCC_126
VCC_127
VCC_128
VCC_129
VCC_130
VCC_131
VCC_132
VCC_133
VCC_134
VCC_135
VCC_136
VCC_137
VCC_138
VCC_139
VCC_140
VCC_141
VCC_142
VCC_143
VCC_144
VCC_145
VCC_146
VCC_147
VCC_148
VCC_149
VCC_150
VCC_151
VCC_152
VCC_153
VCC_154
VCC_155
VCC_156
VCC_157
VCC_158
VCC_159
VCC_160
VCC_161
MAX 112A
In
F32
F33
F34
G15
G16
G18
G19
G21
G22
G24
G25
G27
G28
G30
G31
G32
G33
H13
H14
H15
H16
H18
H19
H21
H22
H24
H25
H27
H28
H30
H31
H32
J12
J15
J16
J18
J19
J21
J22
J24
J25
J27
J28
J30
K15
K16
K18
K19
K21
K22
K24
K25
K27
K28
K30
L13
L14
L15
L16
L18
L19
L21
L22
L24
L25
L27
L28
L30
M14
M15
M16
M18
M19
M21
M22
M24
M25
M27
M28
M30
MAX 112A
In
CPU_VCORE
D D
C C
B B
A A
CPU1F
CPU1F
BALLMAP_REV=1.4
BALLMAP_REV=1.4
A12
VCC_001
A13
VCC_002
A14
VCC_003
A15
VCC_004
A16
VCC_005
A18
VCC_006
A24
VCC_007
A25
VCC_008
A27
VCC_009
A28
VCC_010
B15
VCC_011
B16
VCC_012
B18
VCC_013
B24
VCC_014
B25
VCC_015
B27
VCC_016
B28
VCC_017
B30
VCC_018
B31
VCC_019
B33
VCC_020
B34
VCC_021
C15
VCC_022
C16
VCC_023
C18
VCC_024
C19
VCC_025
C21
VCC_026
C22
VCC_027
C24
VCC_028
C25
VCC_029
C27
VCC_030
C28
VCC_031
C30
VCC_032
C31
VCC_033
C33
VCC_034
C34
VCC_035
C36
VCC_036
D13
VCC_037
D14
VCC_038
D15
VCC_039
D16
VCC_040
D18
VCC_041
D19
VCC_042
D21
VCC_043
D22
VCC_044
D24
VCC_045
D25
VCC_046
D27
VCC_047
D28
VCC_048
D30
VCC_049
D31
VCC_050
D33
VCC_051
D34
VCC_052
D35
VCC_053
D36
VCC_054
E15
VCC_055
E16
VCC_056
E18
VCC_057
E19
VCC_058
E21
VCC_059
E22
VCC_060
E24
VCC_061
E25
VCC_062
E27
VCC_063
E28
VCC_064
E30
VCC_065
E31
VCC_066
E33
VCC_067
E34
VCC_068
E35
VCC_069
F15
VCC_070
F16
VCC_071
F18
VCC_072
F19
VCC_073
F21
VCC_074
F22
VCC_075
F24
VCC_076
F25
VCC_077
F27
VCC_078
F28
VCC_079
F30
VCC_080
F31
VCC_081
SKT_H2_CRB
SKT_H2_CRB
6 OF 10
6 OF 10
PLACE ALL 0805 CAPS INSIDE CPU SOCKET CAVITY, TOPSIDE.
5
4
3
5
CPU1J
CPU1I
CPU1I
BALLMAP_REV=1.4
BALLMAP_REV=1.4
A17
VSS_001
A23
VSS_002
A26
VSS_003
A29
VSS_004
A35
VSS_005
AA33
VSS_006
D D
C C
B B
A A
AA34
AA35
AA36
AA37
AA38
AA6
AB5
AC1
AC6
AD33
AD36
AD38
AD39
AD40
AD5
AD8
AE3
AE33
AE36
AF1
AF34
AF36
AF37
AF40
AF5
AF6
AF7
AG36
AH2
AH3
AH33
AH36
AH37
AH38
AH39
AH40
AH5
AH8
AJ12
AJ15
AJ18
AJ21
AJ25
AJ27
AJ36
AJ5
AK1
AK10
AK13
AK14
AK16
AK22
AK28
AK31
AK32
AK33
AK34
AK35
AK36
AK37
AK4
AK40
AK5
AK6
AK7
AK8
AK9
AL11
AL14
AL17
AL19
AL24
AL27
AL30
AL36
AL5
AM1
AM11
AM14
AM17
AM2
AM21
AM23
AM25
AV39
VSS_007
VSS_008
VSS_009
VSS_010
VSS_011
VSS_012
VSS_013
VSS_014
VSS_015
VSS_016
VSS_017
VSS_018
VSS_019
VSS_020
VSS_021
VSS_022
VSS_023
VSS_024
VSS_025
VSS_026
VSS_027
VSS_028
VSS_029
VSS_030
VSS_031
VSS_032
VSS_033
VSS_034
VSS_035
VSS_036
VSS_037
VSS_038
VSS_039
VSS_040
VSS_041
VSS_042
VSS_043
VSS_044
VSS_045
VSS_046
VSS_047
VSS_048
VSS_049
VSS_050
VSS_051
VSS_052
VSS_053
VSS_054
VSS_055
VSS_056
VSS_057
VSS_058
VSS_059
VSS_060
VSS_061
VSS_062
VSS_063
VSS_064
VSS_065
VSS_066
VSS_067
VSS_068
VSS_069
VSS_070
VSS_071
VSS_072
VSS_073
VSS_074
VSS_075
VSS_076
VSS_077
VSS_078
VSS_079
VSS_080
VSS_081
VSS_082
VSS_083
VSS_084
VSS_085
VSS_086
VSS_087
VSS_088
VSS_089
VSS_090
A4
VSS_NCTF_01
VSS_NCTF_02
SKT_H2_CRB
SKT_H2_CRB
9 OF 10
9 OF 10
VSS_091
VSS_092
VSS_093
VSS_094
VSS_095
VSS_096
VSS_097
VSS_098
VSS_099
VSS_100
VSS_101
VSS_102
VSS_103
VSS_104
VSS_105
VSS_106
VSS_107
VSS_108
VSS_109
VSS_110
VSS_111
VSS_112
VSS_113
VSS_114
VSS_115
VSS_116
VSS_117
VSS_118
VSS_119
VSS_120
VSS_121
VSS_122
VSS_123
VSS_124
VSS_125
VSS_126
VSS_127
VSS_128
VSS_129
VSS_130
VSS_131
VSS_132
VSS_133
VSS_134
VSS_135
VSS_136
VSS_137
VSS_138
VSS_139
VSS_140
VSS_141
VSS_142
VSS_143
VSS_144
VSS_145
VSS_146
VSS_147
VSS_148
VSS_149
VSS_150
VSS_151
VSS_152
VSS_153
VSS_154
VSS_155
VSS_156
VSS_157
VSS_158
VSS_159
VSS_160
VSS_161
VSS_162
VSS_163
VSS_164
VSS_165
VSS_166
VSS_167
VSS_168
VSS_169
VSS_170
VSS_171
VSS_172
VSS_173
VSS_174
VSS_175
VSS_176
VSS_177
VSS_178
VSS_179
VSS_180
AM27
AM3
AM30
AM36
AM37
AM38
AM39
AM4
AM40
AM5
AN10
AN11
AN14
AN17
AN19
AN22
AN24
AN27
AN30
AN31
AN32
AN33
AN34
AN35
AN36
AN5
AN6
AN7
AN8
AN9
AP1
AP11
AP14
AP17
AP22
AP25
AP27
AP30
AP36
AP37
AP4
AP40
AP5
AR11
AR14
AR17
AR18
AR19
AR27
AR30
AR36
AR5
AT1
AT10
AT12
AT13
AT15
AT16
AT17
AT2
AT25
AT27
AT28
AT29
AT3
AT30
AT31
AT32
AT33
AT34
AT35
AT36
AT37
AT38
AT39
AT4
AT40
AT5
AT6
AT7
AT8
AT9
AU1
AU15
AU26
AU34
AU4
AU6
AU8
AV10
GNDGND GND GND
CPU1J
BALLMAP_REV=1.4
BALLMAP_REV=1.4
AV11
VSS_181
AV14
VSS_182
AV17
VSS_183
AV3
VSS_184
AV35
VSS_185
AV38
VSS_186
AV6
VSS_187
AW10
VSS_188
AW11
VSS_189
AW14
VSS_190
AW16
VSS_191
AW36
VSS_192
AW6
VSS_193
AY11
VSS_194
AY14
VSS_195
AY18
VSS_196
AY35
VSS_197
AY4
VSS_198
AY6
VSS_199
AY8
VSS_200
B10
VSS_201
B13
VSS_202
B14
VSS_203
B17
VSS_204
B23
VSS_205
B26
VSS_206
B29
VSS_207
B32
VSS_208
B35
VSS_209
B38
VSS_210
B6
VSS_211
C11
VSS_212
C12
VSS_213
C17
VSS_214
C20
VSS_215
C23
VSS_216
C26
VSS_217
C29
VSS_218
C32
VSS_219
C35
VSS_220
C7
VSS_221
C8
VSS_222
D17
VSS_223
D2
VSS_224
D20
VSS_225
D23
VSS_226
D26
VSS_227
D29
VSS_228
D32
VSS_229
D37
VSS_230
D39
VSS_231
D4
VSS_232
D5
VSS_233
D9
VSS_234
E11
VSS_235
E12
VSS_236
E17
VSS_237
E20
VSS_238
E23
VSS_239
E26
VSS_240
E29
VSS_241
E32
VSS_242
E36
VSS_243
E7
VSS_244
E8
VSS_245
F1
VSS_246
F10
VSS_247
F13
VSS_248
F14
VSS_249
F17
VSS_250
F2
VSS_251
F20
VSS_252
F23
VSS_253
F26
VSS_254
F29
VSS_255
F35
VSS_256
F37
VSS_257
F39
VSS_258
F5
VSS_259
F6
VSS_260
F9
VSS_261
G11
VSS_262
G12
VSS_263
G17
VSS_264
G20
VSS_265
G23
VSS_266
G26
VSS_267
G29
VSS_268
G34
VSS_269
G7
VSS_270
AY37
VSS_NCTF_03
B3
VSS_NCTF_04
SKT_H2_CRB
SKT_H2_CRB
4
VSS_271
VSS_272
VSS_273
VSS_274
VSS_275
VSS_276
VSS_277
VSS_278
VSS_279
VSS_280
VSS_281
VSS_282
VSS_283
VSS_284
VSS_285
VSS_286
VSS_287
VSS_288
VSS_289
VSS_290
VSS_291
VSS_292
VSS_293
VSS_294
VSS_295
VSS_296
VSS_297
VSS_298
VSS_299
VSS_300
VSS_301
VSS_302
VSS_303
VSS_304
VSS_305
VSS_306
VSS_307
VSS_308
VSS_309
VSS_310
VSS_311
VSS_312
VSS_313
VSS_314
VSS_315
VSS_316
VSS_317
VSS_318
VSS_319
VSS_320
VSS_321
VSS_322
VSS_323
VSS_324
VSS_325
VSS_326
VSS_327
VSS_328
VSS_329
VSS_330
VSS_331
VSS_332
VSS_333
VSS_334
VSS_335
VSS_336
VSS_337
VSS_338
VSS_339
VSS_340
VSS_341
VSS_342
VSS_343
VSS_344
VSS_345
VSS_346
VSS_347
VSS_348
VSS_349
VSS_350
VSS_351
VSS_352
VSS_353
VSS_354
VSS_355
VSS_356
VSS_357
VSS_358
VSS_359
VSS_360
10 of 10
10 of 10
G8
H1
H17
H2
H20
H23
H26
H29
H33
H35
H37
H39
H5
H6
H9
J11
J17
J20
J23
J26
J29
J32
K1
K12
K13
K14
K17
K2
K20
K23
K26
K29
K33
K35
K37
K39
K5
K6
L10
L17
L20
L23
L26
L29
L8
M1
M17
M2
M20
M23
M26
M29
M33
M35
M37
M39
M5
M6
M9
N8
P1
P2
P36
P38
P40
P5
P6
R33
R35
R37
R39
R8
T1
T5
T6
U8
V1
V2
V33
V34
V35
V36
V37
V38
V39
V40
V5
W6
Y5
Y8
3
04'20'10
PCH_PLTRST_L14,22,28,41
PCH_PLTRST_L QN5_B
R532
R532
1 2
5.1K-04-O
5.1K-04-O
R548
R548
10K-04-O
10K-04-O
1 2
C418
C418
.1U-04-O
.1U-04-O
GNDGND
PCI_RST2_L28
VCC3
R530
R530
1K-04-O
1K-04-O
1 2
QN5_C
QN20
QN20
2N3904-S-O
2N3904-S-O
B
B
E C
2 1
GND
VCC3
GND
R496
R496
330-04-O
330-04-O
1 2
QN18
QN18
2N3904-S-O
2N3904-S-O
E C
2
R482 330-04R482 330-04
1 2
10'07'09
1.1V
CPU_VTT
GND
1 2
12
R296
R296
1K-04-O
1K-04-O
R495
R495
178-1-04
178-1-04
10'07'09
CPU_RST_L
10'07'09
1
CPU_RST_L 5,41
PLTRST_L Driving Circuit
11-018-115021 CPU SMD SOCKET
SOCKET.CPU..LGA 1155P SMD.BLACK.PE115527-4041-01F.
LEAD-FREE.FOXCONN
20-800-004711 CPU SOCKET STEEL
SUBASSY.STEEL.LGA 1156P.W/
BACK PLATE.PT44A11-6401.LEAD-FREE(RoHS).FOXCONN
CPU(104)
CPU(104)
CPU_SUBASSY_STEEL
CPU_SUBASSY_STEEL
01D201-000060 PCH ES0
H1 HOLE-AH1 HOLE-A
1
2
3
4 5
9
AUGND
H2 HOLE-AH2 HOLE-A
1
2
3
4 5
9
GND
H3 HOLE-AH3 HOLE-A
1
2
3
4 5
9
GND
04'06'10 CHANGE FOOTPRINT
8
7
6
8
7
6
8
7
6
H4 HOLE-AH4 HOLE-A
1
2
3
4 5
9
GND
H5 HOLE-AH5 HOLE-A
1
2
3
4 5
9
GND
H6 HOLE-AH6 HOLE-A
1
2
3
4 5
9
GND
8
7
6
8
7
6
8
7
6
Elitegroup Computer Systems
Elitegroup Computer Systems
Elitegroup Computer Systems
Title
Title
Title
CPU - GND, CPU_RST_L
CPU - GND, CPU_RST_L
CPU - GND, CPU_RST_L
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Q67/ Q65/ H67/ H61 H2-AD
Q67/ Q65/ H67/ H61 H2-AD
Q67/ Q65/ H67/ H61 H2-AD
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
844Wednesday, January 12, 2011
844Wednesday, January 12, 2011
844Wednesday, January 12, 2011
1
V1.0
V1.0
V1.0
5
M_DQS_A_P[0..7]
M_DQS_A_N[0..7]
Desktop dosen't support
D D
C C
ECC
M_ODT_A0
M_ODT_A1
195
79
ODT177ODT0
RSVD
FREE
FREE
FREE49FREE48VTT
198
187
VTT_DDR
Desktop dosen't support
ECC
M_ODT_A2
M_ODT_A3
195
79
68
167
53
NC/TEST4
NC/PAR IN
NC/ERR OUT
VTT
240
120
167
68
53
CB(0)39CB(1)40CB(2)45CB(3)46CB(4)
VSS
VSS
239
235
232
VSS
M_DQS_A_P0
M_DQS_A_P1
M_DQS_A_N0
158
159
164
165
7
6
16
CB(5)
CB(6)
CB(7)
DQS(0)
DSQ(1)
DQS*(0)
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
229
226
223
220
217
214
211
208
205
202
M_ODT_A[0..3]6
M_CS_A_L[0..3]6
M_CKE_A[0..3]6
M_CLK_A_P[0..3]6
M_CLK_A_N[0..3]6
M_DQS_A_P0
M_DQS_A_P1
M_DQS_A_N0
6
158
159
164
165
7
16
M_DQS_A_P2
M_DQS_A_N1
M_DQS_A_N2
15
25
24
DSQ(2)
DSQ*(1)
DSQ*(2)
VSS
VSS
VSS
VSS
199
166
163
160
M_DQS_A_N1
M_DQS_A_N2
M_DQS_A_P2
15
24
25
M_DQS_A_P[0..7] 6
M_DQS_A_N[0..7] 6
M_DQS_A_P3
M_DQS_A_P4
M_DQS_A_N3
M_DQS_A_N4
34
33
85
84
DSQ(3)
DQS(4)
DSQ*(3)
VSS
VSS
VSS
VSS
VSS
157
154
151
148
145
142
M_ODT_A[0..3]
M_CS_A_L[0..3]
M_CKE_A[0..3]
M_CLK_A_P[0..3]
M_CLK_A_N[0..3]
M_DQS_A_N3
M_DQS_A_N4
M_DQS_A_P3
M_DQS_A_P4
33
84
34
85
M_DQS_A_P5
M_DQS_A_N5
94
93
DQS(5)
DQS*(4)
VSS
VSS
VSS
139
136
133
M_DQS_A_N5
M_DQS_A_P5
93
94
DQS*(5)
VSS
130
4
The processor memory controller does not
have any DDR3 Data Mask (DM) signals
for either channel. As a result the DM[8:0]
pins of each DDR3 DIMM connector must
be tied directly to ground.
M_DQS_A_N7
M_DQS_A_P6
M_DQS_A_P7
M_DQS_A_N6
125
126
111
43
42
134
135
143
144
152
153
203
204
212
213
DQS(8)
DQS*(7)
DQS*(8)
NC/DQS9*
DM0/DQS9
NC/DQS10*
NC/DQS11*
NC/DQS12*
NC/DQS13*
DM1/DQS10
DM2/DQS11
DM3/DQS12
VSS
VSS
VSS
VSS
VSS
VSS
VSS98VSS95VSS92VSS89VSS86VSS83VSS80VSS47VSS44VSS41VSS38VSS35VSS32VSS29VSS26VSS23VSS20VSS17VSS14VSS11VSS8VSS5VSS2VDD
116
113
110
107
104
101
NC/DQS14*
DM4/DQS13
DM5/DQS14
VDIMM
VSS
103
102
112
DSQ(6)
DQS(7)
DSQ*(6)
VSS
VSS
VSS
VSS
127
124
121
119
CHANNEL A DIMMs
The processor memory controller does not
have any DDR3 Data Mask (DM) signals
for either channel. As a result the DM[8:0]
pins of each DDR3 DIMM connector must
be tied directly to ground.
M_DQS_A_P6
M_DQS_A_P7
M_DQS_A_N6
M_DQS_A_N7
102
111
103
42
112
43
125
126
134
135
143
144
152
153
203
204
212
213
3
M_DATA_A[0..63]
GND
M_DATA_A1
M_DATA_A2
M_DATA_A3
M_DATA_A4
M_DATA_A5
M_DATA_A0
221
222
230
231
161
162
122
123
DQ(0)3DQ(1)4DQ(2)9DQ(3)10DQ(4)
DQ(5)
NC/DQS15*
NC/DQS16*
DM6/DQS15
221
222
NC/DQS17*
DM7/DQS16
DM8/DQS17
VDD
VDD
VDD
VDD
VDD
186
183
189
VCC3
M_DATA_A0
M_DATA_A1
M_DATA_A2
VDD
182
179
176
M_DATA_A4
M_DATA_A5
M_DATA_A3
122
123
VDD
VDD
197
194
191
DIMM_VREF_CA_A11
DIMM_VREF_DQ_A11
SMBCLK_MAIN10,15,21,30,41
SMBDATA_MAIN10,15,21,30,41
GND
230
231
161
162
M_DATA_A[0..63] 6
M_DATA_A9
M_DATA_A10
M_DATA_A11
M_DATA_A12
M_DATA_A13
M_DATA_A14
M_DATA_A15
18
131
132
DQ(10)
DQ(11)19DQ(12)
DQ(13)
VDD
72
M_DATA_A10
M_DATA_A11
M_DATA_A12
M_DATA_A13
M_DATA_A14
18
131
132
M_DATA_A16
137
138
DQ(14)
DQ(15)
M_BS_A[0..2]
M_DATA_A15
M_DATA_A16
137
138
M_DATA_A6
M_DATA_A7
M_DATA_A8
128
129
12
13
DQ(6)
DQ(7)
DQ(8)
DQ(9)
VDD
VDD
VDD78VDD75VDD69VDD66VDD65VDD62VDD60VDD57VDDSPD
173
170
DIMM_VREF_CA_A
DIMM_VREF_DQ_A
SMBCLK_MAIN
SMBDATA_MAIN
M_BS_A[0..2]6
M_DATA_A6
M_DATA_A7
M_DATA_A8
M_DATA_A9
128
129
12
13
M_DATA_A23
M_DATA_A24
M_DATA_A25
M_DATA_A20
M_DATA_A21
M_DATA_A22
140
141
146
147
DQ(21)
DQ(22)
DQ(23)
SCL
118
L
M_DATA_A20
M_DATA_A21
M_DATA_A22
M_DATA_A23
M_DATA_A24
140
141
146
147
M_DATA_A26
DQ(24)30DQ(25)31DQ(26)36DQ(27)37DQ(28)
SDA
SA1
238
117
237
GNDGND
SA0SA1
LL
H
M_DATA_A25
M_DATA_A26
M_DATA_A17
M_DATA_A18
M_DATA_A19
DQ(16)21DQ(17)22DQ(18)27DQ(19)28DQ(20)
VDD54VDD51VREFCA67VREFDQ1BA2
236
CH.A
DIMM0
DIMM1
M_DATA_A17
M_DATA_A18
M_DATA_A19
M_DATA_A27
M_DATA_A28
M_DATA_A29
M_DATA_A30
149
150
155
DQ(29)
SA0
BA1
52
190
M_BS_A1
M_BS_A2
M_BS_A0
M_DATA_A27
M_DATA_A28
M_DATA_A29
M_DATA_A30
149
150
155
DQ(30)
BA071CKE1
M_DATA_A31
M_DATA_A32
M_DATA_A33
M_DATA_A34
M_DATA_A35
156
DQ(31)
DQ(32)81DQ(33)82DQ(34)87DQ(35)88DQ(36)
CKE050S1*76S0*
169
M_CKE_A1
M_CS_A_L1
M_CKE_A0
M_DATA_A32
M_DATA_A33
M_DATA_A34
M_DATA_A35
M_DATA_A31
156
2
M_DATA_A37
M_DATA_A38
M_DATA_A39
M_DATA_A40
M_DATA_A36
200
201
206
207
DQ(37)
DQ(38)
DQ(39)
CK1/NU*64CK1/NU63CK0*
193
M_CS_A_L0
M_DATA_A36
M_DATA_A37
M_DATA_A38
M_DATA_A39
M_DATA_A40
200
201
206
207
M_DATA_A41
M_DATA_A42
M_DATA_A43
M_DATA_A44
DQ(40)90DQ(41)91DQ(42)96DQ(43)97DQ(44)
CK0
185
184A0188A1181
M_MA_A1
M_MA_A0
M_DATA_A41
M_DATA_A42
M_DATA_A43
M_DATA_A44
M_DATA_A45
M_DATA_A46
M_DATA_A47
209
210
215
216
DQ(45)
DQ(46)
A261A3
180
M_MA_A3
M_MA_A2
M_MA_A4
M_DATA_A47
M_DATA_A45
M_DATA_A46
209
210
215
216
M_DATA_A51
M_DATA_A48
M_DATA_A49
M_DATA_A50
100
105
106
DQ(47)
DQ(48)99DQ(49)
DQ(50)
A459A558A6
A756A8
178
177A9175
M_MA_A5
M_MA_A8
M_MA_A7
M_MA_A6
M_DATA_A48
M_DATA_A49
M_DATA_A50
M_DATA_A51
100
105
106
M_DATA_A52
M_DATA_A53
M_DATA_A54
M_DATA_A55
218
219
224
225
DQ(51)
DQ(52)
DQ(53)
DQ(54)
DQ(55)
A10/AP70A1155A12
174
M_MA_A12
M_MA_A10
M_MA_A9
M_MA_A11
M_MA_A[0..15]
M_CLK_A_P0
M_CLK_A_N0
M_CLK_A_P1
M_CLK_A_N1
M_DATA_A52
M_DATA_A53
M_DATA_A54
M_DATA_A55
218
219
224
225
M_DATA_A56
M_DATA_A57
M_DATA_A58
M_DATA_A59
M_DATA_A60
108
109
114
115
DQ(56)
DQ(57)
DQ(58)
DQ(59)
A13
A14
A15
196
172
171
M_MA_A15
M_MA_A14
M_MA_A13
M_DATA_A60
M_DATA_A56
M_DATA_A57
M_DATA_A58
M_DATA_A59
108
109
114
115
M_DATA_A61
M_DATA_A62
M_DATA_A63
227
228
233
234
DQ(60)
DQ(61)
DQ(62)
DQ(63)
CAS*74RAS*
WE*
RESET*
73
192
168
DDR3_DRAMRST_L
M_MA_A[0..15] 6
M_DATA_A61
M_DATA_A62
M_DATA_A63
227
228
233
234
DIMM4DDR3-240P-BL DIMM4DDR3-240P-BL
M_WE_A_L
M_RAS_A_L
M_CAS_A_L
1
M_WE_A_L 6
M_RAS_A_L 6
M_CAS_A_L 6
DDR3_DRAMRST_L 6,10
CB(0)39CB(1)40CB(2)45CB(3)46CB(4)
CB(5)
CB(6)
VSS
CB(7)
DQS(0)
DSQ(1)
DSQ(2)
DSQ(3)
DQS(4)
DQS(5)
DSQ(6)
DQS(7)
VSS
DQS(8)
DSQ*(6)
DQS*(7)
DQS*(8)
NC/DQS9*
DM0/DQS9
NC/DQS10*
NC/DQS11*
NC/DQS12*
NC/DQS13*
NC/DQS14*
DM1/DQS10
DM2/DQS11
DM3/DQS12
DM4/DQS13
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS98VSS95VSS92VSS89VSS86VSS83VSS80VSS47VSS44VSS41VSS38VSS35VSS32VSS29VSS26VSS23VSS20VSS17VSS14VSS11VSS8VSS5VSS2VDD
124
121
119
116
113
110
107
104
101
1.5V
MAX 15A
S3 1.0A
VDIMM
10'06'30
BC113
BC113
.1U-04-O
.1U-04-O
2 1
GND
2 1
C284
C284
22U-08
22U-08
2 1
C283
C283
22U-08
22U-08
DM5/DQS14
VDIMM
2 1
DM6/DQS15
C285
C285
22U-08
22U-08
NC/DQS15*
DQS*(0)
DSQ*(1)
DSQ*(2)
DSQ*(3)
DQS*(4)
DQS*(5)
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
232
229
226
223
220
217
214
211
208
205
202
199
166
163
160
157
154
151
148
145
142
139
136
133
130
127
VTT_DDR
C286
C286
4.7U-25VX5-08
4.7U-25VX5-08
2 1
GND
2 1
BC46
BC46
.1U-04
.1U-04
2 1
BC45
BC45
.1U-04
.1U-04
2 1
BC47
BC47
.1U-04
.1U-04
For CHAD1 For CHAD2 PLACE BETWEEN CHA &CHB.
4
DQ(0)3DQ(1)4DQ(2)9DQ(3)10DQ(4)
DQ(5)
DQ(6)
DQ(7)
DQ(8)
DQ(9)
DQ(10)
DQ(11)19DQ(12)
DQ(13)
DQ(14)
DQ(15)
DQ(16)21DQ(17)22DQ(18)27DQ(19)28DQ(20)
DQ(21)
DQ(22)
DQ(23)
DQ(24)30DQ(25)31DQ(26)36DQ(27)37DQ(28)
DQ(29)
DQ(30)
DQ(31)
DQ(32)81DQ(33)82DQ(34)87DQ(35)88DQ(36)
DQ(37)
DQ(38)
DQ(39)
DQ(40)90DQ(41)91DQ(42)96DQ(43)97DQ(44)
DQ(45)
DQ(46)
DQ(47)
DQ(48)99DQ(49)
DQ(50)
DQ(51)
DQ(52)
DQ(53)
DQ(54)
DQ(55)
DQ(56)
DQ(57)
DQ(58)
DQ(59)
DQ(60)
DQ(61)
DQ(62)
DQ(63)
NC/DQS16*
NC/DQS17*
DM7/DQS16
DM8/DQS17
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
186
183
197
194
191
189
VCC3
VDD78VDD75VDD69VDD66VDD65VDD62VDD60VDD57VDDSPD
VDD
179
176
173
170
DIMM_VREF_CA_A
DIMM_VREF_DQ_A
SMBCLK_MAIN
SMBDATA_MAIN
72
182
SCL
SDA
SA0
VDD54VDD51VREFCA67VREFDQ1BA2
236
SA1
52
118
238
117
237
GND
M_BS_A2
BA1
BA071CKE1
190
M_BS_A1
M_BS_A0
CKE050S1*76S0*
169
M_CKE_A3
M_CS_A_L3
M_CKE_A2
CK1/NU*64CK1/NU63CK0*
193
M_CS_A_L2
CK0
185
184A0188A1181
M_MA_A1
M_MA_A2
M_MA_A0
A261A3
A459A558A6
180
M_MA_A3
M_MA_A4
178
M_MA_A5
M_MA_A7
M_MA_A6
A756A8
A10/AP70A1155A12
177A9175
M_MA_A8
M_MA_A10
M_MA_A9
M_MA_A11
M_CLK_A_P2
M_CLK_A_N2
M_CLK_A_P3
M_CLK_A_N3
A13
A14
174
196
172
M_MA_A12
M_MA_A15
M_MA_A14
M_MA_A13
A15
RESET*
171
168
H61(consumer/commercial)
VTT_DDR VCC3
C287
C287
4.7U-25VX5-08-O
4.7U-25VX5-08-O
2 1
GND
BC36
BC36
.1U-04-O
.1U-04-O
2 1
BC50
BC50
.1U-04-O
.1U-04-O
2 1
2 1
GND
DO NOT PUNCH VIA.
BC55
BC55
.1U-04-O
.1U-04-O
Elitegroup Computer Systems
Elitegroup Computer Systems
Elitegroup Computer Systems
Title
Title
Title
DDR3 - CHA DIMM0/1
DDR3 - CHA DIMM0/1
DDR3 - CHA DIMM0/1
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Q67/ Q65/ H67/ H61 H2-AD
Q67/ Q65/ H67/ H61 H2-AD
Q67/ Q65/ H67/ H61 H2-AD
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
2 1
C282
C282
22U-08
22U-08
2 1
3
C288
C288
22U-08
22U-08
DIMM2DDR3-240P-GR DIMM2DDR3-240P-GR
CAS*74RAS*
WE*
73
192
M_WE_A_L
M_RAS_A_L
M_CAS_A_L
DDR3_DRAMRST_L
不上件
1
V1.0
V1.0
944Wednesday, January 12, 2011
944Wednesday, January 12, 2011
944Wednesday, January 12, 2011
V1.0
ODT177ODT0
RSVD
B B
A A
VTT_DDR
0.75V
MAX 1A
FREE
198
VDIMM
FREE
187
2 1
GND
NC/PAR IN
NC/ERR OUT
FREE49FREE48VTT
240
BC44
BC44
.1U-04
.1U-04
NC/TEST4
VTT
239
120
GND
2 1
5
VSS
235
BC48
BC48
.1U-04
.1U-04
5
M_DQS_B_P[0..7]
M_DQS_B_N[0..7]
Desktop dosen't support
D D
C C
ECC
M_ODT_B0
M_ODT_B1
195
79
ODT177ODT0
RSVD
FREE
FREE
FREE49FREE48VTT
198
187
VTT_DDR
Desktop dosen't support
ECC
M_ODT_B2
M_ODT_B3
195
79
68
167
53
NC/TEST4
NC/PAR IN
NC/ERR OUT
VTT
240
120
167
68
53
CB(0)39CB(1)40CB(2)45CB(3)46CB(4)
VSS
VSS
239
235
232
VSS
M_DQS_B_P0
M_DQS_B_P1
M_DQS_B_N0
158
159
164
165
7
6
16
CB(5)
CB(6)
CB(7)
DQS(0)
DSQ(1)
DQS*(0)
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
229
226
223
220
217
214
211
208
205
202
M_ODT_B[0..3]6
M_CS_B_L[0..3]6
M_CKE_B[0..3]6
M_CLK_B_P[0..3]6
M_CLK_B_N[0..3]6
M_DQS_B_P0
M_DQS_B_P1
M_DQS_B_N0
6
158
159
164
165
7
16
M_DQS_B_N1
M_DQS_B_N2
M_DQS_B_P2
15
25
24
DSQ(2)
DSQ*(1)
DSQ*(2)
VSS
VSS
VSS
VSS
199
166
163
160
M_DQS_B_N1
M_DQS_B_N2
M_DQS_B_P2
15
24
25
M_DQS_B_P[0..7] 6
M_DQS_B_N[0..7] 6
M_DQS_B_N3
M_DQS_B_N4
M_DQS_B_P3
M_DQS_B_P4
34
33
85
84
DSQ(3)
DQS(4)
DSQ*(3)
VSS
VSS
VSS
VSS
VSS
157
154
151
148
145
142
M_ODT_B[0..3]
M_CS_B_L[0..3]
M_CKE_B[0..3]
M_CLK_B_P[0..3]
M_CLK_B_N[0..3]
M_DQS_B_N3
M_DQS_B_N4
M_DQS_B_P3
M_DQS_B_P4
33
84
34
85
M_DQS_B_N5
M_DQS_B_P5
94
93
DQS(5)
DQS*(4)
VSS
VSS
VSS
139
136
133
M_DQS_B_N5
M_DQS_B_P5
93
94
DQS*(5)
VSS
130
4
The processor memory controller does not
have any DDR3 Data Mask (DM) signals
for either channel. As a result the DM[8:0]
pins of each DDR3 DIMM connector must
be tied directly to ground.
M_DQS_B_P6
M_DQS_B_P7
M_DQS_B_N6
M_DQS_B_N7
125
126
111
43
42
134
135
143
144
152
153
203
204
212
213
DQS(8)
DQS*(7)
DQS*(8)
NC/DQS9*
DM0/DQS9
NC/DQS10*
NC/DQS11*
NC/DQS12*
NC/DQS13*
DM1/DQS10
DM2/DQS11
DM3/DQS12
VSS
VSS
VSS
VSS
VSS
VSS
VSS98VSS95VSS92VSS89VSS86VSS83VSS80VSS47VSS44VSS41VSS38VSS35VSS32VSS29VSS26VSS23VSS20VSS17VSS14VSS11VSS8VSS5VSS2VDD
116
113
110
107
104
101
NC/DQS14*
DM4/DQS13
DM5/DQS14
VDIMM
VSS
103
102
112
DSQ(6)
DQS(7)
DSQ*(6)
VSS
VSS
VSS
VSS
127
124
121
119
CHANNEL B DIMMs
The processor memory controller does not
have any DDR3 Data Mask (DM) signals
for either channel. As a result the DM[8:0]
pins of each DDR3 DIMM connector must
be tied directly to ground.
M_DQS_B_P6
M_DQS_B_P7
M_DQS_B_N6
M_DQS_B_N7
102
111
103
42
112
43
125
126
134
135
143
144
152
153
203
204
212
213
3
M_DATA_B[0..63]
GND
M_DATA_B0
M_DATA_B1
M_DATA_B2
M_DATA_B3
M_DATA_B4
M_DATA_B5
221
222
230
231
161
162
122
123
DQ(0)3DQ(1)4DQ(2)9DQ(3)10DQ(4)
DQ(5)
NC/DQS15*
NC/DQS16*
DM6/DQS15
221
222
NC/DQS17*
DM7/DQS16
DM8/DQS17
VDD
VDD
VDD
VDD
VDD
186
183
189
VCC3
M_DATA_B0
M_DATA_B1
M_DATA_B2
VDD
182
179
176
M_DATA_B3
M_DATA_B4
M_DATA_B5
122
123
VDD
VDD
197
194
191
DIMM_VREF_CA_B11
DIMM_VREF_DQ_B11
SMBCLK_MAIN9,15,21,30,41
SMBDATA_MAIN9,15,21,30,41
GND
230
231
161
162
M_DATA_B[0..63] 6
M_DATA_B6
M_DATA_B7
M_DATA_B8
M_DATA_B9
M_DATA_B10
M_DATA_B11
M_DATA_B12
M_DATA_B13
M_DATA_B14
M_DATA_B15
M_DATA_B16
128
129
12
18
13
131
132
137
138
DQ(6)
DQ(7)
DQ(8)
DQ(9)
DQ(10)
DQ(11)19DQ(12)
DQ(13)
DQ(14)
DQ(15)
VDD
VDD
VDD78VDD75VDD69VDD66VDD65VDD62VDD60VDD57VDDSPD
VDD
72
173
170
DIMM_VREF_CA_B
DIMM_VREF_DQ_B
SMBCLK_MAIN
SMBDATA_MAIN
M_BS_B[0..2]6
M_DATA_B6
M_DATA_B7
M_DATA_B8
M_DATA_B9
M_DATA_B10
128
129
12
18
13
M_DATA_B11
M_DATA_B12
M_DATA_B13
M_DATA_B14
M_DATA_B15
131
132
137
M_BS_B[0..2]
M_DATA_B16
138
M_DATA_B17
M_DATA_B18
M_DATA_B19
M_DATA_B20
M_DATA_B21
M_DATA_B22
M_DATA_B23
M_DATA_B24
M_DATA_B25
M_DATA_B26
140
141
146
147
DQ(16)21DQ(17)22DQ(18)27DQ(19)28DQ(20)
DQ(21)
DQ(22)
DQ(23)
DQ(24)30DQ(25)31DQ(26)36DQ(27)37DQ(28)
SCL
SDA
118
SA1 SA0
HL
H
M_DATA_B20
M_DATA_B21
M_DATA_B22
M_DATA_B23
M_DATA_B24
140
141
146
147
SA1
238
117
237
GNDGND
H
M_DATA_B25
M_DATA_B26
VDD54VDD51VREFCA67VREFDQ1BA2
236
CH.B
DIMM0
DIMM1
M_DATA_B17
M_DATA_B18
M_DATA_B19
M_DATA_B27
M_DATA_B28
M_DATA_B29
M_DATA_B30
149
150
155
DQ(29)
SA0
BA1
52
190
M_BS_B2
M_BS_B1
M_BS_B0
M_DATA_B27
M_DATA_B28
M_DATA_B29
M_DATA_B30
149
150
155
DQ(30)
BA071CKE1
M_DATA_B31
M_DATA_B32
M_DATA_B33
M_DATA_B34
M_DATA_B35
156
DQ(31)
DQ(32)81DQ(33)82DQ(34)87DQ(35)88DQ(36)
CKE050S1*76S0*
169
M_CKE_B1
M_CS_B_L1
M_CKE_B0
M_DATA_B31
M_DATA_B32
M_DATA_B33
M_DATA_B34
M_DATA_B35
156
2
M_DATA_B36
M_DATA_B37
M_DATA_B38
M_DATA_B39
M_DATA_B40
200
201
206
207
DQ(37)
DQ(38)
DQ(39)
CK1/NU*64CK1/NU63CK0*
193
M_CS_B_L0
M_DATA_B36
M_DATA_B37
M_DATA_B38
M_DATA_B39
M_DATA_B40
200
201
206
207
M_DATA_B41
M_DATA_B42
M_DATA_B43
M_DATA_B44
DQ(40)90DQ(41)91DQ(42)96DQ(43)97DQ(44)
CK0
185
184A0188A1181
M_MA_B0
M_MA_B1
M_DATA_B41
M_DATA_B42
M_DATA_B43
M_DATA_B44
M_DATA_B45
M_DATA_B46
M_DATA_B47
209
210
215
216
DQ(45)
DQ(46)
A261A3
180
M_MA_B2
M_MA_B3
M_MA_B4
M_DATA_B45
M_DATA_B46
M_DATA_B47
209
210
215
216
M_DATA_B48
M_DATA_B49
M_DATA_B50
M_DATA_B51
100
105
106
DQ(47)
DQ(48)99DQ(49)
DQ(50)
A459A558A6
A756A8
178
177A9175
M_MA_B5
M_MA_B8
M_MA_B6
M_MA_B7
M_DATA_B48
M_DATA_B49
M_DATA_B50
M_DATA_B51
100
105
106
M_DATA_B52
M_DATA_B53
M_DATA_B54
M_DATA_B55
218
219
224
225
DQ(51)
DQ(52)
DQ(53)
DQ(54)
DQ(55)
A10/AP70A1155A12
174
M_MA_B11
M_MA_B9
M_MA_B10
M_MA_B12
M_MA_B[0..15]
M_CLK_B_P0
M_CLK_B_N0
M_CLK_B_P1
M_CLK_B_N1
M_DATA_B52
M_DATA_B53
M_DATA_B54
M_DATA_B55
218
219
224
225
M_DATA_B56
M_DATA_B57
M_DATA_B58
M_DATA_B59
M_DATA_B60
108
109
114
115
DQ(56)
DQ(57)
DQ(58)
DQ(59)
A13
A14
A15
196
172
171
M_MA_B15
M_MA_B13
M_MA_B14
M_DATA_B56
M_DATA_B57
M_DATA_B58
M_DATA_B59
M_DATA_B60
108
109
114
115
M_DATA_B61
M_DATA_B62
M_DATA_B63
227
228
233
234
DQ(60)
DQ(61)
DQ(62)
DQ(63)
CAS*74RAS*
WE*
RESET*
73
192
168
DDR3_DRAMRST_L
M_MA_B[0..15] 6
M_DATA_B61
M_DATA_B62
M_DATA_B63
227
228
233
234
DIMM3DDR3-240P-BL DIMM3DDR3-240P-BL
M_WE_B_L
M_RAS_B_L
M_CAS_B_L
1
M_WE_B_L 6
M_RAS_B_L 6
M_CAS_B_L 6
DDR3_DRAMRST_L 6,9
CB(0)39CB(1)40CB(2)45CB(3)46CB(4)
CB(5)
CB(6)
VSS
CB(7)
DQS(0)
DSQ(1)
DSQ(2)
DQS*(0)
DSQ*(1)
DSQ*(2)
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
232
229
226
223
220
217
214
211
208
205
202
199
166
163
160
157
154
H61(consumer/commercial)
BC93
BC93
BC90
BC90
.1U-04-O
.1U-04-O
.1U-04-O
.1U-04-O
2 1
2 1
BC70
BC70
.1U-04
.1U-04
2 1
BC67
BC67
.1U-04
.1U-04
2 1
BC86
BC86
.1U-04
.1U-04
DSQ(3)
VSS
151
DSQ*(3)
VSS
148
DQS(4)
VSS
VSS
145
142
BC95
BC95
1U-6V3X-04
1U-6V3X-04
2 1
VDIMM
DQS(5)
DSQ(6)
DQS(7)
VSS
DQS(8)
DSQ*(6)
DQS*(7)
DQS*(8)
NC/DQS9*
DM0/DQS9
NC/DQS10*
DM1/DQS10
DM2/DQS11
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS98VSS95VSS92VSS89VSS86VSS83VSS80VSS47VSS44VSS41VSS38VSS35VSS32VSS29VSS26VSS23VSS20VSS17VSS14VSS11VSS8VSS5VSS2VDD
124
121
119
116
113
110
107
104
101
DQS*(4)
VSS
DQS*(5)
VSS
VSS
VSS
VSS
139
136
133
130
127
不上件
VDIMM
BC74
BC74
BC66
BC66
BC72
.1U-04
.1U-04
2 1
BC91
BC91
.1U-04
.1U-04
2 1
BC72
.1U-04
.1U-04
.1U-04
.1U-04
2 1
2 1
GND GND
BC94
BC94
.1U-04
.1U-04
2 1
4
DQ(0)3DQ(1)4DQ(2)9DQ(3)10DQ(4)
DQ(5)
DQ(6)
DQ(7)
DQ(8)
DQ(9)
DQ(10)
DQ(11)19DQ(12)
DQ(13)
DQ(14)
DQ(15)
DQ(16)21DQ(17)22DQ(18)27DQ(19)28DQ(20)
DQ(21)
DQ(22)
DQ(23)
DQ(24)30DQ(25)31DQ(26)36DQ(27)37DQ(28)
DQ(29)
DQ(30)
DQ(31)
DQ(32)81DQ(33)82DQ(34)87DQ(35)88DQ(36)
DQ(37)
DQ(38)
DQ(39)
DQ(40)90DQ(41)91DQ(42)96DQ(43)97DQ(44)
DQ(45)
DQ(46)
DQ(47)
DQ(48)99DQ(49)
DQ(50)
DQ(51)
DQ(52)
DQ(53)
DQ(54)
DQ(55)
DQ(56)
DQ(57)
DQ(58)
DQ(59)
DQ(60)
DQ(61)
DQ(62)
DQ(63)
NC/DQS11*
NC/DQS12*
NC/DQS13*
NC/DQS14*
NC/DQS15*
NC/DQS16*
DM3/DQS12
2 1
DM4/DQS13
1.5V
MAX 15A
S3 1.0A
BC81
BC81
1U-6V3X-04
1U-6V3X-04
VDIMM
GND
DM5/DQS14
VDIMM
2 1
VDIMM
2 1
BC65
BC65
.1U-04
.1U-04
DM6/DQS15
BC83
BC83
1U-6V3X-04
1U-6V3X-04
NC/DQS17*
DM7/DQS16
DM8/DQS17
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
186
183
197
194
191
189
STICHING CAPS FOR CMD, ADDR, CTL.
BETWEEN CHBD1 & CHBD2
BC64
BC64
.1U-04
.1U-04
2 1
2 1
STICHING CAPS FOR CMD, ADDR, CTL.
BELOW CHBD3.
VDD78VDD75VDD69VDD66VDD65VDD62VDD60VDD57VDDSPD
182
179
176
173
170
DIMM_VREF_CA_B
DIMM_VREF_DQ_B
SMBCLK_MAIN
SMBDATA_MAIN
2 1
BC63
BC63
.1U-04
.1U-04
3
VDD
72
BC89
BC89
.1U-04-O
.1U-04-O
SCL
VDD54VDD51VREFCA67VREFDQ1BA2
236
118
BC85
BC85
.1U-04
.1U-04
2 1
BC92
BC92
.1U-04
.1U-04
2 1
SDA
SA0
SA1
BA1
BA071CKE1
CKE050S1*76S0*
CK1/NU*64CK1/NU63CK0*
CK0
A261A3
52
238
117
237
190
169
193
185
184A0188A1181
180
M_CKE_B2
M_CS_B_L3
M_CS_B_L2
M_CKE_B3
M_BS_B2
M_BS_B1
M_BS_B0
BC79
BC79
.1U-04-O
.1U-04-O
2 1
GND GND
2
M_MA_B2
M_MA_B0
M_MA_B1
BC60
BC60
.1U-04
.1U-04
2 1
M_MA_B4
M_MA_B3
A459A558A6
A756A8
A10/AP70A1155A12
A13
A14
A15
RESET*
178
177A9175
174
196
172
171
168
M_MA_B5
M_MA_B11
M_MA_B8
M_MA_B7
M_MA_B6
M_MA_B10
M_MA_B9
M_MA_B14
M_MA_B13
M_MA_B15
M_MA_B12
M_CLK_B_P2
M_CLK_B_N2
M_CLK_B_P3
M_CLK_B_N3
VTT_DDRVDIMM
C301
BC68
BC68
.1U-04-O
.1U-04-O
2 1
C301
4.7U-25VX5-08
4.7U-25VX5-08
2 1
Elitegroup Computer Systems
Elitegroup Computer Systems
Elitegroup Computer Systems
Title
Title
Title
DDR3 - CHB DIMM0/1
DDR3 - CHB DIMM0/1
DDR3 - CHB DIMM0/1
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Q67/ Q65/ H67/ H61 H2-AD
Q67/ Q65/ H67/ H61 H2-AD
Q67/ Q65/ H67/ H61 H2-AD
Date: Sheet of
Date: Sheet of
Date: Sheet of
DIMM1DDR3-240P-GR DIMM1DDR3-240P-GR
CAS*74RAS*
WE*
73
192
M_WE_B_L
M_RAS_B_L
M_CAS_B_L
DDR3_DRAMRST_L
BC87
BC87
.1U-04
.1U-04
2 1
VTT_DDR
GND
1
05'20
10 44Wednesday, January 12, 2011
10 44Wednesday, January 12, 2011
10 44Wednesday, January 12, 2011
BC51
BC51
.1U-04
.1U-04
2 1
For CHBD2For CHBD1
V1.0
V1.0
V1.0
ODT177ODT0
RSVD
B B
0.75V
MAX 1A
A A
FREE
198
VTT_DDR VCC3
VDIMM
NC/TEST4
NC/PAR IN
NC/ERR OUT
FREE49FREE48VTT
240
BC62
BC62
1U-6V3X-04
1U-6V3X-04
2 1
GND
BC61
BC61
.1U-04
.1U-04
VSS
VTT
239
235
120
GND
2 1
5
FREE
187
VDIMM
2 1
GND GND
5
4
3
2
1
R284
R284
0-04-O
0-04-O
R310
R310
0-04-O
0-04-O
Pa
VDIMM
R299
R299
BC32
BC32
1K-1-04
1K-1-04
1U-04-O
1U-04-O
2 1
1 2
GND
R309
R309
BC38
BC38
1K-1-04
1K-1-04
.1U-X7-04
.1U-X7-04
2 1
1 2
GNDGND
Layout Note:
All parts close to DDR3 Slots.
intel reviewed 7/28
R301
R301
1 2
0-04
0-04
Pb
VDIMM
R342
R342
BC43
BC43
1K-1-04
1K-1-04
1U-04-O
1U-04-O
2 1
1 2
GND
R343
R343
BC58
BC58
1K-1-04
1K-1-04
.1U-X7-04
.1U-X7-04
2 1
1 2
GND GND GND GND
intel reviewed 7/28
R356
R356
1 2
0-04
0-04
PDG 1.0 P.71,72
BC37
BC37
.1U-X7-04
.1U-X7-04
2 1
PDG 1.0 P.71,72
BC56
BC56
.1U-X7-04
.1U-X7-04
2 1
Qa
R300
R300
1 2
0-04
0-04
DIMM_VREF_DQ_A
BC39
BC39
.1U-X7-04
.1U-X7-04
2 1
GNDGND
Qb
R341
R341
1 2
0-04
0-04
BC57
BC57
.1U-X7-04
.1U-X7-04
2 1
DIMM_DQ_CPU_VREF_A 4
BC33
BC33
10U-08-X5R
10U-08-X5R
2 1
GND
BC52
BC52
10U-08-X5R
10U-08-X5R
2 1
GND
SMBCLK_STBY
SMBDATA_STBY
DIMM_VREF_DQ_A 9
DIMM_VREF_DQ Control Mode:
Control
Mode
Part
Mz
Nz
Pz
Qz
z = a, b.
DIMM_DQ_CPU_VREF_B 4
DIMM_VREF_DQ_B 10
SMBCLK_STBY 5,14,20,21
SMBDATA_STBY 5,14,20,21
CPU
Divider
X
X
X
V
Default
X
X
V
X
PCH +
Controller
V
V
X
X
Ma
Address:??ch
U27
BC26
D D
BC26
.1U-X7-04-O
.1U-X7-04-O
2 1
GND
SMBCLK_STBY SMBDATA_STBY
1
2
3
U27
VDD
GND
SCL
AD5247-O
AD5247-O
A
W
SDA
6
DIMM_VREF_DQ_A1
5
4
Programmable VREFDQ CIRCUIT
12
12
GND
ER1
ER1
12.1K-1-04-O
12.1K-1-04-O
ER2
ER2
12.1K-1-04-O
12.1K-1-04-O
5VDAUL_MEMVDIMM3VSB
BC28
BC28
.1U-X7-04-O
.1U-X7-04-O
2 1
GND GND
84
3
+
+
2
-
-
U28A
U28A
LM358DS-O
LM358DS-O
GND
C291
C291
1U-25V-08-O
1U-25V-08-O
2 1
1
GND
R292
R292
12.1K-1-04-O
12.1K-1-04-O
1 2
R291
R291
1 2
2.2-04-O
2.2-04-O
GND
2 1
MA_NADIMM_VREF_DQ_A2
BC27
BC27
1U-04-O
1U-04-O
Na
1 2
Mb
2 1
GND
BC31
BC31
.1U-X7-04-O
.1U-X7-04-O
5VDAUL_MEMVDIMM3VSB
2 1
BC40
BC40
1U-04-O
1U-04-O
Nb
1 2
84
5
+
+
6
-
-
GND
DIMM_VREF_DQ_B2 MB_NB DIMM_VREF_DQ_B
7
U28B
U28B
LM358DS-O
LM358DS-O
R312
R312
12.1K-1-04-O
12.1K-1-04-O
1 2
GND
R311
R311
1 2
2.2-04-O
2.2-04-O
GND
Address:??ch
C C
BC30
BC30
.1U-X7-04-O
.1U-X7-04-O
2 1
GND
SMBCLK_STBY SMBDATA_STBY
1
2
3
U29
U29
VDD
GND
SCL
AD5247-O
AD5247-O
A
W
SDA
6
DIMM_VREF_DQ_B1
5
4
Programmable VREFDQ CIRCUIT
12
12
GND
ER3
ER3
12.1K-1-04-O
12.1K-1-04-O
ER4
ER4
12.1K-1-04-O
12.1K-1-04-O
DIMM_VREF_DQ Control Circuit
B B
.1U-X7-04
.1U-X7-04
VDIMM VDIMM
12
ER7
BC53
BC53
ER7
1K-1-04
1K-1-04
2 1
GND
12
GND GND GND GND
R338
R338
CAAREF
1 2
0.75V 0.75V
0-04
0-04
ER8
ER8
1K-1-04
1K-1-04
DIMM_VREF_CA_A DIMM_VREF_CA_B
BC49
BC49
.1U-X7-04
.1U-X7-04
2 1
GND GND
DIMM_VREF_CA_A 9 DIMM_VREF_CA_B 10
BC54
BC54
10U-08-X5R
10U-08-X5R
2 1
BC77
BC77
.1U-X7-04
.1U-X7-04
GND
12
2 1
12
ER9
ER9
1K-1-04
1K-1-04
CABREF
ER10
ER10
1K-1-04
1K-1-04
R357
R357
1 2
0-04
0-04
BC78
BC78
.1U-X7-04
.1U-X7-04
2 1
BC69
BC69
10U-08-X5R
10U-08-X5R
2 1
DIMM_VREF_CA Circuit
R345
R340
R340
DIMM_DQ_CPU_VREF_B4
A A
DIMM_VREF_DQ_B10
If you choose DIMM_VREF_DQ_B to
be source, you must stuff Mb & Nb
to be DIMM_VREF_DQ's source.
5
DIMM_VREF_DQ_B DIMM_VREF_CA_B
1 2
0-04-O
0-04-O
R344
R344
1 2
0-04-O
0-04-O
4
CAA_CAB_REF
R345
1 2
0-04-O
0-04-O
R346
R346
1 2
0-04-O
0-04-O
DIMM_VREF_CA_ADIMM_DQ_CPU_VREF_B
BC59
BC59
.1U-X7-04
.1U-X7-04
2 1
GND
DIMM_VREF_CA_A 9
DIMM_VREF_CA_B 10
3
Elitegroup Computer Systems
Elitegroup Computer Systems
Elitegroup Computer Systems
Title
Title
Title
DDR3 - VREF
DDR3 - VREF
DDR3 - VREF
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
Q67/ Q65/ H67/ H61 H2-AD
Q67/ Q65/ H67/ H61 H2-AD
Q67/ Q65/ H67/ H61 H2-AD
11 44Wednesday, January 12, 2011
11 44Wednesday, January 12, 2011
11 44Wednesday, January 12, 2011
1
V1.0
V1.0
V1.0
5
BH8
PCI_33M_FB15
10P-04-X-OSC105 10P-04-X-OSC105
GND
2 1
GPIO713
GPIO6813
GPIO613,28
GPIO7
GPIO68
GPIO6
TRDY_L
REQ0_L
REQ1_L
SERR_L
FRAME_L
STOP_L
PLOCK_L
REQ3_L
DEVSEL_L
REQ2_L
PERR_L
IRDY_L
5
D D
C C
B B
A A
PCI_33M_FB
PCI_33M_FB
STP36STP36
STP43STP43
INTA_L13
INTB_L13
INTC_L13
Layout SWAP needed
RN19 8.2K-8P4RRN19 8.2K-8P4R
R447 8.2K-04R447 8.2K-04
R538 8.2K-04R538 8.2K-04
DEVSEL_L
IRDY_L
SERR_L
STOP_L
PLOCK_L
TRDY_L
PERR_L
FRAME_L
GNT0_L
1
GNT1_L
GNT2_L
1
GNT3_L
REQ0_L
REQ1_L
REQ2_L
REQ3_L
INTA_L
INTB_L
INTC_L
INTD_L
Intel WW32 modify 0904'10
VCC3
1 2
3 4
5 6
7 8
1 2
Intel WW32 modify 0904'10
1 2
PAR
BH9
DEVSEL#
BD15
CLKIN_PCILOOPBACK
AV14
PCIRST#
BF11
IRDY#
AV15
PME#
BR6
SERR#
BC12
STOP#
BA17
PLOCK#
BC8
TRDY#
BM3
PERR#
BC11
FRAME#
BA15
GNT0#
AV8
GNT1#_GPIO51
BU12
GNT2#_GPIO53
BE2
GNT3#_GPIO55
BG5
REQ0#
BT5
REQ1#_GPIO50
BK8
REQ2#_GPIO52
AV11
REQ3#_GPIO54
BK10
PIRQA#
BJ5
PIRQB#
BM15
PIRQC#
BP5
PIRQD#
BN9
PIRQE#_GPIO2
AV9
PIRQF#_GPIO3
BT15
PIRQG#_GPIO4
BR4
PIRQH#_GPIO5
U1CPT
U1CPT
PCH1A
PCH1A
4
BF15
AD0
BF17
AD1
BT7
AD2
BT13
AD3
BG12
AD4
BN11
AD5
BJ12
AD6
BU9
AD7
BR12
AD8
BJ3
AD9
BR9
AD10
BJ10
AD11
BM8
AD12
BF3
AD13
BN2
AD14
BE4
AD15
BE6
AD16
BG15
AD17
BC6
AD18
BT11
AD19
BA14
AD20
BL2
AD21
BC4
AD22
BL4
AD23
BC2
AD24
BM13
AD25
BA9
AD26
BF9
AD27
BA8
AD28
BF8
AD29
AV17
AD30
BK12
AD31
BN4
C_BE0#
BP7
C_BE1#
BG2
C_BE2#
BP13
C_BE3#
1 OF 12
1 OF 12
10'04'01
R458
R458
1 2
4.7K-04-O
4.7K-04-O
GNT3_L:
Top-Block Swap Override Mode,
GND
GPIO1913
When Sampled Low.
GPIO19
R423 10K-04-OR423 10K-04-O
GNT1_L
SR83 4.7K-04-X-OSR83 4.7K-04-X-O
10'04'01
1 2
1 2
Boot Device Select:
BOOT DEVICE
LPC
PCI
SPI
*
GNT[0..3]#
GPIO19
have been internal pull high to +VCC3
GNT1#, GPIO19 Follow CPT EDS V0.7,
CRB V0.7, PDG V0.8
4
GNT3_LINTD_L
VCC3
Reserve for Driving.
GPIO19GNT1_L
0
0
1
0
1
1
PCH_1P05V
FROM CLK GEN
USB3.0
10'06'17
USB3.0
PCI-E X1
Giga Lan
3
DMI_TX_N04
DMI_TX_P04
DMI_RX_N04
DMI_RX_P04
DMI_TX_N14
DMI_TX_P14
DMI_RX_N14
DMI_RX_P14
DMI_TX_N24
DMI_TX_P24
DMI_RX_N24
DMI_RX_P24
DMI_TX_N34
DMI_TX_P34
DMI_RX_N34
DMI_RX_P34
R370 49.9-1-04R370 49.9-1-04
1 2
Close to PCH
CKG_DMI_N15
CKG_DMI_P15
USB3_RX_N033
USB3_RX_P033
USB3_TX_N033
USB3_TX_P033
USB3_RX_N133
USB3_RX_P133
USB3_TX_N133
USB3_TX_P133
PEX1A_RX_N420
PEX1A_RX_P420
PEX1A_TX_N420
PEX1A_TX_P420
LAN_RX_N622
LAN_RX_P622
LAN_TX_N622
LAN_TX_P622
GPIO9
GPIO42
GPIO40
GPIO41
GPIO10
GPIO14
LAN_LED_D
GPIO43
3
DMI_TX_N0
DMI_TX_P0
DMI_RX_N0
DMI_RX_P0
DMI_TX_N1
DMI_TX_P1
DMI_RX_N1
DMI_RX_P1
DMI_TX_N2
DMI_TX_P2
DMI_RX_N2
DMI_RX_P2
DMI_TX_N3
DMI_TX_P3
DMI_RX_N3
DMI_RX_P3
DMI_COMP
CKG_DMI_N
CKG_DMI_P
USB3_RX_N0
USB3_RX_P0
USB3_TX_N0
USB3_TX_P0
USB3_RX_N1
USB3_RX_P1
USB3_TX_N1
USB3_TX_P1
PEX1A_RX_N4
PEX1A_RX_P4
PEX1A_TX_N4
PEX1A_TX_P4
LAN_RX_N6
LAN_RX_P6
LAN_TX_N6
LAN_TX_P6
SR94 10K-04-XSR94 10K-04-X
1 2
SR92 10K-04-XSR92 10K-04-X
1 2
SR91 10K-04-XSR91 10K-04-X
1 2
SR80 10K-04-XSR80 10K-04-X
1 2
RN18 10K-8P4R-04RN18 10K-8P4R-04
1 2
3 4
5 6
7 8
Layout SWAP needed
3VSB
21
.1U-04-OC454 .1U-04-OC454
VCC3
D33
B33
H36
A36
B35
P38
R38
B37
C36
H38
E37
F38
M41
P41
B31
E31
P33
R33
L20
F25
F23
P20
R20
C22
A22
H17
E21
B21
P17
M17
F18
E17
N15
M15
B17
C16
L15
A16
B15
H12
F15
F13
H10
B13
D13
J36
J38
J20
J17
J15
J12
J10
3VSB
PCH1B
PCH1B
DMI0RXN
DMI0RXP
DMI0TXN
DMI0TXP
DMI1RXN
DMI1RXP
DMI1TXN
DMI1TXP
DMI2RXN
DMI2RXP
DMI2TXN
DMI2TXP
DMI3RXN
DMI3RXP
DMI3TXN
DMI3TXP
DMI_IRCOMP
DMI_ZCOMP
CLKIN_DMI_N
CLKIN_DMI_P
PERN1
PERP1
PETN1
PETP1
PERN2
PERP2
PETN2
PETP2
PERN3
PERP3
PETN3
PETP3
PERN4
PERP4
PETN4
PETP4
PERN5
PERP5
PETN5
PETP5
PERN6
PERP6
PETN6
PETP6
PERN7
PERP7
PETN7
PETP7
PERN8
PERP8
PETN8
PETP8
U1CPT
U1CPT
05'24
2
2
USBP0N
USBP0P
USBP1N
USBP1P
USBP2N
USBP2P
USBP3N
USBP3P
USBP4N
USBP4P
USBP5N
USBP5P
USBP6N
USBP6P
USBP7N
USBP7P
USBP8N
USBP8P
USBP9N
USBP9P
USBP10N
USBP10P
USBP11N
USBP11P
USBP12N
USBP12P
USBP13N
USBP13P
OC0#_GPIO59
OC1#_GPIO40
OC2#_GPIO41
OC3#_GPIO42
OC4#_GPIO43
OC5#_GPIO9
OC6#_GPIO10
OC7#_GPIO14
USBRBIAS#
USBRBIAS
CLKIN_DOT_96N
CLKIN_DOT_96P
DMI2RBIAS
2 OF 12
2 OF 12
STUFF FOR NON-GRAPHICS.
R588 SHORT TO GND
CKG_DOT96_P
CKG_DOT96_N
CKG_DMI_N
CKG_DMI_P
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
USB_N0
BF36
USB_P0
BD36
USB_N1
BC33
USB_P1
BA33
USB_N2
BM33
USB_P2
BM35
USB_N3
BT33
USB_P3
BU32
USB_N4
BR32
USB_P4
BT31
USB_N5
BN29
USB_P5
BM30
USB_N6
BK33
USB_P6
BJ33
USB_N7
BF31
USB_P7
BD31
USB_N8
BN27
USB_P8
BR29
USB_N9
BR26
USB_P9
BT27
USB_N10
BK25
USB_P10
BJ25
USB_N11
BJ31
USB_P11
BK31
USB_N12
BF27
USB_P12
BD27
USB_N13
BJ27
USB_P13
BK27
LAN_LED_D
BM43
GPIO40
BD41
GPIO41
BG41
GPIO42
BK43
GPIO43
BP43
GPIO9
BJ41
GPIO10
BT45
GPIO14
BM45
BP25
USBRBIAS
BM25
CKG_DOT96_N
BD38
CKG_DOT96_P
BF38
DMI2RBIAS
A32
1 2
SR63 10K-04-X-OSR63 10K-04-X-O
SR67 10K-04-XSR67 10K-04-X
SR62 10K-04-XSR62 10K-04-X
1 2
SR61 10K-04-XSR61 10K-04-X
1 2
Elitegroup Computer Systems
Elitegroup Computer Systems
Elitegroup Computer Systems
PCH - DMI/PCI/PE/USB
PCH - DMI/PCI/PE/USB
PCH - DMI/PCI/PE/USB
Q67/ Q65/ H67/ H61 H2-AD
Q67/ Q65/ H67/ H61 H2-AD
Q67/ Q65/ H67/ H61 H2-AD
USB_N0 25
USB_P0 25
USB_N1 25
USB_P1 25
USB_N2 25
USB_P2 25
USB_N3 25
USB_P3 25
USB_N4 25
USB_P4 25
USB_N5 25
USB_P5 25
USB_N6 25
USB_P6 25
USB_N7 25
USB_P7 25
USB_N8 25
USB_P8 25
USB_N9 25
USB_P9 25
USB_N10 25
USB_P10 25
USB_N11 25
USB_P11 25
USB_N12 25
USB_P12 25
USB_N13 25
USB_P13 25
Close to PCH
R514 22.6-1-04R514 22.6-1-04
1 2
CKG_DOT96_N 15
CKG_DOT96_P 15
R371 750-1-04R371 750-1-04
1 2
PCH_1P05V
12
GND
GND
1
10'04'01 CONTRL LAN ATCIVE LED OFF
3VSB GPIO
SR64 10K-04-XSR64 10K-04-X
Stuff for
Integrated Clock Mode
LAN_LED_D 22
FROM CLK GEN.
GND
GND
Stuff for
Integrated Clock
Mode
R588 10k
CKG_DOT96_P
12
12 44Wednesday, January 12, 2011
12 44Wednesday, January 12, 2011
12 44Wednesday, January 12, 2011
1
V1.0
V1.0
V1.0
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