These devices are precision timing circuits capable of
producing accurate time delays or oscillation. In the timedelay or monostable mode of operation, the timed interval is
controlled by a single external resistor and capacitor network.
In the astable mode of operation, the frequency and duty
cycle can be controlled independently with two external
resistors and a single external capacitor.
The threshold and trigger levels normally are t wo-thirds and
one-third, respectively, of V
by use of the control-voltage terminal. When the trigger input
falls below the trigger level, the flip-flop is set, and the out put
goes high. If the trigger input is above the trigger level and
the threshold input is above the threshold level, the flip-flop is
reset and the output is low. The reset (RESET) input can
override all other inputs and can be used to initiate a new
timing cycle. When RESET goes low, the flip-flop is reset,
and the output goes low. When the output is low, a lowimpedance path is provided between discharge (DISCH) and
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ground.
The output circuit is capable of sinking or sourcing current up
to 200mA. Operation is specified for supplies of 5V to 15V.
With a 5-V supply, output levels are compatible with TTL
inputs.
Features
. These levels can be altered
CC
NE555/SA555/NA555
Pin Assignments
(Top View)
GND
TRIG
OUT
RESET
PRECISION TIMERS
SO-8
V
CC
DISCH
THRES
CONT
• Timing from microseconds to hours
• Astable or monostable operation
• Adjustable duty cycle
• TTL compatible output can source or sink up to 200mA
• “Green” Molding Compound (No Br, Sb)
• Lead Free Finish/ RoHS Compliant (Note 1)
Notes: 1. EU Directive 2002/95/EC (RoHS). All applicable RoHS exemptions applied. Please visit our website at
Supply voltage (Note 3) 18 V
Input voltage CONT, RESET, THRES, TRIG
Output current ±225 mA
Package thermal resistance Junction-to-Ambient
Package thermal resistance Junction-to-Case
Junction temperature 150 °C
Storage temperature -65 to 150 °C
Recommended Operating Conditions(T
Symbol Parameter Min Max Unit
VCC
VI
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IO
TA
Notes: 2. Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only.
Functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
3. All voltage values are with respect ground.
4. Maximum power dissipation is a function of T
is P
5. Maximum power dissipation is a function of T
is P
Supply voltage 4.5
Input voltage CONT, RESET, THRES, TRIG
Output current
Operating Ambient Temperature
(max), θJA, and TA. The maximum allowable power dissipation at any allowable ambient temperature
= (TJ(max) – TA)/θJA. Operating at the absolute maximum TJ of 150°C can affect reliability.
D
= (TJ(max) – TC)/θJA. Operating at the absolute maximum TJ of 150°C can affect reliability.
D
J
(max), θJC, and TA. The maximum allowable power dissipation at any allowable ambient temperature
J
Electrical Characteristics (V
= 5V to 15V, TA = 25°C unless otherwise stated)
CC
Symbol Parameter Test conditions Min Typ. Max Unit
VTH
ITH
VTR
ITR
V
RST
I
RST
I
DIS
V
DIS
V
CON
Threshold voltage level
Threshold current
(Note 6) 30 250 nA
Trigger voltage level
Trigger current TRIG at 0V 0.5 2 µA
RESET voltage level 0.3 0.7 1 V
RESET current
DISCH switch off-state current 20 100 nA
Symbol Parameter Test conditions Min Typ. Max Unit
VOL
VOH
ICC
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TER
TTC
T
VCC
TRI
TFA
Notes: 6. This parameter influences the maximum value of the timing resistors RA and RB in the circuit of Figure 12. For example, when VCC = 5 V, the maximum value is R = R
7. No protection against excessive pin 7 current is necessary providing package dissipation rating is not exceeded
9. Values specified are for a device in a monostable circuit similar to Figure 9, with the following component values: R
10. Values specified are for a device in an astable circuit similar to Figure 12, with the following component values: R
Low level output voltage
High level output voltage
Supply current
Initial error of timing interval
(Note 8)
Temperature coefficient of timing
interval
Supply voltage sensitivity of
timing interval
Output pulse rise time
Output pulse fall time
+ RB ≉ 3.4MΩ, and for VCC = 15 V, the maximum value is 10MΩ.
A
8. Timing interval error is defined as the difference between the measured value and the average value of a random sample from ea ch process run.
For monostable operation, any of the ‘555 timers can be connected as shown in Figure 1. If the output is low, application of a
negative-going pulse to the trigger (TRIG) sets the internal flip-flop and drives the output high. Capacit or C is then charged
through RA until the voltage across the capacitor reaches the thresh old voltage of the threshold (THRES) input. If TRIG has
returned to a high level, the output of the threshold comparator resets the internal flip-flop, drives the output low, and
discharges C.
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Monostable operation is initiated when TRIG voltage falls below the trigger threshold. Once initiated, the sequenc e ends onl y
if TRIG is high for at least 10μs before the end of the timing interval. When the trigger is grounde d, the comparator storage
time can be as long as 10μs, which limits the minimum monostable pulse width to 10μs. Because of the threshold level and
saturation voltage of Q1, the output pulse duration is approximately tW = 1.1RAC. Figure 3 is a plot of the time constant for
various values of RA and C. The threshold levels and charge rates both are dir ectly proportional to the supply voltage, VCC.
The timing interval is, therefore, independent of the supply voltage, so long as the supply voltage is constant durin g the time
interval.
Applying a negative-going trigger pulse simultaneously to RESET and TRIG during the timing interval discharges C and
reinitiates the cycle, commencing on the positive edge of the reset pulse. T he output is held low as l ong as the reset pulse is
low. To prevent false triggering, when RESET is not used, it should be connected to V
As shown in Figure 4, adding a second resistor, RB, to the circuit of Figure 1 and connecting the trigger input to the threshold
input causes the timer to self-trigger and run as a multivibrator. The capacitor C charges through R
discharges through R
This astable connection results in capacitor C charging and discharg ing between the threshold-voltag e level (≉0.67V
the trigger-voltage level (≉0.33V
and duty cycle) are independent of the supply voltage.
R
A
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R
B
C
. Therefore, the duty cycle is controlled by the values of RA and RB.
B
). As in the monostable circuit, charge and discharge times (and, therefore, the frequency
CC
V
CC
(5V to 15V)
0.01µF
Open
(See Note A)
4
RESET
7
DISCH
6
THRES
2
TRIG
CONT
5
GND
1
V
OUT
CC
R
8
L
3
Output
PRECISION TIMERS
and RB and then
A
CC
) and
Decoupling CONT voltage to ground with a capacitor can
improve operation. This should be evaluated for individual
applications.
Fig. 4 Circuit for Astable Operation
Fig. 5 Typical Astable Waveforms
Figure 5 shows typical waveforms generated during astable operation. The output high-level duration tH and low-level
duration t
The circuit shown in Figure 7 can be used to detect a missing p ulse or abnormall y long spacing bet ween consecutive pulses
in a train of pulses. The timing interval of the monostable circuit is retriggered continuousl y by the input pulse train as long as
the pulse spacing is less than the timing interval. A longer pulse spacing, missing pulse, or terminated pulse train perm its the
timing interval to be completed, thereby generating an output pulse as shown in Figure 8.
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PRECISION TIMERS
Fig. 7 Circuit for Missing Pulse Dectector
Frequency Divider
By adjusting the length of the timing cycle, the basic circuit of Figure 1 can be made to operate as a freq uency divider. Figur e
9 shows a divide-by-three circuit that makes use of the fact that retriggering cannot occur during the timing cycle.
The operation of the timer can be modified by modulating the internal threshold and trigger volta ges, which is accomplished
by applying an external voltage (or current) to CONT. Figure 10 shows a circuit for pulse-width modulation. A cont inuous
input pulse train triggers the monostable circuit, and a control signal modulates the threshold voltage. Figure 11 shows the
resulting output pulse-width modulation. While a sine-wave modulation signal is shown, any wave shape could be used.
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PRECISION TIMERS
Fig 10. Circuit for Pulse width modulation
Pulse Position Modulation
As shown in Figure 12, any of these timers can be used as a pulse-position modulator. This application modulates the
threshold voltage and, thereby, the time delay, of a free-runn ing oscillator. Figure 13 shows a triangular-wave modulation
signal for such a circuit; however, any wave shape could be used.
Many applications, such as computers, require signals for initializing co nditions during start-up. Other applications, such as
test equipment, require activation of test signals in sequence. These timing circuits can be connected to provide such
sequential control. The timers can be used in various combinations of astable or monostable circuit connections, with or
without modulation, for extremely flexible waveform control. Figure 14 shows a sequencer circuit with possible applications in
many systems, and Figure 15 shows the output waveforms.
NE555S-13 0 to 70°C S SO-8 2500/Tape & Reel -13
SA555S-13 -40 to 85°C S SO-8 2500/Tape & Reel -13
NA555S-13 -40 to 105°C S SO-8 2500/Tape & Reel -13
Notes: 10. Pad layout as shown on Diodes Inc. suggested pad layout document AP02001, which can be found on our website at
http://www.diodes.com/datasheets/ap02001.pdf.
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