Diodes DMP3056LSD User Manual

4

8

5

Y

W

485

30

56

Y

DUAL P-CHANNEL ENHANCEMENT MODE FIELD EFFECT TRANSISTOR

Product Summary

V

R

(BR)DSS

-30V

45mΩ @ V

65mΩ @ VGS = -4.5V

DS(on) max

= -10V

GS

Description

This new generation MOSFET has been designed to minimize the

on-state resistance (R

performance, making it ideal for high efficiency power management

applications.

Applications

NEW PRODUCT

• Power Management Functions

• Backlighting

• DC-DC Converters

TOP VIEW

) and yet maintain superior switching

DS(ON)

S1

G1

S2

G2

TOP VIEW

Internal Schematic

I

D

TA = +25°C

-6.9A

-5.1A

D1

D1

D2

D2

SO-8

DMP3056LSD

Features

• Dual P-Channel MOSFET

• Low On-Resistance

• Low Gate Threshold Voltage

• Low Input Capacitance

• Fast Switching Speed

• Low Input/Output Leakage

• Totally Lead-Free & Fully RoHS Compliant (Notes 1 & 2)

• Halogen and Antimony Free. “Green” Device (Note 3)

• Qualified to AEC-Q101 Standards for High Reliability

Mechanical Data

• Case: SO-8

• Case Material: Molded Plastic, “Green” Molding Compound.

UL Flammability Classification Rating 94V-0

• Moisture Sensitivity: Level 1 per J-STD-020

• Terminal Connections Indicator: See Diagram

• Terminals: Finish - Matte Tin annealed over Copper lead

frame. Solderable per MIL-STD-202, Method 208

• Weight: 0.072g (approximate)

D1

G1

G2

S1

P-Channel MOSFET P-Channel MOSFET

D2

S2

e3

Ordering Information (Note 4)

Part Number Case Packaging

DMP3056LSD-13 SO-8 2,500/Tape & Reel

Notes: 1. No purposely added lead. Fully EU Directive 2002/95/EC (RoHS) & 2011/65/EU (RoHS 2) compliant.

2. See http://www.diodes.com/quality/lead_free.html for more information about Diodes Incorporated’s definitions of Halogen- and Antimony-free, "Green"
and Lead-free.

3. Halogen- and Antimony-free "Green” products are defined as those which contain <900ppm bromine, <900ppm chlorine (<1500ppm total Br + Cl) and
<1000ppm antimony compounds.

4. For packaging details, go to our website at http://www.diodes.com/products/packages.html.

Marking Information

P

LD

Y WW

1

Chengdu A/T Site

DMP3056LSD

Document number: DS31420 Rev. 7 - 2

P3056LD

Y W

1

Shanghai A/T Site

1 of 5

www.diodes.com

= Manufacturer’s Marking
P3056LD = Product Type Marking Code
YYWW = Date Code Marking
YY or YY = Year (ex: 14 = 2014)
WW = Week (01 - 53)
YY = Date Code Marking for SAT (Shanghai Assembly/ Test site)
YY = Date Code Marking for CAT (Chengdu Assembly/ Test site)

January 2014

© Diodes Incorporated

θ

)

)

r

)

DMP3056LSD

Maximum Ratings (@T

= +25°C, unless otherwise specified.)

A

Characteristic Symbol Value Units

Drain-Source Voltage
Gate-Source Voltage

Drain Current (Note 5) Steady
State

Pulsed Drain Current (Note 6)

T

= +25°C

A

= +70°C

T

A

V

DSS

V

GSS

I

D

I

DM

-30 V

±20

-6.9

-5.8

V

A

-24 A

Thermal Characteristics

Characteristic Symbol Value Unit

Total Power Dissipation (Note 5)
Thermal Resistance, Junction to Ambient (Note 5)

NEW PRODUCT

Operating and Storage Temperature Range

P

R

T

J, TSTG

D

JA

Electrical Characteristics (@T

= +25°C, unless otherwise specified.)

A

Characteristic Symbol Min Typ Max Unit Test Condition

OFF CHARACTERISTICS (Note 7)

Drain-Source Breakdown Voltage
Zero Gate Voltage Drain Current

Gate-Source Leakage

BV

DSS

I

DSS

I

⎯ ⎯

GSS

-30

⎯ ⎯

⎯ ⎯

-1 µA

±100
±800

ON CHARACTERISTICS (Note 7)

Gate Threshold Voltage

Static Drain-Source On-Resistance

Forward Transconductance
Diode Forward Voltage (Note 7)

V

GS(th

R

DS (ON)

g

V

SD

fs

-1 -1.7 -2.1 V

⎯

⎯

⎯

-0.5

⎯

⎯

8

⎯

45
65

⎯

-1.2 V

DYNAMIC CHARACTERISTICS

Input Capacitance
Output Capacitance
Reverse Transfer Capacitance

Gate Resistance

C

⎯

iss

C

⎯

oss

C

⎯

rss

R

⎯

G

722
114

92

3.3

⎯
⎯
⎯

⎯ Ω

SWITCHING CHARACTERISTICS

Total Gate Charge

Q

G

⎯

QG ⎯
Gate-Source Charge
Gate-Drain Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time

Notes: 5. Device mounted on 2 oz. 1” x 1” Copper pads on 2” x 2” FR-4 PCB.

6. Pulse width ≤10μS, Duty Cycle ≤1%.

7. Short duration pulse test used to minimize self-heating effect.

DMP3056LSD

Document number: DS31420 Rev. 7 - 2

Q

⎯

GS

Q

⎯

GD

t

⎯

d(on

t

⎯

t

⎯

d(off

t

f

www.diodes.com

⎯

2 of 5

6.8

13.7

1.6

4.2

6.4

5.3

26.5

14.7

⎯

⎯

⎯

⎯

⎯

⎯

⎯
⎯

2.5 W
50 °C/W

-55 to +150 °C

V

V

= 0V, ID = -250µA

GS

V

= -30V, VGS = 0V

DS

= ±20V, VDS = 0V

V

nA

mΩ

S

GS

V

= ±25V, VDS = 0V

GS

V

= VGS, ID = -250μA

DS

V

= -10V, ID = -6.0A

GS

= -4.5V, ID = -5.0A

V

GS

V

= -10V, ID = -5.3A

DS

VGS = 0V, IS = -1.7A

pF
pF
pF

= -25V, VGS = 0V

V

DS

f = 1.0MHz

= 0V, VGS = 0V

V

DS

f = 1.0MHz

= -15V, VGS = -4.5V,

V

nC

nC

ns

DS

I

= -6A

D

= -15V, VGS = -10V,

V

DS

I

= -6A

D

V

= -15V, VGS = -10V,

DS

= -1A, RG = 6.0Ω

I

D

© Diodes Incorporated

January 2014