Tentative Product Specification
Module name: P0340WQLB-T
Issue date: 2008/03/19
Version: 1.1
Customer
Approved by Customer
Approved by CMEL
PD Division ENG Division QA Dept
Note:
1. The information contained herein may be change without prior notice. It is therefore advisable to contact
CHI MEI EL Corp. before designed your product based on this specification.
1
Reversion History
Version Date Page Description
Ver.1.0
Ver.1.1
2008/02/29
2008/03/19
All
18
Tentative specification was first issued
Change External Dimension
2
1. Purpose:
This documentation defines general product specification for OLED module supplied by
CMEL. The information described in this technical specification is tentative. Please Contact
CMEL’s representative while your product is modified.
2. General Description:
Driving Mode: Active Matrix
Color Mode: Full Color (16M color)
Driver IC: HX5116, COG Assembly
Interface:
8bit serial RGB and 24bit parallel RGB interface
Application: Portable DVD, PMP, GPS, Photo Frame etc.
3. Mechanical Data:
No. Items Specification Unit
1 Diagonal Size
2 Resolution
3 Pixel Pitch
4 Active Area
5 Outline Area
6 Thickness
7 Weight
3.4 Inch
480 RGB x 272
H: 156 V: 156 um
74.88 x 42.43 mm
82.8 x 54.3 mm
2.8 mm
TBD g
3
4. Maximum ratings:
Symbol Parameter Value Unit
VCC Logic Supply Voltage -0.3 to +3.6 V
VCI Analog Supply Voltage -0.3 to +3.6 V
TA Operating Temperature -20 to +60 ℃
Tstg Storage Temperature -40 to +85 ℃
Table 7.1 Maximum ratings
Maximum ratings are those values beyond which damages to the device may
occur. Functional operation should be restricted to the limits in the Electrical
Characteristics tables or Pin Description section. Unused outputs must be left
open.
4
5. Electrical Characteristic:
5.1 DC Characteristic
DC Characteristics
(Unless otherwise specified, Voltage Referenced to VSS = 0V, VCC = 1.5 to 3.6V, TA = -20 to 70C)
Parameter Symbol Test condition Min. Typ. Max. Unit
System power supply pins of the
logic block
Booster Reference Supply Voltage
Range
DDVDH Output Voltage 1 DDVDH Set CP1X=0 4.9 5.1 5.3 V
DDVDH Output Voltage 2 DDVDH Set CP1X=1 5.8 6.0 6.2 V
VGAM1OUT Output Voltage 1 VGAM1OUT Set CP1X=0 4.7 4.8 4.9 V
VGAM1OUT Output Voltage 2 VGAM1OUT Set CP1X=1 5.7 5.8 5.9 V
Gate driver High Output Voltage VGH - +3 - +8 V
Gate driver Low Output Voltage VGL - -8 - -3 V
OLED Diode Refer Voltage ARREF - -8 - +8 V
Logic High Output Voltage VOH Iout=-400µA 0.8 * VCC - VCC V
Logic Low Output Voltage VOL Iout=400µA 0 - 0.2 * VCC V
Logic High Input voltage VIH 0.8 * VCC - VCC V
Logic Low Input voltage VIL
Logic Input Current IIL/IIH No pull up or pull low -1 - 1 µA
Pull high resistance RH Pull up pins 600 900 1200 KΩ
Pull low resistance RL Pull low pins 600 900 1200 KΩ
High Output Current IOH
Low Output Current IOL
Output leakage Current IOZ - -1 - 1 µA
Output voltage offset VOS
Output voltage deviation VOD
Analog standby current ISTB
Analog operating current IVCI
Analog operating current IVCI
Logic Pins Input Capacitance CIN - - 5 7.5 pF
VCC - 1.5 - 3.6 V
VCI - 3.0 - 3.6 V
-
S1~S107,
Vo=4.9V vs. 4V
S1~S107,
Vo=0.1V vs. 1V
S1~S107,
Vo=0.1V~DDVDH-0.1V
S1~S107,
Vo=0.1V~DDVDH-0.1V
VCI=3.0V,
Stand by mode
VCI=3.0V,
S1~S160 no load
VCI=3.0V,
S1~S160 no load
0 - 0.2 * VCC V
50 - - µA
- - -50 µA
±10 mV
±10 mV
- 10 uA
TBD mV
TBD mV
5
5.2 AC Characteristic
5.2.1 AC Electrical Characteristics
6
Clock and Data input waveforms
Define the HSYNC to VSYNC timing for RGB mode
7
5.2.2 480RGB X 272 serial RGB interface
5.2.2 480RGB X 272 parallel RGB interface
8
Serial RGB Horizontal Data Format
Parallel RGB Horizontal Data Format
Digital RGB Vertical Data Format
9
6. Electro-Optical Characteristic:
Items Symbol Min Typ. Max Unit Remark
Operating Luminance L 136 160 184 Cd/m
2
(1)(5)
Power Consumption Pon 700 mW
30% pixels
on (1)
Response Time Tres 50 uS (2)
CIEx (White) Wx 0.31 - (5)
CIEy (White) Wy 0.33 - (5)
Viewing Angle VA 160 170 Degree (3)
Contrast CR 5000:1 10000:1 (4)
Operation Lifetime LTop 20000 Hrs (1)(6)
Note:
Measuring surrounding: dark room
Surrounding temperature: 25oC
1. Test condition:
a. AR_VDD= 4.6V, AR_VSS= -5.4V
b. IC Initial Register Setting:
24-bit parallel RGB (DE)
Index_out(0x04); Parameter_out(0x23); //set display mode 24-bit parallel RGB (DE)
Index_out(0x05); Parameter_out(0x82); //set display mode
Index_out(0x07); Parameter_out(0x0F); //set driver capability
Index_out(0x34); Parameter_out(0x18); //set display timing
Index_out(0x35); Parameter_out(0x28); //set display timing
Index_out(0x36); Parameter_out(0x16); //set display timing
Index_out(0x37); Parameter_out(0x01); //set display timing
Index_out(0x02); Parameter_out(0x02); //OTP On
Index_out(0x0A); Parameter_out(0xBB); //VGHVGL=+/-6V
Index_out(0x09); Parameter_out(0x1E); //VGAM1OUT=4.75V
Index_out(0x10); Parameter_out(0x4F); //set R slop
Index_out(0x11); Parameter_out(0x1D); //set G slop
Index_out(0x12); Parameter_out(0x0D); //set B slop
Index_out(0x13); Parameter_out(0x02); //set R_0
10
Index_out(0x14); Parameter_out(0x07); //set R_10
Index_out(0x15); Parameter_out(0x07); //set R_36
Index_out(0x16); Parameter_out(0x05); //set R_80
Index_out(0x17); Parameter_out(0x04); //set R_124
Index_out(0x18); Parameter_out(0x03); //set R_168
Index_out(0x19); Parameter_out(0x03); //set R_212
Index_out(0x1A); Parameter_out(0x05); //set R_255
Index_out(0x1B); Parameter_out(0x02); //set G_0
Index_out(0x1C); Parameter_out(0x06); //set G_10
Index_out(0x1D); Parameter_out(0x03); //set G_36
Index_out(0x1E); Parameter_out(0x03); //set G_80
Index_out(0x1F); Parameter_out(0x03); //set G_124
Index_out(0x20); Parameter_out(0x03); //set G_168
Index_out(0x21); Parameter_out(0x03); //set G_212
Index_out(0x22); Parameter_out(0x06); //set G_255
Index_out(0x23); Parameter_out(0x02); //set G_0
Index_out(0x24); Parameter_out(0x05); //set B_10
Index_out(0x25); Parameter_out(0x07); //set B_36
Index_out(0x26); Parameter_out(0x05); //set B_80
Index_out(0x27); Parameter_out(0x04); //set B_124
Index_out(0x28); Parameter_out(0x04); //set B_168
Index_out(0x29); Parameter_out(0x04); //set B_212
Index_out(0x2A); Parameter_out(0x05); //set B_255
Index_out(0x06); Parameter_out(0x03); //set display on
AR_VDD= +4.6V
AR_VSS= -5.4V
8-bit serial RGB (DE)
Index_out(0x04); Parameter_out(0x21); //set display mode 8-bit serial RGB (DE)
Index_out(0x05); Parameter_out(0x82); //set display mode
Index_out(0x07); Parameter_out(0x0F); //set driver capability
Index_out(0x34); Parameter_out(0x48); //set display timing
Index_out(0x35); Parameter_out(0x78); //set display timing
Index_out(0x36); Parameter_out(0x42); //set display timing
Index_out(0x37); Parameter_out(0x01); //set display timing
Index_out(0x02); Parameter_out(0x02); //OTP On
Index_out(0x0A); Parameter_out(0xBB); //VGHVGL=+/-6V
Index_out(0x09); Parameter_out(0x1E); //VGAM1OUT=4.75V
11
Index_out(0x10); Parameter_out(0x4F); //set R slop
Index_out(0x11); Parameter_out(0x1D); //set G slop
Index_out(0x12); Parameter_out(0x0D); //set B slop
Index_out(0x13); Parameter_out(0x02); //set R_0
Index_out(0x14); Parameter_out(0x07); //set R_10
Index_out(0x15); Parameter_out(0x07); //set R_36
Index_out(0x16); Parameter_out(0x05); //set R_80
Index_out(0x17); Parameter_out(0x04); //set R_124
Index_out(0x18); Parameter_out(0x03); //set R_168
Index_out(0x19); Parameter_out(0x03); //set R_212
Index_out(0x1A); Parameter_out(0x05); //set R_255
Index_out(0x1B); Parameter_out(0x02); //set G_0
Index_out(0x1C); Parameter_out(0x06); //set G_10
Index_out(0x1D); Parameter_out(0x03); //set G_36
Index_out(0x1E); Parameter_out(0x03); //set G_80
Index_out(0x1F); Parameter_out(0x03); //set G_124
Index_out(0x20); Parameter_out(0x03); //set G_168
Index_out(0x21); Parameter_out(0x03); //set G_212
Index_out(0x22); Parameter_out(0x06); //set G_255
Index_out(0x23); Parameter_out(0x02); //set G_0
Index_out(0x24); Parameter_out(0x05); //set B_10
Index_out(0x25); Parameter_out(0x07); //set B_36
Index_out(0x26); Parameter_out(0x05); //set B_80
Index_out(0x27); Parameter_out(0x04); //set B_124
Index_out(0x28); Parameter_out(0x04); //set B_168
Index_out(0x29); Parameter_out(0x04); //set B_212
Index_out(0x2A); Parameter_out(0x05); //set B_255
Index_out(0x06); Parameter_out(0x03); //set display on
AR_VDD= +4.6V
AR_VSS= -5.4V
12
r
2. Response Time test condition
T
100%
90%
10%
3. Viewing angle test condition:
Tf
Time
Vss(GND)
ψ=270°
4. Contrast
Luminance with all pixels white
CR =
Luminance with all pixels black
5. Optical tester: CA210
6. Brightness of 30% power consumption. Operating Life Time is defined when the
luminance has decayed to less than 50% of the initial measured luminance before life test.
13
7. System Diagram:
TBD
14
8. Pin Assignment:
PIN Symbol I/O Description Remarks
TP1 I Touch panel P1
1
TP2 I Touch panel P2
2
TP3 I Touch panel P3.
3
TP4 I Touch panel P4
4
AR_VSS I Negative voltage for OLED
5
AR_VSS I Negative voltage for OLED
6
TEST1_VS
7
AR_VDD I Positive voltage for OLED
8
AR_VDD I Positive voltage for OLED
9
TEST2_VD
10
ARREF I/O
11
VGL
12
VGH
13
LVO
14
C22N
15
C22P
16
HVO
17
C21P
18
C21N
19
C11N
20
C11P
21
C12N
22
open CMEL test pin, it must be open.
open CMEL test pin, it must be open.
Panel refers voltage of the regulator ARREF or external input voltage.
(-8V~+8V)
Low Voltage output of regulator VGL or external input voltage.
I/O
(-3V~-8V)
High Voltage output of regulator VGH or external input voltage.
I/O
(+3V~+8V)
Negative output voltage of the booster2. (-8.5V)
I/O
Connect to the step-up circuit, capacitors according to the step-up
I/O
factor. Leave this pin open if the internal step-up circuit is not used.
Positive output voltage of the booster2. (8.5V)
I/O
Connect to the step-up circuit, capacitors according to the step-up
I/O
factor. Leave this pin open if the internal step-up circuit is not used.
Connect to the step-up circuit, 4capacitors according to the step-up
I/O
factor. Leave this pin open if the internal step-up circuit is not used.
C12P
23
PVSS
24
DDVDH
25
VSSA
26
VSSA
27
VCI
28
VCI
29
VGAM1OUT
30
VDDD
31
Charge pump ground pin, it must connect to external
P
ground.
Output voltage of the booster1. (5.1V/6.0V)
I/O
Analog ground pin. It must connect to external ground.
P
Analog ground pin. It must connect to external ground.
P
A power supply for the Analog circuit. (2.7V~3.6V)
P
A power supply for the Analog circuit. (2.7V~3.6V)
P
Output voltage of the VGAM1OUT regulator and used positive power
I/O
of source driver. (4.8V/5.8V)
Internal logic voltage input or output pin
VDC_ENB=0, VDDD is output, please connect to 1uF capacitor.
I/O
VDC0 VDDD Status
0 1.8V Normal display
15
32
33
34
35
36
37
VCC
VSSD
NRESET
NCS
SCL
SDA
1 2.5V OTP program
VDC_ENB=1, VDDD is input. (Input range = 1.6V~2.75V)
A power supply for the Digital circuit. (1.5V~3.6V)
P
Digital ground pin. It must connect to external ground.
P
Reset pin. Setting either pin low initializes the LSI. Must be reset
I
after power is supplied. (Normally pull high)
Serial Interface chip enable pin. (Normally pull high)
I
Serial Interface clock input pin. (Normally pull high)
I
Serial Interface data line. (Normally pull high)
I
Data enable:
When VSYNC+HSYNC+DE mode,
I
38
39
40
41
42
43
44
45
46
47
48
DE
VSYNC
HSYNC
DCLK
D27
D26
D25
D24
D23
D22
D21
DE=H: Data enable, DE=L: Data disable (Black). (Normally pull low)
Frame synchronizing signal.
If VSPL=0: Active low.
I
If VSPL=1: Active high.
Line synchronizing signal.
If HSPL=0: Active low.
I
If HSPL=1: Active high.
Dot clock signal.
I
If DPL=0: Data are input on the rising edge of DOTCLK.
If DPL=1: Data are input on the falling edge of DOTCLK.
Digital data input. DX0 is LSB and DX7 is MSB. (Normally pull low)
I
1. If parallel RGB input mode is used, D0X, D1X, and D2X indicate R,
G, and B data in turn.
2. If serial RGB or RGBD or CCIR601 or CCIR656 input mode is
selected, only D07~D00 are used, and others short to GND.
DX7~DX0 has 8-bit width, respectively to compose 16,777,216
color and 256 gray scale of 1 pixel.
49
50
51
52
53
54
55
56
57
58
59
D20
D17
D16
D15
D14
D13
D12
D11
D10
D07
D06
16
N
D05
60
D04
61
D03
62
D02
63
D01
64
D00
65
66 TEST3_W
67 AR_VDD
68 AR_VDD
69 AR_VSS
70 AR_VSS
71 TEST4_P
open CMEL test pin, it must be open.
I Positive voltage for OLED
I Positive voltage for OLED
I Negative voltage for OLED
I
egative voltage for OLED
open CMEL test pin, it must be open.
17
9. External Dimension:
18
10. Reliability Test:
TBD
19
11. Package:
TBD
20
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