Note 1: All the above voltages are on the basis of “VSS=0V”.
Note 2: When this module is used beyond above absolute maximum ratings, permanent
breakage of the module may occur. Also for normal operations it’s desirable to use
this module under the conditions according to Section 3.2 “Electrical Characteristics”
and section 4 “optical characteristic. If this module is used beyond these conditions
the malfunction of the module can occur and the reliability of the module may
deteriorate.
Note 3: VCC=9V, Ta=25°C, 50% Checkerboard.
End of lifetime is specified as 50% of initial brightness reached. The average
operating lifetime at room temperature is estimated by the accelerated operation at
Characteristics Symbol Conditions Min Typ Max Unit
Supply Voltage for Logic V
Supply Voltage for
Display
V
DD
CC
2.4 2.8 3.5 V
Note 4 8.0 9.0 10.0 V
Iout=100μA,3.3
High Level Input V
Low Level Input V
High Level Output V
Low Level Output V
Operating Current for
VDD
Operating Current for
VCC
Sleep Mode Current for
VCI
Sleep Mode Current for
VCC
I
I
I
DD, SLEEP
I
CC, SLEEP
IH
IL
OH
OL
DD
CC
MHz
Iout=100μA,3.3
MHz
Iout=100μA,3.3
MHz
Iout=100μA,3.3
MHz
Note 5
Note 6
-
-
0.8xVDD - VDD
0 - 0.2xVDD
0.9xVDD - VDD
0 - 0.1xVDD
-
-
-
-
-
180 300
10.8 13.5
18.0 22.5
1 5
2 10
Note 4 Brightness (Lbr) and Supply Voltage for Display (Vcc) are subject to the change of the
panel characteristics and the customer’s request.
Note 5 V
Note 6 V
DD= 2.8V, VCC = 9.0 V, 50% Display area turned on.
DD = 2.8V, VCC = 9.0 V, 100% Display area turned on
The supporting pin can reduce the influence from stress on the
function pins. This pin must be connected to external ground.
Power Supply for OEL Panel
This is the most positive voltage supply pin of the chip. It can be
supplied externally or generated internally by using internal
DC/DC voltage converter
Voltage Output High Level for COM Signal
This pin is the input pin for the voltage output high level for
COM signals. A capacitor should be connected between this pin
and VSS.
Current Reference for Brightness Adjustment
This pin is segment current reference pin. A resistor should be
connected between this pin and VSS. Set the current at 10.0μA.
Host Data Input/output Bus
These pins are 8-bit bi-directional data bus to be connected to the
microprocessor’s data bus. When serial mode is selected, D1 will
be the serial data input SDIN and D0 will be the serial clock
input SCLK. When I2C mode is selected, D2 & D1 should be
tired together and serve as SDAout & SDAin in application and
D0 is the serial clock input SCL.
Read/Write Enable or Read
This pin is MCU interface input. When interfacing to a
68XX-series microprocessor, this pin will be used as the
Enable (E) signal. Read/write operation is initiated when this pin
is pulled high and the CS# is pulled low.
When connecting to an 80XX-microprocessor, this pin receives
the Read (RD#) signal. Data read operation is initiated when this
pin is pulled low and CS# is pulled low.
Read/Write Select or Write
This pin is MCU interface input. When interfacing to a
68XX-series microprocessor, this pin will be used as
Read/Write (R/W#) selection input. Pull this pin to
“High” for read mode and pull it to “Low” for write mode.
When 80XX interface mode is selected, this pin will be the Write
(WR#) input. Data write operation is initiated when this pin is
pulled low and the CS# is pulled low.
Data/Command Control
This pin is Data/Command control pin. When the pin is pulled
high, the input at D7~D0 is treated as display data.
When the pin is pulled low, the input at D7~D0 will be
transferred to the command register. For detail
relationship to MCU interface signals, please refer to the
Timing Characteristics Diagrams.
When the pin is pulled high and serial interface mode is selected,
the data at SDIN is treated as data. When it is pulled low, the data
at SDIN will be transferred to the command register. In I2C
mode, this pin acts as SA0 for slave address selection.
REV. A
Page 9 / 30
No. Symbol I/O Function
Power Reset for Controller and Driver
16 RES# I
17 CS# I
18 N.C. -
19 BS2
I
20 BS1
This pin is reset signal input. When the pin is low, initialization
of the chip is executed.
Chip Select
This pin is the chip select input. The chip is enabled for MCU
communication only when CS# is pulled low.
Reserved Pin
The N.C. pin between function pins is reserved for compatible
and flexible design.
Communicating Protocol Select
These pins are MCU interface selection input. See the
following table:
This is a voltage supply pin. It must be connected to
external source
Reserved Pin
The N.C. pins between function pins are reserved for compatible
and flexible design.
Voltage Reference for DC/DC Converter Circuit
This is the internal voltage reference of booster circuit. A
stabilization capacitor, typ. 1μF, should be connected to VSS.
Reserved Pin
The N.C. pin between function pins is reserved for compatible
and flexible design.
Feedback Input for DC/DC Converter Circuit
This is the feedback resistor input of the booster circuit. It is used
to adjust the booster output voltage level (VCC).
Power Supply for DC/DC Converter Circuit
This is the power supply pin for the internal buffer of the DC/DC
voltage converter. It must be connected to VDD when the
converter is used. It could be floated when the converter is not
used.
Output for Connected External NMOS
This output pin drives the gate of the external NMOS of the
booster circuit.
Ground of OEL System
This is a ground pin. It also acts as a reference for the logic pins,
the OEL driving voltages, and the analogue circuits. It must be
connected to external ground.
MCU Interface Selection: BS1 and BS2
Pins connected to MCU interface: D7~D0, E/RD#, R/W#, D/C#, RES#, and
CS#
*VBREF, FB, and GDR should be left float.
Please refer to the Technical Manual for the SSD1305
5.2 POWER UP/DOWN SEQUENCE
To protect panel and extend the panel lifetime, the driver IC power up/down routine should
include a delay period between high voltage and low voltage power sources during turn on/off.
It gives the panel enough time to complete the action of charge and discharge before/after the
operation.
5.2.1 POWER UP SEQUENCE
V
1. Power up VDD
2. Send Display off command VCC
3. Initialization
4. Clear Screen
5. Power up VCC
6. Delay 100ms V
(When V
is stable)
CC
DD
7. Send Display on command VSS/Ground
ON VCC ONDisplay On
DD
5.2.2 POWER DOWN SEQUENCE
Display off V
1. Send Display off command
2. Power down VCC VCC
3. Delay 100ms
(When VCC is reach 0 and panel is
completely discharges) V
DD
4. Power down VDD
V
/Ground
SS
off VDD off
CC
5.3 RESET CIRCUIT
When RES# input is low, the chip is initialized with the following status:
1. Display is OFF
2. 132×64 Display Mode
3. Normal segment and display data column and row address mapping (SEG0 mapped
to column address 00h and COM0 mapped to row address 00h)
4. Shift register data clear in serial interface
5. Display start line is set at display RAM address 0
6. Column address counter is set at 0
7. Normal scan direction of the COM outputs
8. Contrast control register is set at 80h
9. Normal display mode (Equivalent to A4h command)
Command usage and explanation of an actual example
If the noise is accidentally occurred at the displaying window during the operation, please
reset the display in order to recover the display function.
The performance, function and reliability of the shipped products conform to the Product
Specification.
7.2 DELIVERY ASSURANCE
7.2.1 DELIVERY INSPECTION STANDARDS
IPC-AA610, class 2 electronic assembly’s standard
7.2.2 Zone definition
7.2.3 Visual inspection
Test and measurement to be conducted under following conditions
Temperature: 23±5
Humidity: 55±15%RH
Fluorescent lamp: 30 W
Distance between the Panel & Eyes of the Inspector: 30cm
Distance between the Panel & the lamp: 50cm
Major No unmelted solder paste should be present on PCB
Critical Cold solder joints, missing solder connections, or oxidation are not allowed
Minor No residue or solder balls on PCB are allowed
Critical
Minor Tray
PCB
particles
Not allowed
Not allowed if
bent lead causes
short circuit
Not allowed if bent lead
extends horizontally
more than 50%
of its width
Level of sample for approval set as limit sample
Short circuits on components are not allowed
Size Quantity
Purchaser should supply Densitron with detailed data of non-conforming sample.
After accepting it, Densitron should complete the analysis in two weeks from receiving the
sample.
If the analysis cannot be completed on time, Densitron must inform the purchaser.
7.3.2 Handling of non-conforming displays
If any non-conforming displays are found during customer acceptance inspection which
Densitron is clearly responsible for, return them to Densitron.
Both Densitron and customer should analyse the reason and discuss the handling of nonconforming displays when the reason is not clear.
Equally, both sides should discuss and come to agreement for issues pertaining to
modification of Densitron quality assurance standard.
Test Item Test Condition Evaluation and assessment
High Temperature Operation 70°C, 240 hours
Low Temperature Operation -30°C, 240 hours
High Temperature Storage 80°C, 240 hours
Low Temperature Storage -40°C2, 240 hours
High Temperature & High
Humidity Storage(Operation)
Thermal Shock
No moisture condensation is observed during tests.
The samples used for the above tests do not include polarizer
60°C2, 90%RH, 120 hours
-40°C to
85°C, 24 cycles 1 Hour
The brightness should be
greater than 50% of the initial
brightness.
The operational functions
work
8.1.1 FAILURE CHECK STANDARD
After the completion of the described reliability test, the samples were left at room
temperature for 2 hrs prior to conducting the failure teat at 23±5 °C;55±15% RH
8.2 LIFE TIME
Item Description
Function, performance, appearance, etc. shall be free from remarkable deterioration
more than 10,000 hours under ordinary operating conditions of room temperature
1
(25±10 °C), normal humidity (50% RH), and in area not exposed to direct sunlight.
Storage Life time is 20,000 hr under room temperature (25±10 °C), normal humidity
(50% RH)
2 End of lifetime is specified as 50% of initial brightness.
8.3 Failure Check Standard
After the completion of the described reliability test, the samples were left at room
temperature for 2 hrs prior to conducting the failure test at 23±5°C; 55±15% RH.
If the panel breaks, be careful not to get the organic substance in your mouth or in your eyes.
If the organic substance touches your skin or clothes, wash it off immediately using soap and plenty of
water.
Mounting and Design
Place a transparent plate (e.g. acrylic, polycarbonate or glass) on the display surface to protect the
display from external pressure. Leave a small gap between the transparent plate and the display
surface.
Design the system so that no input signal is given unless the power supply voltage is applied.
Caution during OLED cleaning
Lightly wipe the display surface with a soft cloth soaked with Isopropyl alcohol, Ethyl alcohol or
Trichlorotriflorothane.
Do not wipe the display surface with dry or hard materials that will damage the polariser surface.
Do not use aromatic solvents (toluene and xylene), or ketonic solvents (ketone and acetone).
Caution against static charge
As the display uses C-MOS LSI drivers, connect any unused input terminal to V
input any signals before power is turned on.
Also, ground your body, work/assembly table and assembly equipment to protect against static
electricity.
Packaging
Displays use OLED elements, and must be treated as such. Avoid strong shock and drop from a
height.
To prevent displays from degradation, do not operate or store them exposed directly to sunshine or
high temperature/humidity.
Caution during operation
It is indispensable to drive the display within the specified voltage limit since excessive voltage
shortens its life.
Other Precautions
When a display module is operated for a long of time with fixed pattern may remain as an after image
or slight contrast deviation may occur.
Nonetheless, if the operation is interrupted and left unused for a while, normal state can be restored.
Also, there will be no problem in the reliability of the module.
Storage
Store the display in a dark place where the temperature is 25°C ± 10°C and the humidity below
50%RH.
Store the display in a clean environment, free from dust, organic solvents and corrosive gases.
Do not crash, shake or jolt the display (including accessories).
When storing OEL display modules, put them in static electricity preventive bags avoiding exposure
to direct sun light nor to lights of fluorescent lamps, etc. and, also, avoiding high temperature and high
humidity environments or low temperature (less than 0°C) environments. (We recommend you to store
these modules in the packaged state when they were shipped from Factory.)
At that time, be careful not to let water drops adhere to the packages or bags nor let dewing occur with
them.
If electric current is applied when water drops are adhering to the surface of the OEL display module,
when the OEL display module is being dewed or when it is placed under high humidity environments,
the electrodes may be corroded and be careful about the above.
9.3 DESIGNING
The absolute maximum ratings are the ratings which cannot be exceeded for
OEL display module, and if these values are exceeded, panel damage may be happen.
To prevent occurrence of malfunctioning by noise: pay attention to satisfy the VIL and VIH
specifications and, at the same time, to make the signal line cable as short as possible.
We recommend you to install excess current preventive unit (fuses, etc.) to the power circuit (VCI).
(Recommend value: 0.5A)
Pay sufficient attention to avoid occurrence of mutual noise interference with the neighbouring
devices.
As for EMI, take necessary measures on the equipment side basically.
When fastening the OEL display module, fasten the external plastic housingsection.
If power supply to the OEL display module is forcibly shut down by such errors as taking out the main
battery while the OEL display panel is in operation, we cannot guarantee the quality of this OEL
display module.
The electric potential to be connected to the rear face of the IC chip should be as follows: SSD1351
* Connection (contact) to any other potential than the above may lead to rupture of the IC.
9.4 Disposing
Request the qualified companies to handle industrial wastes when disposing of the OEL display
modules. Or, when burning them, be sure to observe the environmental and hygienic laws and
regulations.
When an OEL display module is operated for a long of time with fixed pattern may remain as an after
image or slight contrast deviation may occur. Nonetheless, if the operation is interrupted and left
unused for a while, normal state can be restored. Also, there will be no problem in the reliability of the
module.
To protect OEL display modules from performance drops by static electricity rapture, etc., do not
touch the following sections whenever possible while handling the OEL display modules.
* Pins and electrodes
* Pattern layouts such as the COF
With this OEL display module, the OEL driver is being exposed. Generally speaking, semiconductor
elements change their characteristics when light is radiated according to the principle of the solar
battery. Consequently, if this OEL driver is exposed to light, malfunctioning may occur.
* Design the product and installation method so that the OEL driver may be shielded from light in
actual usage.
* Design the product and installation method so that the OEL driver may be shielded from light during
the inspection processes.
Although this OEL display module stores the operation state data by the commands and the indication
data, when excessive external noise, etc. enters into the module, the internal status may be changed. It
therefore is necessary to take appropriate measures to suppress noise generation or to protect from
influences of noise on the system design.
We recommend you to construct its software to make periodical refreshment of the operation statuses
(re-setting of the commands and re-transference of the display data) to cope with catastrophic noise.