DENSITRON DD-25664BE-3A Product Specification

OLED DISPLAY MODULE
Product Specification
CUSTOMER
PRODUCT
CUSTOMER
APPROVAL
INTERNAL APPROVALS
Product Mgr Doc. Control Electr. Eng
Bazile
Peter
Date: 11/06/08 Date: 11/06/08 Date: 11/06/08
Approval for Specification only
Approval for Specification and Sample
Standard
DD-25664BE-3A
Anthony
Perkins
Date
Rekha
Mani
Copyright ©2008 DENSITRON TECHNOLOGIES plc. All rights reserved. – Proprietary Data
FORM No. DT-029
TABLE OF CONTENTS
1 MAIN FEATURES ..................................................................................................... 4
2 MECHANICAL SPECIFICATION.......................................................................... 5
2.1 MECHANICAL CHARACTERISTICS ............................................................... 5
2.2 MECHANICAL DRAWING ................................................................................ 6
3 ELECTRICAL SPECIFICATION............................................................................ 7
3.1 ABSOLUTE MAXIMUM RATINGS .................................................................. 7
3.2 ELECTRICAL CHARACTERISTICS ................................................................. 8
3.3 INTERFACE PIN ASSIGNMENT ....................................................................... 9
3.4 BLOCK DIAGRAM ........................................................................................... 11
3.5 TIMING CHARACTERISTICS ......................................................................... 12
4 OPTICAL SPECIFICATION.................................................................................. 16
4.1 OPTICAL CHARACTERISTICS....................................................................... 16
5 FUNCTIONAL SPECIFICATION ......................................................................... 17
5.1 COMMANDS ..................................................................................................... 17
5.2 POWER DOWN AND UP SEQUENCE............................................................. 17
5.3 RESET CIRCUIT................................................................................................ 17
5.4 ACTUAL APPLICATION EXAMPLE .............................................................. 18
6 PACKAGING ............................................................................................................ 19
6.1 LABELLING AND MARKING ......................................................................... 19
7 QUALITY ASSURANCE SPECIFICATION ........................................................ 20
7.1 CONFORMITY .................................................................................................. 20
7.2 DELIVERY ASSURANCE ................................................................................ 20
7.3 DEALING WITH CUSTOMER COMPLAINTS ............................................... 25
8 RELIABILITY SPECIFICATION ......................................................................... 26
8.1 RELIABILITY TESTS ....................................................................................... 26
8.2 LIFE TIME.......................................................................................................... 26
9 HANDLING PRECAUTIONS................................................................................. 27
Product No.
Copyright ©2008 DENSITRON TECHNOLOGIES plc. All rights reserved. – Proprietary Data
DD-25664BE-3A REV. B
Page 2 / 27
REVISION RECORD
Rev. Date Page Chapt. Comment ECR no.
A 27/05/08 -- -- Initial Release
B 11/06/08 10
Change in pin no 29, VCC description
Product No.
Copyright ©2008 DENSITRON TECHNOLOGIES plc. All rights reserved. – Proprietary Data
DD-25664BE-3A REV. B
Page 3 / 27
1 MAIN FEATURES
ITEM CONTENTS
Display Format 256 x 64 Dots
Colour Light Blue Monochrome
Overall Dimensions
88.00 (W) × 27.80 (H) × 2.00 (D) mm
Viewing Area 78.78 (W) x 21.18 (H) mm
Screen Size 3.12”
Mode Passive Matrix
Duty ratio 1/64
Driver IC SSD1322
Operating temperature -30°C ~ +85°C
Storage temperature -40°C ~ +90°C
Product No.
Copyright ©2008 DENSITRON TECHNOLOGIES plc. All rights reserved. – Proprietary Data
DD-25664BE-3A REV. B
Page 4 / 27
2 MECHANICAL SPECIFICATION
2.1 MECHANICAL CHARACTERISTICS
ITEM CHARACTERISTIC UNIT
Display Format 256 x 64 Dots
Overall Dimensions
88.00 (W) × 27.80 (H) × 2.00 (D)
mm
Viewing Area 78.78 (W) x 21.18 (H) mm mm
Active Area 76.78 (W) x 19.18 (H) mm
Dot Size 0.28 (W) 0.28 (H) Mm
Dot Pitch 0.30 (W) x 0.30 (H) Mm
Weight 9.95 G
IC Controller/Driver SSD1322
Product No.
Copyright ©2008 DENSITRON TECHNOLOGIES plc. All rights reserved. – Proprietary Data
DD-25664BE-3A REV. B
Page 5 / 27
2.2 MECHANICAL DRAWING
Product No.
Copyright ©2008 DENSITRON TECHNOLOGIES plc. All rights reserved. – Proprietary Data
DD-25664BE-3A REV. B
Page 6 / 27
3 ELECTRICAL SPECIFICATION
3.1 ABSOLUTE MAXIMUM RATINGS
Item Symbol Min Max Unit Note
Supply Voltage for Operation Supply Voltage for Logic Supply Voltage for I/O pins Supply Voltage for Display Operating Current for V
CC
V
-0.3 4 V 1, 2
CI
V
-0.5 2.75 V 1, 2
DD
V
-0.5 VCI V 1, 2
DDIO
V
-0.5 16 V 1, 2
CC
I
- 55 mA 1,2
CC
Operating Temperature TOP -30 +85 °C
Storage Temperature T
-40 +90 °C
STG
Static Electricity Be sure that you are grounded when handling displays.
Note 1: All the above voltages are on the basis of “VSS = 0V”. Note 2: When this module is used beyond the above absolute maximum ratings,
permanent breakage of the module may occur. Also, for normal operations, it is desirable to use this module under the conditions according to Section 3.2 “Electrical Characteristics”. If this module is used beyond these conditions, malfunctioning of the module can occur and the reliability of the module may deteriorate.
Product No.
Copyright ©2008 DENSITRON TECHNOLOGIES plc. All rights reserved. – Proprietary Data
DD-25664BE-3A REV. B
Page 7 / 27
3.2 ELECTRICAL CHARACTERISTICS
Item Symbol Condition Min Typ Max Unit
Supply Voltage for Operation Supply Voltage for Logic Supply Voltage for I/O Pins Supply Voltage for Display
High Level Input VIH 0.8xV
2.4 2.8 3.5 V
V
CI
V
2.4 2.5 2.6 V
DD
V
1.65 1.8 V
DDIO
V
Note 3 11.5 12 12.5 V
CC
-- V
DDIO
DDIO
Low Level Input VIL 0 -- 0.2xV
I
=100µA,
High Level Output V
Low Level Output V
Operating Current for V
CI
Operating Current for V
CC
OH
OL
I
CI
ICC
OUT
3.3MHz
I
=100µA,
OUT
3.3MHz
0.9xV
-- V
DDIO
DDIO
0 -- 0.1xV
Note 4 - 1.8 2.25 mA
Note 5 - 1.8 2.25 mA
Note 4 - 26.3 32.9 mA
Note 5 - 41.1 51.4 mA
CI
V
V
V
DDIO
V
V
DDIO
Sleep Mode Current for V
CI
Sleep Mode Current for V
CC
I
CI,SLEEP
I
CC,SLEEP
- 1 5 µA
- 1 5 µA
Note 3: Brightness (L
) and Supply Voltage for Display (VCC) are subject to the change of
br
panel characteristics and the customer’s request.
Note 4: V
= 2.8V, VCC = 12V, 50% Display Area Turn on.
CI
Note 5: V
= 2.8V, VCC = 12V, 100% Display Area Turn on.
CI
Product No.
Copyright ©2008 DENSITRON TECHNOLOGIES plc. All rights reserved. – Proprietary Data
DD-25664BE-3A REV. B
Page 8 / 27
3.3 INTERFACE PIN ASSIGNMENT
No. Symbol I/O Function
RReesseerrvveedd PPiinn ((SSuuppppoorrttiinngg PPiinn))..
1 N.C. (GND) --
The supporting pins can reduce the influences from stresses on the function pins. This pin must be connected to external ground.
GGrroouunndd ooff LLooggiicc CCiirrccuuiitt
2 VSS P
This is a ground pin. It also acts as a reference for the logic pins. It must be connected to external ground
PPoowweerr SSuuppppllyy ffoorr OOEELL PPaanneel
3 VCC P
This is the most positive supply pin of the chip. They must be connected to external source.
VVoollttaaggee OOuuttppuutt HHiigghh LLeevveell ffoorr CCOOMM SSiiggnnaal
4 VCOMH P
5 VLSS P
This pin is the input pin for the voltage output high level for COM signals. A tantalum capacitor should be connected between this pin and VSS.
GGrroouunndd ooff AAnnaalloogg CCiirrccuuiitt
This is analog ground pin. It should be connected to VSS externally
HHoosstt DDaattaa IInnppuutt//OOuuttppuutt BBuus
These pins are 8-bit bi-directional data bus to be connected to the microprocessors data bus. When serial mode is selected, D1 will be
6~13 D7~D0 I/O
the serial data input SDIN and D0 will be the serial clock input SCLK. Unused pins must be connected to VSS except for D2 in serial mode.
RReeaadd//WWrriittee EEnnaabbllee oorr RReeaadd
This pin is MCU interface input. When interfacing to a 68XX-series microprocessor, this pin will be used as the Enable (E) signal. Read/write operation is initiated when this pin is pulled high and
14 E/RD# I
the CS# is pulled low. When connecting to an 80XX-microprocessor, this pin receives the Read (RD#) signal. Data read operation is initiated when this pin is low and CS# is pulled low. When serial mode is selected, this pin must be connected to VSS.
RReeaadd//WWrriittee SSeelleecctt oorr WWrriittee
This pin is MCU interface input. When interfacing to a 68XX-series microprocessor, this pin will be used as Read/Write (R/W#) selection input. Pull this pin to “High” for read mode and pull it
15 R/W# I
“Low” for write mode. When 80XX interface mode is selected, this pin will be the Write (WR#) input. Data write operation is initiated when this pin is pulled low and the CS# is pulled low. When serial mode is selected, this pin must be connected to VSS.
CCoommmmuunniiccaattiinngg PPrroottooccooll SSeelleecctt
These pins are MCU interface selection input. See the following table:
16 17
BS0 BS1
I
l
l
s
BS0 BS1 3-wire SPI 1 0 4-wire SPI 0 0
8-bit 68XX Parallel 1 1 8-bit 80XX Parallel 0 1
Product No.
Copyright ©2008 DENSITRON TECHNOLOGIES plc. All rights reserved. – Proprietary Data
DD-25664BE-3A REV. B
Page 9 / 27
18 D/C# I
19 CS# I
20 RES# II
21 FR OO
22 IREF II
23 N.C. --
24 VDDIO PP
25 VDD PP
26 VCI PP
27 VSL PP
28 VLSS PP
29 VCC II
30 N.C. (GND) --
DDaattaa//CCoommmmaanndd CCoonnttrrooll
This pin is Data/Command control pin. When the pin is pulled high, the input at D7~D0 is treated as display data. When the pin is pulled low, the input at D7~D0 will be transferred to the command register. For detailed relationship to MCU interface signals, please refer to the Timing Characteristics Diagrams
CChhiipp SSeelleecctt
This pin is the chip select input. When the pin is enabled for MCU communication only when CS# is pulled low..
PPoowweerr RReesseett ffoorr CCoonnttrroolllleerr aanndd DDrriivveerr
This pin is reset signal input. When the pin is low, initialization of the chip is executed.
CCaassccaaddee AApppplliiccaattiioonn CCoonnnneeccttiioonn PPiinn
This pin is No Connection pins. Nothing should be connected to this pin. It should be left open individually.
CCuurrrreenntt RReeffeerreennccee ffoorr BBrriigghhttnneessss AAddjjuussttmmeenntt
This pin is segment current reference pin. A resistor should be connected between this pin and VSS. Set the current lower than
µA
10
RReesseerrvveedd PPiinn
The N.C. pin between function pins are reserved for compatible and flexible design.
PPoowweerr SSuuppppllyy ffoorr II//OO PPiinn
This pin is a power supply pin of I/O buffer. It should be connected to VDD or external source. All I/O signals should have VIH reference to VDDIO. When I/O signal pins (BS0~BS1, D0~D7, control signals…) pull high, they should be connected to VDDIO.
PPoowweerr SSuuppppllyy ffoorr CCoorree LLooggiicc CCiirrccuuiitt
This is a voltage supply pin. It can be supplied externally (within the range of 2.4~2.6V) or regulated internally from VCI. A capacitor should be connected between this pin & VSS under all circumstances.
PPoowweerr SSuuppppllyy ffoorr OOppeerraattiioonn
This is a voltage supply pin. It must be connected to external source & always be equal or higher than VDD & VDDIO.
VVoollttaaggee OOuuttppuutt LLooww LLeevveell ffoorr SSEEGG SSiiggnnaall
This is segment voltage reference pin. When external VSL is not used, this pin should be left open. When external VSL is used, this pin should connect with resistor and diode to ground.
GGrroouunndd ooff AAnnaalloogg CCiirrccuuiitt
This is the analog ground pin. It should be connected to VSS externally
PPoowweerr SSuuppppllyy ffoorr OOEELL PPaanneel
This is the most positive supply pin of the chip. This should be connected to external source.
RReesseerrvveedd PPiinn ((SSuuppppoorrttiinngg PPiinn))..
The supporting pins can reduce the influences from stresses on the function pins. This pin must be connected to external ground.
l
Product No.
Copyright ©2008 DENSITRON TECHNOLOGIES plc. All rights reserved. – Proprietary Data
DD-25664BE-3A REV. B
Page 10 / 27
3.4 BLOCK DIAGRAM
MCU Interface Selection: BS0 and BS1 Pins connected to MCU interface: D7~D0, E/RD#, R/W#, D/C#, CS#, and RES#
C1, C3, C5: 0.1F C2, C4: 4.7F C6: 10F C7: 1F C8: 4.7uF / 25V Tantalum Capacitor R1: 680k, R1 = 680k, R1= (Voltage at IREF – VSS) / IREF R2: 50, 1/4W D1: 1.4V, 0.5W
Product No.
Copyright ©2008 DENSITRON TECHNOLOGIES plc. All rights reserved. – Proprietary Data
DD-25664BE-3A REV. B
Page 11 / 27
3.5 TIMING CHARACTERISTICS
3.5.1 68XX-Series MPU Parallel Interface Timing Characteristics:
Symbol Description Min Max Unit
t
Clock Cycle Time 300 - ns
cycle
tAS
tAH Address Hold Time 0 - ns
t
Write Data Setup Time 40 - ns
DSW
t
Write Data Hold Time 7 - ns
DHW
t
Read Data Hold Time 20 - ns
DHR
tOH Output Disable Time - 70 ns
t
Access Time - 140 ns
ACC
Address Setup Time 10
- ns
PW
PW
CSL
CSH
Chip Select Low Pulse Width (Read)
Chip Select Low Pulse Width (Write)
Chip Select High Pulse Width (Read)
Chip Select High Pulse Width (Write)
120
60
60 60
- ns
- ns
tR Rise Time - 15 ns
tF Fall Time - 15 ns
(V
DD-VSS
= 2.4V to 2.6V, V
= 1.6V, VCI = 2.8V, Ta = 25°C)
DDIO
Product No.
Copyright ©2008 DENSITRON TECHNOLOGIES plc. All rights reserved. – Proprietary Data
DD-25664BE-3A REV. B
Page 12 / 27
3.5.2 80XX-Series MPU Parallel Interface Timing Characteristics:
Symbol Description Min Max Unit
t
Clock Cycle Time 300 - ns
cycle
t
AS
tAH Address Hold Time 0 - ns
t
DSW
t
DHW
t
DHR
tOH Output Disable Time - 70 ns
t
ACC
t
PWLR
t
PWLW
Address Setup Time 10
- ns
Write Data Setup Time 40 - ns
Write Data Hold Time 7 - ns
Read Data Hold Time 20 - ns
Access Time
-
140
ns
Read Low Time 150 - ns
Write Low Time 60 - ns
t
Read High Time 60 - ns
PWHR
t
PWHW
tCS
t
CSH
t
CSF
Write High Time 60
Chip Select Setup Time 0
Chip Select Hold Time to Read Signal Chip Select Hold Time 20
0
- ns
- ns
- ns
- ns
tR Rise Time - 15 ns
tF Fall Time - 15 ns
(VDD-VSS = 2.4V to 2.6V, V
= 1.6V, VCI = 2.8V, Ta = 25°C)
DDIO
Product No.
Copyright ©2008 DENSITRON TECHNOLOGIES plc. All rights reserved. – Proprietary Data
DD-25664BE-3A REV. B
Page 13 / 27
3.5.3 Serial Interface Timing Characteristics: (4-wire SPI)
Symbol Description Min Max Unit
t
Clock Cycle Time 100 - ns
cycle
tAS
tAH Address Hold Time 15 - ns
t
CSS
t
CSH
t
DSW
t
DHW
t
CLKL
t
CLKH
tR Rise Time - 15 ns
tF Fall Time - 15 ns
Address Setup Time 15
- ns
Chip Select Setup Time 20 - ns
Chip Select Hold Time 10
Write Data Setup Time 15
- ns
- ns
Write Data Hold Time 15 - ns
Clock Low Time 20 - ns
Clock High Time 20 - ns
(VDD-VSS = 2.4V to 2.6V, V
= 1.6V, VCI = 2.8V, Ta = 25°C)
DDIO
Product No.
Copyright ©2008 DENSITRON TECHNOLOGIES plc. All rights reserved. – Proprietary Data
DD-25664BE-3A REV. B
Page 14 / 27
3.5.4 Serial Interface Timing Characteristics: (3-wire SPI)
Symbol Description Min Max Unit
t
Clock Cycle Time 100 - ns
cycle
tAS
tAH Address Hold Time 15 - ns
t
CSS
t
CSH
t
DSW
t
DHW
t
CLK
t
CLKH
tR Rise Time - 15 ns
Address Setup Time 15
- ns
Chip Select Setup Time 20 - ns
Chip Select Hold Time 10
Write Data Setup Time 15
- ns
- ns
Write Data Hold Time 15 - ns
L Clock Low Time 20 - ns
Clock High Time 20 - ns
tF Fall Time - 15 ns
(VDD-VSS = 2.4V to 2.6V, V
= 1.6V, VCI = 2.8V, Ta = 25°C)
DDIO
Product No.
Copyright ©2008 DENSITRON TECHNOLOGIES plc. All rights reserved. – Proprietary Data
DD-25664BE-3A REV. B
Page 15 / 27
4 OPTICAL SPECIFICATION
4.1 OPTICAL CHARACTERISTICS
Characteristics Symbol Conditions Min Typ Max Unit
Brightness Lbr
C.I.E. (Yellow)
(x) (y)
Dark Room Contrast CR -
With Polarizer
(Note 3)
Without Polarizer
60 80 - cd/m
0.12
0.22
0.16
0.26
>2000:1
View Angle >160 - -
Note 3: Optical measurement taken at VCI = 2.8V, VCC = 12V
0.20
0.30
-
degree
2
Product No.
Copyright ©2008 DENSITRON TECHNOLOGIES plc. All rights reserved. – Proprietary Data
DD-25664BE-3A REV. B
Page 16 / 27
5 FUNCTIONAL SPECIFICATION
5.1 COMMANDS
Refer to the Technical Manual for the SSD1322
5.2 POWER DOWN AND UP SEQUENCE
To protect the panel and extend the panel life time, the driver IC power up/down routine should include a delay period between high voltage and low voltage power sources during turn on/off. Such that panel has enough time to charge and discharge before/after operation.
5.2.1 Power up Sequence:
1. Power up V
2. Send Display off command
3. Initialization
4. Clear Screen
5. Power up V
6. Delay 100ms (when V
7. Send Display on command
CI
CC
& V
DDIO
is stable)
CC
5.2.2 Power down Sequence:
1. Send Display off command
2. Power down V
3. Delay 100ms (when V 0 and panel is completely discharges)
4. Power down V
5.3 RESET CIRCUIT
When RES# input is low, the chip initialized with the following status:
1. Display is OFF
2. 480x128 Display Mode
3. Normal segment and display data column and row address mapping (SEG0
mapped to column address 00h and COM0 mapped to row address 00h)
4. Display start line is set at display RAM address 0
5. Column address counter is set at 0
6. Normal scan direction of the COM outputs
7. Contrast control registers is set at 7Fh
Product No.
Copyright ©2008 DENSITRON TECHNOLOGIES plc. All rights reserved. – Proprietary Data
CC
is reach
CC
& V
CI
DD-25664BE-3A REV. B
DDIO
Page 17 / 27
5.4 ACTUAL APPLICATION EXAMPLE
Command usage and explanation of an actual example
<Initialization>
If the noise is accidentally occurred at the displaying window during the operation, please reset the display in order to recover the display function.
Product No.
Copyright ©2008 DENSITRON TECHNOLOGIES plc. All rights reserved. – Proprietary Data
DD-25664BE-3A REV. B
Page 18 / 27
6 PACKAGING
6.1 LABELLING AND MARKING
Product No.
Copyright ©2008 DENSITRON TECHNOLOGIES plc. All rights reserved. – Proprietary Data
DENSITRON DD-25664BE-3A TW YYMM
DD-25664BE-3A REV. B
Page 19 / 27
7 QUALITY ASSURANCE SPECIFICATION
7.1 CONFORMITY
The performance, function and reliability of the shipped products conform to the Product Specification.
7.2 DELIVERY ASSURANCE
7.2.1 Delivery inspection standards
IPC-AA610 rev. C, class 2 electronic assemblies standard
7.2.2 Zone definition
A Viewing area
B Outside viewing area
Product No.
Copyright ©2008 DENSITRON TECHNOLOGIES plc. All rights reserved. – Proprietary Data
DD-25664BE-3A REV. B
Page 20 / 27
7.2.3 Visual inspection
Inspect under 30W fluorescent lamp leaving 50 cm between the module and the
lamp and 30 cm between the module and the eye (measuring position).
Appearance is inspected at the best contrast voltage (best contrast is adjusted
considering clearness and crosstalk on screen).
Inspect the module at 45° right and left, top and bottom.
Use the optimum viewing angle during the contrast inspection.
eye
45°45°
Product No.
Copyright ©2008 DENSITRON TECHNOLOGIES plc. All rights reserved. – Proprietary Data
DD-25664BE-3A REV. B
Page 21 / 27
7.2.3.1 Standard of appearance inspection
Units: mm
Class Item Criteria
Minor Outside & inside package Presence of product no., lot no., quantity
Critical
Major Dimension Product dimensions must be according to specification and drawing
Major Electrical Product electrical characteristics must be according to specification
Critical LCD
Minor Black spot,
Minor Polariser
Packing &
Label
Display
white spot,
dust
scratch
bubble
Product must not be mixed with others and quantity must not be different from that indicated on the label
Missing lines or wrong patterns on LCD display are not allowed
Round type: as per following drawing = (X+Y)/2 Acceptable quantity Size Zone A Zone B
Line type: as per following drawing Acceptable quantity Length Width Zone A Zone B
- - W0.05 Any number L2.0 W0.1 3 L>2.0 0
Total acceptable quantity: 3
Scratch on protective film is permitted Minor Polariser Scratch on polariser: same as No. 1 = (X+Y)/2 Acceptable quantity Size Zone A Zone B
Total acceptable quantity: 3
<0.1
0.1<∅<0.2
0.2<∅<0.25
0.25<
<0.5
>0.5
Any number
3 1 0
Any number
0
Any number
Any number
Any number
Product No.
Copyright ©2008 DENSITRON TECHNOLOGIES plc. All rights reserved. – Proprietary Data
DD-25664BE-3A REV. B
Page 22 / 27
Class Item Criteria
Minor Segment
deformation
Minor Panel
Chipping
1b. Pin hole on dot matrix display
Acceptable quantity
Size a,b<0.1 Any number (a+b)/20.1 Any number
0.5<∅<1.0
3
Total acceptable quantity: 7
2. Segments / dots with different width
Acceptable ab a/b4/3 a<b a/b>4/3
3. Alignment layer defect = (a+b)/2
Acceptable quantity
Size
0.4
0.4<1.0
1.0<1.5
1.5<2.0
Total acceptable quantity: 7
Any number
5 3 2
X 1/6 Panel length Y 1 Z T
Minor Panel
Cracking
Minor Cupper
Cracks not allowed
Not allowed if visible by eye inspection exposed (pin or film)
Minor Film or
Not allowed if affects electrical function Trace Damage
Product No.
DD-25664BE-3A REV. B
Page 23 / 27
Copyright ©2008 DENSITRON TECHNOLOGIES plc. All rights reserved. – Proprietary Data
Class Item Criteria
Minor Contact
Lead Twist Not allowed
Minor Contact
Lead
Not allowed Broken
Minor Contact
Lead Bent
Not allowed if
bent lead causes
short circuit
Not allowed if bent lead
extends horizontally
more than 50%
of its width
Minor Colour
Level of sample for approval set as limit sample uniformity
Major No unmelted solder paste should be present on PCB
PCB
Critical Cold solder joints, missing solder connections, or oxidation are not allowed Minor No residue or solder balls on PCB are allowed Critical Minor Tray
particles
Short circuits on components are not allowed
Size Quantity
On tray
On display
<0.2 >0.25 ∅≥0.25
L = 3 1
Any number
4 2
Product No.
DD-25664BE-3A REV. B
Page 24 / 27
Copyright ©2008 DENSITRON TECHNOLOGIES plc. All rights reserved. – Proprietary Data
7.3 DEALING WITH CUSTOMER COMPLAINTS
7.3.1 Non-conforming analysis
Purchaser should supply Densitron with detailed data of non-conforming sample. After accepting it, Densitron should complete the analysis in two weeks from receiving the sample. If the analysis cannot be completed on time, Densitron must inform the purchaser.
7.3.2 Handling of non-conforming displays
If any non-conforming displays are found during customer acceptance inspection which Densitron is clearly responsible for, return them to Densitron. Both Densitron and customer should analyse the reason and discuss the handling of non­conforming displays when the reason is not clear. Equally, both sides should discuss and come to agreement for issues pertaining to modification of Densitron quality assurance standard.
Product No.
Copyright ©2008 DENSITRON TECHNOLOGIES plc. All rights reserved. – Proprietary Data
DD-25664BE-3A REV. B
Page 25 / 27
8 RELIABILITY SPECIFICATION
8.1 RELIABILITY TESTS
Test Item Test Condition Evaluation and assessment
High Temperature Operation 85°C, 500 hrs
Low Temperature Operation -30°C, 500 hrs
High Temperature Storage 90°C, 500 hrs
Low Temperature Storage -40°C, 500 hrs
High Temperature & High Humidity Storage
Thermal Shock Storage
60°C, 90% RH, 500 hrs
-40°C 85°C, 100 cycles 30 min. dwell
The brightness should be greater than 50% of the initial brightness. The operational functions work.
All operation tests are conducted in all display on pattern.
The samples used for above tests do not include polarizer.
No moisture condensation is observed during tests.
8.1.1 FAILURE CHECK STANDARD
After the completion of the described reliability test, the samples were left at room temperature for 2 hrs prior to conducting the failure teat at 23±5 °C55±15% RH
8.2 LIFE TIME
Item Description
Function, performance, appearance, etc. shall be free from remarkable deterioration within 10,000 hours under ordinary operating and storage conditions of room
1
temperature (25±10 °C), normal humidity (45±20% RH), and in area not exposed to direct sunlight.
2 End of lifetime is specified as 50% of initial brightness.
Product No.
Copyright ©2008 DENSITRON TECHNOLOGIES plc. All rights reserved. – Proprietary Data
DD-25664BE-3A REV. B
Page 26 / 27
9 HANDLING PRECAUTIONS
Safety
If the panel breaks, be careful not to get the organic substance in your mouth or in your eyes. If the organic substance touches your skin or clothes, wash it off immediately using soap and plenty of water.
Mounting and Design
Place a transparent plate (e.g. acrylic, polycarbonate or glass) on the display surface to protect the display from external pressure. Leave a small gap between the transparent plate and the display surface. Design the system so that no input signal is given unless the power supply voltage is applied.
Caution during OLED cleaning
Lightly wipe the display surface with a soft cloth soaked with Isopropyl alcohol, Ethyl alcohol or Trichlorotriflorothane. Do not wipe the display surface with dry or hard materials that will damage the polariser surface. Do not use aromatic solvents (toluene and xylene), or ketonic solvents (ketone and acetone).
Caution against static charge
As the display uses C-MOS LSI drivers, connect any unused input terminal to V input any signals before power is turned on. Also, ground your body, work/assembly table and assembly equipment to protect against static electricity.
Packaging
Displays use OLED elements, and must be treated as such. Avoid strong shock and drop from a height. To prevent displays from degradation, do not operate or store them exposed directly to sunshine or high temperature/humidity.
Caution during operation
It is indispensable to drive the display within the specified voltage limit since excessive voltage shortens its life.
Other Precautions
When a display module is operated for a long of time with fixed pattern may remain as an after image or slight contrast deviation may occur. Nonetheless, if the operation is interrupted and left unused for a while, normal state can be restored. Also, there will be no problem in the reliability of the module.
Storage
Store the display in a dark place where the temperature is 25°C ± 10°C and the humidity below 50%RH. Store the display in a clean environment, free from dust, organic solvents and corrosive gases. Do not crash, shake or jolt the display (including accessories).
or VSS. Do not
DD
Product No.
DD-25664BE-3A REV. B
Page 27 / 27
Copyright ©2008 DENSITRON TECHNOLOGIES plc. All rights reserved. – Proprietary Data
Loading...