Static Electricity Be sure that you are grounded when handling displays.
Note 1: All the above voltages are on the basis of “GND = 0V”.
Note 2: When this module is used beyond the above absolute maximum ratings,
permanent breakage of the module may occur. Also, for normal operations, it is
desirable to use this module under the conditions according to Section 3.2
“Electrical Characteristics”. If this module is used beyond these conditions,
malfunctioning of the module can occur and the reliability of the module may
deteriorate.
These are the constant voltage supply pins. When display is not
active, the row output pins are pulled-up to the voltage supplied on
the two pins. They are supplied externally.
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This pin is outputted to slave device and/or the specified row driver.
It should be left open individually.
The “VSYNC” and “HSYNC” pins, both inputs and outputs, are
connected for synchronous operation. These should be left open
individually.
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This pin is the feedback signal for voltage regulation loop. It is
used to adjust the booster output voltage level (VPP). In case of
VSENSE feedback disconnection the Driver is switched off.
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The output of the amplifier VCOMP is externally available for
compensation. It is necessary when the DC/DC converter works in
PWM constant frequency mode. PFM constant ton mode does not
need a compensation network.
These are the constant current supply pins. They are supplied
externally.
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This pin is the feedback signal for voltage regulation loop. It is
used to adjust the booster output voltage level (VPP). In case of
VHSENSE feedback disconnection, VPP voltage rises up to the
value fixed by the external resistor divider.
These are the constant voltage supply pins. They are supplied
externally.
-
This pin is the detection of voltage difference between C1 and
C256.
These are the current reference pins. It is possible to set two
different reference current values for the odd (1) and even (2)
outputs by connecting two different resistor values. With input
CMODE, it is also to use only the reference current established on
pin VREF1. These are supplied externally.
This is the voltage supply pins. It must be connected to external
source.
It also acts as the reference for the logic pins. It must be connected
to external ground.
This pin is MCU interface selection input. The parallel interface is
active when P/S is high; the serial interface activates when P/S is
low
.
This pin is the control schemes selection input of the embedded
booster circuit. The DC/DC converter works in PFM constant ton
mode while it is connected to VDD. The DC/DC converter works in
PWM constant frequency mode while it is connected to ground.
This pin is the display colors selection input. It corresponds to
“Two” color display panel. A setup of another output current value
is possible for an odd number pin and the even number pins of each
with two reference current.
This pin is internal clock enable. When this pin is pulled high, an
internal oscillation stable circuit is used. The internal clock will be
disabled when it is pulled low, an external clock source must be
connected for normal operation.
This pin is the Primary/Secondary selection input. The function is
synchronous operation, which is the direction of the cathode. This
pin must be pulled high to enable the chip function as primary.
This pin is the Master/Slave selection input. The function is
synchronous operation, which is the direction of the anode. This
pin must be pulled high to enable the chip function as master.
This pin is reset signal input. When the pin is low, initialization of
the chip is executed.
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These pins are 8-bit parallel bus to be connected to the
microprocessor’s data bus. When serial mode is selected, DIN[7]
will be the serial data input (SIN) and DIN[6] will be the serial clock
input (SCLI).
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This pin is Data/Command control pin. When the pin is pulled
high, the data at DIN[7]~DIN[0] is treated as display data. When
the pin is pulled low, the data at DIN[7]~DIN[0] will be transferred
to the command register. For detail relationship to MCU interface
signals, please refer to the Timing Characteristics Diagrams.
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This pin is MCU interface input. Data write operation is initiated
when this pin is pulled low and the chip is selected.
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The two pins are the chip select input. The CS1 is activated for
Primary/Secondary Master devices. The CS2 is activated for
Primary/Secondary Slave devices.
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It also acts as the reference for the logic pins. It must be connected
to external ground.
These are the constant voltage supply pins. When display is not
active, the row output pins are pulled-up to the voltage supplied on
the two pins. They are supplied externally.
To protect the panel and extend the panel life time, the driver IC power up/down routine
should include a delay period between high voltage and low voltage power sources during
turn on/off. Such that panel has enough time to charge up or discharge before/after
operation.
5.2.1 Power up Sequence:
1. Power up VDD
2. Send Display off command
3. Clear Screen
4. Power up V
PP
5. Delay 100ms (when VDD is stable)
6. Send Display on command
5.2.2 Power down Sequence:
1. Send Display off command
2. Power down VPP
3. Delay 100ms (when VPP is reach
0 and panel is completely discharges)
4. Power down VDD
5.3 RESET CIRCUIT
At the time of RST signal input…
Oscillator: Off
DC/DC Converter: Off
Column & Row Driver: V
All Registers: Default Value
At the time of RST signal release or software reset completion (200ns maximum
after F2h command sending)…
Oscillator: On
DC/DC Converter: Off (Waiting for a Command)
Column & Row Driver: VSS (Waiting for a Command)
All Registers: Default Value (Waiting for a Command)
Level of sample for approval set as limit sample
uniformity
Major No unmelted solder paste should be present on PCB
PCB
Critical Cold solder joints, missing solder connections, or oxidation are not allowed
Minor No residue or solder balls on PCB are allowed
Critical
Minor Tray
Purchaser should supply Densitron with detailed data of non-conforming sample.
After accepting it, Densitron should complete the analysis in two weeks from receiving the
sample.
If the analysis cannot be completed on time, Densitron must inform the purchaser.
7.3.2 Handling of non-conforming display s
If any non-conforming displays are found during customer acceptance inspection which
Densitron is clearly responsible for, return them to Densitron.
Both Densitron and customer should analyse the reason and discuss the handling of nonconforming displays when the reason is not clear.
Equally, both sides should discuss and come to agreement for issues pertaining to
modification of Densitron quality assurance standard.
Test Item Test Condition Evaluation and assessment
High Temperature Operation 85°C, 500 hrs
Low Temperature Operation -30°C, 500 hrs
High Temperature Storage 90°C, 500 hrs
Low Temperature Storage -40°C, 500 hrs
High Temperature & High
Humidity Storage
Thermal Shock Storage
60°C, 90% RH, 500 hrs
-40°C ↔85°C, 100 cycles
30 min. dwell
The brightness should be
greater than 50% of the
initial brightness. The
operational functions work.
• All operation tests are conducted in all display on pattern.
• The samples used for above tests do not include polarizer.
• No moisture condensation is observed during tests.
8.1.1 FAILURE CHECK STANDARD
After the completion of the described reliability test, the samples were left at room
temperature for 2 hrs prior to conducting the failure teat at 23±5 °C55±15% RH
8.2 LIFE TIME
Item Description
Function, performance, appearance, etc. shall be free from remarkable deterioration
within 15,000 hours under ordinary operating and storage conditions of room
1
temperature (25±10 °C), normal humidity (45±20% RH), and in area not exposed to
direct sunlight.
2 End of lifetime is specified as 50% of initial brightness.
If the panel breaks, be careful not to get the organic substance in your mouth or in your eyes.
If the organic substance touches your skin or clothes, wash it off immediately using soap and
plenty of water.
Mounting and Design
Place a transparent plate (e.g. acrylic, polycarbonate or glass) on the display surface to protect the
display from external pressure. Leave a small gap between the transparent plate and the display
surface.
Design the system so that no input signal is given unless the power supply voltage is applied.
Caution during OLED cleaning
Lightly wipe the display surface with a soft cloth soaked with Isopropyl alcohol, Ethyl alcohol or
Trichlorotriflorothane.
Do not wipe the display surface with dry or hard materials that will damage the polariser surface.
Do not use aromatic solvents (toluene and xylene), or ketonic solvents (ketone and acetone).
Caution against static charge
As the display uses C-MOS LSI drivers, connect any unused input terminal to V
input any signals before power is turned on.
Also, ground your body, work/assembly table and assembly equipment to protect against static
electricity.
Packaging
Displays use OLED elements, and must be treated as such. Avoid strong shock and drop from a
height.
To prevent displays from degradation, do not operate or store them exposed directly to sunshine or
high temperature/humidity.
Caution during operation
It is indispensable to drive the display within the specified voltage limit since excessive voltage
shortens its life.
Other Precautions
When a display module is operated for a long of time with fixed pattern may remain as an after
image or slight contrast deviation may occur.
Nonetheless, if the operation is interrupted and left unused for a while, normal state can be
restored. Also, there will be no problem in the reliability of the module.
Storage
Store the display in a dark place where the temperature is 25°C ± 10°C and the humidity below
50%RH.
Store the display in a clean environment, free from dust, organic solvents and corrosive gases.
Do not crash, shake or jolt the display (including accessories).