DENSITRON DD-12833BE-1A Product Specification

OLED DISPLAY MODULE

Product Specification

CUSTOMER

PRODUCT

NUMBER

CUSTOMER

APPROVAL

Standard

DD-12833BE-1A

INTERNAL APPROVALS

Product Mgr Doc. Control Electr. Eng

Bruno

Recaldini

Date: 01 Feb. 06 Date: 01 Feb. 06 Date: 18 Jan 06

Anthony

Perkins

Andrea

Pibiri

Date

Appr ov al f or Spe ci f icati on onl y Appr ov al f or Spe ci f icati on and Sam ple

Sample no.: Date: ISIR no.:

FORM No. DT-029

TABLE OF CONTENTS

1 MAIN FEATURES .......................................................................................................... 4

2 MECHANICAL SPECIFICATION...............................................................................5

2.1 MECHANICAL CHARACTERISTICS.................................................................... 5

2.2 MECHANICAL DRAWING..................................................................................... 6

3 ELECTRICAL SPECIFICATION.................................................................................7

3.1 ABSOLUTE MAXIMUM RATINGS ....................................................................... 7

3.2 ELECTRICAL CHARACTERISTICS ...................................................................... 7

3.3 INTERFACE PIN ASSIGNMENT............................................................................ 8

3.4 BLOCK DIAGRAM ................................................................................................ 10

3.5 TIMING CHARACTERISTICS .............................................................................. 11

4 OPTICAL SPECIFICATION....................................................................................... 18

4.1 OPTICAL CHARACTERISTICS............................................................................ 18

5 FUNCTIONAL SPECIFICATION..............................................................................19

5.1 COMMANDS .......................................................................................................... 19

5.2 POWERING SEQUENCES..................................................................................... 19

5.3 INITIALIZATION ................................................................................................... 19

6 PACKAGING AND LABELLING SPECIFICATION.............................................. 20

6.1 PACKAGING .......................................................................................................... 20

6.2 LABELLING & MARKING ................................................................................... 20

7 QUALITY ASSURANCE SPECIFICATION.............................................................21

7.1 CONFORMITY ....................................................................................................... 21

7.2 DELIVERY ASSURANCE ..................................................................................... 21

7.3 DEALING WITH CUSTOMER COMPLAINTS ................................................... 25

8 RELIABILITY SPECIFICATION .............................................................................. 26

8.1 RELIABILITY TESTS ............................................................................................ 26

8.2 LIFE TIME............................................................................................................... 26

9 HANDLING PRECAUTIONS...................................................................................... 27

Product No.

DD-12833BE-1A REV. A

REV.

Page 2 / 27

REVISION RECORD

Rev. Date Page Chapt. Comment ECR no.

A 17 Jan 06 First issue

Product No.

DD-12833BE-1A REV. A

REV.

Page 3 / 27

1 MAIN FEATURES

ITEM CONTENTS

Display Format 128 x 33 dots

Colour Blue Monochrome

Overall Dimensions 62.30 x 22.60 x 2.20 mm

Viewing Area 57.02 x 15.18 mm

Screen Size 2.23”

Mode Passive Matrix

Duty ratio 1/33

Driver IC STV8102

Operating temperature -20~ 70°C

Storage temperature -30~ 80°C

Product No.

DD-12833BE-1A REV. A

REV.

Page 4 / 27

2 MECHANICAL SPECIFICATION

2.1 MECHANICAL CHARACTERISTICS

ITEM CHARACTERISTIC UNIT

Display Format 128 x 33 dots

Overall Dimensions 62.30 x 22.60 x 2.20 mm

Viewing Area 57.02 x 15.18 mm

Active Area

55.02 × 13.18

mm

Dot Size 0.41 x 0.38 mm

Dot Pitch 0.43 x 0.40 mm

Weight 5.7 g

IC Controller/Driver STV8102

Product No.

DD-12833BE-1A REV. A

REV.

Page 5 / 27

2.2 MECHANICAL DRAWING

Scale (5:1)

0.38

0.41

0.43

0.40

2.80 Ref

9.15 Ref

18.00±0.30 (Double Side Tape)

0.20

1.10

2.20 Max

0.70

0.25

0.15 Max

5.00±0.30 (Tag)

1.00±0.50

8.00±0.30 (Remove Tape)

10.00±0.30

Double Side Tape

5.00 (Stiffener)

Glue

2-R0.60±0.05

0.20±0.03

0.80 Max

0.10

Contact Side

1.05±0.20

VDDBG

30

CS0

SD/C

R/W

E

D7

D6 (SDA)

D5 (SCL)

D4 (SCLK)

D3 (SDIN)

D2 (SDOUT)

D1

D0

RST

HSYNC

SEL1

SEL0

VDD_D

GND_D

TEST_MODE

GND_COL

GND_SENSE

VSENSE

EXT_CLOCK

VCAPA_HOLD

VHIGH

VDRIVE

VPP

VCOL_PRE

VROW_OFF

1

27.83±0.20

22.00±0.10

15.50±0.20

57.02 (View Area)

62.30±0.30 (Cap Size)

62.30±0.30 (Panel Size)

55.02 (Active Area)

128 x 33 Pixels

Active Area 2.23"

60.00±0.30 (Polarizer,Double Side Tape)

P0.50X(30-1)=14.50±0.10 (W0.35±0.05)

1.10±0.50

2.39

1.00±0.50

3.39

2.99

1.99

13.18 (Active Area)

15.18 (View Area)

18.00±0.30 (Polarizer)

4.30

5.30

6.45

8.10

12.70

15.80±0.20

Notes:

1. Driver IC: STV8102

2. Die Size: 8730um x 1600um

3. COF Number: 8102UA

4. Interface:

20.10±0.30 (Cap Size)

22.60±0.30 (Panel Size)

Product No.

DD-12833BE-1A REV. A

REV.

Page 6 / 27

8-bit 68XX/80XX Parallel, 4-wire SPI, I2C

The actual assembled total thickness with above materials should be 2.70 Max.

6. The total thickness (2.20 Max) is without polarizer protective film, remove tape & double side tape.

5. General Tolerance: ±0.30

3 ELECTRICAL SPECIFICATION

3.1 ABSOLUTE MAXIMUM RATI NG S

Item Symbol Min Max Unit Note

VSS = 0 V, Ta = 25 °C

Power Supply Voltage V

-0.3 4.6 V 1, 2

DD_D

OLED Power Supply VPP -0.3 22 V 1, 2

Operating Temperature TOP -20 70

Storage Temperature T

-30 80

STG

°C

Static Electricity Be sure that you are grounded when handling displays.

Note 1: All the above voltages are on the basis of “GND = 0V”. Note 2: When this module is used beyond the above absolute maximum ratings, permanent breakage of the module may

occur. Also, for normal operations, it is desirable to use this module under the conditions according to Section

3.2. “Electrical Characteristics”. If this module is used beyond these conditions, malfunctioning of the module can occur and the reliability of the module may deteriorate.

3.2 ELECTRICAL CHARACTERISTICS

VSS = 0 V, Ta = 25 °C

Item Symbol Condition Min Typ Max Unit

Power Supply for Logic V

Input Voltage

OLED Module Driving Voltage

VDD Current IDD

VPP Current IPP

Ta = 25 °C 1.8 3.3 3.6 V

DD_D

VIL Ta = 25 °C GND -

VIH Ta = 25 °C

V

Ta = 25 °C 11 12 13 V

PP

50% Display

Area ON (1)

100% Display

Area ON (1)

50% Display

Area ON (1)

100% Display

Area ON (1)

0.7×V

DD_D

TBD TBD

TBD TBD mA

0.3×V

- V

DD_D

V

DD_D

V

μA

Sleep Mode Current for VDD

Sleep Mode Current for VPP

Note 1: V

Product No.

= 3.3V, VPP = 12V, Frame Rate = 66Hz, Bright Setting = 7Fh

DD_D

I

DD, SLEEP

I

PP, SLEEP

DD-12833BE-1A REV. A

- TBD -

REV.

Page 7 / 27

μA

3.3 INTERFACE PIN ASSIGNMENT

No. Symbol I/O Function

RReeffeerreennccee VVoollttaaggee ffoorr RRooww EElleeccttrrooddee OOffff--MMooddee.

externally or be left open while the reference voltage is internally-

1 VROW_OFF I

2 VCOL_PRE I

3 VPP I

4 VDRIVE O

5 VHIGH I

6

VCAPA_HOLD

7

EXT_CLOCK

I

8 VSENSE I

9

GND_SENSE

I

10 GND_COL I

11

TEST_MODE

I

12 GND_D I

13 VDD_D I

14 SEL0 I

15 SEL1 I

generated. A tank capacitor should be connected to the VROW_OFF pin for external setting. When display is not active, the row output pins are pulled-up to the off-state voltage.

RReeffeerreennccee VVoollttaaggee ffoorr CCoolluummnn EElleeccttrrooddee PPrree--CChhaarrggee S

externally or be left open while the pre-charge voltage is internally generated. A tank capacitor should be connected to the VCOL_PRE pin for external setting

PPoowweerr SSuuppppllyy ffoorr OOLLEEDD PPaanneell.

internally by using internal DC/DC voltage converter.

CCoonnttrrooll SSiiggnnaall ffoorr OOuuttppuutt VVoollttaaggee GGeenneerraattoorr

This output pin drives the gate of external power NMOS.

HHiigghh VVoollttaaggee SStteepp--uupp CCiirrccuuiitt..

regulation loop. It is used to adjust the booster output voltage level (VPP). An internal NMOS transistor connected between pins VHIGH and VDRIVE allows VPP to rise until the voltage on pin VDRIVE (stemming from VPP) is high enough to switch the external NMOS transistor.

PPrree--CChhaarrggee SSuuppppllyy FFiilltteerriinngg..

should be connected between this pin and ground.

EExxtteerrnnaall SSyysstteemm CClloocckk SSoouurrccee..

should be left floating. When internal clock is disabled, this pin receives display clock signal from external clock source.

FFeeeeddbbaacckk SSiiggnnaall..

It is used to adjust the booster output voltage level (VPP). In case of VSENSE feedback disconnection the Driver is switched off.

GGrroouunndd ooff CCuurrrreenntt DDeetteeccttiioonn..

sense. It is used for current detection for step-up circuitry.

GGrroouunndd ooff CCoolluummnn DDrriivveerr..

column electrode. It must be connected to external source on ground level or closed to ground.

TTeesstt MMooddee SSeelleecctt..

connected to ground for normal status.

GGrroouunndd ooff LLooggiicc CCiirrccuuiitt..

reference for the logic pins. It must be connected to external ground.

PPoowweerr SSuuppppllyy ffoorr LLooggiicc CCiirrccuuiitt..

must be connected to external source.

CCoommmmuunniiccaattiinngg PPrroottooccooll SSeelleecctt

68XX-parallel 80XX-parallel SEL0 0 1 1 0 SEL1 1 1 0 0

HHoorriizzoonnttaall SSyynncchhrroonniizzaattiioonn TTrriiggggeerriinngg SSiiggnnaall..

16 HSYNC O

17 RST I

out a signal that could be used to identify the driver status. It should be left open individually.

PPoowweerr RReesseett ffoorr CCoonnttrroolllleerr aanndd DDrriivveerr..

input. When the pin is low, initialization of the chip is executed.

. It can be supplied

Seeqquueennccee..

. It can be supplied externally or generated

This pin is the feedback signal for voltage

This is the voltage supply pin. A capacitor

When internal clock is enabled, this pin

This pin is the feedback signal for voltage regulation loop.

This pin is the feedback signal for current

This is the low level reference voltage for

This is a reserved pin for IC testing. It must be

It can be supplied

This is the ground pin. It also acts as the

This is the voltage supply pin. It

Serial I2C

This pin will send

This pin is reset signal

Product No.

DD-12833BE-1A REV. A

REV.

Page 8 / 27

No. Symbol I/O Function

HHoosstt DDaattaa IInnppuutt//OOuuttppuutt BBuuss..

bus to be connected to the microprocessor’s data bus. When serial mode is

18~25

D0~D7 I/O

selected, D3/D2 will be the serial data input/output (SDIN/SDOUT) and D4 will be the serial clock input (SCLK). When I2C mode is selected, D5 will be the clock signal (SCL) and D6 will be the I2C data input (SDA). Refer to the configuration of I2C interface.

RReeaadd//WWrriittee EEnnaabbllee oorr RReeaadd..

microprocessor, this pin will be used as the Enable (E) signal. Read/write

26 E I

operation is initiated when this pin is pulled high and the CS0 is pulled low. When connecting to an 80XX-microprocessor, this pin receives the Read (RD#) signal. Data read operation is initiated when this pin is pulled low and CS0 is pulled low.

RReeaadd//WWrriittee SSeelleecctt oorr WWrriittee.

microprocessor, this pin will be used as Read/Write (R/W) selection input.

27 R/W I

Read mode will be carried out when this pin is pulled high and write mode when low. When 80XX interface mode is selected, this pin will be the Write (WR) input. Data write operation is initiated when this pin is pulled low and the chip is selected.

DDaattaa//CCoommmmaanndd CCoonnttrrooll.

D7~D0 is treated as display data. When the pin is pulled low, the data at

28 SD/C I

29 CS0 I

30 VDDBG I

D7~D0 will be transferred to the command register. For detail relationship to MCU interface signals, please refer to the Timing Characteristics Diagrams.

CChhiipp SSeelleecctt.

CS0 is pulled low.

PPoowweerr SSuuppppllyy ffoorr LLooww VVoollttaaggee RReeffeerreennccee..

supply pin. It must be connected to external source.

These pins are 8-bit bi-directional data

When interfacing to a 68XX-series

. When interfacing to a 68XX-series

.

.. When the pin is pulled high, the data at

. The chip is enabled for MCU communication only when

This is the voltage

Product No.

DD-12833BE-1A REV. A

REV.

Page 9 / 27

3.4 BLOCK DIAGRAM

Active Area 2.23"

128

MCU Interface Selection: SEL0 and SEL1

Pins connected to MCU interface:

RST, D0~D7, SD/C, WR, and CS0

x 33 Pixels

R32

C0

~~~

R1~R31

C127

STV8102

~

D0D7E

R/W

RST

VSENSE

VHIGH

VCAPA_HOLD

EXT_CLOCK

VCOL_PRE

VPP

VDRIVE

VROW_OFF

HSYNC

VDD_D

GND_SENSE

GND_COL

TEST_MODE

GND_D

SEL1

SEL0

VDDBG

CS0

SD/C

Product No.

DD-12833BE-1A REV. A

REV.

Page 10 / 27

3.5 TIMING CHARACTERISTICS

3.5.1 68XX-Series MPU Parallel Interface Timing Characteristics

Characteristics Symbol Min Typ Max Unit

System Cycle Time Te_cycle 300 - - ns

Write Low Pulse Width Read Low Pulse Width

Te_low

60

120

- - ns

Select High Pulse Width Te_high 60 - - ns

Rise Time Fall Time

Write Data Setup Time Write Data Hold Time

Read Setup to E Rising Edge Read Hold fm E Falling Edge

Data Address Setup Time Data Address Hold Time

CL=100pF

Te_rise

Te_fall

Twrs

Twrh

Trds Trdh

Tdatas

Tdatah

- -

TBD

25 25

50 50

- - ns

15 15

ns

- ns

Data Output from E Rising Edge Tedatout - 20 TBD ns

Data Hiz from E Falling Edge Tedathiz - - TBD ns

Data Hiz from CS0 Rising Edge Tcs0dathiz - - TBD ns

SD/C Setup Time SD/C Hold Time

Tsdcs

Tsdch

TBD

60 60

- ns

Chip Select Setup Time Chip Select Hold Time

Write

Read

Tcs0s

Tcs0h

Tcs0s

Tcs0h

TBD

120

60

120

60

- ns

- - ns

* All the timing should be based on 30% and 70% of VDD-GND.

Product No.

DD-12833BE-1A REV. A

REV.

Page 11 / 27

Timing diagram for Write mode

Timing diagram for Read mode (register only)

Product No.

DD-12833BE-1A REV. A

REV.

Page 12 / 27

3.5.2 80XX-Series MPU Parallel Interface Timing Characteristics:

Characteristics Symbol Min Typ Max Unit

Write Low Pulse Width Read Low Pulse Width

Rise Time

Fall Time

Data Address Setup Time Data Address Hold Time

Data Output from RD Rising Edge

Data Hiz from RD Falling Edge

CL=100pF

Twr_low

Trd_low

Twr_rise

Trd_rise

Twr_fall

Trd_fall

Tdatas Tdatah

60

120

- - ns

- -

25 25

- - ns

15 15

ns

Trddatout - 20 TBD ns

Trddathiz - - TBD ns

Data Hiz from CS0 Rising Edge Tcs0dathiz - - TBD ns

SD/C Setup Time SD/C Hold Time

Chip Select Setup Time Chip Select Hold Time Chip Select Setup Time Chip Select Setup Time

(Read)

(Write)

Tsdcs Tsdch

Tcs0s Tcs0h Tcs0s Tcs0h

TBD

120

60

60 60

120

60

- ns

- - ns

Product No.

DD-12833BE-1A REV. A

REV.

Page 13 / 27

Timing Diagram for Write Mode

Timing Diagram for Read Mode

Product No.

DD-12833BE-1A REV. A

REV.

Page 14 / 27

3.5.3 Serial Interface Timing Characteristics

Description Symbol Min Typ Max Unit

Serial Clock Cycle Time T

Write/Read Low Pulse Width T

Select High Pulse Width T

Rise Time Fall Time

Data Output Time after SCLK Falling Edge T

Data Output Hiz State Time after SCLK Falling Edge T

Data Output Time after CS0 Falling Edge T

Data Output Hiz State Time after CS0 Rising Edge SDIN Setup Time SDIN Hold Time SD/C Setup Time SD/C Hold Time Chip Select Setup Time Chip Select Hold Time

(Write)

sclk_cycle

sclk_low

sclk_high

T

sclk_rise

T

sclk_fall

sclkdatout

sclkdathiz

cs0datout

T

cs0dathiz

T

sdins

T

sdinh

T

sdcs

T

sdch

T

cs0s

T

cs0h

250 - - ns

100 - - ns

- -

15 15

ns

TBD 50 - ns

100 100 150 150 150 150

- - ns

Chip Select Setup before SCLK Rising Edge

(Read)

T

0 - - ns

cs0s

Product No.

DD-12833BE-1A REV. A

REV.

Page 15 / 27

Timing Diagram for Write Mode

Timing diagram for Read mode (register only)

Product No.

DD-12833BE-1A REV. A

REV.

Page 16 / 27

3.5.4 I2C Interface Timing Characteristics

Description Symbol Min Typ Max Unit

Serial Clock Cycle Time T

Write/Read Low Pulse Width T

Select High Pulse Width T

Rise Time Fall Time Data Setup Time Data Hold Time Chip Select Setup Time Chip Select Hold Time

Timing Diagram for Write Mode (Register)

scl_cycle

scl_low

scl_high

T

scl_rise

T

scl_fall

T

datas

T

datah

T

cs0s

T

cs0h

2.5 - -

μs

100 - - ns

- -

100 100 120 120

- - ns

15 15

ns

Timing Diagram for Write Mode (RAM)

Timing Diagram for Read Mode (Register Only)

Product No.

DD-12833BE-1A REV. A

REV.

Page 17 / 27

4 OPTICAL SPECIFICATION

4.1 OPTICAL CHARACTERISTICS

Ta = 25 °C

Item Symbol Condition Min Typ Max Unit Note

Brightness LBR With Polarizer 60 80 - cd/m² Note1

0.12

C.I.E. (Blue)

(x) (y)

Without

Polarizer

0.22

0.12

0.22

Contrast Ratio CR

Ta = 25 °C,

dark room

-

Viewing Angle >160 - -

0.16

0.26

0.16

0.26

>1:100

0.20

0.30

0.20

0.30

Note1

- - Note1

degree

Note1: Optical measurement taken at 1/33 duty, 66Hz Frame Rate, 7Fh Bright Setting.

Note1

Product No.

DD-12833BE-1A REV. A

REV.

Page 18 / 27

DDi

i

ppl

l

y

n

V

DDDDD

D

V

PPP

P

d

V

DDDDD

D

fff

f

V

DDi

i

ppl

l

y

fff

f

V

fff

f

V

/Ground

5 FUNCTIONAL SPECIFICATION

5.1 COMMANDS

Refer to the Technical Manual for the STV8102

5.2 POWERING SEQUENCES

To protect the OLED panel and extend the panel life time, the driver IC power up/down routine should include a delay period between high voltage and low voltage power sources during turn on/off. Such that panel has enough time to charge up or discharge before/after operation.

Power up Sequence:

1. Power up V

DD_D

2. Send Display off command

3. Clear Screen

4. Power up VPP

5. Delay 100ms (when V

DD_D

6. Send Display on command

Power down Sequence:

1. Send Display off command

2. Power down VPP

3. Delay 100ms (when VPP reaches 0 and panel is completely discharges)

4. Power down V

DD_D

is stable)

V

/Groun

n

oon

n

oon

s

a

o

n

s

a

o

s

a

o

s

a

o

5.3 INITIALIZATION

5.3.1 Hardware Reset

The default configuration after a hardware reset is the following:

• All the control registers are cleared: Display Off, DC/DC Step-up Off, Internal

Oscillator Off, Scanning Off.

• The RAM contents are unchanged: after on Power On RAM contents are defined.

The hardware reset must be applied during the whole power-up sequence long, until the supplies reach the minimum value.

Product No.

DD-12833BE-1A REV. A

REV.

Page 19 / 27

6 PACKAGING AND LABELLING SPECIFICATION

6.1 PACKAGING

6.2 LABELLING & MARKING

Product No.

DENSITRON DD-12833BE-1A TW YYMM

DD-12833BE-1A REV. A

REV.

Page 20 / 27

7 QUALITY ASSURANCE SPECIFICATION

7.1 CONFORMITY

The performance, function and reliability of the shipped products conform to the Product Specification.

7.2 DELIVERY ASSURANCE

7.2.1 Delivery inspection standards

• MIL-STD-105E, general inspection level II, single sampling level;

• IPC-AA610 rev. C, class 2 electronic assemblies standard

The quality assurance levels are shown below:

Class AQL (%)

Critical defect 0.5% Major defect 1.0% Minor defect 1.5% TOTAL 2.0%

7.2.2 Zone definition

A Viewing area

B Outside viewing area

7.2.3 Visual inspection

• Inspect under 30W fluorescent lamp leaving 50 cm between the module and the lamp

and 30 cm between the module and the eye (measuring position).

• Appearance is inspected at the best contrast voltage (best contrast is adjusted

considering clearness and crosstalk on screen).

• Inspect the module at 45° right and left, top and bottom.

• Use the optimum viewing angle during the contrast inspection.

eye

45°45°

Product No.

DD-12833BE-1A REV. A

REV.

Page 21 / 27

7.2.3.1 Standard of appearance inspection

Units: mm

Class Item Criteria

Minor Outside & inside package Presence of product no., lot no., quantity

Critical

Major Dimension Product dimensions must be according to specification and drawing

Major Electrical Product electrical characteristics must be according to specification

Critical LCD

Minor Black spot,

Minor Polariser

Packing &

Label

Display

white spot,

dust

scratch

bubble

Product must not be mixed with others and quantity must not be different from that indicated on the label

Missing lines or wrong patterns on LCD display are not allowed

Round type: as per following drawing ∅ = (X+Y)/2 Acceptable quantity Size Zone A Zone B

Line type: as per following drawing Acceptable quantity Length Width Zone A Zone B

- - W≤0.05 Any number L≤2.0 W≤0.1 3 L>2.0 0

Total acceptable quantity: 3

Scratch on protective film is permitted Minor Polariser Scratch on polariser: same as No. 1 ∅ = (X+Y)/2 Acceptable quantity Size Zone A Zone B

Total acceptable quantity: 3

∅<0.1

0.1<∅<0.2

0.2<∅<0.25

0.25<∅

∅<0.5

∅>0.5

Any number

3 1 0

Any number

0

Any number

Product No.

DD-12833BE-1A REV. A

REV.

Page 22 / 27

Class Item Criteria

Minor Segment

deformation

Minor Panel

Chipping

1b. Pin hole on dot matrix display

Acceptable quantity Size

a,b<0.1 Any number

2. Segments / dots with different width

3. Alignment layer defect ∅ = (a+b)/2

X ≤ 1/6 Panel length Y ≤ 1 Z ≤ T

Acceptable quantity

(a+b)/2≤0.1 Any number

0.5<∅<1.0 Total acceptable quantity: 7

Acceptable a≥b a/b≤4/3 a<b a/b>4/3

Size

∅≤0.4

0.4<∅≤1.0

1.0<∅≤1.5

1.5<∅≤2.0

Total acceptable quantity: 7

3

Any number

5 3 2

Minor Panel

Cracking

Minor Cupper

exposed (pin or film)

Minor Film or

Trace Damage

Cracks not allowed

Not allowed if visible by eye inspection

Not allowed if affects electrical function

Product No.

DD-12833BE-1A REV. A

REV.

Page 23 / 27

Class Item Criteria

Minor Contact

Lead Twist Not allowed

Minor Contact

Lead Broken

Minor Contact

Lead Bent

Minor Colour

uniformity

Major No unmelted solder paste should be present on PCB

Critical Cold solder joints, missing solder connections, or oxidation are not allowed Minor No residue or solder balls on PCB are allowed Critical Minor Tray

PCB

particles

Not allowed

Not allowed if bent lead causes short circuit

Not allowed if bent lead extends horizontally more than 50% of its width

Level of sample for approval set as limit sample

Short circuits on components are not allowed Size Quantity

On tray

On display

∅<0.2 ∅>0.25 ∅≥0.25

L = 3 1

Any number

4 2

Product No.

DD-12833BE-1A REV. A

REV.

Page 24 / 27

7.3 DEALING WITH CUSTOMER COMPLAINTS

7.3.1 Non-conforming analysis

Purchaser should supply Densitron with detailed data of non-conforming sample. After accepting it, Densitron should complete the analysis in two weeks from receiving the sample. If the analysis cannot be completed on time, Densitron must inform the purchaser.

7.3.2 Handling of non-conforming displays

If any non-conforming displays are found during customer acceptance inspection which Densitron is clearly responsible for, return them to Densitron. Both Densitron and customer should analyse the reason and discuss the handling of nonconforming displays when the reason is not clear. Equally, both sides should discuss and come to agreement for issues pertaining to modification of Densitron quality assurance standard.

Product No.

DD-12833BE-1A REV. A

REV.

Page 25 / 27

8 RELIABILITY SPECIFICATION

8.1 RELIABILITY TESTS

Test Item Test Condition Evaluation and assessment

High Temperature Operation

Low Temperature Operation

High Temperature Storage

Low Temperature Storage

High Temperature & High Humidity Storage

Thermal Shock Storage

85°C, 500 hrs

-30°C, 500 hrs

90°C, 500 hrs

-40°C, 500 hrs

60°C, 90% RH, 500 hrs

-40°C ⇔ 85°C, 100 cycles

30 mins dwell

No abnormalities in function* and appearance Brightness > ½ initial value

• The brightness should be greater than 50% of the initial brightness.

• The samples used for above tests do not include polarizer.

• No moisture condensation is observed during tests.

8.1.1 FAILURE CHECK STANDARD

After the completion of the described reliability test, the samples were left at room temperature for 2 hrs prior to conducting the failure teat at 23±5 °C；55±15% RH

8.2 LIFE TIME

Item Description

Function, performance, appearance, etc. shall be free from remarkable deterioration within 15,000 hours under ordinary operating and storage conditions of room

1

temperature (25±10 °C), normal humidity (45±20% RH), and in area not exposed to direct sunlight.

2 End of lifetime is specified as 50% of initial brightness.

Product No.

DD-12833BE-1A REV. A

REV.

Page 26 / 27

9 HANDLING PRECAUTIONS

Safety

If the panel breaks, be careful not to get the organic substance in your mouth or in your eyes. If the organic substance touches your skin or clothes, wash it off immediately using soap and plenty of water.

Mounting and Design

Place a transparent plate (e.g. acrylic, polycarbonate or glass) on the display surface to protect the display from external pressure. Leave a small gap between the transparent plate and the display surface. Design the system so that no input signal is given unless the power supply voltage is applied.

Caution during OLED cleaning

Lightly wipe the display surface with a soft cloth soaked with Isopropyl alcohol, Ethyl alcohol or Trichlorotriflorothane. Do not wipe the display surface with dry or hard materials that will damage the polariser surface. Do not use aromatic solvents (toluene and xylene), or ketonic solvents (ketone and acetone).

Caution against static charge

As the display uses C-MOS LSI drivers, connect any unused input terminal to V input any signals before power is turned on. Also, ground your body, work/assembly table and assembly equipment to protect against static electricity.

Packaging

Displays use OLED elements, and must be treated as such. Avoid strong shock and drop from a height. To prevent displays from degradation, do not operate or store them exposed directly to sunshine or high temperature/humidity.

Caution during operation

It is indispensable to drive the display within the specified voltage limit since excessive voltage shortens its life.

Other Precautions

When a display module is operated for a long of time with fixed pattern may remain as an after image or slight contrast deviation may occur. Nonetheless, if the operation is interrupted and left unused for a while, normal state can be restored. Also, there will be no problem in the reliability of the module.

Storage

Store the display in a dark place where the temperature is 25°C ± 10°C and the humidity below 50%RH. Store the display in a clean environment, free from dust, organic solvents and corrosive gases. Do not crash, shake or jolt the display (including accessories).

or VSS. Do not

DD

Product No.

DD-12833BE-1A REV. A

REV.

Page 27 / 27

DENSITRON DD-12833BE-1A Product Specification

Specifications and Main Features

Frequently Asked Questions

User Manual