logic setting, which is described in the following table. User can fix these pins by jumper (J2, J3).
Unlike BS0,BS1 which are controlled by hardware, BS2,BS3 is controlled by software command
0x36.
::::
These pins are 18-bit bi-directional data bus to be connected to the MCU’s data bus.
::::
These input pins are used to configure MCU interface selection by appropriate
Table 1 – MCU Interface Selection Setting
E/RD#
is used as the Enable (E) signal. Read/write operation is initiated when this pin is pulled high and the
chip is selected.
When connecting to an 8080-microprocessor, this pin receives the Read (RD) signal. Data read
operation is initiated when this pin is pulled low and the chip is selected. When serial interface is
selected, this pin E(RD) must be connected to VSS.
R/W#
used as Read/Write (R/W) selection input. Read mode will be carried out when this pin is pulled high
and write mode when low.
When 8080 interface mode is selected, this pin is the Write (WR) input. Data write operation is
initiated when this pin is pulled low and the chip is selected. When serial interface is selected, this pin
R/W must be connected to VSS.
D/C#
treated as display data. When the pin is pulled low, the data at D0-D8 is transferred to the command
register. For detail relationship to MCU interface signals, please refer to the timing characteristics
diagrams at following pages and datasheet.
RES#
CS#
pulled low.
VCC
VDD
::::
This pin is MCU interface input. When interfacing to a 6800-series microprocessor, this pin
::::
This pin is MCU interface input. When interfacing to a 6800-series microprocessor, this pin is
::::
This pin is Data/Command control pin. When the pin is pulled high, the data at D0-D8 is
::::
This pin is reset signal input. When the pin is low, initialization of the chip is executed.
::::
This pin is the chip select input. The chip is enabled for MCU communication only when CS is
::::
This is the most positive voltage supply pin of the chip.
::::
Power supply pin for logic operation of the driver.
VDDIO::::This pin is a power supply pin of I/O buffer. It should be connected to VDD or
external source (1.8V). All I/O signal should have VIH reference to VDDIO. When I/O signal
pins (BS01, 2,3, M/S, CLS, D0-D17, control signals) pull high, they should be connected to
VDDIO. In the EVK PCB board which is use a jump (J1) connect to VDD (Default).
Customer can put out the jump and input the 1.8V through this jump
VSL::::This is segment voltage reference pin. For reduce power consumption, we suggest add
a resistor and Zenor diode between this pin and GND.
VCOMH::::This pin is the input pin for the voltage output high level for COM signals. It can
be supplied externally or internally. When VCOMH is generated internally, a capacitor
should be connected between this pin and GND.
Because the package of DD-128128FC-5B is COF, the connect pads are on the top of the
module, and the connector which on the EVK PCB board is double size connect type. So
when assemble the module with EVK, the module must face up first and plug into the
connector. When finished assembling the module and EVK, then push the locking pad to lock
the module. See figure 6.
When finished assembling the module and EVK, the user can use leading wire to connect the
EVK with customers system. Example shown in figure 7.
Figure 7 control MCU (not supplied) connected with EVK
Note 1:It is the external most positive voltage supply. In this sample is connected to power
supply.
To protect OLED panel and extend the panel life time, the driver IC power up/down routine
should include a delay period between high voltage and low voltage power sources during
turn on/off. Such that the panel has enough time to charge up or discharge before/after
operation.
Power up Sequence:
1. Power up V
2. Send Display off command
3. Driver IC Initial Setting
4. Clear Screen
5. Power up V
6. Delay 100ms
(when V
7. Send Display on command
Power down Sequence:
1. Send Display off command
2. Power down V
3. Delay 100ms
(when V
panel is completely
discharges)