Dell XPS M2010 Schematics

5

D D

4

3

2

1

Greenland

Napa

C C

REV : X03G
12/28/2005

@ : Nopop Component

B B

A A

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Cover Sheet

Greenland-LA2732P

163Wednesday, December 28, 2005

1

X03

http://hobi-elektronika.net

5

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

4

3

2

Title

Size Document Number Rev

Custom

Date: Sheet of

5

4

3

2

1

Compal confidential

Block Diagram

Pentium-M

D D

GUARDIAN II
EMC4000
/+2.5V

page 16

SMBus

Yonah

uFCPGA CPU

page 7,8,9

Clock Generator

CK410M

page 6

Fan Control

CRT CONN.

HA#(3..31)

& TV-OUT

page 20

VGA
Board

VGA CONN.

page 19

C C

PCI-E 16X

System Bus

FSB 533/667 MHz

INTEL

Calistoga

1466pin BGA

page 10,11,12,13,14,15

DMI

1.5V
100MHz

PCI BUS

IDSEL:AD17
(PIRQA/B#,GNT#2,REQ#2)

3.3V 33MHz

INTEL

ICH7-M

652pin BGA

CardBus Controller

B B

CF card

page35

A A

http://hobi-elektronika.net

page 23
page 36

page 31
page 36

5

RICHO R5C843

4-in-1 Conn

page34

Int.KBD

ST M25P80

ICH7M-Port1

Mini Card WLAN

WUSB

Mini Card TV

page 34,35

1394 Conn

page 39

page 37

USBPORT 0
USBPORT 1
USBPORT 2
USBPORT 3
USBPORT 4

SPI

page34

4

SPI

SMSC

MEC 5004

SMSC

ECE 5011

LPC BUS

3.3V 33MHz

page 37

BC BUS

page 38

21,22,23,24page

HD#(0..63)

PCI Express

48MHz / 480Mb

Memory

BUS(DDRII)

1.8V 533 / 667MHz

PORT1

PORT2

PORT4

PORT3

3.3V BitCLK

3.3V or 5V SATA

ATA100

Mini Card TV
Mini Card WLAN
Express card
LAN BCM5753

SATA

SO-DIMM X2

BANK 0, 1, 2, 3

page 36

page 36

page 40

page 32 page 33

page 17,18

USBPORT 4 of ECE5011

USBPORT 1 of ECE5011

USBPORT 2 of ICH7

RJ45 with Giga Magnetic

Azalia CODEC

STAC9220

page 26

CDROM

page 25

USB2.0

page 31

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

3

HDD X2

page 25

USBPORT 0
USBPORT 1
USBPORT 2
USBPORT 3
USBPORT 4
USBPORT 5
USBPORT 6
USBPORT 7

AMP &

Phone Jack

Blue Tooth

ECE USB[0]

Express Card

CIR
JUSB1
JUSB2
JUSB3
JUSB4

page 28

page 29
page 38
page 40
page 29
page 31
page 31
page 31
page 31

2

Azalia

Subwoofer

page 29

Power Control

Power Sequence

LED & PWR switch

DC IN

BATT IN

1.5V/1.05V(+VCCP)

MDC

page 29

5V/3.3V/12V

1.8V / 0.9V

VCORE

CHARGER

DELL CONFIDENTIAL/PROPRIETARY

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

Block Diagram

Greenland-LA2732P

1

page 16

page 42

page 43

page 41

page 45

page 46

page 47

page 48,49

page 50

page 51

page 52

263Wednesday, December 28, 2005

X03

of

5

4

3

2

1

PM TABLE

D D

power
plane

State

S0

S1

S3

C C

S5 S4/AC

S5 S4/AC don't exist

PCI EXPRESS

Lane 1
Lane 2

B B

Lane 3
Lane 4

+3VALW

ON

ON

ON

ON

+3VSUS
+5VSUS+5VALW
+1.8VSUS

DESTINATION
MINI CARD TV
MINI CARD WLAN
GIGA LAN
EXPRESS CARD

ON ON

ON

ON

OFF

OFFOFF

+12VRUN
+5VRUN
+3VRUN
+2.5VRUN
+1.8VRUN
+1.5VRUN
+VCC_CORE
+VCCP
+0.9V_DDR_VTT

ON

OFF

OFF

OFF

PCI TABLE

PCI DEVICE

CARD BUS

ICH7M USB TABLE
USB

PORT#

0
1
2
3
4
5
6
7

DESTINATION

BLUETOOTH
USB[0] of ECE5011
Express Card
CIR
JUSB1(M/B)
JUSB2(M/B)
JUSB3(USB/BD)
JUSB4(USB/BD)

IDSEL

AD17

REQ#/GNT# PIRQ

2

D,C

ECE5011 USB TABLE
USB

PORT#

0
1

DESTINATION

USB[1] of ICH7M

Mini Card WLAN

2

WUSB3

4

Mini Card TV

A A

DELL CONFIDENTIAL/PROPRIETARY

Compal Elec tronics, Inc.

Index and Config.

Greenland-LA2732P

363Wednesday, December 28, 2005

1

X03

http://hobi-elektronika.net

5

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

4

3

2

Title

Size Document Number Rev

Date: Sheet of

5

4

3

2

1

+5VALW

D D

ADAPTER

PWR_SRC

BATTERY

C C

MAX8734

SUS_ON

+5VSUS

Thermal: 6.3A
Peak: 8.4A
OCP: 10.5A

+3VALW

PL17, PL18

SI4825DT

L5973D

SUS_ON

+3VSRC

Thermal: 5A
Peak: 7.2A
OCP: 10.4A

SCL, SDA

RUN_ON

EN_KB_PRECHG_5V#

MAX8731

G_PWR_SRC

+VCHGR

+5V_Pre-charge

TPS51116 MAX8743 MAX1745

SUSPWROK_5V

+1.8VSUSP

Thermal: 8.2A
Peak: 9.7A
OCP: 12A

Thermal: 0.8A
Peak: 1A
OCP: 2.5~3A

RUN_ON

+0.9V_DDR_VTT

Thermal: 1.5A
Peak: 3A
OCP: 3.8A

RUN_ON

+1.5VRUNP

Thermal: 4.6A
Peak: 6.6A
OCP min: 6.7A

RUN_ON

+VCCP

Thermal: 4.5A
Peak: 6.4A
OCP min: 6.6A

+3.3VX

+12VALW_SLND

Thermal: 2.5A
Peak: 3.5A
OCP: 4.5A

ADP3207

RUNPWROK

+VCC_CORE

Thermal:
Peak: 44A
OCP: A

B B

SI3456DVSI4800DY

HDDC_EN#

+5VHDD

A A

MODC_EN#

+5VMOD

STS11NF30L

RUN_ON

+5VRUN

TPS793475

RUN_ON

+3VRUN

AUDIO_AVDD_ON

+VDDA

SI3456DV

STS11NF30L

SUS_ON

+3VSUS

PJP7

SI4435BDY

+1.5VRUN

RUNPWROK

+12RUN

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Power Rail
Greenland-LA2732P

463Wednesday, December 28, 2005

1

X03

of

http://hobi-elektronika.net

5

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

4

3

2

Title

Size Document Number Rev

Date: Sheet

5

4

3

2

1

+3VSUS

2.2K 2.2K

ICH_SMBCLK

D D

ICH7M

C C

C22

ICH_SMBDATA

B22

+3VSUS

30 30

Mini Card

+3VALW

10K 10K

CLK_SMB

10

DAT_SMB +3VALW

9

TV

32

32 7 8

Mini Card

WLAN

Express
Card

7002

7002

8

7

GUARDIAN

+3VRUN

197 195 197 195

+3VRUN

2.2K 2.2K

CK_SCLK
CK_SDATA

16

CLK GEN.

17

DIMM1DIMM0

Device Address

+3VALW

DIM0 A0h

PBAT_SMBCLK

8

8.2K8.2K

100

3

ICH7M-SMBus

DIM1

CLK GEN.

A2h

D2h

PBAT_SMBDAT BATTERY+3VALW

7

SIO

B B

A A

http://hobi-elektronika.net

Macallan IV

5

SBAT_SMBCLK

112

SBAT_SMBDAT +3VALW VGA

111

DOCK_SMB_CLK

6

DOCK_SMB_DAT

5

+3VALW

8.2K8.2K

+5V_MEDIA

10K10K

4

Note. +5V_MEDIA is from
+5VRUN or +5VSUS

+5V_MEDIA

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

100

3

4

9

CHARGER

10

10

8

13

Media BTN BD

14

EC-SMBus

Mini WLAN

Express

GUARDIA N

Media BTN

VGA

Battery

Charger

h

h

5Eh

86h for Cypress
40h

98h

16h

12h

LED PWM C0h

DELL CONFIDENTIAL/PROPRIETARY

Title

Size Document Number Rev

2

Date: Sheet of

Compal Elec tronics, Inc.

SMBUS TOPOLOGY

Greenland-LA2732P

563Wednesday, December 28, 2005

1

X03

5

D
1

2

G

3

2N7002

ICH_SMBDATA23,36,40

D D

ICH_SMBCLK23,36,40

C C

FSC FSB FSA CPU

CLKSEL0 CLKSEL1 CLKSEL2

ICH_SMBDATA CK_SDATA

+3VRUN

ICH_SMBCLK

1

1

C540

2

2

4.7U_0805_6.3V6K~D

00
0
0
0
1
1
1

0

1

11

0

0

1

*

11

B B

A A

Table : ICS 9 54305AK / Silego SLG84450VTR

+3VRUN

12

R796
10K_0402_5%~D

FSA

12

R799
10K_0402_5%~D

@

+3VRUN

12

R471
10K_0402_5%~D

PCICLK4

12

R472
10K_0402_5%~D

@

http://hobi-elektronika.net

+3VRUN

S

+CK_VDD_48+CK_VDD_A

C529

0.047U_0402_16V4Z~D

R226

2.2K_0402_5%~D
Q53

D

S

1 3

2N7002_SOT23~D

G

2

2

G

2N7002_SOT23~D

1 3

D

S

Q52

1

C537

2

4.7U_0805_6.3V6K~D

1

2

SRC

MHz

MHz

100 33.30

266

1
0

0
1
0
0

133
200
166
333
100
400

100
100
100
100
100
100

RESERVED

12

C199

0.047U_0402_16V4Z~D

12

R227

2.2K_0402_5%~D

CK_SCLK

+CK_VDD_REF

PCI
MHz

33.3

33.3

33.3

33.3

33.3

33.3

CK_SDATA 17,18

CK_SCLK 17,18

1

C201

2

0.047U_0402_16V4Z~D

CPU_MCH_BSEL08,10
CPU_MCH_BSEL18,10

CPU_MCH_BSEL28,10

CLK_PCI_PCCARD34

27P_0402_50V8J~D

1 2

27P_0402_50V8J~D

1 2

CK_48M_CB34

CLK_ICH_48M23

CLK_PCI_SIO37

CLK_ICH_14M23

CK_33M_ICHPCI21

Note: Solder Thermal pad to GND minimun 9 GND VIA.

PCICLK4 = FCTSEL1

FCTSEL1 Pin 43 Pin 44 Pin 47 Pin 48

UMA

0 DOT96T DOT96C LCD100/96T LCD100/96C

Discrete

1 27MHz 27MHz SRC0_T SRC0_C

5

C220

C215

4

L46

1 2

BLM21PG600SN1D_0805~D

1

C520

2

L25

1 2

BLM21PG600SN1D_0805~D

0.1U_0402_16V4Z~D

Place crystal within
500 mils of CK410

CK_XTAL_IN

12

X3

14.31818MHz_20P_1BX14318CC1A~D

CK_XTAL_OUT

CK_48M_CB
CLK_ICH_48M
CPU_MCH_BSEL0
CPU_MCH_BSEL1

CPU_MCH_BSEL2

CLK_PCI_PCCARD
CLK_PCI_SIO

CLK_ICH_14M CK_14M

+3VRUN

4

+CK_VDD_MAIN2

R209 390_0402_5%~D
R875 15_0402_5%~D
R205 15_0402_5%~D
R795 8.2K_0402_5%~D

R534 8.2K_0402_5%~D

R221 33_0402_5%~D
R229 33_0402_5%~D

R223 33_0402_5%~D

R473 10K_0402_5%~D
R216 33_0402_5%~D

CLK_ENABLE#51

+CK_VDD_MAIN+3VRUN

1 2

R460 1_0603_5%~D

1 2

R459 2.2_0603_5%~D

1 2

12
12
12

12

12
12

12

12
12

1 2

R450 475_0402_1%~D

CK_XTAL_OUT_R

CLK_ENABLE#

CK_SCLK

CK_SDATA

3

2

C523
10U_0805_10V4Z~D

1

2

C551
10U_0805_10V4Z~D

1

U16

1

VDDSRC

49

VDDSRC

54

VDDSRC

65

VDDSRC

30

VDDPCI

36

VDDPCI

12

+CK_VDD_REF
+CK_VDD_48

FSA

FSC

PCICLK4
PCICLK3

PCICLKF0CK_33M_ICHPCI

CLKIREF

VDDCPU

18

VDDREF

40

VDD48

20

X1

19

X2

41

USB_48MHz/FSLA

45

FSLB/TEST_MODE

23

REF0/FSLC/TEST_SEL

34

PCICLK4/FCTSEL1

33

PCICLK3

32

PCICLK2

27

PCICLK1

22

REF1

43

DOTT_96MHz/27MHz

44

DOTC_96MHz/27MHz(SS)

37

ITP_EN/PCICLK_F0

39

Vtt_PwrGd#/PD

9

IREF

16

SMBCLK

17

SMBDAT

4

GNDSRC

15

GNDCPU

21

GNDREF

31

GNDPCI

35

GNDPCI

42

GND48

68

GNDSRC

73

THRM_PAD

74

THRM_PAD

75

THRM_PAD

76

THRM_PAD

SLG84450VTR_QFN72~D

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

3

1

C197

0.1U_0402_16V4Z~D

2

1

C217

0.1U_0402_16V4Z~D

2

R452

2.2_0603_5%~D

1 2

1

2

1

2

+CK_VDD_A

VDDA
GNDA

PCI_SRC_STOP#

CPU_STOP#

CPUT1
CPUC1

CPUT0
CPUC0

CPUT_ITP/SRCT10

CPUC_ITP/SRCC10

SRCT9
SRCC9

CLKREQ9#

SRCT8
SRCC8

CLKREQ8#

SRCT7
SRCC7

CLKREQ7#

SRCT6
SRCC6

CLKREQ6#

SRCT5
SRCC5

CLKREQ5#

SRCT4
SRCC4

CLKREQ4#

SRCT3
SRCC3

CLKREQ3#

SRCT2
SRCC2

CLKREQ2#

SRCT1
SRCC1

CLKREQ1#
LCD100/96/SRC0_T
LCD100/96/SRC0_C

C182

0.1U_0402_16V4Z~D

C204

0.1U_0402_16V4Z~D

7
8

H_STP_PCI#

25

H_STP_CPU#

24

CK_CPU1

11

CK_CPU1#

10

CK_CPU0

14

CK_CPU0#

13

CK_CPU_ITP

6

CK_CPU_ITP#

5

SRC9

3

SRC9#

2
72

SRC8

70

SRC8#

69
71

SRC7 CLK_PCIE_LOM

66

SRC7#

67

LOM_CLKREQ#

38

SRC6 CLK_PCIE_EXPR

63
64

EXPR_CARD_REQ#

62

SRC5

60

SRC5#

61

SATA_CLKREQ#

29

SRC4

58

SRC4# CLK_PCIE_ICH#

59
57

SRC3

55
56

MINI_CARD1_REQ#

28

SRC2

52
53

MINI_CARD2_REQ#

26
50
51
46
47
48

2

1

C187

0.1U_0402_16V4Z~D

2

1

2

Place near each pin
W>40 mil

Place near CK410M

H_STP_PCI# 23

H_STP_CPU# 23

1 2

R192 33_0402_5%~D

1 2

R188 33_0402_5%~D

1 2

R208 33_0402_5%~D

1 2

R204 33_0402_5%~D

1 2

R179 33_0402_5%~D

1 2

R174 33_0402_5%~D

1 2

R182 33_0402_5%~D

1 2

R176 33_0402_5%~D

1 2

R154 33_0402_5%~D

1 2

R149 33_0402_5%~D

1 2

R147 33_0402_5%~D

1 2

R140 33_0402_5%~D

1 2

R152 33_0402_5%~D

1 2

R146 33_0402_5%~D

1 2

R171 33_0402_5%~D

1 2

R165 33_0402_5%~D

1 2

R198 33_0402_5%~D

1 2

R189 33_0402_5%~D

1 2

R168 33_0402_5%~D

1 2

R159 33_0402_5%~D

1 2

R801 33_0402_5%~D

1 2

R802 33_0402_5%~D

CLK_MCH_BCLK
CLK_MCH_BCLK#

CLK_CPU_BCLK
CLK_CPU_BCLK#

CK_ITP
CK_ITP#

CLK_PCIE_VGA
CLK_PCIE_VGA#

CLK_MCH_3GPLL
CLK_MCH_3GPLL#

3GPLL_REQ#

CLK_PCIE_LOM#

LOM_CLKREQ#

CLK_PCIE_EXPR#SRC6#

EXPR_CARD_REQ# 40
CLK_PCIE_SATA
CLK_PCIE_SATA#

SATA_CLKREQ# 23
CLK_PCIE_ICH

CLK_PCIE_M INI_CARD1
CLK_PCIE_MI NI_CARD1#SRC3#

MINI_CARD1_REQ# 36

CLK_PCIE_M INI_CARD2
CLK_PCIE_MI NI_CARD2#SRC2#

MINI_CARD2_REQ# 36

2

1

CLK_MCH_BCLK
CLK_MCH_BCLK#
CLK_CPU_BCLK
CLK_CPU_BCLK#
CK_ITP
CK_ITP#
CLK_PCIE_SATA
CLK_PCIE_SATA#
CLK_PCIE_ICH
CLK_PCIE_ICH#
CLK_MCH_3GPLL
CLK_MCH_3GPLL#
CLK_PCIE_VGA
CLK_PCIE_VGA#
CLK_PCIE_LOM
CLK_PCIE_LOM#
CLK_PCIE_EXPR

CLK_PCIE_EXPR#
CLK_PCIE_M INI_CARD2
CLK_PCIE_MI NI_CARD2#
CLK_PCIE_M INI_CARD1
CLK_PCIE_MI NI_CARD1#

3GPLL_REQ#
EXPR_CARD_REQ#
SATA_CLKREQ#
MINI_CARD1_REQ#
MINI_CARD2_REQ#
LOM_CLKREQ#

1 2

10K_0402_5%~D

1 2

10K_0402_5%~D

1 2

10K_0402_5%~D

1 2

10K_0402_5%~D

1 2

10K_0402_5%~D

1 2

10K_0402_5%~D

C522

0.1U_0402_16V4Z~D

CLK_MCH_BCLK 10
CLK_MCH_BCLK# 10

CLK_CPU_BCLK 7
CLK_CPU_BCLK# 7

CK_ITP 7
CK_ITP# 7

1

C954

0.1U_0402_16V4Z~D

2

CLK_PCIE_VGA 19

CLK_PCIE_VGA# 19

CLK_MCH_3GPLL 10

CLK_MCH_3GPLL# 10

3GPLL_REQ# 10

CLK_PCIE_LOM 32

CLK_PCIE_LOM# 32

CLK_PCIE_EXPR 40

CLK_PCIE_EXPR# 40

CLK_PCIE_SATA 22
CLK_PCIE_SATA# 22

CLK_PCIE_ICH 23
CLK_PCIE_ICH# 23

CLK_PCIE_MI N I_CARD1 36

CLK_PCIE_MI N I_CARD1# 36

CLK_PCIE_MI N I_CARD2 36

CLK_PCIE_MI N I_CARD2# 36

DELL CONFIDENTIAL/PROPRIETARY

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.
Clock Generator

Greenland-LA2732P

1

49.9_0402_1%~D

49.9_0402_1%~D

49.9_0402_1%~D

49.9_0402_1%~D

49.9_0402_1%~D

49.9_0402_1%~D

1 2

49.9_0402_1%~D

1 2

49.9_0402_1%~D

1 2

49.9_0402_1%~D

1 2

49.9_0402_1%~D

1 2

49.9_0402_1%~D

1 2

49.9_0402_1%~D

1 2

49.9_0402_1%~D

1 2

49.9_0402_1%~D

1 2

49.9_0402_1%~D

1 2

49.9_0402_1%~D

1 2

49.9_0402_1%~D

1 2

49.9_0402_1%~D

1 2

49.9_0402_1%~D

1 2

49.9_0402_1%~D

1 2

49.9_0402_1%~D

1 2

49.9_0402_1%~D

R728
R539
R829
R538
R800
R890

663Wednesday, December 28, 2005

R191
R187
R207
R203
R178
R173

R148
R141

R822
R823
R167
R158

12
12
12
12
12

12

R172
R166
R199
R190
R155
R150
R183
R177

R151
R145

+3VRUN
+3VRUN
+3VRUN
+3VRUN
+3VRUN
+3VRUN

X03

of

5

4

3

2

1

H_A#[3..31]10

H_A#4
H_A#5
H_A#6
H_A#7
H_A#8

D D

H_REQ#[0..4]10

H_ADSTB#010

C C

R584

56_0402_5%~D

1 2

+VCCP

B B

Stuff R840 for
Yonah B0 and
forward, no stuff
for A1

R901 1K_0402_5%~D @

1 2

R840 51_0402_5%~D

1 2

H_THERMDA16

H_THERMDC16

H_THERMDA, H_THERMDC routing together.
Trace width / Spacing = 10 / 10 mil

A A

H_ADSTB#110

CLK_CPU_BCLK6
CLK_CPU_BCLK#6

H_ADS#10

H_BNR#10

H_BPRI#10

H_BR0#10

H_DEFER#10

H_DRDY#10
H_HIT#10
H_HITM#10

H_LOCK#10

H_RS#[0..2]10

2200P_0402_50V7K~D@

H_RESET#10

H_TRDY#10

ITP_DBRESET#23,37

H_DBSY#10

H_DPSLP#22
H_DPRSTP#22,51

H_DPWR#10

CPU_PROCHOT#38

H_PWRGOOD22

H_CPUSLP#10,22

1

C746

2

H_THERMTRIP#16

H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22

H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31

H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4

H_ADSTB#0
H_ADSTB#1

CLK_CPU_BCLK
CLK_CPU_BCLK#

H_ADS#
H_BNR#
H_BPRI#
H_BR0#
H_DEFER#
H_DRDY#
H_HIT#
H_HITM#
H_IERR#
H_LOCK#
H_RESET#

H_RS#0
H_RS#1
H_RS#2
H_TRDY#

ITP_BPM#0
ITP_BPM#1
ITP_BPM#2
ITP_BPM#3

ITP_DBRESET#

H_DBSY#
H_DPSLP#
H_DPRSTP#
H_DPWR#
ITP_BPM#4
ITP_BPM#5

CPU_PROCHOT#

H_PWRGOOD
H_CPUSLP#
ITP_TCK
ITP_TDI
ITP_TDO
TEST1
TEST2
ITP_TMS
ITP_TRST#

H_THERMDA
H_THERMDC

H_THERMTRIP#

JCPU1A

J4

A3#

L4

A4#

M3

A5#

K5

A6#

M1

A7#

N2

A8#

J1

A9#

N3

A10#

P5

A11#

P2

A12#

L1

A13#

P4

A14#

P1

A15#

R1

A16#

Y2

A17#

U5

A18#

R3

A19#

W6

A20#

U4

A21#

Y5

A22#

U2

A23#

R4

A24#

T5

A25#

T3

A26#

W3

A27#

W5

A28#

Y4

A29#

W2

A30#

Y1

A31#

K3

REQ0#

H2

REQ1#

K2

REQ2#

J3

REQ3#

L5

REQ4#

L2

ADSTB0#

V4

ADSTB1#

A22

BCLK0

A21

BCLK1

H1

ADS#

E2

BNR#

G5

BPRI#

F1

BR0#

H5

DEFER#

F21

DRDY#

G6

HIT#

E4

HITM#

D20

IERR#

H4

LOCK#

B1

RESET#

F3

RS0#

F4

RS1#

G3

RS2#

G2

TRDY#

AD4

BPM0#

AD3

BPM1#

AD1

BPM2#

AC4

BPM3#

C20

DBR#

E1

DBSY#

B5

DPSLP#

E5

DPRSTP#

D24

DPWR#

AC2

PRDY#

AC1

PREQ#

D21

PROCHOT#

D6

PWRGOOD

D7

SLP#

AC5

TCK

AA6

TDI

AB3

TDO

C26

TEST1

D25

TEST2

AB5

TMS

AB6

TRST#

A24

THERMDA

A25

THERMDC

C7

THERMTRIP#

FOX_PZ47903-2741-42_YONAH~D

YONAH

ADDR GROUP

HOST CLK

CONTROL

MISC

THERMAL
DIODE

DATA GROUP

LEGACY CPU

D0#
D1#
D2#
D3#
D4#
D5#
D6#
D7#
D8#

D9#
D10#
D11#
D12#
D13#
D14#
D15#
D16#
D17#
D18#
D19#
D20#
D21#
D22#
D23#
D24#
D25#
D26#
D27#
D28#
D29#
D30#
D31#
D32#
D33#
D34#
D35#
D36#
D37#
D38#
D39#
D40#
D41#
D42#
D43#
D44#
D45#
D46#
D47#
D48#
D49#
D50#
D51#
D52#
D53#
D54#
D55#
D56#
D57#
D58#
D59#
D60#
D61#
D62#
D63#

DINV0#
DINV1#
DINV2#
DINV3#

DSTBN0#
DSTBN1#
DSTBN2#
DSTBN3#
DSTBP0#
DSTBP1#
DSTBP2#
DSTBP3#

A20M#
FERR#

IGNNE#

INIT#

LINT0
LINT1

STPCLK#

SMI#

E22
F24
E26
H22
F23
G25
E25
E23
K24
G24
J24
J23
H26
F26
K22
H25
N22
K25
P26
R23
L25
L22
L23
M23
P25
P22
P23
T24
R24
L26
T25
N24
AA23
AB24
V24
V26
W25
U23
U25
U22
AB25
W22
Y23
AA26
Y26
Y22
AC26
AA24
AC22
AC23
AB22
AA21
AB21
AC25
AD20
AE22
AF23
AD24
AE21
AD21
AE25
AF25
AF22
AF26

J26
M26
V23
AC20

H23
M24
W24
AD23
G22
N25
Y25
AE24

A6
A5
C4
B3
C6
B4

D5
A3

H_D#0H_A#3
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20H_A#23
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63

H_DSTBN#0
H_DSTBN#1
H_DSTBN#2
H_DSTBN#3
H_DSTBP#0
H_DSTBP#1
H_DSTBP#2
H_DSTBP#3

H_A20M#
H_FERR#
H_IGNNE#
H_INIT#
H_INTR
H_NMI

H_STPCLK#
H_SMI#

H_DINV#0 10
H_DINV#1 10
H_DINV#2 10
H_DINV#3 10

H_A20M# 22

H_FERR# 22

H_IGNNE# 22

H_INIT# 22

H_INTR 22

H_NMI 22

H_STPCLK# 22

H_SMI# 22

H_RESET#

ITP_TDO

H_D#[0..63] 10

R578

22.6_0402_1%~D

1 2

R579

22.6_0402_1%~D

1 2

H_DSTBN#[0..3] 10

H_DSTBP#[0..3] 10

+VCCP

ITP_DBRESET#

ITP_BPM#0
ITP_BPM#1
ITP_BPM#2
ITP_BPM#3
ITP_BPM#4
ITP_BPM#5
ITP_TCK
CK_ITP

CK_ITP6

CK_ITP#

CK_ITP#6

ITP_TDO_R
ITP_TCK

ITP_TRST#

ITP_TMS
ITP_TDI

Check ITP connector.

+3VSUS

R575

+VCCP

150_0402_1%~D

1 2

R576

51_0402_5%~D

1 2

R577

51_0402_5%~D

1 2

R839

@

54.9_0402_1%~D

1 2

R581

39_0402_5%~D

1 2

R580

150_0402_5%~D

1 2

R583

680_0402_5%~D

1 2

R582

27_0402_5%~D

1 2

C956

0.1U_0402_16V4Z~D

ITP_DBRESET#

ITP_TDO_R

H_RESET#

ITP_BPM#5

ITP_TMS

ITP_TDI

This shall place near CPU

ITP_TRST#

This shall place near CPU

ITP_TCK

+VCCP

1

1

C686

2

2

0.1U_0402_16V4Z~D

29

JITP1

29

28

VTT1

27

VTT0

26

VTAP

25

DBR#

24

DBA#

23

BPM0#

22

GND5

21

BPM1#

20

GND4

19

BPM2#

18

GND3

17

BPM3#

16

GND2

15

BPM4#

14

GND1

13

BPM5#

12

RESET#

11

FBO

10

GND0

9

BCLKP

8

BCLKN

7

TDO

6

NC2

5

TCK

4

NC1

3

TRST#

2

TMS

1

TDI

30

MOLEX_52435-2891_28P~D@

30

Place near JITP1

R585

+VCCP

+VCCP

56_0402_5%~D

1 2

R781
75_0402_5%~D

1 2

H_THERMTRIP#

CPU_PROCHOT#

C746 close to CPU

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.
Yonah in mFCPGA479

Greenland-LA2732P

763Wednesday, December 28, 2005

1

X03

of

http://hobi-elektronika.net

5

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

4

3

2

Title

Size Document Number Rev

Date: Sheet

5

4

3

2

1

Length match within 25 mils

R586

VCCSENSE51
VSSSENSE51

D D

+VCCP

R_A

12

V_CPU_GTLREF

R589
1K_0402_1%~D

R_B

12

R588
2K_0402_1%~D

Layout close CPU PIN AD26

+VCC_CORE

R590
100_0402_1%~D

1 2

R591
100_0402_1%~D

1 2

Layout close CPU

VCCSENSE

VSSSENSE

VCCSENSE
VSSSENSE VSSSENSE_R

+1.5VRUN

1

C688

2

10U_0805_10V4Z~D

C687
Layout close CPU PIN B26

0.5 inch (max)

C C

Resistor placed within

0.5" of CPU pin.Trace
should be at least 25

12

12

R592

R593

27.4_0402_1%~D

B B

CPU_BSEL CPU_BSEL2 CPU_BSEL1

133

166

00

0

12

12

R594

27.4_0402_1%~D

54.9_0402_1%~D

mils away from any
other toggling signal.

R595

54.9_0402_1%~D

CPU_BSEL0

1

1

1

0_0402_5%~D

1 2
1 2

R587

0_0402_5%~D

1

C687

2

0.01U_0402_16V7K~D

H_PSI#51

VID051

VID151

VID251

VID351

VID451

VID551

VID651

V_CPU_GTLREF

CPU_MCH_BSEL06,10
CPU_MCH_BSEL16,10
CPU_MCH_BSEL26,10

+VCCP

+VCC_CORE

VCCSENSE_R

H_PSI#

VID0
VID1
VID2
VID3
VID4
VID5
VID6

CPU_MCH_BSEL0
CPU_MCH_BSEL1
CPU_MCH_BSEL2

COMP0
COMP1
COMP2
COMP3

JCPU1B

AF7

VCCSENSE

AE7

VSSSENSE

B26

VCCA

K6

VCCP

J6

VCCP

M6

VCCP

N6

VCCP

YONAH

VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP

PSI#
VID0

VID1
VID2
VID3
VID4
VID5
VID6

GTLREF
BSEL0

BSEL1
BSEL2

COMP0
COMP1
COMP2
COMP3

VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC

RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD

FOX_PZ47903-2741-42_YONAH~D

M21

W21

AD6

AD26

AB20
AA20
AF20
AE20
AB18
AB17
AA18
AA17
AD18
AD17
AC18
AC17
AF18
AF17

T6
R6

K21

J21

N21
T21
R21
V21

V6

G21

AE6

AF5
AE5
AF4
AE3
AF2
AE2

B22
B23
C21

R26
U26

U1
V1

E7

D2
F6
D3

C1
AF1
D22
C23
C24
AA1
AA4
AB2
AA3

M4

N5

T2

V3

B2

C3
T22
B25

AB26

VSS

AA25

VSS

AD25

VSS

AE26

VSS

AB23

VSS

AC24

VSS

AF24

VSS

AE23

VSS

AA22

VSS

AD22

VSS

AC21

VSS

AF21

VSS

AB19

VSS

AA19

VSS

AD19

VSS

AC19

VSS

AF19

VSS

AE19

VSS

AB16

VSS

AA16

VSS

AD16

VSS

AC16

VSS

AF16

VSS

AE16

VSS

AB13

VSS

AA14

VSS

AD13

VSS

AC14

VSS

AF13

VSS

AE14

VSS

AB11

VSS

AA11

VSS

AD11

VSS

AC11

VSS

AF11

VSS

AE11

VSS

AB8

VSS

AA8

VSS

AD8

VSS

AC8

VSS

AF8

VSS

AE8

VSS

AA5

VSS

AD5

VSS

AC6

VSS

AF6

VSS

AB4

VSS

AC3

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

AF3
AE4
AB1
AA2
AD2
AE1
B6
C5
F5
E6
H6
J5
M5
L6
P6
R5
V5
U6
Y6
A4
D4
E3
H3
G4
K4
L3
P3
N4
T4
U3
Y3
W4
D1
C2
F2
G1

POWER, GROUNG, RESERVED SIGNALS AND NC

+VCC_CORE

JCPU1C

AE18

VCC

AE17

VCC

AB15

VCC

AA15

VCC

AD15

VCC

AC15

VCC

AF15

VCC

AE15

VCC

AB14

VCC

AA13

VCC

AD14

VCC

AC13

VCC

AF14

VCC

AE13

VCC

AB12

VCC

AA12

VCC

AD12
AC12
AF12
AE12
AB10

AA10
AD10
AC10
AF10
AE10

AB9
AA9
AD9
AC9
AF9
AE9

AB7
AA7
AD7
AC7
B20
A20
F20
E20
B18
B17
A18
A17
D18
D17
C18
C17
F18
F17
E18
E17
B15
A15
D15
C15
F15
E15
B14
A13
D14
C13
F14
E13
B12
A12
D12
C12
F12
E12
B10

B9

A10

A9

D10

D9

C10

C9

F10

F9

E10

E9
B7
A7
F7

YONAH

VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC

POWER, GROUND

VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC

FOX_PZ47903-2741-42_YONAH~D

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

K1
J2
M2
N1
T1
R2
V2
W1
A26
D26
C25
F25
B24
A23
D23
E24
B21
C22
F22
E21
B19
A19
D19
C19
F19
E19
B16
A16
D16
C16
F16
E16
B13
A14
D13
C14
F13
E14
B11
A11
D11
C11
F11
E11
B8
A8
D8
C8
F8
E8
G26
K26
J25
M25
N26
T26
R25
V25
W26
H24
G23
K23
L24
P24
N23
T23
U24
Y24
W23
H21
J22
M22
L21
P21
R22
V22
U21
Y21

A A

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Yonah in mFCPGA479

Greenland-LA2732P

863Wednesday, December 28, 2005

1

X03

of

http://hobi-elektronika.net

5

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

4

3

2

Title

Size Document Number Rev

Date: Sheet

5

+VCC_CORE

Place these inside
socket cavity on L8
(North side

D D

C C

Secondary)

Place these inside
socket cavity on L8
(Sorth side
Secondary)

Place these inside
socket cavity on L8
(North side
Primary)

Place these inside
socket cavity on L8
(Sorth side
Primary)

1

2

+VCC_CORE

1

2

+VCC_CORE

1

2

+VCC_CORE

1

2

C689
10U_0805_4VAM~D

C699
10U_0805_4VAM~D

C709
10U_0805_4VAM~D

C715
10U_0805_4VAM~D

1

C690
10U_0805_4VAM~D

2

1

C700
10U_0805_4VAM~D

2

1

C710
10U_0805_4VAM~D

2

1

C716
10U_0805_4VAM~D

2

1

C691
10U_0805_4VAM~D

2

1

C701
10U_0805_4VAM~D

2

1

C711
10U_0805_4VAM~D

2

1

C717
10U_0805_4VAM~D

2

4

1

C692
10U_0805_4VAM~D

2

1

C702
10U_0805_4VAM~D

2

1

C712
10U_0805_4VAM~D

2

1

C718
10U_0805_4VAM~D

2

1

C693
10U_0805_4VAM~D

2

1

C703
10U_0805_4VAM~D

2

1

C713
10U_0805_4VAM~D

2

1

C719
10U_0805_4VAM~D

2

1

C694
10U_0805_4VAM~D

2

1

C704
10U_0805_4VAM~D

2

1

C714
10U_0805_4VAM~D

2

1

C720
10U_0805_4VAM~D

2

1

C695
10U_0805_4VAM~D

2

1

C705
10U_0805_4VAM~D

2

10uF 0805 X6S

3

1

C696
10U_0805_4VAM~D

2

1

C706
10U_0805_4VAM~D

2

1

C697
10U_0805_4VAM~D

2

1

C707
10U_0805_4VAM~D

2

1

C698
10U_0805_4VAM~D

2

1

C708
10U_0805_4VAM~D

2

2

1

High Frequence Decoupling

Near VCORE regulator.

+VCC_CORE

South Side Secondary

C721

@

B B

+VCCP

1

+

C727

@

2

330U_D2E_2.5VM~D

CRB was 270uF

A A

330U_D_2VM_R6~D

6mOhm
PS CAP

1

+

C722

2

330U_D_2VM_R6~D

6mOhm
PS CAP

1

C728

0.1U_0402_10V7K~D

2

1

+

C723

2

330U_D_2VM_R6~D

6mOhm
PS CAP

1

2

1

1

+

C724

2

2

330U_D_2VM_R6~D

6mOhm
PS CAP

C729

0.1U_0402_10V7K~D

+

1

+

C725

2

@

330U_D_2VM_R6~D

6mOhm
PS CAP

1

C730

0.1U_0402_10V7K~D

2

North Side Secondary

1

+

C726

2

330U_D_2VM_R6~D

6mOhm
PS CAP

1

2

C731

0.1U_0402_10V7K~D

1

C732

0.1U_0402_10V7K~D

2

ESR <= 1.5m ohm

1

C733

0.1U_0402_10V7K~D

2

Place these inside
socket cavity on L8
(North side
Secondary)

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

CPU Bypass

Greenland-LA2732P

963Wednesday, December 28, 2005

1

X03

of

http://hobi-elektronika.net

5

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

4

3

2

Title

Size Document Number Rev

Date: Sheet

5

4

3

2

1

+VCCP

12

R596

H_SWNG1

221_0402_1%~D

+VCCP

+VCCP

R605

12

1

R597

2

C734

100_0402_1%~D

0.1U_0402_16V4Z~D

12

R598

H_SWNG0

221_0402_1%~D

12

1

R599

2

100_0402_1%~D

12

100_0402_1%~D

12

200_0402_1%~D

C735

0.1U_0402_16V4Z~D

R600

H_VREF

1

C736

2

DPRSLPVR23,51

PLTRST2#21,32,37

+1.8VSUS

0.1U_0402_16V4Z~D

R841
0_0402_5%~D

R606

100_0402_1%~D

V_DDR_MCH_REF17,18,50

DMI_MRX_ITX_N023
DMI_MRX_ITX_N123
DMI_MRX_ITX_N223
DMI_MRX_ITX_N323

DMI_MRX_ITX_P023
DMI_MRX_ITX_P123
DMI_MRX_ITX_P223
DMI_MRX_ITX_P323

DMI_MTX_IRX_N023
DMI_MTX_IRX_N123
DMI_MTX_IRX_N223
DMI_MTX_IRX_N323

DMI_MTX_IRX_P023
DMI_MTX_IRX_P123
DMI_MTX_IRX_P223
DMI_MTX_IRX_P323

M_CLK_DDR018
M_CLK_DDR118
M_CLK_DDR217
M_CLK_DDR317

M_CLK_DDR#018
M_CLK_DDR#118
M_CLK_DDR#217
M_CLK_DDR#317

DDR_CKE0_DIMMA18
DDR_CKE1_DIMMA18
DDR_CKE2_DIMMB17
DDR_CKE3_DIMMB17

DDR_CS0_DIMMA#18
DDR_CS1_DIMMA#18
DDR_CS2_DIMMB#17
DDR_CS3_DIMMB#17

T33 PAD~D
T36 PAD~D

R602 80.6_0402_1%~D

1 2

R601 80.6_0402_1%~D

1 2

PM_BMBUSY#23

12

12

V_DDR_MCH_REF

PM_EXTTS#018

THERMTRIP_MCH#16

ICH_PWRGD23,43

MCH_ICH_SYNC#21

C737

@

M_ODT018
M_ODT118
M_ODT217
M_ODT317

1

2

0.1U_0402_16V4Z~D

DMI_MRX_ITX_N0
DMI_MRX_ITX_N1
DMI_MRX_ITX_N2
DMI_MRX_ITX_N3

DMI_MRX_ITX_P0
DMI_MRX_ITX_P1
DMI_MRX_ITX_P2
DMI_MRX_ITX_P3

DMI_MTX_IRX_N0
DMI_MTX_IRX_N1
DMI_MTX_IRX_N2
DMI_MTX_IRX_N3

DMI_MTX_IRX_P0
DMI_MTX_IRX_P1
DMI_MTX_IRX_P2
DMI_MTX_IRX_P3

M_CLK_DDR0
M_CLK_DDR1
M_CLK_DDR2
M_CLK_DDR3

M_CLK_DDR#0
M_CLK_DDR#1
M_CLK_DDR#2
M_CLK_DDR#3

DDR_CKE0_DIMMA
DDR_CKE1_DIMMA
DDR_CKE2_DIMMB
DDR_CKE3_DIMMB

DDR_CS0_DIMMA#
DDR_CS1_DIMMA#
DDR_CS2_DIMMB#
DDR_CS3_DIMMB#

M_OCDCOMP0
M_OCDCOMP1

M_ODT0
M_ODT1
M_ODT2
M_ODT3

SMRCOMPN
SMRCOMPP

V_DDR_MCH_REF

PM_BMBUSY#
PM_E XTTS#0
PM_E XTTS#1
THERMTRIP_MCH#
ICH_PWRGD
PLTRST2#_R#

MCH_ICH_SYNC#

1

C738

2

@

0.1U_0402_16V4Z~D

D D

H_D#[0..63]7

C C

+VCCP

12

12

B B

R603

R604

54.9_0402_1%~D

54.9_0402_1%~D

12

12

R607

24.9_0402_1%~D

H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8

H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60

H_D#61
H_D#62
H_D#63

H_VREF
H_XRCOMP
H_XSCOMP
H_YRCOMP
H_YSCOMP
H_SWNG0
H_SWNG1

R608

24.9_0402_1%~D

U39A

F1

HD0#

J1

HD1#

H1

HD2#

J6

HD3#

H3

HD4#

K2

HD5#

G1

HD6#

G2

HD7#

K9

HD8#

K1

HD9#

K7

HD10#

J8

HD11#

H4

HD12#

J3

HD13#

K11

HD14#

G4

HD15#

T10

HD16#

W11

HD17#

T3

HD18#

U7

HD19#

U9

HD20#

U11

HD21#

T11

HD22#

W9

HD23#

T1

HD24#

T8

HD25#

T4

HD26#

W7

HD27#

U5

HD28#

T9

HD29#

W6

HD30#

T5

HD31#

AB7

HD32#

AA9

HD33#

W4

HD34#

W3

HD35#

Y3

HD36#

Y7

HD37#

W5

HD38#

Y10

HD39#

AB8

HD40#

W2

HD41#

AA4

HD42#

AA7

HD43#

AA2

HD44#

AA6

HD45#

AA10

HD46#

Y8

HD47#

AA1

HD48#

AB4

HD49#

AC9

HD50#

AB11

HD51#

AC11

HD52#

AB3

HD53#

AC2

HD54#

AD1

HD55#

AD9

HD56#

AC1

HD57#

AD7

HD58#

AC6

HD59#

AB5

HD60#

AD10

HD61#

AD4

HD62#

AC8

HD63#

J13

HVREF0

K13

HVREF1

E1

HXRCOMP

E2

HXSCOMP

Y1

HYRCOMP

U1

HYSCOMP

E4

HXSWING

W1

HYSWING

CALISTOGA A0_FCBGA1466~D

H9

HA3#

C9

HA4#

E11

HA5#

G11

HA6#

F11

HA7#

G12

HA8#

F9

HA9#

H11

HA10#

J12

HA11#

G14

HA12#

D9

HA13#

J14

HA14#

H13

HA15#

J15

HA16#

F14

HA17#

D12

HA18#

A11

HA19#

C11

HA20#

A12

HA21#

A13

HA22#

E13

HA23#

G13

HA24#

F12

HA25#

B12

HA26#

B14

HA27#

C12

HA28#

A14

HA29#

C14

HA30#

D14

HA31#

D8

HREQ#0

G8

HREQ#1

B8

HREQ#2

F8

HREQ#3

A8

HREQ#4

B9

HADSTB#0

C13

HADSTB#1

HCLKN

HCLKP

HDSTBN#0
HDSTBN#1
HDSTBN#2
HDSTBN#3
HDSTBP#0
HDSTBP#1
HDSTBP#2
HDSTBP#3

HDINV#0
HDINV#1
HDINV#2
HDINV#3

HCPURST#

HADS#

HTRDY#

HDPWR#

HDRDY#

HDEFER#

HHITM#

HHIT#

HLOCK#

HBREQ0#

HBNR#
HBPRI#

HDBSY#

HCPUSLP#

HRS0#
HRS1#
HRS2#

AG1
AG2

K4
T7
Y5
AC4
K3
T6
AA5
AC5

J7
W8
U3
AB10

B7
E8
E7
J9
H8
C3
D4
D3
B3
C7
C6
F6
A7
E3

B4
E6
D6

HOST

H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8

H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31

H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4

H_ADSTB#0
H_ADSTB#1

CLK_MCH_BCLK#
CLK_MCH_BCLK

H_DSTBN#0
H_DSTBN#1
H_DSTBN#2
H_DSTBN#3
H_DSTBP#0
H_DSTBP#1
H_DSTBP#2
H_DSTBP#3

H_DINV#0
H_DINV#1
H_DINV#2
H_DINV#3

H_RESET#
H_ADS#
H_TRDY#
H_DPWR#
H_DRDY#
H_DEFER#
H_HITM#
H_HIT#
H_LOCK#
H_BR0#
H_BNR#
H_BPRI#
H_DBSY#
H_CPUSLP#

H_RS#0
H_RS#1
H_RS#2

H_A#[3..31] 7

H_ADSTB#0 7
H_ADSTB#1 7

CLK_MCH_BCLK# 6

CLK_MCH_BCLK 6

H_DSTBN#[0..3] 7

H_DSTBP#[0..3] 7

H_DINV#0 7
H_DINV#1 7
H_DINV#2 7
H_DINV#3 7

H_RESET# 7

H_ADS# 7

H_TRDY# 7
H_DPWR# 7
H_DRDY# 7

H_DEFER# 7

H_HITM# 7
H_HIT# 7
H_LOCK# 7

H_BR0# 7
H_BNR# 7
H_BPRI# 7

H_DBSY# 7
H_CPUSLP# 7,22

H_RS#[0..2] 7

H_REQ#[0..4] 7

U39B

AE35

DMIRXN0

AF39

DMIRXN1

AG35

DMIRXN2

AH39

DMIRXN3

AC35

DMIRXP0

AE39

DMIRXP1

AF35

DMIRXP2

AG39

DMIRXP3

AE37

DMITXN0

AF41

DMITXN1

AG37

DMITXN2

AH41

DMITXN3

AC37

DMITXP0

AE41

DMITXP1

AF37

DMITXP2

AG41

DMITXP3

AY35

SM_CK0

AR1

SM_CK1

AW7

SM_CK2

AW40

SM_CK3

AW35

SM_CK0#

AT1

SM_CK1#

AY7

SM_CK2#

AY40

SM_CK3#

AU20

SM_CKE0

AT20

SM_CKE1

BA29

SM_CKE2

AY29

SM_CKE3

AW13

SM_CS0#

AW12

SM_CS1#

AY21

SM_CS2#

AW21

SM_CS3#

AL20

SM_OCDCOMP0

AF10

SM_OCDCOMP1

BA13

SM_ODT0

BA12

SM_ODT1

AY20

SM_ODT2

AU21

SM_ODT3

AV9

SM_RCOMPN

AT9

SM_RCOMPP

AK1

SM_VREF0

AK41

SM_VREF1

G28

PM_BMBUSY#

F25

PM_EXTTS0#

H26

PM_EXTTS1#

G6

PM_THERMTRIP#

AH33

PWROK

AH34

RSTIN#

K28

ICH_SYNC#

CALISTOGA A0_FCBGA1466~D

Description at page12

Note :
CFG3:17 has
internal pullup,
CFG18:19 has
internal pulldown

DMI

DDR MUXING

PM

CFG10
CFG11
CFG12
CFG13
CFG14
CFG15
CFG16
CFG17

CFG

CFG18
CFG19
CFG20

G_CLKP
G_CLKN

D_REF_CLKN
D_REF_CLKP

CLKNC

D_REF_SSCLKN
D_REF_SSCLKP

CLK_REQ#

RESERVED1
RESERVED2
RESERVED3
RESERVED4
RESERVED5
RESERVED6
RESERVED7
RESERVED8

RESERVED9
RESERVED10
RESERVED11
RESERVED12
RESERVED13

RESERVED

PM_EXTTS#0

PM_EXTTS#1

THERMTRIP_MCH#

CFG0
CFG1
CFG2
CFG3
CFG4
CFG5
CFG6
CFG7
CFG8
CFG9

NC0
NC1
NC2
NC3
NC4
NC5
NC6
NC7
NC8

NC9
NC10
NC11
NC12
NC13
NC14
NC15
NC16
NC17
NC18

CPU_MCH_BSEL0

K16

CPU_MCH_BSEL1

K18

CPU_MCH_BSEL2

J18

CFG3

F18

CFG4

E15

CFG5

F15

CFG6

E18

CFG7

D19

CFG8

D16

CFG9

G16

CFG10

E16

CFG11

D15

CFG12

G15

CFG13

K15

CFG14

C15

CFG15

H16

CFG16

G18

CFG17

H15

CFG18

J25

CFG19

K27

CFG20

J26

AG33
AF33

A27
A26

C40
D41

H32

A3
A39
A4
A40
AW1
AW41
AY1
BA1
BA2
BA3
BA39
BA40
BA41
C1
AY41
B2
B41
C41
D1

T32
R32
F3
F7
AG11
AF11
H7
J19
A41
A34
D28
D27
A35

10K_0402_5%~D

10K_0402_5%~D@

1 2

+1.5VRUN

R609

12

R610

12

R613
75_0402_5%~D

CPU_MCH_BSEL0 6,8
CPU_MCH_BSEL1 6,8
CPU_MCH_BSEL2 6,8

T26PAD~D

T31PAD~D

CFG5 12
CFG6 12
CFG7 12

T32PAD~D

CFG9 12
CFG10 12
CFG11 12
CFG12 12
CFG13 12

T29PAD~D

T28PAD~D

CFG16 12

T30PAD~D

CFG18 12
CFG19 12
CFG20 12

CLK_MCH_3GPLL 6

CLK_MCH_3GPLL# 6

3GPLL_REQ# 6

+3VRUN

+VCCP

close to AK1, AK41

A A

Layout Note:
H_XRCOMP & H_YRCOMP trace width
and spacing is 10/20

http://hobi-elektronika.net

5

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

4

3

2

DELL CONFIDENTIAL/PROPRIETARY

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

Calistoga(1 of 6)

Greenland-LA2732P

10 63W ed nes da y, De ce mber 28, 2005

1

of

X03

5

D D

4

3

2

1

U39D

DDR_A_BS018
DDR_A_BS118
DDR_A_BS218 DDR_B_BS217

DDR_A_DM[0..7]18

DDR_A_DQS[0..7]18

C C

B B

DDR_A_DQS#[0..7]18

DDR_A_MA[0..13]18

DDR_A_CAS#18
DDR_A_RAS#18
DDR_A_WE#18

PAD~D

T40

PAD~D

T42

DDR_A_BS0
DDR_A_BS1
DDR_A_BS2

DDR_A_DM0
DDR_A_DM1
DDR_A_DM2
DDR_A_DM3
DDR_A_DM4
DDR_A_DM5
DDR_A_DM6
DDR_A_DM7

DDR_A_DQS0
DDR_A_DQS1
DDR_A_DQS2
DDR_A_DQS3
DDR_A_DQS4
DDR_A_DQS5
DDR_A_DQS6
DDR_A_DQS7

DDR_A_DQS#0
DDR_A_DQS#1
DDR_A_DQS#2
DDR_A_DQS#3
DDR_A_DQS#4
DDR_A_DQS#5
DDR_A_DQS#6
DDR_A_DQS#7

DDR_A_MA0
DDR_A_MA1
DDR_A_MA2
DDR_A_MA3
DDR_A_MA4
DDR_A_MA5

DDR_A_MA7
DDR_A_MA8
DDR_A_MA9
DDR_A_MA10
DDR_A_MA11 DDR_B_MA11
DDR_A_MA12
DDR_A_MA13

DDR_A_CAS#
DDR_A_RAS#
DDR_A_WE#
SA_RCVENIN#
SA_RCVENOUT#

AU12

SA_BS0

AV14

SA_BS1

BA20

SA_BS2

AJ33

SA_DM0

AM35

SA_DM1

AL26

SA_DM2

AN22

SA_DM3

AM14

SA_DM4

AL9

SA_DM5

AR3

SA_DM6

AH4

SA_DM7

AK33

SA_DQS0

AT33

SA_DQS1

AN28

SA_DQS2

AM22

SA_DQS3

AN12

SA_DQS4

AN8

SA_DQS5

AP3

SA_DQS6

AG5

SA_DQS7

AK32

SA_DQS0#

AU33

SA_DQS1#

AN27

SA_DQS2#

AM21

SA_DQS3#

AM12

SA_DQS4#

AL8

SA_DQS5#

AN3

SA_DQS6#

AH5

SA_DQS7#

AY16

SA_MA0

AU14

SA_MA1

AW16

SA_MA2

BA16

SA_MA3

BA17

SA_MA4

AU16

SA_MA5

AV17

SA_MA6

AU17

SA_MA7

AW17

SA_MA8

AT16

SA_MA9

AU13

SA_MA10

AT17

SA_MA11

AV20

SA_MA12

AV12

SA_MA13

AY13

SA_CAS#

AW14

SA_RAS#

AY14

SA_WE#

AK23

SA_RCVENIN#

AK24

SA_RCVENOUT#

CALISTOGA A0 _ FCBGA1466~D

SA_DQ0
SA_DQ1
SA_DQ2
SA_DQ3
SA_DQ4
SA_DQ5
SA_DQ6
SA_DQ7
SA_DQ8

SA_DQ9
SA_DQ10
SA_DQ11
SA_DQ12
SA_DQ13
SA_DQ14
SA_DQ15
SA_DQ16
SA_DQ17
SA_DQ18
SA_DQ19
SA_DQ20
SA_DQ21
SA_DQ22
SA_DQ23
SA_DQ24
SA_DQ25
SA_DQ26
SA_DQ27
SA_DQ28
SA_DQ29
SA_DQ30
SA_DQ31
SA_DQ32
SA_DQ33
SA_DQ34
SA_DQ35
SA_DQ36
SA_DQ37
SA_DQ38
SA_DQ39

DDR SYS MEMORY A

SA_DQ40
SA_DQ41
SA_DQ42
SA_DQ43
SA_DQ44
SA_DQ45
SA_DQ46
SA_DQ47
SA_DQ48
SA_DQ49
SA_DQ50
SA_DQ51
SA_DQ52
SA_DQ53
SA_DQ54
SA_DQ55
SA_DQ56
SA_DQ57
SA_DQ58
SA_DQ59
SA_DQ60
SA_DQ61
SA_DQ62
SA_DQ63

AJ35
AJ34
AM31
AM33
AJ36
AK35
AJ32
AH31
AN35
AP33
AR31
AP31
AN38
AM36
AM34
AN33
AK26
AL27
AM26
AN24
AK28
AL28
AM24
AP26
AP23
AL22
AP21
AN20
AL23
AP24
AP20
AT21
AR12
AR14
AP13
AP12
AT13
AT12
AL14
AL12
AK9
AN7
AK8
AK7
AP9
AN9
AT5
AL5
AY2
AW2
AP1
AN2
AV2
AT3
AN1
AL2
AG7
AF9
AG4
AF6
AG9
AH6
AF4
AF8

DDR_A_D0
DDR_A_D1
DDR_A_D2
DDR_A_D3
DDR_A_D4
DDR_A_D5
DDR_A_D6
DDR_A_D7
DDR_A_D8
DDR_A_D9
DDR_A_D10
DDR_A_D11
DDR_A_D12
DDR_A_D13
DDR_A_D14
DDR_A_D15
DDR_A_D16
DDR_A_D17
DDR_A_D18
DDR_A_D19
DDR_A_D20
DDR_A_D21
DDR_A_D22
DDR_A_D23
DDR_A_D24
DDR_A_D25
DDR_A_D26
DDR_A_D27
DDR_A_D28
DDR_A_D29
DDR_A_D30
DDR_A_D31
DDR_A_D32
DDR_A_D33
DDR_A_D34
DDR_A_D35
DDR_A_D36
DDR_A_D37
DDR_A_D38
DDR_A_D39
DDR_A_D40
DDR_A_D41
DDR_A_D42
DDR_A_D43
DDR_A_D44
DDR_A_D45
DDR_A_D46
DDR_A_D47
DDR_A_D48
DDR_A_D49
DDR_A_D50
DDR_A_D51
DDR_A_D52
DDR_A_D53
DDR_A_D54
DDR_A_D55
DDR_A_D56
DDR_A_D57
DDR_A_D58
DDR_A_D59
DDR_A_D60
DDR_A_D61
DDR_A_D62
DDR_A_D63

PAD~D
PAD~D

DDR_B_BS0
DDR_B_BS1
DDR_B_BS2

DDR_B_DM0
DDR_B_DM1
DDR_B_DM2
DDR_B_DM3
DDR_B_DM4
DDR_B_DM5
DDR_B_DM6
DDR_B_DM7

DDR_B_DQS0
DDR_B_DQS1
DDR_B_DQS2
DDR_B_DQS3
DDR_B_DQS4
DDR_B_DQS5
DDR_B_DQS6
DDR_B_DQS7

DDR_B_DQS#0
DDR_B_DQS#1
DDR_B_DQS#2
DDR_B_DQS#3
DDR_B_DQS#4
DDR_B_DQS#5
DDR_B_DQS#6
DDR_B_DQS#7

DDR_B_MA0
DDR_B_MA1
DDR_B_MA2
DDR_B_MA3
DDR_B_MA4
DDR_B_MA5
DDR_B_MA6DDR_A_MA6
DDR_B_MA7
DDR_B_MA8
DDR_B_MA9
DDR_B_MA10

DDR_B_MA12
DDR_B_MA13

DDR_B_CAS#
DDR_B_RAS#
DDR_B_WE#
SB_RCVENIN#
SB_RCVENOUT#

DDR_B_BS017
DDR_B_BS117

DDR_B_DM[0..7]17

DDR_B_DQS[0..7]17

DDR_B_DQS#[0..7]17

DDR_B_MA[0..13]17

DDR_B_CAS#17
DDR_B_RAS#17
DDR_B_WE#17

T41
T43

U39E

AT24

SB_BS0

AV23

SB_BS1

AY28

SB_BS2

AK36

SB_DM0

AR38

SB_DM1

AT36

SB_DM2

BA31

SB_DM3

AL17

SB_DM4

AH8

SB_DM5

BA5

SB_DM6

AN4

SB_DM7

AM39

SB_DQS0

AT39

SB_DQS1

AU35

SB_DQS2

AR29

SB_DQS3

AR16

SB_DQS4

AR10

SB_DQS5

AR7

SB_DQS6

AN5

SB_DQS7

AM40

SB_DQS0#

AU39

SB_DQS1#

AT35

SB_DQS2#

AP29

SB_DQS3#

AP16

SB_DQS4#

AT10

SB_DQS5#

AT7

SB_DQS6#

AP5

SB_DQS7#

AY23

SB_MA0

AW24

SB_MA1

AY24

SB_MA2

AR28

SB_MA3

AT27

SB_MA4

AT28

SB_MA5

AU27

SB_MA6

AV28

SB_MA7

AV27

SB_MA8

AW27

SB_MA9

AV24

SB_MA10

BA27

SB_MA11

AY27

SB_MA12

AR23

SB_MA13

AR24

SB_CAS#

AU23

SB_RAS#

AR27

SB_WE#

AK16

SB_RCVENIN#

AK18

SB_RCVENOUT#

CALISTOGA A0 _ FCBGA1466~D

AK39

SB_DQ0

AJ37

SB_DQ1

AP39

SB_DQ2

AR41

SB_DQ3

AJ38

SB_DQ4

AK38

SB_DQ5

AN41

SB_DQ6

AP41

SB_DQ7

AT40

SB_DQ8

AV41

SB_DQ9

AU38

SB_DQ10

AV38

SB_DQ11

AP38

SB_DQ12

AR40

SB_DQ13

AW38

SB_DQ14

AY38

SB_DQ15

BA38

SB_DQ16

AV36

SB_DQ17

AR36

SB_DQ18

AP36

SB_DQ19

BA36

SB_DQ20

AU36

SB_DQ21

AP35

SB_DQ22

AP34

SB_DQ23

AY33

SB_DQ24

BA33

SB_DQ25

AT31

SB_DQ26

AU29

SB_DQ27

AU31

SB_DQ28

AW31

SB_DQ29

AV29

SB_DQ30

AW29

SB_DQ31

AM19

SB_DQ32

AL19

SB_DQ33

AP14

SB_DQ34

AN14

SB_DQ35

AN17

SB_DQ36

AM16

SB_DQ37

AP15

SB_DQ38

AL15

SB_DQ39
SB_DQ40
SB_DQ41
SB_DQ42
SB_DQ43
SB_DQ44
SB_DQ45
SB_DQ46
SB_DQ47
SB_DQ48
SB_DQ49
SB_DQ50
SB_DQ51
SB_DQ52
SB_DQ53
SB_DQ54
SB_DQ55
SB_DQ56
SB_DQ57
SB_DQ58
SB_DQ59
SB_DQ60
SB_DQ61
SB_DQ62
SB_DQ63

AJ11
AH10
AJ9
AN10
AK13
AH11
AK10
AJ8
BA10
AW10
BA4
AW4
AY10
AY9
AW5
AY5
AV4
AR5
AK4
AK3
AT4
AK5
AJ5
AJ3

DDR SYS MEMORY B

DDR_B_D0
DDR_B_D1
DDR_B_D2
DDR_B_D3
DDR_B_D4
DDR_B_D5
DDR_B_D6
DDR_B_D7
DDR_B_D8
DDR_B_D9
DDR_B_D10
DDR_B_D11
DDR_B_D12
DDR_B_D13
DDR_B_D14
DDR_B_D15
DDR_B_D16
DDR_B_D17
DDR_B_D18
DDR_B_D19
DDR_B_D20
DDR_B_D21
DDR_B_D22
DDR_B_D23
DDR_B_D24
DDR_B_D25
DDR_B_D26
DDR_B_D27
DDR_B_D28
DDR_B_D29
DDR_B_D30
DDR_B_D31
DDR_B_D32
DDR_B_D33
DDR_B_D34
DDR_B_D35
DDR_B_D36
DDR_B_D37
DDR_B_D38
DDR_B_D39
DDR_B_D40
DDR_B_D41
DDR_B_D42
DDR_B_D43
DDR_B_D44
DDR_B_D45
DDR_B_D46
DDR_B_D47
DDR_B_D48
DDR_B_D49
DDR_B_D50
DDR_B_D51
DDR_B_D52
DDR_B_D53
DDR_B_D54
DDR_B_D55
DDR_B_D56
DDR_B_D57
DDR_B_D58
DDR_B_D59
DDR_B_D60
DDR_B_D61
DDR_B_D62
DDR_B_D63

DDR_B_D[0..63] 17DDR_A_D[0..63] 18

A A

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Calistogo(2 of 6)

Greenland-LA2732P

11 63W ed nes da y, De ce mber 28, 2005

1

X03

of

http://hobi-elektronika.net

5

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

4

3

2

Title

Size Document Number Rev

Date: Sheet

5

D D

4

3

2

1

Strap Pin Table

T44 PAD~D

C C

B B

SDVOCTRL_DATA

+1.5VRUN

+VCCP

U39C

H27

SDVOCTRL_DATA

H28

SDVOCTRL_CLK

B37

LA_DATA0

B34

LA_DATA1

A36

LA_DATA2

C37

LA_DATA#0

B35

LA_DATA#1

A37

LA_DATA#2

F30

LB_DATA0

D29

LB_DATA1

F28

LB_DATA2

G30

LB_DATA#0

D30

LB_DATA#1

F29

LB_DATA#2

A32

LA_CLK

A33

LA_CLK#

E26

LB_CLK

E27

LB_CLK#

D32

LBKLT_CTL

J30

LBKLT_EN

H30

LCTLA_CLK

H29

LCTLB_DATA

G26

LDDC_CLK

G25

LDDC_DATA

F32

LVDD_EN

B38

LIBG

C35

LVBG

C33

LVREFH

C32

LVREFL

A16

TVDAC_A

C18

TVDAC_B

A19

TVDAC_C

J20

TV_IREF

B16

TV_IRTNA

B18

TV_IRTNB

B19

TV_IRTNC

J29

TV_DCONSEL1

K30

TV_DCONSEL0

C26

DDCCLK

C25

DDCDATA

H23

VSYNC

G23

HSYNC

E23

BLUE

D23

BLUE#

C22

GREEN

B22

GREEN#

A21

RED

B21

RED#

J22

CRT_IREF

CALISTOGA A0 _ FCBGA1466~D

EXP_COMPI

EXP_COMPO

EXP_RXN0
EXP_RXN1
EXP_RXN2
EXP_RXN3
EXP_RXN4
EXP_RXN5
EXP_RXN6
EXP_RXN7

LVDS

TV CRT

EXP_RXN8

EXP_RXN9
EXP_RXN10
EXP_RXN11
EXP_RXN12
EXP_RXN13
EXP_RXN14
EXP_RXN15

EXP_RXP0

EXP_RXP1

EXP_RXP2

EXP_RXP3

EXP_RXP4

EXP_RXP5

EXP_RXP6

EXP_RXP7

EXP_RXP8

EXP_RXP9
EXP_RXP10
EXP_RXP11
EXP_RXP12
EXP_RXP13
EXP_RXP14
EXP_RXP15

EXP_TXN0

EXP_TXN1

EXP_TXN2

EXP_TXN3

EXP_TXN4

EXP_TXN5

EXP_TXN6

EXP_TXN7

EXP_TXN8

PCI-EXPRESS GRAPHICS

EXP_TXN9
EXP_TXN10
EXP_TXN11
EXP_TXN12
EXP_TXN13
EXP_TXN14
EXP_TXN15

EXP_TXP0

EXP_TXP1

EXP_TXP2

EXP_TXP3

EXP_TXP4

EXP_TXP5

EXP_TXP6

EXP_TXP7

EXP_TXP8

EXP_TXP9
EXP_TXP10
EXP_TXP11
EXP_TXP12
EXP_TXP13
EXP_TXP14
EXP_TXP15

D40
D38

PCIE_MRX_GTX_N0

F34

PCIE_MRX_GTX_N1

G38

PCIE_MRX_GTX_N2

H34

PCIE_MRX_GTX_N3

J38

PCIE_MRX_GTX_N4

L34

PCIE_MRX_GTX_N5

M38

PCIE_MRX_GTX_N6

N34

PCIE_MRX_GTX_N7

P38

PCIE_MRX_GTX_N8

R34

PCIE_MRX_GTX_N9

T38

PCIE_MRX_GTX_N10

V34

PCIE_MRX_GTX_N11

W38

PCIE_MRX_GTX_N12

Y34

PCIE_MRX_GTX_N13

AA38

PCIE_MRX_GTX_N14

AB34

PCIE_MRX_GTX_N15

AC38

PCIE_MRX_GTX_P0

D34

PCIE_MRX_GTX_P1

F38

PCIE_MRX_GTX_P2

G34

PCIE_MRX_GTX_P3

H38

PCIE_MRX_GTX_P4

J34

PCIE_MRX_GTX_P5

L38

PCIE_MRX_GTX_P6

M34

PCIE_MRX_GTX_P7

N38

PCIE_MRX_GTX_P8

P34

PCIE_MRX_GTX_P9

R38

PCIE_MRX_GTX_P10

T34

PCIE_MRX_GTX_P11

V38

PCIE_MRX_GTX_P12

W34

PCIE_MRX_GTX_P13

Y38

PCIE_MRX_GTX_P14

AA34

PCIE_MRX_GTX_P15

AB38

PCIE_MTX_GRX_N0

F36

PCIE_MTX_GRX_N1

G40

PCIE_MTX_GRX_N2

H36

PCIE_MTX_GRX_N3

J40

PCIE_MTX_GRX_N4

L36

PCIE_MTX_GRX_N5

M40

PCIE_MTX_GRX_N6

N36

PCIE_MTX_GRX_N7

P40

PCIE_MTX_GRX_N8

R36

PCIE_MTX_GRX_N9

T40

PCIE_MTX_GRX_N10

V36

PCIE_MTX_GRX_N11

W40

PCIE_MTX_GRX_N12

Y36

PCIE_MTX_GRX_N13

AA40

PCIE_MTX_GRX_N14

AB36

PCIE_MTX_GRX_N15

AC40

PCIE_MTX_GRX_P0

D36

PCIE_MTX_GRX_P1

F40

PCIE_MTX_GRX_P2

G36

PCIE_MTX_GRX_P3

H40

PCIE_MTX_GRX_P4

J36

PCIE_MTX_GRX_P5

L40

PCIE_MTX_GRX_P6

M36

PCIE_MTX_GRX_P7

N40

PCIE_MTX_GRX_P8

P36

PCIE_MTX_GRX_P9

R40

PCIE_MTX_GRX_P10

T36

PCIE_MTX_GRX_P11

V40

PCIE_MTX_GRX_P12

W36

PCIE_MTX_GRX_P13

Y40

PCIE_MTX_GRX_P14

AA36

PCIE_MTX_GRX_P15

AB40

PEGCOMP

R615

24.9_0402_1%~D

1 2

+1.5VRUN_PCIE

PCIE_MRX_GTX_N[0..15]

PCIE_MRX_GTX_P[0..15]

PCIE_MTX_GRX_N[0..15]

PCIE_MTX_GRX_P[0..15]

PCIE_MRX_GTX_N[0..15] 19

PCIE_MRX_GTX_P[0..15] 19

PCIE_MTX_GRX_N[0..15] 19

PCIE_MTX_GRX_P[0..15] 19

CFG5

CFG6

CFG7

CFG9

CFG10

CFG11

CFG[13:12]

CFG16

(FSB Dynamic ODT)

CFG18

(VCC Select)

CFG19

(DMI Lane Reversal)

SDVO_CTRLDATA

CFG20

(PCIE/SDVO select)

Low = DMI x 2
High = DMI x 4
Low = Moby Dick
High = Calistoga
Low = DT/Transportable CPU
High = Mobile CPU
Low = Reverse Lane
High = Normal Operation

*

*

*

*

Low = Reserved
High = Mobility

PSB 4x Clock Enable
Low = Calistoga
High = Reserved

00 = Reserved
01 = XOR Mode Enabled
10 = All Z Mode Enabled
11 = Normal Operation

(Default)

*

*

*

Low = Disabled
High = Enabled

Low = 1.05V (Default)
High = 1.5V
Low = Normal

Operation (Default):
Lane number in Order

*

*

*

High = Reverse Lane

Low = No SDVO Device Present
High = SDVO Device Present

Low = Only PCIE or SDVO is
operational.

High = PCIE/SDVO are operating
simu.

(Default)

(Default)

*

*

R617 2.2K_0402_5%~D@

CFG510
CFG610
CFG710
CFG910
CFG1010
CFG1110
CFG1210
CFG1310
CFG1610

1 2

R622 2.2K_0402_5%~D@

1 2

R625 2.2K_0402_5%~D@

1 2

R618 2.2K_0402_5%~D@

1 2

R624 2.2K_0402_5%~D@

1 2

R619 2.2K_0402_5%~D@

1 2

R626 2.2K_0402_5%~D@

1 2

R620 2.2K_0402_5%~D@

1 2

R621 2.2K_0402_5%~D@

1 2

CFG[3:17] have internal pullup

R623 1K_0402_5%~D@

CFG1810
CFG1910
CFG2010

1 2

R627 1K_0402_5%~D@

1 2

R628 1K_0402_5%~D@

1 2

CFG[18:19] have internal pulldown

+3VRUN

A A

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Calistoga(3 of 6)

Greenland-LA2732P

12 63W ed nes da y, De ce mber 28, 2005

1

X03

of

http://hobi-elektronika.net

5

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

4

3

2

Title

Size Document Number Rev

Date: Sheet

5

4

3

2

1

+VCCP

D D

CRB 270uF

1

+

C747

2

330U_D2E_2.5VM~D

C C

B B

A A

1

C754

C755

2

4.7U_0805_10V4Z~D

2.2U_0603_6.3V6K~D

C763

0.47U_0402_10V4Z~D

1

C772

2

1

C773

0.22U_0402_10V4Z~D

2

0.22U_0402_10V4Z~D

+1.5VRUN

1

2

U39_A6

1

2

U39_D2

U39_AB1

1

C775

2

0.47U_0402_10V4Z~D

U39H

AC14

VTT0

AB14

VTT1

W14

VTT2

V14

VTT3

T14

VTT4

R14

VTT5

P14

VTT6

N14

VTT7

M14

VTT8

L14

VTT9

AD13

VTT10

AC13

VTT11

AB13

VTT12

AA13

VTT13

Y13

VTT14

W13

VTT15

V13

VTT16

U13

VTT17

T13

VTT18

R13

VTT19

N13

VTT20

M13

VTT21

L13

VTT22

AB12

VTT23

AA12

VTT24

Y12

VTT25

W12

VTT26

V12

VTT27

U12

VTT28

T12

VTT29

R12

VTT30

P12

VTT31

N12

VTT32

M12

L12
R11
P11
N11

M11

R10
P10
N10

M10

AB1

AG14
AF14
AE14

Y14
AF13
AE13
AF12
AE12
AD12

P9

N9
M9
R8

P8
N8
M8

P7
N7
M7
R6

P6
M6

A6
R5

P5
N5
M5

P4
N4
M4
R3

P3
N3
M3
R2

P2
M2
D2

R1

P1
N1
M1

P O W E R

VTT33
VTT34
VTT35
VTT36
VTT37
VTT38
VTT39
VTT40
VTT41
VTT42
VTT43
VTT44
VTT45
VTT46
VTT47
VTT48
VTT49
VTT50
VTT51
VTT52
VTT53
VTT54
VTT55
VTT56
VTT57
VTT58
VTT59
VTT60
VTT61
VTT62
VTT63
VTT64
VTT65
VTT66
VTT67
VTT68
VTT69
VTT70
VTT71
VTT72
VTT73
VTT74
VTT75
VTT76

VCCAUX32
VCCAUX33
VCCAUX34
VCCAUX35
VCCAUX36
VCCAUX37
VCCAUX38
VCCAUX39
VCCAUX40

CALISTOGA A0_FCBGA1466~D

VCC_SYNC

VCCTX_LVDS0
VCCTX_LVDS1
VCCTX_LVDS2

VCC3G0
VCC3G1
VCC3G2
VCC3G3
VCC3G4
VCC3G5
VCC3G6

VCCA_3GPLL

VCCA_3GBG
VSSA_3GBG

VCCA_CRTDAC0
VCCA_CRTDAC1
VSSA_CRTDAC2

VCCA_DPLLA
VCCA_DPLLB

VCCA_HPLL

VCCA_LVDS

VSSA_LVDS

VCCA_MPLL
VCCA_TVBG

VSSA_TVBG

VCCA_TVDACA0
VCCA_TVDACA1
VCCA_TVDACB0
VCCA_TVDACB1
VCCA_TVDACC0
VCCA_TVDACC1

VCCD_HMPLL0
VCCD_HMPLL1

VCCD_LVDS0
VCCD_LVDS1
VCCD_LVDS2

VCCD_TVDAC

VCCDQ_TVDAC

VCCHV0
VCCHV1
VCCHV2

VCCAUX0
VCCAUX1
VCCAUX2
VCCAUX3
VCCAUX4
VCCAUX5
VCCAUX6
VCCAUX7
VCCAUX8

VCCAUX9
VCCAUX10
VCCAUX11
VCCAUX12
VCCAUX13
VCCAUX14
VCCAUX15
VCCAUX16
VCCAUX17
VCCAUX18
VCCAUX19
VCCAUX20
VCCAUX21
VCCAUX22
VCCAUX23
VCCAUX24
VCCAUX25
VCCAUX26
VCCAUX27
VCCAUX28
VCCAUX29
VCCAUX30
VCCAUX31

H22

B30
C30
A30

AB41
AJ41
L41
N41
R41
V41
Y41

AC33
G41
H41

E21
F21
G21

B26
C39
AF1

A38
B39

AF2
H20

G20

E19
F19
C20
D20
E20
F20

AH1
AH2

A28
B28
C28

D21
H19

A23
B23
B25

AK31
AF31
AE31
AC31
AL30
AK30
AJ30
AH30
AG30
AF30
AE30
AD30
AC30
AG29
AF29
AE29
AD29
AC29
AG28
AF28
AE28
AH22
AJ21
AH21
AJ20
AH20
AH19
P19
P16
AH15
P15
AH14

W=30 mils

+1.5VRUN_3GPLL

0.1U_0402_16V4Z~D

+VCCP

+1.5VRUN_DPLLA
+1.5VRUN_DPLLB
+1.5VRUN_HPLL

+1.5VRUN_MPLL
+1.5VRUN

+1.5VRUN

C766

0.1U_0402_16V4Z~D

+1.5VRUN

1

2

Should be placed on top

+1.5VRUN_PCIE

1

1

+

C743

C744

2

+2.5VRUN

1

C740

2

Route +2.5VRUN from GMCH pinG41 to
decoupling cap (C740)<200mil to the edge.

1

2

C774

+3VRUN

1

C767

2

10U_0805_4VAM~D

0.1U_0402_16V4Z~D

2

220U_D2_4VM~D

+1.5VRUN_QTVDAC

C892

0.022U_0402_16V7K~D

1

C739

2

10U_0805_4VAM~D

1

1

2

2

BLM21PG600SN1D_0805~D

10U_0805_4VAM~D

C770

0.1U_0402_16V4Z~D

L58

12

+1.5VRUN

+1.5VRUN

L60

12

BLM18PG181SN1_0603~D

Should be placed in cavity

+1.5VRUN_3GPLL

1

C780

2

0.1U_0402_16V4Z~D

R651

0.5_0805_1%~D

1 2

1

C781

2

10U_0805_4VAM~D

+1.5VRUN_MPLL

45mA Max.

1

C778

2

0.1U_0402_16V4Z~D

+1.5VRUN_DPLLB

40mA Max.

10U_MLZ2012E100PTAIN_60mA_25%_0805~D

1

C896

2

0.1U_0402_16V4Z~D

+1.5VRUN_HPLL

45mA Max.

1

C776

2

0.1U_0402_16V4Z~D

+1.5VRUN_DPLLA

40mA Max.

10U_MLZ2012E100PTAIN_60mA_25%_0805~D

1

C895

2

+3GPLL_R

BLM21PG600SN1D_0805~D

1

2

1

2

0.1U_0402_16V4Z~D

L63

L62

12

BLM18AG121SN1D_0603~D

C779
22U_0805_6.3V6M~D

L73

12

L61

12

BLM18AG121SN1D_0603~D

C777
22U_0805_6.3V6M~D

L72

12

12

+1.5VRUN

+1.5VRUN

+1.5VRUN

1

C782

2

0.1U_0402_16V4Z~D

+1.5VRUN

+1.5VRUN

http://hobi-elektronika.net

5

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

4

3

2

Title

Size Document Number Rev

Date: Sheet

Compal Elec tronics, Inc.

Calistoga(4 of 6)

Greenland-LA2732P

13 63Wednesday, December 28, 2005

1

of

X03

5

4

3

2

1

+VCCP

+VCCP

D D

1

1

C788

2

0.22U_0402_10V4Z~D

1

C C

C789

2

10U_0805_4VAM~D

C794

C792

C800

1

C791

2

2

0.22U_0402_10V4Z~D

0.22U_0402_10V4Z~D

1

1

C790

2

2

1U_0603_10V4Z~D

10U_0805_4VAM~D

1

+

2

330U_D2E_2.5VM~D

CRB 270uF

1

B B

A A

C804

+

2

330U_D2E_2.5VM~D

+VCCP

U39F

AD27

VCC_NCTF0

AC27

VCC_NCTF1

AB27

VCC_NCTF2

AA27

VCC_NCTF3

Y27

VCC_NCTF4

W27

VCC_NCTF5

V27

VCC_NCTF6

U27

VCC_NCTF7

T27

VCC_NCTF8

R27

VCC_NCTF9

AD26

VCC_NCTF10

AC26

VCC_NCTF11

AB26

VCC_NCTF12

AA26

VCC_NCTF13

Y26

VCC_NCTF14

W26

VCC_NCTF15

V26

VCC_NCTF16

U26

VCC_NCTF17

T26

VCC_NCTF18

R26

VCC_NCTF19

AD25

VCC_NCTF20

AC25

VCC_NCTF21

AB25

VCC_NCTF22

AA25

VCC_NCTF23

Y25

VCC_NCTF24

W25

VCC_NCTF25

V25

VCC_NCTF26

U25

VCC_NCTF27

T25

VCC_NCTF28

R25

VCC_NCTF29

AD24

VCC_NCTF30

AC24

VCC_NCTF31

AB24

VCC_NCTF32

AA24

VCC_NCTF33

Y24

VCC_NCTF34

W24

VCC_NCTF35

V24

VCC_NCTF36

U24

VCC_NCTF37

T24

VCC_NCTF38

R24

VCC_NCTF39

AD23

VCC_NCTF40

V23

VCC_NCTF41

U23

VCC_NCTF42

T23

VCC_NCTF43

R23

VCC_NCTF44

AD22

VCC_NCTF45

V22

VCC_NCTF46

U22

VCC_NCTF47

T22

VCC_NCTF48

R22

VCC_NCTF49

AD21

VCC_NCTF50

V21

VCC_NCTF51

U21

VCC_NCTF52

T21

VCC_NCTF53

R21

VCC_NCTF54

AD20

VCC_NCTF55

V20

VCC_NCTF56

U20

VCC_NCTF57

T20

VCC_NCTF58

R20

VCC_NCTF59

AD19

VCC_NCTF60

V19

VCC_NCTF61

U19

VCC_NCTF62

T19

VCC_NCTF63

AD18

VCC_NCTF64

AC18

VCC_NCTF65

AB18

VCC_NCTF66

AA18

VCC_NCTF67

Y18

VCC_NCTF68

W18

VCC_NCTF69

V18

VCC_NCTF70

U18

VCC_NCTF71

T18

VCC_NCTF72

M19

VCC100

L19

VCC101

N18

VCC102

M18

VCC103

L18

VCC104

P17

VCC105

N17

VCC106

M17

VCC107

N16

VCC108

M16

VCC109

L16

VCC110

CALISTOGA A0 _ FCBGA1466~D

VCCAUX_NCTF0
VCCAUX_NCTF1
VCCAUX_NCTF2
VCCAUX_NCTF3
VCCAUX_NCTF4
VCCAUX_NCTF5
VCCAUX_NCTF6
VCCAUX_NCTF7
VCCAUX_NCTF8

VCCAUX_NCTF9
VCCAUX_NCTF10
VCCAUX_NCTF11
VCCAUX_NCTF12
VCCAUX_NCTF13
VCCAUX_NCTF14
VCCAUX_NCTF15
VCCAUX_NCTF16
VCCAUX_NCTF17
VCCAUX_NCTF18
VCCAUX_NCTF19
VCCAUX_NCTF20
VCCAUX_NCTF21
VCCAUX_NCTF22
VCCAUX_NCTF23
VCCAUX_NCTF24
VCCAUX_NCTF25
VCCAUX_NCTF26
VCCAUX_NCTF27
VCCAUX_NCTF28
VCCAUX_NCTF29
VCCAUX_NCTF30
VCCAUX_NCTF31
VCCAUX_NCTF32
VCCAUX_NCTF33
VCCAUX_NCTF34
VCCAUX_NCTF35
VCCAUX_NCTF36
VCCAUX_NCTF37

P O W E R

VCCAUX_NCTF38
VCCAUX_NCTF39
VCCAUX_NCTF40
VCCAUX_NCTF41
VCCAUX_NCTF42
VCCAUX_NCTF43
VCCAUX_NCTF44
VCCAUX_NCTF45
VCCAUX_NCTF46
VCCAUX_NCTF47
VCCAUX_NCTF48
VCCAUX_NCTF49
VCCAUX_NCTF50
VCCAUX_NCTF51
VCCAUX_NCTF52
VCCAUX_NCTF53
VCCAUX_NCTF54
VCCAUX_NCTF55
VCCAUX_NCTF56
VCCAUX_NCTF57

VSS_NCTF0
VSS_NCTF1
VSS_NCTF2
VSS_NCTF3
VSS_NCTF4
VSS_NCTF5
VSS_NCTF6
VSS_NCTF7
VSS_NCTF8

VSS_NCTF9
VSS_NCTF10
VSS_NCTF11
VSS_NCTF12

VCC_SM100

VCC_SM101

VCC_SM102

VCC_SM103

VCC_SM104

VCC_SM105

VCC_SM106

VCC_SM107

+1.5VRUN

AG27
AF27
AG26
AF26
AG25
AF25
AG24
AF24
AG23
AF23
AG22
AF22
AG21
AF21
AG20
AF20
AG19
AF19
R19
AG18
AF18
R18
AG17
AF17
AE17
AD17
AB17
AA17
W17
V17
T17
R17
AG16
AF16
AE16
AD16
AC16
AB16
AA16
Y16
W16
V16
U16
T16
R16
AG15
AF15
AE15
AD15
AC15
AB15
AA15
Y15
W15
V15
U15
T15
R15

AE27
AE26
AE25
AE24
AE23
AE22
AE21
AE20
AE19
AE18
AC17
Y17
U17

VCCSM_LF2
VCCSM_LF1

+1.8VSUS

C806

1

C807

2

0.47U_0402_10V4Z~D

AR6
AP6
AN6
AL6
AK6
AJ6
AV1
AJ1

Place near U39.AV1 & AJ1

1

2

0.47U_0402_10V4Z~D

U39G

AA33

VCC0

W33

VCC1

P33

VCC2

N33

VCC3

L33

VCC4

J33

VCC5

AA32

VCC6

Y32

VCC7

W32

VCC8

V32

VCC9

P32

VCC10

N32

VCC11

M32

VCC12

L32

VCC13

J32

VCC14

AA31

VCC15

W31

VCC16

V31

VCC17

T31

VCC18

R31

VCC19

P31

VCC20

N31

VCC21

M31

VCC22

AA30

VCC23

Y30

VCC24

W30

VCC25

V30

VCC26

U30

VCC27

T30

VCC28

R30

VCC29

P30

VCC30

N30

VCC31

M30

VCC32

AA29

W29

M29

AB28
AA28

M28

M27

M25

M24
AB23
AA23

M23
AC22

AB22

W22

M22
AC21

AA21

W21

M21
AC20

AB20

W20

M20
AB19

AA19

L30
Y29
V29

U29
R29
P29

L29

Y28
V28
U28
T28
R28
P28
N28

L28
P27
N27

L27
P26
N26

L26
N25

L25
P24
N24

Y23
P23
N23

L23

Y22
P22

N22

L22

N21

L21

Y20
P20

N20

L20

Y19
N19

P O W E R

VCC33
VCC34
VCC35
VCC36
VCC37
VCC38
VCC39
VCC40
VCC41
VCC42
VCC43
VCC44
VCC45
VCC46
VCC47
VCC48
VCC49
VCC50
VCC51
VCC52
VCC53
VCC54
VCC55
VCC56
VCC57
VCC58
VCC59
VCC60
VCC61
VCC62
VCC63
VCC64
VCC65
VCC66
VCC67
VCC68
VCC69
VCC70
VCC71
VCC72
VCC73
VCC74
VCC75
VCC76
VCC77
VCC78
VCC79
VCC80
VCC81
VCC82
VCC83
VCC84
VCC85
VCC86
VCC87
VCC88
VCC89
VCC90
VCC91
VCC92
VCC93
VCC94
VCC95
VCC96
VCC97
VCC98
VCC99

CALISTOGA A0 _ FCBGA1466~D

VCC_SM0
VCC_SM1
VCC_SM2
VCC_SM3
VCC_SM4
VCC_SM5
VCC_SM6
VCC_SM7
VCC_SM8

VCC_SM9
VCC_SM10
VCC_SM11
VCC_SM12
VCC_SM13
VCC_SM14
VCC_SM15
VCC_SM16
VCC_SM17
VCC_SM18
VCC_SM19
VCC_SM20
VCC_SM21
VCC_SM22
VCC_SM23
VCC_SM24
VCC_SM25
VCC_SM26
VCC_SM27
VCC_SM28
VCC_SM29
VCC_SM30
VCC_SM31
VCC_SM32
VCC_SM33
VCC_SM34
VCC_SM35
VCC_SM36
VCC_SM37
VCC_SM38
VCC_SM39
VCC_SM40
VCC_SM41
VCC_SM42
VCC_SM43
VCC_SM44
VCC_SM45
VCC_SM46
VCC_SM47
VCC_SM48
VCC_SM49
VCC_SM50
VCC_SM51
VCC_SM52
VCC_SM53
VCC_SM54
VCC_SM55
VCC_SM56
VCC_SM57
VCC_SM58
VCC_SM59
VCC_SM60
VCC_SM61
VCC_SM62
VCC_SM63
VCC_SM64
VCC_SM65
VCC_SM66
VCC_SM67
VCC_SM68
VCC_SM69
VCC_SM70
VCC_SM71
VCC_SM72
VCC_SM73
VCC_SM74
VCC_SM75
VCC_SM76
VCC_SM77
VCC_SM78
VCC_SM79
VCC_SM80
VCC_SM81
VCC_SM82
VCC_SM83
VCC_SM84
VCC_SM85
VCC_SM86
VCC_SM87
VCC_SM88
VCC_SM89
VCC_SM90
VCC_SM91
VCC_SM92
VCC_SM93
VCC_SM94
VCC_SM95
VCC_SM96
VCC_SM97
VCC_SM98
VCC_SM99

AU41
AT41
AM41
AU40
BA34
AY34
AW34
AV34
AU34
AT34
AR34
BA30
AY30
AW30
AV30
AU30
AT30
AR30
AP30
AN30
AM30
AM29
AL29
AK29
AJ29
AH29
AJ28
AH28
AJ27
AH27
BA26
AY26
AW26
AV26
AU26
AT26
AR26
AJ26
AH26
AJ25
AH25
AJ24
AH24
BA23
AJ23
BA22
AY22
AW22
AV22
AU22
AT22
AR22
AP22
AK22
AJ22
AK21
AK20
BA19
AY19
AW19
AV19
AU19
AT19
AR19
AP19
AK19
AJ19
AJ18
AJ17
AH17
AJ16
AH16
BA15
AY15
AW15
AV15
AU15
AT15
AR15
AJ15
AJ14
AJ13
AH13
AK12
AJ12
AH12
AG12
AK11
BA8
AY8
AW8
AV8
AT8
AR8
AP8
BA6
AY6
AW6
AV6
AT6

+1.8VSUS

VCCSM_LF4
VCCSM_LF5

Place near U39.AT41 & AM41

1

C795

2

1

C799

2

0.47U_0402_10V4Z~D

Place near U39.BA23

1

C801

2

10U_0805_4VAM~D

1

C805

2

0.47U_0402_10V4Z~D

Place near U39.BA15

C787

0.1U_0402_16V4Z~D

1

1

C793

2

2

0.47U_0402_10V4Z~D

0.47U_0402_10V4Z~D

C796

C802

1

2

1

2

10U_0805_4VAM~D

1

C797

2

0.1U_0402_16V4Z~D

1

C798

2

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

http://hobi-elektronika.net

5

DELL CONFIDENTIAL/PROPRIETARY

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

4

3

2

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

Calistoga(5 of 6)

Greenland-LA2732P

14 63W ed nes da y, De ce mber 28, 2005

1

X03

of

5

4

3

2

1

U39I

AC41

VSS0

AA41

VSS1

W41

VSS2

T41

VSS3

P41

D D

C C

B B

A A

VSS4

M41

VSS5

J41

VSS6

F41

VSS7

AV40

VSS8

AP40

VSS9

AN40

VSS10

AK40

VSS11

AJ40

VSS12

AH40

VSS13

AG40

VSS14

AF40

VSS15

AE40

VSS16

B40

VSS17

AY39

VSS18

AW39

VSS19

AV39

VSS20

AR39

VSS21

AN39

VSS22

AJ39

VSS23

AC39

VSS24

AB39

VSS25

AA39

VSS26

Y39

VSS27

W39

VSS28

V39

VSS29

T39

VSS30

R39

VSS31

P39

VSS32

N39

VSS33

M39

VSS34

P O W E R

VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80
VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
VSS95
VSS96
VSS97
VSS98
VSS99

CALISTOGA A0_FCBGA1466~D

AT38

AM38

AH38
AG38
AF38
AE38

AK37
AH37
AB37
AA37

W37

AY36

AW36

AN36
AH36
AG36
AF36
AE36
AC36

BA35
AV35
AR35
AH35
AB35
AA35

W35

AN34
AK34
AG34
AF34

L39

J39
H39
G39

F39
D39

C38

Y37

V37

T37
R37

P37
N37
M37

L37

J37
H37
G37

F37
D37

C36

B36

Y35

V35

T35
R35

P35
N35
M35

L35

J35
H35
G35

F35
D35

VSS100
VSS101
VSS102
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
VSS130
VSS131
VSS132
VSS133
VSS134
VSS135
VSS136
VSS137
VSS138
VSS139
VSS140
VSS141
VSS142
VSS143
VSS144
VSS145
VSS146
VSS147
VSS148
VSS149
VSS150
VSS151
VSS152
VSS153
VSS154
VSS155
VSS156
VSS157
VSS158
VSS159
VSS160
VSS161
VSS162
VSS163
VSS164
VSS165
VSS166
VSS167
VSS168
VSS169
VSS170
VSS171
VSS172
VSS173
VSS174
VSS175
VSS176
VSS177
VSS178
VSS179
VSS180
VSS181
VSS182
VSS183
VSS184
VSS185
VSS186
VSS187
VSS188
VSS189
VSS190
VSS191
VSS192
VSS193
VSS194
VSS195
VSS196
VSS197
VSS198
VSS199

AE34
AC34
C34
AW33
AV33
AR33
AE33
AB33
Y33
V33
T33
R33
M33
H33
G33
F33
D33
B33
AH32
AG32
AF32
AE32
AC32
AB32
G32
B32
AY31
AV31
AN31
AJ31
AG31
AB31
Y31
AB30
E30
AT29
AN29
AB29
T29
N29
K29
G29
E29
C29
B29
A29
BA28
AW28
AU28
AP28
AM28
AD28
AC28
W28
J28
E28
AP27
AM27
AK27
J27
G27
F27
C27
B27
AN26
M26
K26
F26
D26
AK25
P25
K25
H25
E25
D25
A25
BA24
AU24
AL24
AW23
AT23
AN23
AM23
AH23
AC23
W23
K23
J23
F23
C23
AA22
K22
G22
F22
E22
D22
A22
BA21
AV21
AR21

U39J

AN21

VSS200

AL21

VSS201

AB21

VSS202

Y21

VSS203

P21

VSS204

K21

VSS205

J21

VSS206

H21

VSS207

C21

VSS208

AW20

VSS209

AR20

VSS210

AM20

VSS211

AA20

VSS212

K20

VSS213

B20

VSS214

A20

VSS215

AN19

VSS216

AC19

VSS217

W19

VSS218

K19

VSS219

G19

VSS220

C19

VSS221

AH18

VSS222

P18

VSS223

H18

VSS224

D18

VSS225

A18

VSS226

AY17

VSS227

AR17

VSS228

AP17

VSS229

AM17

VSS230

AK17

VSS231

AV16

VSS232

AN16

VSS233

AL16

VSS234

J16

VSS235

F16

VSS236

C16

VSS237

AN15

VSS238

AM15

VSS239

AK15

VSS240

N15

VSS241

M15

VSS242

L15

VSS243

B15

VSS244

A15

VSS245

BA14

VSS246

AT14

VSS247

AK14

VSS248

AD14

VSS249

AA14

VSS250

U14

VSS251

K14

VSS252

H14

VSS253

E14

VSS254

AV13

VSS255

AR13

VSS256

AN13

VSS257

AM13

VSS258

AL13

VSS259

AG13

VSS260

P13

VSS261

F13

VSS262

D13

VSS265

B13

VSS264

AY12

VSS263

AC12

VSS266

K12

VSS267

H12

VSS268

E12

VSS269

AD11

VSS270

AA11

VSS271

Y11

VSS272

J11

VSS273

D11

VSS274

B11

VSS275

AV10

VSS276

AP10

VSS277

AL10

VSS278

AJ10

VSS279

CALISTOGA A0_FCBGA1466~D

P O W E R

VSS280
VSS281
VSS282
VSS283
VSS284
VSS285
VSS286
VSS287
VSS288
VSS289
VSS290
VSS292
VSS291
VSS293
VSS294
VSS295
VSS296
VSS297
VSS298
VSS299
VSS300
VSS301
VSS302
VSS303
VSS304
VSS305
VSS306
VSS307
VSS308
VSS309
VSS310
VSS311
VSS312
VSS313
VSS314
VSS315
VSS316
VSS317
VSS318
VSS319
VSS320
VSS321
VSS322
VSS323
VSS324
VSS325
VSS326
VSS327
VSS328
VSS329
VSS330
VSS331
VSS332
VSS333
VSS334
VSS335
VSS336
VSS337
VSS338
VSS339
VSS340
VSS341
VSS342
VSS343
VSS344
VSS345
VSS346
VSS347
VSS348
VSS349
VSS350
VSS351
VSS352
VSS353
VSS354
VSS355
VSS356
VSS357
VSS358
VSS359
VSS360

AG10
AC10
W10
U10
BA9
AW9
AR9
AH9
AB9
Y9
R9
G9
E9
A9
AG8
AD8
AA8
U8
K8
C8
BA7
AV7
AP7
AL7
AJ7
AH7
AF7
AC7
R7
G7
D7
AG6
AD6
AB6
Y6
U6
N6
K6
H6
B6
AV5
AF5
AD5
AY4
AR4
AP4
AL4
AJ4
Y4
U4
R4
J4
F4
C4
AY3
AW3
AV3
AL3
AH3
AG3
AF3
AD3
AC3
AA3
G3
AT2
AR2
AP2
AK2
AJ2
AD2
AB2
Y2
U2
T2
N2
J2
H2
F2
C2
AL1

http://hobi-elektronika.net

5

DELL CONFIDENTIAL/PROPRIETARY

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

4

3

2

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

Calistoga(6 of 6)

Greenland-LA2732P

15 63W ed nes da y, De ce mber 28, 2005

1

X03

of

5

+3VRUN +3VRUN+12VRUN

12

R530
10K_0402_5%~D

D D

1

D22

@

RB751V_SOD323~D

1

C672

22U_1206_10V4Z~D

C671

2

@

1000P_0402_50V7K~D

2

2 1

MOLEX_53261-0371~D

1

@

2

JFAN1

1

1

2

2

4

3

3

5

FAN1 FAN2

FAN1 Control and Tachometer

Place C545 close to the Guardian

C C

B B

REM_DIODE3_N, REM_DIODE3_P routing together.
Trace width / Spacing = 10 / 10 mil

A A

2200P_0402_50V7K~D

Place near the bottom SODIMM

http://hobi-elektronika.net

H_THERMDA7

2200P_0402_50V7K~D

H_THERMDC7

+3VSUS

0.1U_0402_16V4Z~D

+3VSUS

C907

0.1U_0402_16V4Z~D

1

Q72

C923

2

@

PMBT3904_SOT23~D

49.9_0603_1%~D

1 2

1

2

5

pins as possible

C545

R810

1

C906

2

+RTC_CELL

0.1U_0402_16V4Z~D

R815

147K_0402_1%~D

R818

41.2K_0402_1%~D

E

31

B

2

C

C910

2200P_0402_50V7K~D

1

2

DAT_SMB37

+3VSUS

SUSPWROK23,43

1

C534

12

12

1

2

2200P_0402_50V7K~D

ICH_PWRGD#43
POWER_SW#37,39

2

1 2

R814 8.2K_0402_5%~D

1K_0402_5%~D

R817

C908

1

1 2

2

REM_DIODE3_N
REM_DIODE3_P

Place C910 close to the Guardian
pins as possible

4

FAN1_TACH 37 FAN2_TACH 37

C662
1000P_0402_50V7K~D

4
5

DAT_SMB
CLK_SMB

1 2

R811 7.5K_0402_5%~D

+3VSUS_THRM

1 2

R812 1K_0402_5%~D

1 2

R462 1K_0402_5%~D

THERMATRIP1#
THERMATRIP2#
THERMATRIP_VGA#

+FAN1_VOUT
FAN2_PWM

4

3

FAN2_PWM FAN2VREF

1 2

120K_0402_5%~D

Note: +3VRUN leakage issue from ATI M22

THERMATRIP_VGA#

+3VRUN

R175

2.2K_0402_5%~D

1 2

OTBMP#19

U51

7

SMDATA

8

SMBCLK

23

LDO_SHDN#_ADDR

35

DP2

34

DN2

12

+3V_SUS

21

VSUS_PWRGD

18

+RTC_PWR3V

13

+3V_PWROK#

38

POWER_SW#

14

THERMTRIP1#

15

THERMTRIP2#

16

THERMTRIP3#

39

VSET

29

HW_LOCK#

9

VSS

1

DP3

2

DN3

6

FAN_OUT

33

FAN_DAC

10

GPIO1

11

GPIO2

19

GPIO3

20

GPIO4

32

GPIO5

EMC4000_QFN40~D

C

Q23

2

B

PMBT3904_SOT23~D

E

3 1

R181

0_0402_5%~D@

1 2

Voltage margining circuit for LDO output.
For Vmargin, stuff R886 and R834=30K.
R834=1K for production

ATF_INT#

17

ATF_INT#

VCP1

3

VCP
VCP

LDO_POK

DN1
DP1

THERMTRIP_SIO

THERM_STP#

INTRUDER#

LDO_SET

LDO_OUT
LDO_OUT

LDO_IN
LDO_IN

VDD_5V

40

31

36
37

30
4

22

24
25

27

26
28

5

VCP2

2.5V_RUN_PW RGD

REM_DIODE1_N
REM_DIODE1_P

LDO_SET

+3VRUN_R

SMBUS ADDRESS : 2F

1

2

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

3

R551

VCP1 25
VCP2 25

R835 10K_0402_5%~D@

1

C916

C915

2

0.1U_0402_16V4Z~D

C921

1 2

0.1U_0402_16V4Z~D

8

U38B

5

P

FAN2_VFB

1

C679

2

0.22U_0603_10V7K~D

R553

1 2

120K_0402_5%~D

IN+

6

IN-

4

1 2

C680 2200P_0402_50V7K~D@

R552

78.7K_0402_1%~D

FAN2_ON

7

O

G

LM358M_SO8~D

12

RB751V_SOD323~D

D15

FAN2 Control and Tachometer

+2.5VRUN

12

R886

31.6K_0402_1%~D

LDO_SET

ATF_INT# 37CLK_SMB37

2.5V_RUN_PWRGD 43

Place C546 close to the Guardian
pins as possible

+3VALW

12

2200P_0402_50V7K~D
R816
10K_0402_5%~D

+5VRUN

10U_0805_10V4Z~D

1

C546

2

THERMTRIP_SIO 38

ACAV_IN 19,37,46,52

THERM_STP# 48

12

1

C913

2

@

1

C914

2

@

@

12

R834
1K_0402_5%~D

B

2

PMBT3904_SOT23~D

Place under CPU

+RTC_CELL

1

C909

2

0_1210_5%~D

10U_0805_10V4Z~D

0.1U_0402_16V4Z~D

1

C911

2

1U_0603_10V4Z~D

0.1U_0402_16V4Z~D

E

31

Q11

C

+2.5VRUN

R826

@

12

2

G

3

2 1

2.21K_0603_1%~D

2200P_0402_50V7K~D

2.21K_0603_1%~D

2200P_0402_50V7K~D

1

C922

2

2200P_0402_50V7K~D

+3VRUN

2

1

+5VRUN

D

S

D

S

2

B

2

B

13

13

+3VSUS

+3VSUS

12

R529
10K_0402_5%~D

1

@

2

JFAN2

1

1

2

2

4

335

+5VSUS+5VSUS

2

G

Q86
2N7002_SOT23~D

+5VSUS+5VSUS

2

G

Q87
2N7002_SOT23~D

12

R219

8.2K_0402_5%~D

C

E

3 1

12

R220

8.2K_0402_5%~D

C

E

3 1

C661
1000P_0402_50V7K~D

4
5

12

R903
10K_0402_5%~D

12

R905
10K_0402_5%~D

THERMATRIP2#THERM_STP#

1

2

THERMATRIP1#

1

2

6

2

1

D

S

4 5

+FAN2_VOUT+FAN1_VOUT

1

C335

2

R902

VCP1

C958

R904

VCP2

C959

THERMTRIP_MCH#10

H_THERMTRIP#7

Q67

SI3456DV-T1-E3_TSOP6~D

1

C330

2

@

1000P_0402_50V7K~D

22U_1206_10V4Z~D

12

1

2

12

1

2

+VCCP

+VCCP

VCP1_R25

VCP2_R25

R186

2.2K_0402_5%~D

1 2

PMBT3904_SOT23~D

R184

2.2K_0402_5%~D

1 2

PMBT3904_SOT23~D

MOLEX_53398-0371~D

Q24

Q25

DELL CONFIDENTIAL/PROPRIETARY

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

Thermal Senser & Fan

Greenland-LA2732P

1

5V_CAL_SIO1# 38

5V_CAL_SIO2# 38

C209

0.1U_0402_16V4Z~D

C210

0.1U_0402_16V4Z~D

16 63Wednesday, December 28, 2005

of

X03

5

4

3

2

1

+1.8VSUS +1.8VSUS

JDIM1

1

VREF

3

11
13
15
17
19
21
23
25
27
29
31
33
35
37
39

41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97

99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199
203

2.2U_0603_6.3V6K~D
C269

VSS

5

DQ0

7

DQ1

9

VSS
DQS0#
DQS0
VSS
DQ2
DQ3
VSS
DQ8
DQ9
VSS
DQS1#
DQS1
VSS
DQ10
DQ11
VSS

VSS
DQ16
DQ17
VSS
DQS2#
DQS2
VSS
DQ18
DQ19
VSS
DQ24
DQ25
VSS
DM3
NC
VSS
DQ26
DQ27
VSS
CKE0
VDD
NC
BA2
VDD
A12
A9
A8
VDD
A5
A3
A1
VDD
A10/AP
BA0
WE#
VDD
CAS#
NC/S1#
VDD
NC/ODT1
VSS
DQ32
DQ33
VSS
DQS4#
DQS4
VSS
DQ34
DQ35
VSS
DQ40
DQ41
VSS
DM5
VSS
DQ42
DQ43
VSS
DQ48
DQ49
VSS
NC,TEST
VSS
DQS6#
DQS6
VSS
DQ50
DQ51
VSS
DQ56
DQ57
VSS
DM7
VSS
DQ58
DQ59
VSS
SDA
SCL
VDDSPD
203

FOX_AS0A426-M2SN-7F~D

DIMMB

STANDARD

DDR_B_D0
DDR_B_D1

DDR_B_DQS#0

D D

C C

DDR_CKE2_DIMMB10

DDR_B_BS211

DDR_B_BS011
DDR_B_WE#11

DDR_B_CAS#11

DDR_CS3_DIMMB#10

M_ODT310

B B

CK_SDATA6,18
CK_SCLK6,18

A A

http://hobi-elektronika.net

DDR_B_DQS0
DDR_B_D2

DDR_B_D3
DDR_B_D8

DDR_B_D9
DDR_B_DQS#1

DDR_B_DQS1
DDR_B_D10

DDR_B_D11

DDR_B_D16
DDR_B_D17

DDR_B_DQS#2
DDR_B_DQS2

DDR_B_D18
DDR_B_D19

DDR_B_D24
DDR_B_D25

DDR_B_DM3

DDR_B_D26
DDR_B_D27

DDR_CKE2_DIMMB

DDR_B_BS2
DDR_B_MA12

DDR_B_MA9
DDR_B_MA8

DDR_B_MA5
DDR_B_MA3
DDR_B_MA1

DDR_B_MA10
DDR_B_BS0
DDR_B_WE#

DDR_B_CAS#
DDR_CS3_DIMMB#

M_ODT3
DDR_B_D32

DDR_B_D33
DDR_B_DQS#4

DDR_B_DQS4
DDR_B_D34

DDR_B_D35
DDR_B_D40

DDR_B_D41
DDR_B_DM5
DDR_B_D42

DDR_B_D43
DDR_B_D48

DDR_B_D49

DDR_B_DQS#6
DDR_B_DQS6

DDR_B_D50
DDR_B_D51

DDR_B_D56
DDR_B_D57

DDR_B_DM7
DDR_B_D58

DDR_B_D59
CK_SDATA

CK_SCLK

+3VRUN

5

0.1U_0402_16V4Z~D
C270

1

1

2

2

VSS
DQ4
DQ5
VSS
DM0
VSS
DQ6
DQ7

VSS
DQ12
DQ13

VSS

DM1

VSS
CK0#

VSS
DQ14
DQ15

VSS

VSS
DQ20
DQ21

VSS

DM2

VSS
DQ22
DQ23

VSS
DQ28
DQ29

VSS

DQS3#

DQS3

VSS
DQ30
DQ31

VSS

NC/CKE1

VDD

NC/A15
NC/A14

VDD

VDD

VDD
RAS#

VDD

ODT0

NC/A13

VDD

VSS
DQ36
DQ37

VSS

DM4

VSS
DQ38
DQ39

VSS
DQ44
DQ45

VSS

DQS5#

DQS5

VSS
DQ46
DQ47

VSS
DQ52
DQ53

VSS
CK1#

VSS

DM6

VSS
DQ54
DQ55

VSS
DQ60
DQ61

VSS

DQS7#

DQS7

VSS
DQ62
DQ63

VSS

SAO

CK0

NC

A11

A7
A6

A4
A2

A0
BA1
S0#

NC

CK1

SA1

204

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40

42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
204

V_DDR_MCH_REF

DDR_B_D4
DDR_B_D5

DDR_B_DM0
DDR_B_D6

DDR_B_D7
DDR_B_D12

DDR_B_D13
DDR_B_DM1
M_CLK_DDR3

M_CLK_DDR#3
DDR_B_D14

DDR_B_D15

DDR_B_D20
DDR_B_D21

PM_EXTTS#0_R
DDR_B_DM2

DDR_B_D22
DDR_B_D23

DDR_B_D28
DDR_B_D29

DDR_B_DQS#3
DDR_B_DQS3

DDR_B_D30
DDR_B_D31

DDR_CKE3_DIMMB

DDR_B_MA11
DDR_B_MA7
DDR_B_MA6

DDR_B_MA4
DDR_B_MA2
DDR_B_MA0

DDR_B_BS1
DDR_B_RAS#
DDR_CS2_DIMMB#

M_ODT2
DDR_B_MA13

DDR_B_D36
DDR_B_D37

DDR_B_DM4
DDR_B_D38

DDR_B_D39
DDR_B_D44

DDR_B_D45
DDR_B_DQS#5

DDR_B_DQS5
DDR_B_D46

DDR_B_D47
DDR_B_D52

DDR_B_D53
M_CLK_DDR2

M_CLK_DDR#2
DDR_B_DM6
DDR_B_D54

DDR_B_D55
DDR_B_D60

DDR_B_D61
DDR_B_DQS#7

DDR_B_DQS7
DDR_B_D62

DDR_B_D63

10K_0402_5%~D

12

R255

4

M_CLK_DDR3 10

M_CLK_DDR#3 10

PM_EXTTS#0_R 18

DDR_CKE3_DIMMB 10

DDR_B_BS1 11

DDR_B_RAS# 11
DDR_CS2_DIMMB# 10

M_ODT2 10

M_CLK_DDR2 10

M_CLK_DDR#2 10

R254

1 2

10K_0402_5%~D

2.2U_0603_6.3V6K~D

0.1U_0402_16V4Z~D

1

C276

2

+3VRUN

V_DDR_MCH_REF 10,18,50

1

C271

2

Layout Note:
Place near JDIM1

Layout Note:
Place one cap close to
every 2 pullup
resistors terminated to
+0.9V_DDR_VTT

Layout Note:
Place these resistor
closely JDIM1,all
trace length<750 mil

Layout Note:
Place these resistor
closely JDIM1,all
trace length Max=1.3"

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

3

DDR_B_DQS#[0..7]11

DDR_B_D[0..63]11
DDR_B_DM[0..7]11
DDR_B_DQS[0..7]11

DDR_B_MA[0..13]11

+1.8VSUS

2.2U_0603_6.3V6K~D

+0.9V_DDR_VTT

0.1U_0402_16V4Z~D

1

2

C249

DDR_B_MA5
DDR_B_MA8
DDR_B_MA9
DDR_B_MA12

M_ODT3
DDR_CS3_DIMMB#
DDR_B_CAS#
DDR_B_WE#

DDR_B_BS0
DDR_B_MA10
DDR_B_MA1
DDR_B_MA3

2.2U_0603_6.3V6K~D

C274

C238

1

2

0.1U_0402_16V4Z~D
C277

1

2

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

1

1

2

2

C246

RP3

1 8
2 7
3 6
4 5

56_1206_8P4R_5%~D

RP1

1 8
2 7
3 6
4 5

56_1206_8P4R_5%~D

RP2

1 8
2 7
3 6
4 5

56_1206_8P4R_5%~D

2.2U_0603_6.3V6K~D
C236

1

2

0.1U_0402_16V4Z~D
C235

1

2

0.1U_0402_16V4Z~D

1

2

C556

C557

+0.9V_DDR_VTT

2

2.2U_0603_6.3V6K~D
C275

1

1

2

2

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D
C272

1

2

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

1

1

2

2

C560

RP7

1 8
2 7
3 6
4 5

56_1206_8P4R_5%~D

RP8

1 8
2 7
3 6
4 5

56_1206_8P4R_5%~D

RP9

1 8
2 7
3 6
4 5

56_1206_8P4R_5%~D

RP13

14
23

56_0404_4P2R_5%~D

2.2U_0603_6.3V6K~D
C237

1

2

C241

1

2

0.1U_0402_16V4Z~D

1

2

C561

C559

DDR_B_MA6
DDR_B_MA7
DDR_B_MA11
DDR_CKE3_DIMMB

DDR_B_BS1
DDR_B_MA0
DDR_B_MA2
DDR_B_MA4

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

1

2

C558

0.1U_0402_16V4Z~D

1

1

2

2

C252

C248

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

1

1

2

2

C251

C250

SPD Address Table

DDR_B_MA13
M_ODT2
DDR_CS2_DIMMB#
DDR_B_RAS#

DDR_B_BS2
DDR_CKE2_DIMMB

DIMM/Channel ADDR [1:0]

A

B

DELL CONFIDENTIAL/PROPRIETARY

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

DDRII DIMM B
Greenland-LA2732P

1

1

2

C247

[ 00 ]

[ 10 ]

17 63W ed nes da y, D ec em ber 28, 2005

of

X03

5

4

3

2

1

+1.8VSUS +1.8VSUS

JDIM2

1

VREF

3

C296

11
13
15
17
19
21
23
25
27
29
31
33
35
37
39

41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97

99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199
203

VSS

5

DQ0

7

DQ1

9

VSS
DQS0#
DQS0
VSS
DQ2
DQ3
VSS
DQ8
DQ9
VSS
DQS1#
DQS1
VSS
DQ10
DQ11
VSS

VSS
DQ16
DQ17
VSS
DQS2#
DQS2
VSS
DQ18
DQ19
VSS
DQ24
DQ25
VSS
DM3
NC
VSS
DQ26
DQ27
VSS
CKE0
VDD
NC
BA2
VDD
A12
A9
A8
VDD
A5
A3
A1
VDD
A10/AP
BA0
WE#
VDD
CAS#
NC/S1#
VDD
NC/ODT1
VSS
DQ32
DQ33
VSS
DQS4#
DQS4
VSS
DQ34
DQ35
VSS
DQ40
DQ41
VSS
DM5
VSS
DQ42
DQ43
VSS
DQ48
DQ49
VSS
NC,TEST
VSS
DQS6#
DQS6
VSS
DQ50
DQ51
VSS
DQ56
DQ57
VSS
DM7
VSS
DQ58
DQ59
VSS
SDA
SCL
VDDSPD
203

FOX_AS0A426-M2R-TR~D

DIMMA

DDR_A_D0
DDR_A_D1

D D

C C

DDR_CKE0_DIMMA10

DDR_A_BS211

DDR_A_BS011
DDR_A_WE#11

DDR_A_CAS#11

DDR_CS1_DIMMA#10

M_ODT110

B B

CK_SDATA6,17

A A

CK_SCLK6,17

DDR_A_DQS#0
DDR_A_DQS0

DDR_A_D2
DDR_A_D3

DDR_A_D8
DDR_A_D9

DDR_A_DQS#1 M_CLK_DDR0
DDR_A_DQS1

DDR_A_D10
DDR_A_D11

DDR_A_D16
DDR_A_D17

DDR_A_DQS#2
DDR_A_DQS2

DDR_A_D18
DDR_A_D19

DDR_A_D24
DDR_A_D25

DDR_A_DM3

DDR_A_D26
DDR_A_D27

DDR_CKE0_DIMMA

DDR_A_BS2
DDR_A_MA12

DDR_A_MA9 DDR_A_MA7
DDR_A_MA8

DDR_A_MA5
DDR_A_MA3
DDR_A_MA1

DDR_A_MA10
DDR_A_BS0
DDR_A_WE#

DDR_A_CAS#
DDR_CS1_DIMMA#

M_ODT1
DDR_A_D32

DDR_A_D33
DDR_A_DQS#4

DDR_A_DQS4
DDR_A_D34

DDR_A_D35
DDR_A_D40

DDR_A_D41
DDR_A_DM5
DDR_A_D42

DDR_A_D43
DDR_A_D48

DDR_A_D49

DDR_A_DQS#6
DDR_A_DQS6

DDR_A_D50
DDR_A_D51

DDR_A_D56
DDR_A_D57

DDR_A_DM7
DDR_A_D58

DDR_A_D59
CK_SDATA

CK_SCLK

+3VRUN

0.1U_0402_16V4Z~D

2.2U_0603_6.3V6K~D

C297

1

1

2

2

DQ4
DQ5

DM0
DQ6

DQ7

DQ12
DQ13

DM1

CK0#
DQ14

DQ15

DQ20
DQ21

DM2

DQ22
DQ23

DQ28
DQ29

DQS3#

DQS3

DQ30
DQ31

NC/CKE1

VDD
NC/A15
NC/A14

VDD

VDD

VDD

RAS#

VDD

ODT0

NC/A13

VDD

DQ36
DQ37

DM4

DQ38
DQ39

DQ44
DQ45

DQS5#

DQS5

DQ46
DQ47

DQ52
DQ53

CK1#

DM6

DQ54
DQ55

DQ60
DQ61

DQS7#

DQS7

DQ62
DQ63

SAO

VSS

VSS
VSS

VSS

VSS
VSS

CK0
VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

A11

BA1
S0#

VSS

VSS
VSS

VSS

VSS

VSS

VSS

VSS
CK1

VSS
VSS

VSS

VSS

VSS

VSS
SA1

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40

42
44
46
48
50

NC

52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92

A7

94

A6

96
98

A4

100

A2

102

A0

104
106
108
110
112
114
116
118
120

NC

122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
204

204

REVERSE

http://hobi-elektronika.net

5

V_DDR_MCH_REF

DDR_A_D4
DDR_A_D5

DDR_A_DM0
DDR_A_D6

DDR_A_D7
DDR_A_D12

DDR_A_D13
DDR_A_DM1

M_CLK_DDR#0
DDR_A_D14

DDR_A_D15

DDR_A_D20
DDR_A_D21

PM_EXTTS#0_R
DDR_A_DM2

DDR_A_D22
DDR_A_D23

DDR_A_D28
DDR_A_D29

DDR_A_DQS#3
DDR_A_DQS3

DDR_A_D30
DDR_A_D31

DDR_CKE1_DIMMA

DDR_A_MA11
DDR_A_MA6
DDR_A_MA4

DDR_A_MA2
DDR_A_MA0

DDR_A_BS1
DDR_A_RAS#
DDR_CS0_DIMMA#

M_ODT0
DDR_A_MA13

DDR_A_D36
DDR_A_D37

DDR_A_DM4
DDR_A_D38

DDR_A_D39
DDR_A_D44

DDR_A_D45
DDR_A_DQS#5

DDR_A_DQS5
DDR_A_D46

DDR_A_D47
DDR_A_D52

DDR_A_D53
M_CLK_DDR1

M_CLK_DDR#1
DDR_A_DM6
DDR_A_D54

DDR_A_D55
DDR_A_D60

DDR_A_D61
DDR_A_DQS#7

DDR_A_DQS7
DDR_A_D62

DDR_A_D63

10K_0402_5%~D

10K_0402_5%~D

12

R281

4

2.2U_0603_6.3V6K~D

M_CLK_DDR0 10

M_CLK_DDR#0 10

DDR_CKE1_DIMMA 10

DDR_A_BS1 11
DDR_A_RAS# 11
DDR_CS0_DIMMA# 10

M_ODT0 10

M_CLK_DDR1 10
M_CLK_DDR#1 10

R283

1 2

0.1U_0402_16V4Z~D

1

C294

2

R791

0_0402_5%~D

V_DDR_MCH_REF 10,17,50

1

C298

2

PM_EXTTS#0_R 17

12

PM_EXTTS#0 10

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

Layout Note:
Place near JDIM2

Layout Note:
Place one cap close to
every 2 pullup
resistors terminated to
+0.9V_DDR_VTT

Layout Note:
Place these resistor
closely JDIM2,all
trace lengt h <750 mil

Layout Note:
Place these resistor
closely JDIM2,all
trace length Max=1.3"

3

DDR_A_DQS#[0..7]11

DDR_A_D[0..63]11
DDR_A_DM[0..7]11
DDR_A_DQS[0..7]11

DDR_A_MA[0..13]11

+0.9V_DDR_VTT

DDR_A_BS0
DDR_A_MA10
DDR_A_MA1
DDR_A_MA3

DDR_A_MA5
DDR_A_MA8
DDR_A_MA9
DDR_A_MA12

M_ODT1
DDR_CS1_DIMMA#
DDR_A_CAS#
DDR_A_WE#

+1.8VSUS

0.1U_0402_16V4Z~D

1

2

C643

2.2U_0603_6.3V6K~D
C299

1

2

0.1U_0402_16V4Z~D
C301

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

1

2

C642

RP11

1 8
2 7
3 6
4 5

56_1206_8P4R_5%~D

RP10

1 8
2 7
3 6
4 5

56_1206_8P4R_5%~D

RP12

1 8
2 7
3 6
4 5

56_1206_8P4R_5%~D

2.2U_0603_6.3V6K~D
C285

1

2

0.1U_0402_16V4Z~D

1

2

C644

+0.9V_DDR_VTT

2

2.2U_0603_6.3V6K~D
C300

1

2

0.1U_0402_16V4Z~D
C302

1

2

0.1U_0402_16V4Z~D

1

2

C645

1 8
2 7
3 6
4 5

1 8
2 7
3 6
4 5

56_1206_8P4R_5%~D

1 8
2 7
3 6
4 5

2.2U_0603_6.3V6K~D

2.2U_0603_6.3V6K~D
C286

1

1

2

2

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

C279

C280

1

2

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

1

1

2

2

C648

C291

RP6

DDR_A_MA6
DDR_A_MA7
DDR_A_MA11

DDR_CKE1_DIMMA

56_1206_8P4R_5%~D
RP4

DDR_A_MA13

M_ODT0

DDR_CS0_DIMMA#

DDR_A_RAS#

RP5

DDR_A_BS1

DDR_A_MA0

DDR_A_MA2

DDR_A_MA4

56_1206_8P4R_5%~D

RP14

DDR_A_BS2

14

DDR_CKE0_DIMMA

23

56_0404_4P2R_5%~D

C287

1

2

1

2

0.1U_0402_16V4Z~D

1

2

C290

1

2

C292

0.1U_0402_16V4Z~D

1

2

C293

0.1U_0402_16V4Z~D

1

2

C647

1

2

C288

0.1U_0402_16V4Z~D

1

2

C289

0.1U_0402_16V4Z~D

1

2

C646

0.1U_0402_16V4Z~D

DELL CONFIDENTIAL/PROPRIETARY

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

DDRII DIMM A

Greenland-LA2732P

18 63W ed nes da y, D ec em ber 28, 2005

1

of

X03

5

4

JVGA

3

2

1

1

1

+3VRUN

1

1

1

C394

C407

D D

+5VRUN

PCIE_MTX_GRX_P0
PCIE_MTX_GRX_N0

PCIE_MTX_GRX_P1
PCIE_MTX_GRX_N1

PCIE_MTX_GRX_P2
PCIE_MTX_GRX_N2

PCIE_MTX_GRX_P3
PCIE_MTX_GRX_N3

PCIE_MTX_GRX_P4

C C

B B

PCIE_MTX_GRX_P[0..15]12

A A

http://hobi-elektronika.net

PCIE_MTX_GRX_N4
PCIE_MTX_GRX_P5

PCIE_MTX_GRX_N5
PCIE_MTX_GRX_P6

PCIE_MTX_GRX_N6
PCIE_MTX_GRX_P7

PCIE_MTX_GRX_N7
PCIE_MTX_GRX_P8

PCIE_MTX_GRX_N8
PCIE_MTX_GRX_P9

PCIE_MTX_GRX_N9
PCIE_MTX_GRX_P10

PCIE_MTX_GRX_N10
PCIE_MTX_GRX_P11

PCIE_MTX_GRX_N11
PCIE_MTX_GRX_P12

PCIE_MTX_GRX_N12
PCIE_MTX_GRX_P13

PCIE_MTX_GRX_N13
PCIE_MTX_GRX_P14

PCIE_MTX_GRX_N14
PCIE_MTX_GRX_P15

PCIE_MTX_GRX_N15

+GFX_PWR_SRC

PCIE_MTX_GRX_N[0..15]12

PCIE_MTX_GRX_P[0..15]

5

2

0.047U_0402_10V7K~D

C118 0.1U_0402_16V4Z~D

1 2

C122 0.1U_0402_16V4Z~D

1 2

C135 0.1U_0402_16V4Z~D

1 2

C139 0.1U_0402_16V4Z~D

1 2

C141 0.1U_0402_16V4Z~D

1 2

C145 0.1U_0402_16V4Z~D

1 2

C150 0.1U_0402_16V4Z~D

1 2

C155 0.1U_0402_16V4Z~D

1 2

C158 0.1U_0402_16V4Z~D

1 2

C161 0.1U_0402_16V4Z~D

1 2

C172 0.1U_0402_16V4Z~D

1 2

C176 0.1U_0402_16V4Z~D

1 2

C178 0.1U_0402_16V4Z~D

1 2

C186 0.1U_0402_16V4Z~D

1 2

C190 0.1U_0402_16V4Z~D

1 2

C195 0.1U_0402_16V4Z~D

1 2

C386

2

0.047U_0402_10V7K~D

0.047U_0402_10V7K~D

1

C681

0.1U_0402_16V4Z~D

2

C121 0.1U_0402_16V4Z~D

1 2

C132 0.1U_0402_16V4Z~D

1 2

C138 0.1U_0402_16V4Z~D

1 2

C140 0.1U_0402_16V4Z~D

1 2

C144 0.1U_0402_16V4Z~D

1 2

C149 0.1U_0402_16V4Z~D

1 2

C154 0.1U_0402_16V4Z~D

1 2

C157 0.1U_0402_16V4Z~D

1 2

C160 0.1U_0402_16V4Z~D

1 2

C170 0.1U_0402_16V4Z~D

1 2

C175 0.1U_0402_16V4Z~D

1 2

C177 0.1U_0402_16V4Z~D

1 2

C185 0.1U_0402_16V4Z~D

1 2

C189 0.1U_0402_16V4Z~D

1 2

C194 0.1U_0402_16V4Z~D

1 2

C198 0.1U_0402_16V4Z~D

1 2

1

C213

0.1U_0603_25V7K~D

2

PCIE_MTX_GRX_N[0..15]

PCIE_MTX_GRX_P0
PCIE_MTX_GRX_P1
PCIE_MTX_GRX_P2
PCIE_MTX_GRX_P3
PCIE_MTX_GRX_P4
PCIE_MTX_GRX_P5
PCIE_MTX_GRX_P6
PCIE_MTX_GRX_P7
PCIE_MTX_GRX_P8
PCIE_MTX_GRX_P9
PCIE_MTX_GRX_P10
PCIE_MTX_GRX_P11
PCIE_MTX_GRX_P12
PCIE_MTX_GRX_P13
PCIE_MTX_GRX_P14
PCIE_MTX_GRX_P15

2

DVI_TX0+20
DVI_TX0-20

DVI_TX1+20
DVI_TX1-20

DVI_TX2+20
DVI_TX2-20

DVI_CLK+20
DVI_CLK-20

1

C682

0.1U_0402_16V4Z~D

2

+3VSUS

1

C212

0.1U_0603_25V7K~D

2

+12VRUN

RUNPWROK37,38,42,43,47,51

+2.5VRUN

PCIE_MTX_GRX_N0
PCIE_MTX_GRX_N1
PCIE_MTX_GRX_N2
PCIE_MTX_GRX_N3
PCIE_MTX_GRX_N4
PCIE_MTX_GRX_N5
PCIE_MTX_GRX_N6
PCIE_MTX_GRX_N7
PCIE_MTX_GRX_N8
PCIE_MTX_GRX_N9
PCIE_MTX_GRX_N10
PCIE_MTX_GRX_N11
PCIE_MTX_GRX_N12
PCIE_MTX_GRX_N13
PCIE_MTX_GRX_N14
PCIE_MTX_GRX_N15

DVI_TX0+
DVI_TX0-

DVI_TX1+
DVI_TX1-

DVI_TX2+
DVI_TX2-

DVI_CLK+
DVI_CLK-

PCIE_MTX_C_GRX_P0
PCIE_MTX_C_GRX_N0

PCIE_MTX_C_GRX_P1
PCIE_MTX_C_GRX_N1

PCIE_MTX_C_GRX_P2
PCIE_MTX_C_GRX_N2

PCIE_MTX_C_GRX_P3
PCIE_MTX_C_GRX_N3

PCIE_MTX_C_GRX_P4
PCIE_MTX_C_GRX_N4

PCIE_MTX_C_GRX_P5
PCIE_MTX_C_GRX_N5

PCIE_MTX_C_GRX_P6
PCIE_MTX_C_GRX_N6

PCIE_MTX_C_GRX_P7
PCIE_MTX_C_GRX_N7

PCIE_MTX_C_GRX_P8
PCIE_MTX_C_GRX_N8

PCIE_MTX_C_GRX_P9
PCIE_MTX_C_GRX_N9

PCIE_MTX_C_GRX_P10
PCIE_MTX_C_GRX_N10

PCIE_MTX_C_GRX_P11
PCIE_MTX_C_GRX_N11

PCIE_MTX_C_GRX_P12
PCIE_MTX_C_GRX_N12

PCIE_MTX_C_GRX_P13
PCIE_MTX_C_GRX_N13

PCIE_MTX_C_GRX_P14
PCIE_MTX_C_GRX_N14

PCIE_MTX_C_GRX_P15
PCIE_MTX_C_GRX_N15

RUNPWROK

4

3

3

5

5

7

7

9

9

11

11

13

13

15

15

17

17

19

19

21

21

23

23

25

25

27

27

29

29

31

31

33

33

35

35

37

37

39

39

41

41

43

43

45

45

47

47

49

49

51

51

53

53

55

55

57

57

59

59

61

61

63

63

65

65

67

67

69

69

71

71

73

73

75

75

77

77

79

79

81

81

83

83

85

85

87

87

89

89

91

91

93

93

95

95

97

97

99

99

101

101

103

103

105

105

107

107

109

109

111

111

113

113

115

115

117

117

119

119

121

121

123

123

125

125

127

127

129

129

131

131

133

133

135

135

137

137

139

139

141

141

143

143

145

145

147

147

149

149

151

151

153

153

155

155

157

157

159

159

161

161

163

163

165

165

167

167

169

169

171

171

173

173

175

175

177

177

179

179

181

181

183

183

185

185

187

187

189

189

191

191

193

193

195

195

197

197

199

199

201

201

203

203

205

205

JAE_WB3M200VD1~D

2

2

4

4

6

6

8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98

100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
202
204
206

Folsom / Greenland
used

8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
202
204
206

SBAT_SMBCLK
SBAT_SMBDAT

TV_Y
TV_CVBS
TV_C
VSYNC

HSYNC
VGA_BLU
VGA_GRN
VGA_RED

DVI_SCLK_L
DVI_SDAT_L
PLTRST_DELAY#

CLK_PCIE_VGA
CLK_PCIE_VGA#

YPRPB_DET#

T3 PAD~D@
T4 PAD~D@

PCIE_MRX_GTX_P0
PCIE_MRX_GTX_N0

PCIE_MRX_GTX_P1
PCIE_MRX_GTX_N1

PCIE_MRX_GTX_P2
PCIE_MRX_GTX_N2

PCIE_MRX_GTX_P3
PCIE_MRX_GTX_N3

PCIE_MRX_GTX_P4
PCIE_MRX_GTX_N4

PCIE_MRX_GTX_P5
PCIE_MRX_GTX_N5

PCIE_MRX_GTX_P6
PCIE_MRX_GTX_N6

PCIE_MRX_GTX_P7
PCIE_MRX_GTX_N7

PCIE_MRX_GTX_P8
PCIE_MRX_GTX_N8

PCIE_MRX_GTX_P9
PCIE_MRX_GTX_N9

PCIE_MRX_GTX_P10
PCIE_MRX_GTX_N10

PCIE_MRX_GTX_P11
PCIE_MRX_GTX_N11

PCIE_MRX_GTX_P12
PCIE_MRX_GTX_N12

PCIE_MRX_GTX_P13
PCIE_MRX_GTX_N13

PCIE_MRX_GTX_P14
PCIE_MRX_GTX_N14

PCIE_MRX_GTX_P15
PCIE_MRX_GTX_N15

OTBMP#
FPBACK_EN

C203

YPRPB_DET# 20,38

+5VALW

SBAT_SMBCLK 37

SBAT_SMBDAT 37
TV_Y 20
TV_CVBS 20
TV_C 20

VSYNC 20

HSYNC 20
VGA_BLU 20
VGA_GRN 20
VGA_RED 20

PLTRST_DELAY# 23
CLK_PCIE_VGA 6

CLK_PCIE_VGA# 6

+3VRUN

2

2

C229

1

1

0.1U_0603_25V7K~D

0.1U_0603_25V7K~D

GFX_PWR_LIMIT

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

Not necessary to run CRT SMBus
trace to VGA card.
RGB signals are integrated to
DVI-I on M/B.

+3VRUN

C

2

B

E

3 1

Q13
PMBT3904_SOT23~D

10K_0402_5%~D

12

R121

PCIE_MRX_GTX_P0
PCIE_MRX_GTX_P1
PCIE_MRX_GTX_P2
PCIE_MRX_GTX_P3
PCIE_MRX_GTX_P4
PCIE_MRX_GTX_P5
PCIE_MRX_GTX_P6
PCIE_MRX_GTX_P7
PCIE_MRX_GTX_P8
PCIE_MRX_GTX_P9
PCIE_MRX_GTX_P10
PCIE_MRX_GTX_P11
PCIE_MRX_GTX_P12
PCIE_MRX_GTX_P13
PCIE_MRX_GTX_P14
PCIE_MRX_GTX_P15

PCIE_MRX_GTX_N0
PCIE_MRX_GTX_N1
PCIE_MRX_GTX_N2
PCIE_MRX_GTX_N3
PCIE_MRX_GTX_N4
PCIE_MRX_GTX_N5
PCIE_MRX_GTX_N6
PCIE_MRX_GTX_N7
PCIE_MRX_GTX_N8
PCIE_MRX_GTX_N9
PCIE_MRX_GTX_N10
PCIE_MRX_GTX_N11
PCIE_MRX_GTX_N12
PCIE_MRX_GTX_N13
PCIE_MRX_GTX_N14
PCIE_MRX_GTX_N15

R942

0_0402_5%~D@

C216

BIA_PWM

2

C239

1

0.1U_0603_25V7K~D

+3VRUN

4

O

2

1

C211

1

2

0.1U_0603_25V7K~D

0.1U_0402_16V4Z~D

1 2

U19

5

74AHCT1G08GW_SSOP5~D

1

P

B

2

A

G

3

BIA_PWM 37

@

10U_1210_25V6M~D

C957

1 2

OTBMP# 16

+5VRUN

FPBACK_EN 38

3

R123

100K_0402_5%~D

1 2

PCIE_MRX_GTX_P[0..15]

PCIE_MRX_GTX_N[0..15]

+GFX_PWR_SRC

R253
0_0402_5%~D@

1 2

DVI_DETECT 20

Sullivan Used

R114

100K_0402_5%~D

1 2

+5VRUN

DVI_SCLK_L

DVI_SDAT_L

PCIE_MRX_GTX_P[0..15] 12

PCIE_MRX_GTX_N[0..15] 12

For +GFX_PWR_SRC surge current issue

C227

SIO_GFX_PWR 38
ACAV_IN 16,37,46,52

2

+5VRUN

12

12

R107

5.6K_0402_5%~D

DVI_SCLK

DVI_SDAT

1

1

C88220P_0402_50V7K~D

C100220P_0402_50V7K~D

2

2

RUN_ON_5V#42

1
2
3 6

S

4

GPWR_SRC_ON

12

PEG_PWRON#

13

D

2

G

S

5.6K_0402_5%~D

D

G

Q34
SI4825DY-T1-E3_SO8~D

R218
100K_0402_5%~D

Q29
2N7002_SOT23~D

S

2N7002_SOT23~D

2

1

0.1U_0603_25V7K~D

G

C221

R118

G

2

Q10

13

D

S

2N7002_SOT23~D

2

Q12

13

D

+PWR_SRC +GFX_PWR_SRC

2

R224

1

0.1U_0603_25V7K~D

1 2

100K_0402_5%~D

RUN_ON37,42,43,47,48,49,50

DELL CONFIDENTIAL/PROPRIETARY

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

VGA CONN.
Greenland-LA2732P

1

DVI_SCLK 20

DVI_SDAT 20

+GFX_PWR_SRC

12

13

D

2

G

S

8
7

5

19 63Wednesday, December 28, 2005

R545
22_0805_5%~D@

Q65
2N7002_SOT23~D@

X03

of

5

C967

27P_0402_50V8J~D@

1 2

L9

1.8UH_MLF1608A1R8KT_10%_0603~D

TV_C19

12

R9

D D

TV_CVBS19

12

R8

TV_Y19

C C

12

R7

150_0402_5%~D

C6

1

2

150_0402_5%~D

C5

1

2

150_0402_5%~D

1

C4

2

@

82P_0402_50V8J~D

@

82P_0402_50V8J~D

@

82P_0402_50V8J~D

1 2

CLOSE TO JSVID

C968

27P_0402_50V8J~D@

1 2

1.8UH_MLF1608A1R8KT_10%_0603~D

1.8UH_MLF1608A1R8KT_10%_0603~D

L8

1 2

C969

27P_0402_50V8J~D@

1 2

L7

1 2

DDA204U

4

82P_0402_50V8J~D

1

C29

2

SVIDEO_C

82P_0402_50V8J~D

1

C28

2

82P_0402_50V8J~D

1

C27

2

SVIDEO_CVBS

SVIDEO_Y

3

+3VRUN

D3
DA204U_SOT323~D

1

@

2

3

D2
DA204U_SOT323~D

1

@

2

3

2

D1
DA204U_SOT323~D

1

@

2

3

+3VRUN

12

R854

+5VRUN

D5

300P_1808_3000V8K~D@

RB500V_SOD323~D

21

1

C936

2

10K_0402_5%~D

1

JSVID

2
4
6
7
5
3
1
8
9

AMP_788556-1~D

YPRPB_DET# 19,38

D7

A2

K1

+3VRUN

K2A1

VGA_RED19

VGA_GRN19

VGA_BLU19

B B

1 2

R916 0_0402_5%~D@

+CRT_VCC

R918

39_0402_5%~D

HSYNC19

A A

VSYNC19

http://hobi-elektronika.net

1 2

SN74AHCT1G125GW_SC70-5~D

1 2

39_0402_5%~D

U54

+CRT_VCC

R920

R922 0_0402_5%~D@

5

1 2

1

12

R30150_0402_5%~D

C3210P_0402_50V8J~D

2

4

4

1K_0402_5%~D

1 2

39_0402_5%~D

39_0402_5%~D

1 2

1

5

P

OE#

A2Y

G

3

1

5

P

OE#

A2Y

G

U55

SN74AHCT1G125GW_SC70-5~D

3

1

12

R32150_0402_5%~D

2

R917

1 2

R919

R921

12

C3410P_0402_50V8J~D

R33150_0402_5%~D

1 2

L14 BLM18BB600SN1D_0603~D

1 2

L16 BLM18BB600SN1D_0603~D

1 2

1

2

C346

L15 BLM18BB600SN1D_0603~D

C3310P_0402_50V8J~D

L17

BLM18AG121SN1D_0603~D

1 2

1

2

33P_0402_50V8J~D

4

L34

BLM18AG121SN1D_0603~D

1 2

1

C344

2

33P_0402_50V8J~D

1

C30

2

22P_0402_50V8J~D

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

1

DA204U_SOT323~D@

2

3

1

C2010P_0402_50V8J~D@

2

1

C343

2

22P_0402_50V8J~D

3

D8

1

DA204U_SOT323~D@

2

3

RED

GREEN

BLUE

1

C22

2

10P_0402_50V8J~D

@

D6

1

2

3

1

C2110P_0402_50V8J~D@

2

+CRT_VCC

12

R351

1K_0402_5%~D@

+CRT_VCC

DA204U_SOT323~D@

12

R23

1K_0402_5%~D@

0.01U_0402_16V7K~D

1

C24

DVI_TX2-19

2

DVI_TX2+19

DVI_SCLK19
DVI_SDAT19

DVI_TX1-19
DVI_TX1+19

+CRT_VCC

DVI_DETECT19

DVI_TX0-19
DVI_TX0+19

DVI_CLK+19
DVI_CLK-19

DVI_TX2­DVI_TX2+

DVI_SCLK
DVI_SDAT
V_SYNC
DVI_TX1­DVI_TX1+

DVI_TX0­DVI_TX0+

DVI_CLK+
DVI_CLK-

H_SYNC

JDVI

25

CASE-GND

26

CASE_GND

1

TMDS Data2-

2

TMDS Data2+

3

TMDS Data2/4 Shield

4

TMDS Data4-

5

TMDS Data4+

6

DDC Clock

7

DDC Data

8

Analog VSYNC

9

TMDS Data1-

10

TMDS Data1+

11

TMDS Data1/3 Shield

12

TMDS Data3-

13

TMDS Data3+

14

+5V Power

15

GND (for +5V)

16

Hot Plug Detect

17

TMDS Data0-

18

TMDS Data0+

19

TMDS Data0/5 Shield

20

TMDS Data5-

21

TMDS Data5+

22

TMDS Clock Shield

23

TMDS Clock+

24

TMDS Clock-

C1

Analog Red

C2

Analog Green

C3

Analog Blue

C4

Analog HYNC

C5

Analog GND

C6

Analog GND#C6

27

CASE_GND

28

CASE_GND

31

CASE_GND

32

CASE_GND

TYCO_C-1470881-1~D

DELL CONFIDENTIAL/PROPRIETARY

Title

Size Document Number Rev

Custom

2

Date: Sheet

Compal Electronics, Inc.
DVI & S-VIDEO CONN.

Greenland-LA2732P

20 63Wednesday, December 28, 2005

1

X03

of

5

4

3

2

1

+3VSUS

14

PCI_AD[0..31]34

D D

C C

PCI_PIRQB#34
PCI_PIRQC#34
PCI_PIRQD#34

PCI_AD0
PCI_AD1
PCI_AD2
PCI_AD3
PCI_AD4
PCI_AD5
PCI_AD6
PCI_AD7
PCI_AD8
PCI_AD9
PCI_AD10
PCI_AD11
PCI_AD12
PCI_AD13
PCI_AD14
PCI_AD15
PCI_AD16
PCI_AD17
PCI_AD18
PCI_AD19
PCI_AD20
PCI_AD21
PCI_AD22
PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
PCI_AD28
PCI_AD29
PCI_AD30
PCI_AD31

PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#

U42B

E18

AD0

C18

AD1

A16

AD2

F18

AD3

E16

AD4

A18

AD5

E17

AD6

A17

AD7

A15

AD8

C14

AD9

E14

AD10

D14

AD11

B12

AD12

C13

AD13

G15

AD14

G13

AD15

E12

AD16

C11

AD17

D11

AD18

A11

AD19

A10

AD20

F11

AD21

F10

AD22

E9

AD23

D9

AD24

B9

AD25

A8

AD26

A6

AD27

C7

AD28

B6

AD29

E6

AD30

D6

AD31

Interrupt I/F

A3

PIRQA#

B4

PIRQB#

C5

PIRQC#

B5

PIRQD#

AE5

RSVD[1]

AD5

RSVD[2]

AG4

RSVD[3]

AH4

RSVD[4]

AD9

RSVD[5]

ICH7M A0_BGA652~D

PCI

REQ4# / GPIO22
GNT4# / GPIO48

GPIO1 / REQ5#

GPIO17 / GNT5#

GPIO2 / PIRQE#

GPIO3 / PIRQF#
GPIO4 / PIRQG#
GPIO5 / PIRQH#

MISC

MCH_SYNC#

REQ0#
GNT0#
REQ1#
GNT1#
REQ2#
GNT2#
REQ3#
GNT3#

C/BE0#
C/BE1#
C/BE2#
C/BE3#

IRDY#

PAR

PCIRST#

DEVSEL#

PERR#

PLOCK#

SERR#
STOP#
TRDY#

FRAME#

PLTRST#

PCICLK

PME#

RSVD[6]
RSVD[7]
RSVD[8]
RSVD[9]

D7
E7
C16
D16
C17
D17
E13
F13
A13
A14
C8
D8

B15
C12
D12
C15

A7
E10
B18
A12
C9
E11
B10
F15
F14
F16

C26
A9
B19

G8
F7
F8
G7

AE9
AG8
AH8
F21
AH20

PCI_REQ0#
PCI_REQ1#
PCI_REQ2#

PCI_GNT2#
PCI_REQ3#

PCI_REQ4#
PCI_GNT4#
PCI_REQ5#
PCI_GNT5#

PCI_C_BE0#
PCI_C_BE1#
PCI_C_BE2#
PCI_C_BE3#

PCI_IRDY#
PCI_PAR
PCI_PCIRST#
PCI_DEVSEL#
PCI_PERR#
PCI_PLOCK#
PCI_SERR#
PCI_STOP#
PCI_TRDY#
PCI_FRAME#

PLTRST#
CK_33M_ICHPCI
ICH_PME#

ICH_GPIO2_PIRQE#
ICH_GPIO3_PIRQF#
ICH_GPIO4_PIRQG#
ICH_GPIO5_PIRQH#

MCH_ICH_SYNC# 10

PCI_REQ2# 34
PCI_GNT2# 34

PCI_C_BE0# 34
PCI_C_BE1# 34
PCI_C_BE2# 34
PCI_C_BE3# 34

PCI_IRDY# 34
PCI_PAR 34

PCI_DEVSEL# 34
PCI_PERR# 34

PCI_SERR# 34

PCI_STOP# 34
PCI_TRDY# 34

PCI_FRAME# 34

PLTRST# 23

CK_33M_ICHPCI 6

ICH_PME# 38

PLTRST#

PCI_PCIRST#

U46A

1

P

IN1

OUT

2

IN2

G

74VHC08MTCX_NL_TSSOP14~D

7

+3VSUS

14

U46B

4

P

IN1

OUT

5

IN2

G

74VHC08MTCX_NL_TSSOP14~D

7

14

U46C

10

P

IN1

OUT

9

IN2

G

74VHC08MTCX_NL_TSSOP14~D

7

C51

0.1U_0402_16V4Z~D

3

6

+3VSUS

8

12

PLTRST1#

PLTRST2#

PCI_RST#

PLTRST1# 36,40

PLTRST2# 10,32,37

PCI_RST# 34

+3.3VX

3

+COINCELL

12

R363
1K_0402_5%~D

+COINCELL_R

2

1

D16
BAT54C-7-F_SOT23~D

1

2

+COINCELL

+RTC_CELL

C355
1U_0603_10V4Z~D

+COINCELL

JCOIN

1

+

SUYIN_060003FA002TX00NL~D

2

-

Pop resistor to boot from SPI

RP17

B B

1 8
2 7
3 6
4 5

8.2K_1206_8P4R_5%~D

RP19

1 8
2 7
3 6
4 5

8.2K_1206_8P4R_5%~D

Place closely pin U42.A9

CK_33M_ICHPCI

R674

10_0402_5%~D@

A A

C808

8.2P_0402_50V8J~D@

PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQD#
PCI_PIRQC#

ICH_GPIO4_PIRQG#

PCI_PERR#
PCI_SERR#
PCI_PLOCK#

1 2

1

2

+3VRUN+3VRUN

+3VRUN

RP18

1 8
2 7

ICH_GPIO3_PIRQF#

3 6
4 5

8.2K_1206_8P4R_5%~D

RP20

1 8
2 7
3 6
4 5

8.2K_1206_8P4R_5%~D

RP21

1 8
2 7
3 6
4 5

8.2K_1206_8P4R_5%~D

1 2
1 2

PCI_REQ0#
PCI_IRDY#

PCI_REQ5#

PCI_DEVSEL#

PCI_REQ4#
PCI_REQ3#
PCI_TRDY#

PCI_STOP#
PCI_REQ1#
PCI_FRAME#
PCI_REQ2#

R3988.2K_0402_5%~D
R4028.2K_0402_5%~D

ICH_GPIO2_PIRQE#
ICH_GPIO5_PIRQH#

LPC

PCI

SPI

PCI_GNT5#

PCI_GNT4#

12

R677
1K_0402_5%~D

GNT5#
R677

11

unstuffunstuff

10

unstuff stuff

01

stuff *

12

R673
1K_0402_5%~D@

GNT4#
R673

unstuff

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.
ICH7(1/4)

Greenland-LA2732P

21 63W ed nes da y, De ce mber 28, 2005

1

X03

of

http://hobi-elektronika.net

5

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

4

3

2

Title

Size Document Number Rev

Date: Sheet

5

ͿΖ ΒΣ ͺʹ͹ Τ ΚΕΖ

C809

1P_0402_50V8J~D

12

14

23

1P_0402_50V8J~D

+RTC_CELL

SATA_ACT#

12

Y3

C810

12

R681 20K_0402_1%~D
R682 332K_0402_1%~D
R679 1M_0402_5%~D

R900

0_0402_5%~D

1 2
1 2
1 2
1 2

CMOS1
@SHORT PADS~D

1

1

C811

1U_0603_10V4Z~D

1 2

ICH_AZ_CODEC_SDIN026
ICH_AZ_MDC_SDIN129

SATA_IRX_DTX_N025

D D

C C

32.768K_6PF_1TJS060BJ4A37~D

+3VRUN

R845

10K_0402_5%~D

to JHDD1 for Primary HDD

SATA_IRX_DTX_N225

to JHDD2 for Secondry HDD

R692

B B

+3VRUN

8.2K_0402_5%~D

12

IDE_IRQ

SATA_IRX_DTX_P225

CLK_PCIE_SATA#6
CLK_PCIE_SATA6

IDE_DIORDY25
IDE_IRQ25
IDE_DDACK#25
IDE_DIOW#25 IDE_DDREQ 25
IDE_DIOR#25

Close to ICH7

ICH_AC_BITCLK_R ICH_AZ_CODEC_BITCLK

ICH_AC_RST_R#

ICH_AC_SYNC_R

A A

ICH_AC_SDOUT_R

http://hobi-elektronika.net

1 2

R407

33_0402_5%~D

1 2

R406

33_0402_5%~D

1 2

R408 33_0402_5%~D

1 2

R409 33_0402_5%~D

1 2

R401 33_0402_5%~D

1 2

R405 33_0402_5%~D

1 2

R404 33_0402_5%~D

1 2

R403 33_0402_5%~D

5

C815
27P_0402_50V8J~D@

ICH_AZ_MDC_BITCLK

C812
27P_0402_50V8J~D@

ICH_AZ_CODEC_RST#

ICH_AZ_MDC_RST#

ICH_AZ_CODEC_SYNC

ICH_AZ_MDC_SYNC

ICH_AZ_CODEC_SDOUT

ICH_AZ_MDC_SDOUT

1 2

1 2

ICH_AZ_CODEC_BITCLK 26

ICH_AZ_MDC_BITCLK 29

ICH_AZ_CODEC_RST# 26

ICH_AZ_MDC_RST# 29

ICH_AZ_CO D EC_SYNC 26

ICH_AZ_MDC_SYNC 29

ICH_AZ_CODEC_SDOUT 26

ICH_AZ_MDC_SDOUT 29

12

R680

10M_0402_5%~D

2

2

SATA_ACT#41

R691 24.9_0402_1%~D

1 2

Within 500 mils

4

ICH_RTCX1

ICH_RTCX2

ICH_RTCRST#
ICH_INTVRMEN
INTRUDER#

12

R935

@

0_0402_5%~D

ICH_AC_BITCLK_R
ICH_AC_SYNC_R

ICH_AC_RST_R#

ICH_AZ_CODEC_SDIN0
ICH_AZ_MDC_SDIN1

ICH_AC_SDOUT_R

SATA_ACT#

SATA_IRX_DTX_P0
SATA_ITX_DRX_N0
SATA_ITX_DRX_P0

SATA_IRX_DTX_N2
SATA_IRX_DTX_P2
SATA_ITX_DRX_N2
SATA_ITX_DRX_P2

CLK_PCIE_SATA#
CLK_PCIE_SATA

IDE_DIORDY
IDE_IRQ
IDE_DDACK#
IDE_DIOW#
IDE_DIOR#

4

U42A

AB1

RTXC1

AB2

RTCX2

AA3

RTCRST#

W4

INTVRMEN

Y5

INTRUDER#

W1

EE_CS

Y1

EE_SHCLK

Y2

EE_DOUT

W3

EE_DIN

V3

LAN_CLK

U3

LAN_RSTSYNC

U5

LAN_RXD0

V4

LAN_RXD1

T5

LAN_RXD2

U7

LAN_TXD0

V6

LAN_TXD1

V7

LAN_TXD2

U1

ACZ_BCLK

R6

ACZ_SYNC

R5

ACZ_RST#

T2

ACZ_SDIN0

T3

ACZ_SDIN1

T1

ACZ_SDIN2

T4

ACZ_SDOUT

AF18

SATALED#

AF3

SATA0RXN

AE3

SATA0RXP

AG2

SATA0TXN

AH2

SATA0TXP

AF7

SATA2RXN

AE7

SATA2RXP

AG6

SATA2TXN

AH6

SATA2TXP

AF1

SATA_CLKN

AE1

SATA_CLKP

AH10

SATARBIASN

AG10

SATARBIASP

AG16

IORDY

AH16

IDEIRQ

AF16

DDACK#

AH15

DIOW#

AF15

DIOR#

ICH7M A0_BGA652~D

RTC

GPIO49 / CPUPWRGD

LDRQ0#

LPCCPU

LDRQ1# / GPIO23

LFRAME#

LAN

A20GATE

CPUSLP#

TP1 / DPRSTP#

TP2 / DPSLP#

IGNNE#

INIT3_3V#

AC-97/AZALIA

STPCLK#

THERMTRIP#

SATA

IDE

DDREQ

LAD0
LAD1
LAD2
LAD3

A20M#

FERR#

INIT#

INTR

RCIN#

SMI#

DCS1#
DCS3#

DD10
DD11
DD12
DD13
DD14
DD15

3

T49PAD~D
T50PAD~D

LPC_LFRAME# 37

IDE_DA[0..2] 25

IDE_DCS1# 25
IDE_DCS3# 25SATA_IRX_DTX_P025

IDE_DD[0..15]

LPC_LAD[0..3] 37

12
12

IDE_DD[0..15] 25

H_CPUSLP#H_CPUSLP_R#
H_DPRSTP#

R689 56_0402_5%~D

1 2

2

C965

0.1U_0402_16V4Z~D

1

@

LPC_LAD0

AA6

LPC_LAD1

AB5

LPC_LAD2

AC4

LPC_LAD3

Y6
AC3

AA5

LPC_LFRAME#

AB3

SIO_A20GATE

AE22

H_A20M#

AH28
AG27

H_DPRSLP_R#

AF24

H_DPSLP#

AH25

H_FERR#

AG26

H_PWRGOOD

AG24

H_IGNNE#

AG22
AG21

H_INIT#

AF22

H_INTR

AF25

SIO_RCIN#

AG23

H_SMI#

AF23

H_NMI

AH24

NMI

DA0
DA1
DA2

DD0
DD1
DD2
DD3
DD4
DD5
DD6
DD7
DD8
DD9

H_STPCLK#

AH22

THRMTRIP_ICH#

AF26

IDE_DA0

AH17

IDE_DA1

AE17

IDE_DA2

AF17

IDE_DCS1#SATA_IRX_DTX_N0

AE16

IDE_DCS3#

AD16

IDE_DD0

AB15

IDE_DD1

AE14

IDE_DD2

AG13

IDE_DD3

AF13

IDE_DD4

AD14

IDE_DD5

AC13

IDE_DD6

AD12

IDE_DD7

AC12

IDE_DD8

AE12

IDE_DD9

AF12

IDE_DD10

AB13

IDE_DD11

AC14

IDE_DD12

AF14

IDE_DD13

AH13

IDE_DD14

AH14

IDE_DD15

AC15

IDE_DDREQ

AE15

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

3

R683 0_0402_5%~D@
R684 0_0402_5%~D

2

+VCCP

R690

SATA_ITX_C_DRX_N025
SATA_ITX_C_DRX_P025

SATA_ITX_C_DRX_N225
SATA_ITX_C_DRX_P225

2

1

+3VRUN

+3VRUN

12

12

12

R792

56_0402_5%~D

R844

10K_0402_5%~D

10K_0402_5%~D

SIO_A20GATE 37
H_A20M# 7

+VCCP

H_CPUSLP# 7,10
H_DPRSTP# 7,51

H_DPSLP# 7
H_FERR# 7
H_PWRGOOD 7
H_IGNNE# 7
H_INIT# 7

H_INTR 7

SIO_RCIN# 37
H_SMI# 7

H_NMI 7
H_STPCLK# 7

H_DPRSTP# daisy

ICH7-M --> Yonah --> IMVP6

SATA_ITX_C_DRX_P0

SATA_ITX_C_DRX_N2
SATA_ITX_C_DRX_P2

C70 3900P_0402_50V7K~D
C67 3900P_0402_50V7K~D

C73 3900P_0402_50V7K~D
C74 3900P_0402_50V7K~D

SATA_ITX_DRX_P0

12

SATA_ITX_DRX_N2

12

SATA_ITX_DRX_P2

12

SATA_ITX_DRX_N0SATA_ITX_C_DRX_N0

12

DELL CONFIDENTIAL/PROPRIETARY

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.
ICH7(2/4)

Greenland-LA2732P

22 63W ed nes da y, De ce mber 28, 2005

1

X03

of

5

+3VRUN

1 2

R704 8.2K_0402_5%~D@

1 2

D D

R705 10K_0402_5%~D

R707 8.2K_0402_5%~D

+3VSUS

1 2

R708
10K_0402_5%~D

1 2

R711
10K_0402_5%~D

1 2

R713

8.2K_0402_5%~D

1 2

R715
680_0402_5%~D

1 2

SIO_THRM#

R931

@

1 2

10_0402_5%~D

ICH_SMBCLK6,36,40

ICH_SMBDATA6,36,40

IRQ_SERIRQ ICH_SMBDATA

CLKRUN#

LINKALERT#

SMBALERT#

ICH_BATLOW#

ICH_PCIE_WAKE#

(PCI Express Wake Event)

ICH_EC_SPI_CLK37
SPI_CS#37

ICH_EC_SPI_DO37

ICH_EC_SPI_DIN37

5

SIO_EXT_SCI#

SIO_EXT_SMI#

DPRSLPVR

USB_OC3#
USB_OC0#
USB_OC1#
USB_OC2#

USB_OC6_7#
USB_OC4_5#

PCIE_IRX_PTX_N136
PCIE_IRX_PTX_P136
PCIE_ITX_C_PRX_N136
PCIE_ITX_C_PRX_P136

PCIE_IRX_PTX_N236
PCIE_IRX_PTX_P236
PCIE_ITX_C_PRX_N236
PCIE_ITX_C_PRX_P236

PCIE_IRX_PTX_N332
PCIE_IRX_PTX_P332
PCIE_ITX_C_PRX_N332
PCIE_ITX_C_PRX_P332

PCIE_IRX_PTX_N440
PCIE_IRX_PTX_P440
PCIE_ITX_C_PRX_N440
PCIE_ITX_C_PRX_P440

SPI_CS#

ICH_EC_SPI_DO
ICH_EC_SPI_DIN

RP15

4 5
3 6
2 7
1 8

10K_1206_8P4R_5%~D

RP16

4 5
3 6
2 7
1 8

10K_1206_8P4R_5%~D

R827

47_0402_5%~D

R957

47_0402_5%~D

1 2

R831 10K_0402_5%~D

C C

1 2

R832 10K_0402_5%~D

1 2

R717
100K_0402_5%~D

To Mini Card TV

To Mini Card WLAN

B B

To LOM

To Express Card

Pin P5: ICH input
Pin P2: ICH output

A A

Place close to pin AD22 of U42

http://hobi-elektronika.net

IMVP_PWRGD

1

C973

0.1U_0402_16V4Z~D

2

4

ITP_DBRESET#7,37
PM_BMBUSY#10

H_STP_PCI#6
H_STP_CPU#6

IDERST_MOD25

IRQ_SERIRQ34,37

SIO_THRM#37

12

R698

2.2K_0402_5%~D

1 2

SPKR26

+3VSUS

R699

+3VSUS

12

R697

2.2K_0402_5%~D

R701 8.2K_0402_5%~D

+3VSUS

CLKRUN#34,37

ICH_PCIE_WAKE#38

IMVP_PWRGD43,51

SIO_EXT_WAKE#37

SIO_EXT_SMI#37

Close to ICH7M

C860 0.1U_0402_16V4Z~D

1 2

C861 0.1U_0402_16V4Z~D

1 2

C897 0.1U_0402_16V4Z~D

1 2

C898 0.1U_0402_16V4Z~D

1 2

C818 0.1U_0402_16V4Z~D

1 2

C819 0.1U_0402_16V4Z~D

1 2

C821 0.1U_0402_16V4Z~D

1 2

C820 0.1U_0402_16V4Z~D

1 2

+3VSUS+3VSUS

R718

R719

1 2

10K_0402_5%~D

12
12

+3VSUS

4

R828

47_0402_5%~D

R700

1 2

10K_0402_5%~D

1 2

10K_0402_5%~D

12

USB_OC4_5#31
USB_OC6_7#31

1 2

10K_0402_5%~D

ITP_DBRESET#
PM_BMBUSY#
SMBALERT#
H_STP_PCI#

H_STP_CPU#

IDERST_MOD
CLKRUN#

ICH_PCIE_WAKE#
IRQ_SERIRQ
SIO_THRM#

IMVP_PWRGD

R714
0_0402_5%~D

1 2

SIO_EXT_SMI#

+3VSUS

R720

1 2

10K_0402_5%~D

ICH_EC_SPI_CLK_RICH_EC_SPI_CLK
SPI_CS_R#

ICHI_ECO_SPI_DATA_R

3

U42C

ICH_SMBCLK
LINKALERT#

ICH_SMLINK0
ICH_SMLINK1

ICH_RI#
SPKR

C22

SMBCLK

B22

SMBDATA

A26

LINKALERT#

B25

SMLINK0

A25

SMLINK1

A28

RI#

A19

SPKR

A27

SUS_STAT#

A22

SYS_RST#

AB18

GPIO0 / BM_BUSY#

B23

GPIO11 / SMBALERT#

AC20

GPIO18 / STPPCI#

AF21

GPIO20 / STPCPU#

A21

GPIO26

B21

GPIO27

E23

GPIO28

AG18

GPIO32 / CLKRUN#

AC19

GPIO33 / AZ_DOCK_EN#

U2

GPIO34 / AZ_DOCK_RST#

F20

WAKE#

AH21

SERIRQ

AF20

THRM#

AD22

VRMPWRGD

GPIO6

AC21

GPIO6

AC18

GPIO7

E21

GPIO8

ICH7M A0_BGA652~D

PCIE_IRX_PTX_N1
PCIE_IRX_PTX_P1
PCIE_ITX_PRX_N1
PCIE_ITX_PRX_P1

PCIE_IRX_PTX_N2
PCIE_IRX_PTX_P2
PCIE_ITX_PRX_N2
PCIE_ITX_PRX_P2

PCIE_IRX_PTX_N3
PCIE_IRX_PTX_P3
PCIE_ITX_PRX_N3
PCIE_ITX_PRX_P3

PCIE_IRX_PTX_N4
PCIE_IRX_PTX_P4
PCIE_ITX_PRX_N4
PCIE_ITX_PRX_P4

USB_OC0#
USB_OC1#
USB_OC2#
USB_OC3#
USB_OC4_5#

USB_OC6_7#

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

U42D

F26

PERn1

F25

PERp1

E28

PETn1

E27

PETp1

H26

PERn2

H25

PERp2

G28

PETn2

G27

PETp2

K26

PERn3

K25

PERp3

J28

PETn3

J27

PETp3

M26

PERn4

M25

PERp4

L28

PETn4

L27

PETp4

P26

PERn5

P25

PERp5

N28

PETn5

N27

PETp5

T25

PERn6

T24

PERp6

R28

PETn6

R27

PETp6

R2

SPI_CLK

P6

SPI_CS#

P1

SPI_ARB

P5

SPI_MOSI

P2

SPI_MISO

D3

OC0#

C4

OC1#

D5

OC2#

D4

OC3#

E5

OC4#

C3

OC5# / GPIO29

A2

OC6# / GPIO30

B3

OC7# / GPIO31

ICH7M A0_BGA652~D

SMB

SYS

GPIO

GPIO

USB

3

GPIO21 / SATA0GP
GPIO19 / SATA1GP
GPIO36 / SATA2GP
GPIO37 / SATA3GP

SATA

GPIO

Clocks

GPIO16 / DPRSLPVR

TP0 / BATLOW#

POWER MGT

SATACLKREQ#/GPIO35

DMI0RXN
DMI0RXP
DMI0TXN
DMI0TXP

DMI1RXN
DMI1RXP
DMI1TXN
DMI1TXP

PCI-EXPRESS

DMI2RXN
DMI2RXP
DMI2TXN
DMI2TXP

DMI3RXN
DMI3RXP
DMI3TXN
DMI3TXP

DMI_CLKN
DMI_CLKP

DIRECT MEDIA INTERFACE

DMI_ZCOMP

DMI_IRCOMP

USBP0N

USBP0P

USBP1N

USBP1P

USBP2N

SPI

USBP2P

USBP3N

USBP3P

USBP4N

USBP4P

USBP5N

USBP5P

USBP6N

USBP6P

USBP7N

USBP7P

USBRBIAS#

USBRBIAS

CLK14
CLK48

SUSCLK

SLP_S3#
SLP_S4#
SLP_S5#

PWROK

PWRBTN#

LAN_RST#

RSMRST#

GPIO9
GPIO10
GPIO12
GPIO13
GPIO14
GPIO15
GPIO24
GPIO25

GPIO38
GPIO39

V26

V25

U28

U27

Y26

Y25

W28

W27

AB26

AB25

AA28

AA27

AD25

AD24

AC28

AC27

AE28

AE27

C25

D25

F1

F2

G4

G3

H1

H2

J4

J3

K1

K2

L4

L5

M1

M2

N4

N3

D2

D1

AF19
AH18
AH19
AE19

AC1
B2

C20
B24

D23
F22

AA4
AC22
C21
C23
C19
Y4

R709 10K_0402_5%~D

E20
A20
F19
E19
R4
E22
R3
D20
AD21
AD20
AE20

DMI_MTX_IRX_N0
DMI_MTX_IRX_P0
DMI_MRX_ITX_N0
DMI_MRX_ITX_P0

DMI_MTX_IRX_N1
DMI_MTX_IRX_P1
DMI_MRX_ITX_N1
DMI_MRX_ITX_P1

DMI_MTX_IRX_N2
DMI_MTX_IRX_P2
DMI_MRX_ITX_N2
DMI_MRX_ITX_P2

DMI_MTX_IRX_N3
DMI_MTX_IRX_P3
DMI_MRX_ITX_N3
DMI_MRX_ITX_P3

CLK_PCIE_ICH#
CLK_PCIE_ICH

DMI_IRCOMP
USBP0-

USBP0+
USBP1­USBP1+
USBP2­USBP2+
USBP3­USBP3+
USBP4­USBP4+
USBP5­USBP5+
USBP6­USBP6+
USBP7­USBP7+

USBRBIAS

2

8.2K_0402_5%~D

1 2

CLK_ICH_14M
CLK_ICH_48M

ICH_SUSCLK

SIO_SLP_S3#
SIO_SLP_S5#
ICH_PWRGD
DPRSLPVR
ICH_BATLOW#
SIO_PWRBTN#
PLTRST#
SUSPWROK

1 2

SIO_EXT_SCI#

RSVD_HDDC_EN#
RSVD_MODC_EN#
GPIO24

SATA_CLKREQ#
PLTRST_DELAY#

DMI_MTX_IRX_N0 10
DMI_MTX_IRX_P0 10
DMI_MRX_ITX_N0 10
DMI_MRX_ITX_P0 10

DMI_MTX_IRX_N1 10
DMI_MTX_IRX_P1 10
DMI_MRX_ITX_N1 10
DMI_MRX_ITX_P1 10

DMI_MTX_IRX_N2 10
DMI_MTX_IRX_P2 10
DMI_MRX_ITX_N2 10
DMI_MRX_ITX_P2 10

DMI_MTX_IRX_N3 10
DMI_MTX_IRX_P3 10
DMI_MRX_ITX_N3 10
DMI_MRX_ITX_P3 10

CLK_PCIE_ICH# 6
CLK_PCIE_ICH 6

R721 24.9_0402_1%~D

1 2

R722 22.6_0402_1%~D

1 2

Within 500 mils

2

R703

CLK_ICH_14M 6
CLK_ICH_48M 6

SIO_SLP_S3# 37
SIO_SLP_S5# 37

DPRSLPVR 10,51

SIO_PWRBTN# 37

PLTRST# 21

SUSPWROK 16,43

SIO_EXT_SCI# 37

SATA_CLKREQ# 6
PLTRST_DELAY# 19

USBP0- 29

USBP0+ 29

USBP1- 38

USBP1+ 38

USBP2- 40

USBP2+ 40

USBP3- 41

USBP3+ 41

USBP4- 31

USBP4+ 31

USBP5- 31

USBP5+ 31

USBP6- 31

USBP6+ 31

USBP7- 31

USBP7+ 31

1

Place closely pin U42.AC1

CLK_ICH_14M

12

+3VRUN

T34 PAD~D

T51 PAD~D
T52 PAD~D
T35 PAD~D

R702
10_0402_5%~D

@

1

C816

@

2

4.7P_0402_50V8C~D

12

R706
10K_0402_5%~D

ICH_PWRGD 10,43

Place closely pin U42.B2

CLK_ICH_48M

12

R712
10_0402_5%~D

@

1

C817

4.7P_0402_50V8C~D

2

@

+1.5VRUN

Within 500 mils

USB0 => BLUETOOTH
USB1 => USB[0] of ECE5011
USB2 => Express Card

USB3 => CIR

USB4 => JUSB1(M/B)
USB5 => JUSB2(M/B)
USB6 => JUSB3 (USB/BD)
USB7 => JUSB4 (USB/BD)

DELL CONFIDENTIAL/PROPRIETARY

Title

Size Document Number Rev

Date: Sheet

Compal Elec tronics, Inc.
ICH7(3/4)

Greenland-LA2732P

23 63Wednesday, December 28, 2005

1

of

X03

5

4

3

2

1

ICH_V5REF_RUN

D D

R723

100_0402_1%~D

10_0402_5%~D

C C

+1.5VRUN

B B

+1.5VRUN

A A

12

12

R724

0.5_0805_1%~D

1 2

+3VRUN+5VRUN

21

D28
RB751V_SOD323~D

1

C831

0.1U_0402_16V4Z~D

2

+3VSUS+5VSUS

21

D29
RB751V_SOD323~D

1

C836

0.1U_0402_16V4Z~D

2

R837

0.5_0805_1%~D

R892

+1.5V_DMIPLL_L

1 2

L71

10U_GLF2012T100K_140mA_10%_0805~D

1 2

+1.5VRUN

ICH_V5REF_RUN

ICH_V5REF_SUS

BLM11A601S_0603~D

1

C893

2

L67

1 2

1

2

10U_0805_4VAM~D

L66

1 2

BLM21PG600SN1D_0805~D

+1.5V_DMIPLL

1

C847

2

0.01U_0402_16V7K~D

+VCCSATAPLL

+3VRUN

C894

0.1U_0402_16V4Z~D

+3VSUS

C857

0.1U_0402_16V4Z~D

+1.5VRUN_L

+1.5VRUN_L

1

+

C826

C822

2

220U_D2_4VM~D

+3VRUN

1

C837

2

1

1

2

1

2

+VCCSATAPLL

C853

0.1U_0402_16V4Z~D

+1.5VRUN

0.1U_0402_16V4Z~D

+1.5VRUN

1U_0603_10V4Z~D

+1.5VRUN

0.1U_0402_16V4Z~D

+3VSUS

0.1U_0402_16V4Z~D

C848

2

10U_0805_4VAM~D

1

2

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

+1.5V_DMIPLL

C856

C859

C827

C851

C854

1

2

ICH_V5REF_SUS

1

C828

2

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

1

2

1

2

1

2

1

2

U42F

G10

V5REF[1]

AD17

V5REF[2]

F6

V5REF_Sus

AA22

Vcc1_5_B[1]

AA23

Vcc1_5_B[2]

AB22

Vcc1_5_B[3]

AB23

Vcc1_5_B[4]

AC23

Vcc1_5_B[5]

AC24

Vcc1_5_B[6]

AC25

Vcc1_5_B[7]

AC26

Vcc1_5_B[8]

AD26

Vcc1_5_B[9]

AD27

Vcc1_5_B[10]

AD28

Vcc1_5_B[11]

D26

Vcc1_5_B[12]

D27

Vcc1_5_B[13]

D28

Vcc1_5_B[14]

E24

Vcc1_5_B[15]

E25

Vcc1_5_B[16]

E26

Vcc1_5_B[17]

F23

Vcc1_5_B[18]

F24

Vcc1_5_B[19]

G22

Vcc1_5_B[20]

G23

Vcc1_5_B[21]

H22

Vcc1_5_B[22]

H23

Vcc1_5_B[23]

J22

Vcc1_5_B[24]

J23

Vcc1_5_B[25]

K22

Vcc1_5_B[26]

K23

Vcc1_5_B[27]

L22

Vcc1_5_B[28]

L23

Vcc1_5_B[29]

M22

Vcc1_5_B[30]

M23

Vcc1_5_B[31]

N22

Vcc1_5_B[32]

N23

Vcc1_5_B[33]

P22

Vcc1_5_B[34]

P23

Vcc1_5_B[35]

R22

Vcc1_5_B[36]

R23

Vcc1_5_B[37]

R24

Vcc1_5_B[38]

R25

Vcc1_5_B[39]

R26

Vcc1_5_B[40]

T22

Vcc1_5_B[41]

T23

Vcc1_5_B[42]

T26

Vcc1_5_B[43]

T27

Vcc1_5_B[44]

T28

Vcc1_5_B[45]

U22

Vcc1_5_B[46]

U23

Vcc1_5_B[47]

V22

Vcc1_5_B[48]

V23

Vcc1_5_B[49]

W22

Vcc1_5_B[50]

W23

Vcc1_5_B[51]

Y22

Vcc1_5_B[52]

Y23

Vcc1_5_B[53]

B27

Vcc3_3[1]

AG28

VccDMIPLL

AB7

Vcc1_5_A[1]

AC6

Vcc1_5_A[2]

AC7

Vcc1_5_A[3]

AD6

Vcc1_5_A[4]

AE6

Vcc1_5_A[5]

AF5

Vcc1_5_A[6]

AF6

Vcc1_5_A[7]

AG5

Vcc1_5_A[8]

AH5

Vcc1_5_A[9]

AD2

VccSATAPLL

AH11

Vcc3_3[2]

AB10

Vcc1_5_A[10]

AB9

Vcc1_5_A[11]

AC10

Vcc1_5_A[12]

AD10

Vcc1_5_A[13]

AE10

Vcc1_5_A[14]

AF10

Vcc1_5_A[15]

AF9

Vcc1_5_A[16]

AG9

Vcc1_5_A[17]

AH9

Vcc1_5_A[18]

E3

VccSus3_3[19]

C1

VccUSBPLL

AA2

VccSus1_05/VccLAN1_05[1]

Y7

VccSus1_05/VccLAN1_05[2]

V5

VccSus3_3/VccLAN3_3[1]

V1

VccSus3_3/VccLAN3_3[2]

W2

VccSus3_3/VccLAN3_3[3]

W7

VccSus3_3/VccLAN3_3[4]

ICH7M A0_BGA652~D

Vcc1_05[1]
Vcc1_05[2]
Vcc1_05[3]
Vcc1_05[4]
Vcc1_05[5]
Vcc1_05[6]
Vcc1_05[7]
Vcc1_05[8]

Vcc1_05[9]
Vcc1_05[10]
Vcc1_05[11]
Vcc1_05[12]
Vcc1_05[13]
Vcc1_05[14]
Vcc1_05[15]
Vcc1_05[16]
Vcc1_05[17]
Vcc1_05[18]
Vcc1_05[19]
Vcc1_05[20]

Vcc3_3 / VccHDA

VccSus3_3/VccSusHDA

V_CPU_IO[1]
V_CPU_IO[2]
V_CPU_IO[3]

Vcc3_3[3]
Vcc3_3[4]
Vcc3_3[5]
Vcc3_3[6]
Vcc3_3[7]
Vcc3_3[8]

Vcc3_3[9]
Vcc3_3[10]
Vcc3_3[11]

Vcc3_3[12]
Vcc3_3[13]
Vcc3_3[14]
Vcc3_3[15]
Vcc3_3[16]
Vcc3_3[17]
Vcc3_3[18]
Vcc3_3[19]
Vcc3_3[20]
Vcc3_3[21]

VccRTC
VccSus3_3[1]
VccSus3_3[2]

VccSus3_3[3]
VccSus3_3[4]
VccSus3_3[5]
VccSus3_3[6]

VccSus3_3[7]
VccSus3_3[8]
VccSus3_3[9]

VccSus3_3[10]
VccSus3_3[11]
VccSus3_3[12]
VccSus3_3[13]
VccSus3_3[14]
VccSus3_3[15]
VccSus3_3[16]
VccSus3_3[17]
VccSus3_3[18]

Vcc1_5_A[19]
Vcc1_5_A[20]

Vcc1_5_A[21]
Vcc1_5_A[22]
Vcc1_5_A[23]

Vcc1_5_A[24]
Vcc1_5_A[25]

VccSus1_05[1]
VccSus1_05[2]

VccSus1_05[3]

Vcc1_5_A[26]
Vcc1_5_A[27]
Vcc1_5_A[28]
Vcc1_5_A[29]
Vcc1_5_A[30]

L11
L12
L14
L16
L17
L18
M11
M18
P11
P18
T11
T18
U11
U18
V11
V12
V14
V16
V17
V18

U6
R7
AE23

AE26
AH26

AA7
AB12
AB20
AC16
AD13
AD18
AG12
AG15
AG19

A5
B13
B16
B7
C10
D15
F9
G11
G12
G16

W5
P7
A24

C24
D19
D22
G19

K3
K4
K5
K6
L1
L2
L3
L6
L7
M6
M7
N7

AB17
AC17

T7
F17
G17

AB8
AC8

K7
C28

G20
A1

H6
H7
J6
J7

+VCCP

1

1

C823

2

2

1U_0603_10V4Z~D

+3VRUN

1

C839

0.1U_0402_16V4Z~D

2

1

1

C840

2

2

0.1U_0402_16V4Z~D

1

C843

0.1U_0402_16V4Z~D

2

1

2

+1.5VRUN

+1.5VRUN
+1.5VRUN
+1.5VRUN

1

C855

0.1U_0402_16V4Z~D

2

+1.5VRUN

1

C858

0.1U_0402_16V4Z~D

2

C824

0.1U_0402_16V4Z~D

+3VSUS

1

C841

2

0.1U_0402_16V4Z~D

1

C849

2

0.1U_0402_16V4Z~D

1

+

C825

2

330U_D2E_2.5VM~D

CRB is 270uF

1

C832

2

C842

0.1U_0402_16V4Z~D

1

2

+3VSUS

C844

0.1U_0402_16V4Z~D

+3VSUS

C850

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

+3VRUN

U42E

A4

VSS[0]

A23

VSS[1]

B1

VSS[2]

B8

VSS[3]

B11

VSS[4]

B14

VSS[5]

B17

VSS[6]

B20

VSS[7]

B26

VSS[8]

B28

VSS[9]

C2

VSS[10]

C6

VSS[11]

C27

VSS[12]

D10

VSS[13]

D13

VSS[14]

D18

VSS[15]

D21

VSS[16]

D24

VSS[17]

E1

VSS[18]

E2

VSS[19]

E4

VSS[21]

+3VRUN

+VCCP

1

1

C838

C834

2

2

0.1U_0402_16V4Z~D

C845

0.1U_0402_16V4Z~D

1

C833

0.1U_0402_16V4Z~D

2

4.7U_0603_6.3V6M~D

+RTC_CELL

1

1

C846

2

2

0.1U_0402_16V4Z~D

E8

VSS[22]

E15

VSS[23]

F3

VSS[24]

F4

VSS[25]

F5

VSS[26]

F12

VSS[27]

F27

VSS[28]

F28

VSS[29]

G1

VSS[30]

G2

VSS[31]

G5

VSS[32]

G6

VSS[33]

G9

VSS[34]

G14

VSS[35]

G18

VSS[36]

G21

VSS[37]

G24

VSS[38]

G25

VSS[39]

G26

VSS[40]

H3

VSS[41]

H4

VSS[42]

H5

VSS[43]

H24

VSS[44]

H27

VSS[45]

H28

VSS[46]

J1

VSS[47]

J2

VSS[48]

J5

VSS[49]

J24

VSS[50]

J25

VSS[51]

J26

VSS[52]

K24

VSS[53]

K27

VSS[54]

K28

VSS[55]

L13

VSS[56]

L15

VSS[57]

L24

VSS[58]

L25

VSS[59]

L26

VSS[60]

M3

VSS[61]

M4

VSS[62]

M5

VSS[63]

M12

VSS[64]

M13

VSS[65]

M14

VSS[66]

M15

VSS[67]

M16

VSS[68]

M17

VSS[69]

M24

VSS[70]

M27

VSS[71]

M28

VSS[72]

N1

VSS[73]

N2

VSS[74]

N5

VSS[75]

N6

VSS[76]

N11

VSS[77]

N12

VSS[78]

N13

VSS[79]

N14

VSS[80]

N15

VSS[81]

N16

VSS[82]

N17

VSS[83]

N18

VSS[84]

N24

VSS[85]

N25

VSS[86]

N26

VSS[87]

P3

VSS[88]

P4

VSS[89]

P12

VSS[90]

P13

VSS[91]

P14

VSS[92]

P15

VSS[93]

P16

VSS[94]

P17

VSS[95]

P24

VSS[96]

P27

VSS[97]

ICH7M A0_BGA652~D

VSS[98]

VSS[99]
VSS[100]
VSS[101]
VSS[102]
VSS[103]
VSS[104]
VSS[105]
VSS[106]
VSS[107]
VSS[108]
VSS[109]
VSS[110]
VSS[111]
VSS[112]
VSS[113]
VSS[114]
VSS[115]
VSS[116]
VSS[117]
VSS[118]
VSS[119]
VSS[120]
VSS[121]
VSS[122]
VSS[123]
VSS[124]
VSS[125]
VSS[126]
VSS[127]
VSS[128]
VSS[129]
VSS[130]
VSS[131]
VSS[132]
VSS[133]
VSS[134]
VSS[135]
VSS[136]
VSS[137]
VSS[138]
VSS[139]
VSS[140]
VSS[141]
VSS[142]
VSS[143]
VSS[144]
VSS[145]
VSS[146]
VSS[147]
VSS[148]
VSS[149]
VSS[150]
VSS[151]
VSS[152]
VSS[153]
VSS[154]
VSS[155]
VSS[156]
VSS[157]
VSS[158]
VSS[159]
VSS[160]
VSS[161]
VSS[162]
VSS[163]
VSS[164]
VSS[165]
VSS[166]
VSS[167]
VSS[168]
VSS[169]
VSS[170]
VSS[171]
VSS[172]
VSS[173]
VSS[174]
VSS[175]
VSS[176]
VSS[177]
VSS[178]
VSS[179]
VSS[180]
VSS[181]
VSS[182]
VSS[183]
VSS[184]
VSS[185]
VSS[186]
VSS[187]
VSS[188]
VSS[189]
VSS[190]
VSS[191]
VSS[192]
VSS[193]
VSS[194]

P28
R1
R11
R12
R13
R14
R15
R16
R17
R18
T6
T12
T13
T14
T15
T16
T17
U4
U12
U13
U14
U15
U16
U17
U24
U25
U26
V2
V13
V15
V24
V27
V28
W6
W24
W25
W26
Y3
Y24
Y27
Y28
AA1
AA24
AA25
AA26
AB4
AB6
AB11
AB14
AB16
AB19
AB21
AB24
AB27
AB28
AC2
AC5
AC9
AC11
AD1
AD3
AD4
AD7
AD8
AD11
AD15
AD19
AD23
AE2
AE4
AE8
AE11
AE13
AE18
AE21
AE24
AE25
AF2
AF4
AF8
AF11
AF27
AF28
AG1
AG3
AG7
AG11
AG14
AG17
AG20
AG25
AH1
AH3
AH7
AH12
AH23
AH27

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.
ICH7(4/4)

Greenland-LA2732P

24 63W ed nes da y, De ce mber 28, 2005

1

X03

of

http://hobi-elektronika.net

5

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

4

3

2

Title

Size Document Number Rev

Date: Sheet

5

4

3

2

1

JHDD1

SATA_ITX_C_DRX_N022

+3VRUN

D D

1

1

1

1

C635

C634

C639

C928

2

@

C C

2

@

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

SATA_IRX_DTX_P022

SATA_IRX_DTX_N022

@

10U_0805_10V4Z~D

C929

2

2

@

@

1U_0603_10V4Z~D

1000P_0402_50V7K~D

SATA_ITX_C_DRX_N0
SATA_IRX_C_DTX_N0 SATA_IRX_C_DTX_P0

1

VCP1_R16

2

SATA_IRX_DTX_P0

SATA_IRX_DTX_N0 SATA_IRX_C_DTX_N0

VCP1_R

+5VHDD

C637

12

3900P_0402_50V7K~D

C638

12

3900P_0402_50V7K~D

112
334
556

7

8

7

9

10

9

11

12

11

13

14

13

15

16

15

17

18

17

19

20

19

21

22

21

23

24

23

25

26

25

27

28

27

29

30

29

31

31

32

33

33

34

FOX_GS12301-1011A-9F~D

SATA_IRX_C_DTX_P0

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34

SATA_ITX_C_DRX_P0

+3VRUN

VCP1

+5VHDD

1

C633

2

0.1U_0402_16V4Z~D

SATA_ITX_C_DRX_P0 22

VCP1 16

1

C632

C636

2

10U_0805_10V4Z~D

0.1U_0402_16V4Z~D

100K_0402_5%~D@

ODD_STAT#38

1

2

1U_0603_10V4Z~D

R565

1

C930

2

1000P_0402_50V7K~D

12

100K_0402_5%~D

+5VMOD

1

C651

2

+3VRUN +3VRUN

CD-ROM Connector

R881
10K_0402_5%~D

D33

RB751V_SOD323~D

2 1

IDERST_MOD
IDE_DD7
IDE_DD6
IDE_DD5
IDE_DD4
IDE_DD3
IDE_DD2
IDE_DD1
IDE_DD0

IDE_DIOW#22
IDE_DIORDY22
IDE_IRQ22
IDE_DA122
IDE_DA022
IDE_DCS1#22 IDE_DCS3# 22

12

2

G

+5VMOD

SEC_CSEL

13

D

Q69
2N7002_SOT23~D

S

CDROM_ACT#

ODD_STAT#_IN

JMOD

1

1

2

3

3

4

5

5

6

7

7

8

9

9

10

11

11

12

13

13

14

15

15

16

17

17

18

19

19

20

21

21

22

23

23

24

25

25

26

27

27

28

29

29

30

31

31

32

33

33

34

35

35

36

37

37

38

39

39

40
414142
434344
454546
474748
494950

MOLEX_52760-0508~D

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50

R4

2

G

100K_0402_5%~D

1 2

+5VMOD

12

R564

13

D

S

12

IDERST_MOD23

R1

470_0402_5%~D

Q70
2N7002_SOT23~D

12

R908
10K_0402_5%~D

R909

0_0402_5%~D

1 2

IDE_DDREQ

RPDDACK#
PDIAG#

C342 0.1U_0402_16V4Z~D

1 2

ODD_EJECT#_OUT

ODD_OVER_TEMP#

IDE_DD8

IDE_DD9
IDE_DD10
IDE_DD11
IDE_DD12
IDE_DD13
IDE_DD14
IDE_DD15

IDE_DDREQ 22
IDE_DIOR# 22

R347 100K_0402_5%~D

1 2

IDE_DA2 22

+5VMOD

ODD_OVER_TEMP# 38ODD_MEDIA_STAT2#38

+5VMOD

Layout Note: W=80 mils

+5VMOD+3VRUN

2

G

Q68
2N7002_SOT23~D

1 3

D

S

IDE_DD0
IDE_DD1
IDE_DD2
IDE_DD3
IDE_DD4
IDE_DD5
IDE_DD6
IDE_DD7
IDE_DD8
IDE_DD9
IDE_DD10
IDE_DD11
IDE_DD12
IDE_DD13
IDE_DD14
IDE_DD15

+3VRUN

12

R910
10K_0402_5%~D

IDE_DD[0..15] 22

ODD_EJECT_REC# 38

JHDD2

2

B B

+3VRUN

1

C628

C629

2

@

@

0.1U_0402_16V4Z~D

A A

http://hobi-elektronika.net

SATA_ITX_C_DRX_N222

1

1

C640

2

2

@

10U_0805_10V4Z~D

0.1U_0402_16V4Z~D

SATA_IRX_DTX_P222

SATA_IRX_DTX_N222

1

C932

C931

2

@

@

1U_0603_10V4Z~D

5

SATA_ITX_C_DRX_N2
SATA_IRX_C_DTX_N2 SATA_IRX_C_DTX_P2

1

VCP2_R16

2

1000P_0402_50V7K~D

SATA_IRX_DTX_P2

SATA_IRX_DTX_N2 SATA_IRX_C_DTX_N2

VCP2_R

+5VHDD

C627

3900P_0402_50V7K~D

C626

3900P_0402_50V7K~D

112
334
556

7

8

7

9

10

9

11

12

11

13

14

13

15

16

15

17

18

17

19

20

19

21

22

21

23

24

23

25

26

25

27

28

27

29

30

29

31

31

32

33

33

34

FOX_GS12301-1011A-9F~D

SATA_IRX_C_DTX_P2

12

12

4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34

SATA_ITX_C_DRX_P2

4

+3VRUN

VCP2

+5VHDD

1

C630

C631

2

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

SATA_ITX_C_DRX_P2 22

VCP2 16

1

1

C641

2

2

10U_0805_10V4Z~D

+3VRUN

1

1

C933

C652

2

2

1U_0603_10V4Z~D

1000P_0402_50V7K~D

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

IDE_DDACK#22

3

R2

1 2

4.7K_0402_5%~D

R346

1 2

22_0402_5%~D

IDE_DIORDY

RPDDACK#

2

Layout Note: Place close to CD-ROM CONN.

+5VMOD

1000P_0402_50V7K~D

0.1U_0402_16V4Z~D

C1

1

1

C26

2

1

C3

2

2

10U_0805_10V4Z~D

1U_0603_10V4Z~D

1

C11

2

DELL CONFIDENTIAL/PROPRIETARY

Title

SATA & CD-ROM

Size Document Number Rev

Custom

Greenland-LA2732P

Date: Sheet of

Compal Electronics, Inc.

25 63Wednesday, December 28, 2005

1

X03

5

4

3

2

1

+5VSUS

1

1

C261

C262

D D

2

0.1U_0402_16V4Z~D

2

AUDIO_AVDD_ON38

C266

2

1

1U_0603_10V4Z~D

0.01U_0402_16V7K~D

5

U20

1

IN

2

GND

3

EN

TPS793475DBVRG4_SOT23-5~D

OUT

BYPASS

5

4

4

3

21

TPS793475_BYPASS

C253

0.1U_0402_16V4Z~D

VDDA=4.75V

C267

1

2

single gate TTL

C C

B B

A A

http://hobi-elektronika.net

ICH_AZ_C ODEC_SDOUT

12

R244
33_0402_5%~D

@

1

C225
22P_0402_50V8J~D

2

@

ICH_AZ_CODEC_SDIN022

ICH_AZ_CODEC_BITCLK

12

R247
33_0402_5%~D

@

1

C232
22P_0402_50V8J~D

2

@

+3VRUN

W=30 mil

2

2

1

C242

C233

1

1U_0603_10V6K~D

1

2

SPK_SHUTDOWN#28,29

R248

33_0402_5%~D

1

C574

2

1U_0603_10V6K~D

ICH_AZ_CODEC_SDIN0 R_ICH_AC_SDIN0

2

C224

C219

1

1U_0603_10V6K~D

0.1U_0402_10V6K~D

AMP_SHUTDOWN28

ICH_AZ_CODEC_BITCLK22

1 2

ICH_AZ_CODEC_ SDOUT22

2

C231
820P_0603_50V7K~D

1

12

R805
100K_0402_5%~D

@

ICH_AZ_CODEC_SYNC22
ICH_AZ_CODEC_RST#22

R880
0_0402_5%~D@

1 2

2

1

SPDIF30

C255

1

0.1U_0402_10V6K~D

10U_1206_6.3V7K~D

ICH_AZ_CODEC_BITCLK
ICH_AZ_C ODEC_SDOUT

ICH_AZ_CODEC_SYNC
ICH_AZ_CODEC_RST#

CAP2
AFLT1

AFLT2

C228
820P_0603_50V7K~D

SPK_SHUTDOWN_R#
AMP_SHUTDOWN

1 2

R573 0_0402_5%~D

2

Reserve Jump for EMI test

JUMP8

2

112

@

JUMP_43X79
JUMP10

2

112

@

JUMP_43X79
JUMP12

2

112

@

JUMP_43X79

5

JUMP9

@

JUMP_43X79
JUMP11

@

JUMP_43X79

112

112

2

2

4

+VDDA

1

1

C584

2

2

2.2U_0805_10V6K~D

0.1U_0402_16V4Z~D

+VDDA

SPDIF_OUT

1

C256

2

0.047U_0402_10V7K~D

2

C205

C206

1

0.1U_0402_10V6K~D

U18

25

AVDD1

38

AVDD2

1

DVDD_CORE1

9

DVDD_CORE3

6

BIT_CLK

8

SDATA_IN

5

SDATA_OUT

10

SYNC

11

RESET#

33

CAP2

27

VREF_FILT

30

AFILT1

31

AFILT2

3

VOLUME_DOWN

2

VOLUME_UP

45

GPIO0

46

GPIO1

44

GPIO2

47

GPIO3/SPDIFIN/EAPD

48

SPDIF_OUT

43

PLL_CAP

40

NC

4

DVSS2

7

DVSS3

STAC9220X5TAEA1XR_LQFP48~D

STAC9220

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

+VDDA

C265

1 2

5

U23

0.1U_0402_16V4Z~D

P

4

Y

G

SN74AHCT1G86DCKR_SC70-5~D

3

SENSE_A 30
SENSE_B 30

HP_OUT_L 28
HP_OUT_R 28

SIDE_OUT/IN_L 30
SIDE_OUT/IN_R 30

BACK_OUT_L 30
BACK_OUT_R 30

FRONT_OUT_L 27,30
FRONT_OUT_R 27,30

NB_MICIN_L 28
NB_MICIN_R 28

CENTER_OUT 30
LFE_OUT 30

VREFOUT_A 28
VREFOUT_B 30

INT_MIC_IN_L 27

INT_MIC_IN_R 27

2N7002_SOT23~D

@

@

1

C207
1U_0603_10V6K~D

2

PC_BEEP

1

A

2

B

SPKR23
BEEP38

2

1

10U_1206_6.3V7K~D

SENSE_A
SENSE_B

PORT_A_L_HP

PORT_A_R_HP

PORT_B_L

PORT_B_R

PORT_C_L
PORT_C_R

PORT_D_L_HP

PORT_D_R_HP

PORT_E_L

PORT_E_R

PORT_F_L_HP

PORT_F_R_HP

VREFOUT_A
VREFOUT_B
VREFOUT_C
VREFOUT_D

CD_L
CD_G
CD_R

PC_BEEP

AVSS1
AVSS3

C2, C46 close to U18 (9220)

C46

1 2

1000P_0402_50V7K~D
C2

1 2

1000P_0402_50V7K~D

13
34

39
41

21
22

23
24

35
36

14
15

16
17

37
28
29
32
18
19
20
12

26
42

1

C240
1U_0603_10V6K~D

2

1

C259

0.22U_0603_10V7K~D

2

R275

10K_0402_5%~D

1 2

5.11K_0402_1%~D

R271

39.2K_0402_1%~D

Q57

0.1U_0402_16V4Z~D

12

R278

8.2K_0402_5%~D

@

+VDDA

Place close to codec

12

R267

12

13

D

S

D

S

2

G

For CA1 silicon

For CA2 silicon

C273

1 2

12

R268

5.11K_0402_1%~D

12

R272

39.2K_0402_1%~D

13

2

G

Q56
2N7002_SOT23~D

PC_BEEPBEEP1 BEEP2

2

C268
1000P_0402_50V7K~D

@

1

SENSE_A
SENSE_B

For CA2 silicon

HP_NB_SENSE 28,31

NB_MICIN_DETECT 28,31

R271 R272

5.11K

39.2K

5.11K

39.2K

bring-up

SST

DELL CONFIDENTIAL/PROPRIETARY

Title

Size Document Number Rev

3

2

Date: Sheet of

Compal Elec tronics, Inc.

AC97 CODEC

Greenland-LA2732P

26 63Wednesday, December 28, 2005

1

X03

5

4

3

2

1

PIN 1 OUTPUT

D D

PIN 2 GROUND

MIC has to link CIS

WM-64PC(TOP VIEW)

INT_MIC_L+

INT_MIC_R+

D30

1

SM05TCT_SOT23-3~D

@

INT_MIC_L-

2
3

INT_MIC_R-

PIN 1 OUTPUT

C C

PIN 2 GROUND

MIC has to link CIS

JMIC

1

1

2

2

3

3

4

6

4

G1

5

7

5

G2

MOLEX_53261-0571~D

WM-64PC(TOP VIEW)

INT_MIC_R+

D31

2

1

@

C655

1 2

C649

1 2

3

R526

1 2

10K_0402_5%~D

1 2

R522

10K_0402_5%~D

BUFFER_BIAS

BUFFER_BIAS

+VDDA

4

10

+

9

-

11

1 2

10K_0402_5%~D

+VDDA

4

12

+

13

-

11

1 2

10K_0402_5%~D

C670

1 2

0.1U_0402_16V4Z~D

U26C

P

8

O

G

LM324MTX_TSSOP14~D

R524

U26D

P

14

O

G

LM324MTX_TSSOP14~D

R519

C656

C650

SM05TCT_SOT23-3~D

INT_MIC_R-

B B

FRONT_OUT_L26,30

FRONT_OUT_R26,30

A A

0.068U_0402_10V7K~D

0.068U_0402_10V7K~D

INT_MIC_R+
INT_MIC_R-

2

1

1000P_0402_50V7K~D

2

1

1000P_0402_50V7K~D

C669

2.2U_0805_10V6K~D

INT_MIC_L+
INT_MIC_L-

C341

2.2U_0805_10V6K~D

1

C336

2

2.2U_0805_10V6K~D

1

C323

2

2.2U_0805_10V6K~D

1

2

1

2

+VDDA

+VDDA

12

12

12

12

12

R327
1K_0402_5%~D

12

R335
1K_0402_5%~D

12

R317
1K_0402_5%~D

12

R318
1K_0402_5%~D

R321
1K_0402_5%~D

R319
1K_0402_5%~D

C328

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D
C334

R337
1K_0402_5%~D

R339
1K_0402_5%~D

C329

0.1U_0402_16V4Z~D

12
12

0.1U_0402_16V4Z~D

C325

AUD_LINE_OUT_L 28

AUD_LINE_OUT_R 28

12
12

10K_0402_5%~D

1 2
1 2

10K_0402_5%~D

R325

10K_0402_5%~D

1 2
1 2

R328

10K_0402_5%~D

R324

R322

R533

1 2

100K_0402_5%~D

+VDDA

4

3

+

2

-

11

R336

1 2

100K_0402_5%~D

R556

1 2

100K_0402_5%~D

+VDDA

4

10

P

+

9

-

G

11

R532

1 2

100K_0402_5%~D

FRONT_OUT_L
FRONT_OUT_R

MIC_BIAS

U28A

P

1

O

G

U28C

O

LM324MTX_TSSOP14~D

0.22U_0402_10V4Z~D

LM324MTX_TSSOP14~D

MIC_BIAS

8

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

C674

12

C663

12

0.22U_0402_10V4Z~D

BUFFER_BIAS

8.2K_0402_5%~D

1 2

12

1 2

12

8.2K_0402_5%~D

R331

R332

C338

C339

INT_MIC_IN_L 26

MIC_BIAS

INT_MIC_IN_R 26

LM324MTX_TSSOP14~D

R531

1 2

100K_0402_5%~D

+VDDA

U26B

4

LM324MTX_TSSOP14~D

5

P

+

7

O

6

-

G

11

1 2

R315

27K_0402_1%~D

12

C324

0.022U_0402_16V7K~D

U26A

1

U28B

7

+VDDA

4

O

11

LM324MTX_TSSOP14~D

+VDDA

O

3

P

+

2

-

G

LM324MTX_TSSOP14~D

+VDDA

4

5

P

+

6

-

G

11

+VDDA

R330
100K_0402_5%~D

1 2

R329

100K_0402_5%~D

1 2

+VDDA

4

U28D

14

O

11

R340
100K_0402_5%~D

1 2

1

R338

100K_0402_5%~D

2

1 2

1

C664

2

2.2U_0805_10V6K~D

AUD_MONO_OUT 29

C673

1 2

0.1U_0402_16V4Z~D

12

P

+

13

-

G

C340

2.2U_0805_10V6K~D

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Internal MIC

Greenland-LA2732P

27 63Wednesday, December 28, 2005

1

X03

of

http://hobi-elektronika.net

5

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

4

3

2

Title

Size Document Number Rev

Custom

Date: Sheet

5

4

3

2

1

12

C598
1U_0603_10V6K~D

11
9

4

NC-4

6

NC-6

8

NC-8

12
16
20

place near pin 3

C31147P_0402_50V8J~D

+3VRUN

HP_SPK_R1
HP_SPK_L1

C303 0.1U_0603_25V7K~D

1

C3150.47U_0603_16V7K~D

2

4

L52

BLM18AG121SN1D_0603~D

L51

BLM18AG121SN1D_0603~D

LINE OUT

+12VRUN_L

1

C307

2

1 2

SPK_SHUTDOWN#

MAX9714_G1
MAX9714_G2

MAX9714_FS1
MAX9714_FS2

1

1

C31047P_0402_50V8J~D

2

2

12
12

C62047P_0402_50V8J~D

C607

C295

1U_0805_25V6K~D

1

C6250.47U_0603_16V7K~D

2

HP_SPK_R2
HP_SPK_L2

2

2

C599

1

1

100P_0402_50V8J~D

100P_0402_50V8J~D

L27

1 2

BLM21PG600SN1D_0805~D

1

2

3

4
21
22

7

5

6

11

17
18

19
20

15
16

9
10

1

1

C612

C615

2

2

0.1U_0603_25V7K~D

0.1U_0603_25V7K~D

U25

VDD
VDD
VDD
VDD

CHOLD
C1N

C1P

SHDN#

G1
G2

FS1
FS2

INR­INR+

INL­INL+

MAX9714ETJ+_TQFN-EP32~D

10U_1210_25V6M~D

SPK_SHUTDOWN#26,29

HP_SPK_R2 31
HP_SPK_L2 31

INT_SPK_R2

INT_SPK_R1

INT_SPK_L2

INT_SPK_L1

+12VRUN

AMP_SHUTDOWN26

R312 0_0805_5%~D

1 2

@

1

1

2

2

ACM3225-601-2P-T_1210~D

1 2

R311 0_0805_5%~D

R310 0_0805_5%~D

1 2

@

1

1

2

2

ACM3225-601-2P-T_1210~D

1 2

R309 0_0805_5%~D

place near pin 22

1

C611

2

10U_1210_25V6M~D

25

OUTR-

26

OUTR-

27

OUTR+

28

OUTR+

29

OUTL-

30

OUTL-

31

OUTL+

32

OUTL+

8

NC

12

SS

14

REG

13

AGND

1

PGND

2

PGND

23

PGND

24

PGND

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

3

INT_SPK_R2

INT_SPK_R1

INT_SPK_L2

INT_SPK_L1

1

C314

2

0.01U_0603_50V7K~D

NB_MICIN_L26

NB_MICIN_R26

1

C313

2

0.22U_0603_10V7K~D

L50

+3VRUN

12

R503
10K_0402_5%~D

D D

HP_NB_SENSE26,31

HP_OUT_R26
HP_OUT_L26

C C

B B

Voltage Gain selection

G1

L

L

H

H

A A

1U_0603_10V6K~D

1U_0603_10V6K~D

+5VRUN

12

R302

R304

0_0402_5%~D

0_0402_5%~D

12

R300

R306

@

@

0_0402_5%~D

0_0402_5%~D

G2

L

H

L13

H

AUD_LINE_OUT_R27

AUD_LINE_OUT_L27

http://hobi-elektronika.net

C606

12
12

C604

1

C278

2

1U_0603_10V6K~D

12

12

R296

0_0402_5%~D

12

12

R298

@

0_0402_5%~D

Av dB(TYP)

22.1

19.1

16

5

HP_NB_SENSE

AUD_LINE_IN_R
AUD_LINE_IN_L

12

R293

0_0402_5%~D

12

R291

@

0_0402_5%~D

0.47U_0603_16V7K~D

0.47U_0603_16V7K~D

U24

14

SHDNR#

18

SHDNL#

15

INR

13

INL

1

C1P

3

C1N

MAX9714_G1
MAX9714_G2
MAX9714_FS1
MAX9714_FS2

Oscillator frequency selection

FS1

L

L H

H

H

C624

1 2

C316

1 2

PVss

5

1

C593

2

1U_0603_10V6K~D

FS2

H
(ss mode)

+3VRUN_L

19

PVDD

L 335

BLM18AG601SN1D_0603~D

1

2

10

OUTR

SVDD

OUTL

NC-12
NC-16
NC-20

PGND

SVss

SGND

MAX4411ETP+_TQFN20~D

2

7

17

Freq KHz

460

236L

335 +/- 7%

AUD_C_OUT_R

AUD_C_OUT_L

1

1

C61947P_0402_50V8J~D

2

2

+3VRUN

R500
100K_0402_5%~D

1 2

13

D

Q59

S

2N7002_SOT23~D

4

3

4

3

1 2

4.99_0603_1%~D

1 2

4.99_0603_1%~D

HP_NB_SENSE

+12VRUN

D21

@

DA204U_SOT323~D

R505

R504

MIC_R1 M IC_R2

R485

2

G

L31

4

3

L30

4

3

NB_MICIN_DETECT26,31

2

G

2

3

@

1

2

C668

1

@

100P_0402_50V8J~D

VREFOUT_A26

C605

1 2

2.2U_0805_10V6K~D
C603

1 2

2.2U_0805_10V6K~D

+3VRUN

1 2

100K_0402_5%~D

13

D

Q60

S

2N7002_SOT23~D

3

D20

1

DA204U_SOT323~D

2

C667

1

@

MIC_L2MIC_L1

NB_MUTE38

2

100P_0402_50V8J~D

R517

@

R511

20K_0402_1%~D

D19

DA204U_SOT323~D

12

1 2

2

3

1

2

C666

1

@

12

R516

4.7K_0402_5%~D

R510

1 2

20K_0402_1%~D

SPK_SHUTDOWN#

13

D

2

G

Q61

S

2N7002_SOT23~D

2

3

D18

@

1

DA204U_SOT323~D

INT_R_SPK_R2
INT_R_SPK_R1
INT_R_SPK_L2
INT_R_SPK_L1

2

C665

1

@

100P_0402_50V8J~D

100P_0402_50V8J~D

C621

1 2

1U_0603_10V6K~D

4.7K_0402_5%~D
L54

12

BLM18AG121SN1D_0603~D

L53

12

BLM18AG121SN1D_0603~D

NB_MICIN_DETECT

C622

100P_0402_50V8J~D

1
2
3
4

2

C609

1

JSPK

1
2
3
4

MOLEX_53325-0460~D

MIC_L3

MIC_R3

2

1

100P_0402_50V8J~D

MIC_L3 31

MIC_R3 31

DELL CONFIDENTIAL/PROPRIETARY

Title

Size Document Number Rev

2

Date: Sheet

Compal Electronics, Inc.

Amplifier and Phone Jack

Greenland-LA2732P

28 63W ed nes da y, De ce mber 28, 2005

1

X03

of

5

4

3

2

1

+3VRUN +3VSRC +BT_PWR

Av dB(TYP)

12

0_0402_5%~D

12

@

0_0402_5%~D

JUMP3

112

JUMP_43X118

22.1

19.1

16

12

R316

R320

0_0402_5%~D

12

R314

R326

@

0_0402_5%~D

5

COEX2_WLAN_ACTIVE
BT_RE_PAIR_R#
COEX1_BT_ACTIVE
BT_WAKE#
USBP0­USBP0+

5.1K_0603_1%~D

12

0_0402_5%~D

12

0_0402_5%~D

Check Pad

D D

C C

B B

A A

BT_ACTIVE36,41

COEX2_WLAN_ACTIVE36

BT_RE_PAIR_R#31,38

COEX1_BT_ACTIVE36

BT_WAKE#38
USBP0-23
USBP0+23

Voltage Gain selection

G1

G2

L

L

L

H

H

L13

H

H

AUD_MONO_OUT27

+5VRUN

12

R527

R523

@

0_0402_5%~D

12

R525

R528

@

0_0402_5%~D

http://hobi-elektronika.net

JUMP2

@

2

112

JUMP_43X118

2

SW3
SMT1-05_4P~D

@

3
4

Oscillator frequency selection

FS1

L

L H

H

H

R313

1 2

1

C3180.22U_0603_10V7K~D

2

MAX9713_G1
MAX9713_G2
MAX9713_FS1
MAX9713_FS2

1 2

1
2

5

6

Freq Hz

FS2

L 335

460

236L

SPK_SHUTDOWN#26,28

C319

1 2

335 +/- 7%

H
(ss mode)

0.1U_0402_10V6K~D

R323
10K_0402_5%~D

12

1

C934

@

R926

2

10K_0402_5%~D

33P_0402_50V8J~D

Place near BT

1 2

C326 0.1U_0603_25V7K~D

SPK_SHUTDOWN#

MAX9713_G1
MAX9713_G2

MAX9713_FS1
MAX9713_FS2

1

C32147P_0402_50V8J~D

2

JBT

1

1

2

2

3

3

4

4

5

5

11

6

6

12

7

7

8

8

9

9

10

10

JST_BM10B-SRSS-TB~D

+12VRUN

L33 BLM21PG600SN1D_0805~D

place near pin 3

1 2

+12VRUN_R

C337

1

C322

2

1U_0805_25V6K~D

1

C3170.22U_0603_10V7K~D

2

4

1

2

11
12

1

1

C331

2

2

0.1U_0603_25V7K~D

0.1U_0603_25V7K~D

U27

3

VDD

4

VDD

21

VDD

22

VDD

7

CHOLD

5

C1N

6

C1P

14

SHDN#

15

G1

16

G2

18

FS1

19

FS2

11

IN-

12

IN+

1

PGND

2

PGND

MAX9713ETJ+T_TQFN-EP32~D

C327

0.1U_0603_25V7K~D

place near pin 22

1

1

C657

C658

2

2

10U_1210_25V6M~D

10U_1210_25V6M~D

OUT­OUT-

OUT+
OUT+

NC
NC
NC
NC
NC
NC
NC

SS

REG

AGND

PGND
PGND

Power/GND Minimum

JMDC

1

GND1

ICH_AZ_MDC_SDOUT22

ICH_AZ_MDC_SYNC22

ICH_AZ_MDC_SDIN122

SUB_OUT1

27
28

SUB_OUT2

29
30

8
17
20
25
26
31
32

13
9

10

23
24

1

2

ACM3225-601-2P-T_1210~D

1

C660

C659

2

0.01U_0603_50V7K~D

0.22U_0603_10V7K~D

1 2

R279 33_0402_5%~D

JWIRE

1

1

2

2

JST_BM02B-SRSS-TB1~D

R334 0_1206_5%~D

1 2

L32

@

1

4

3

2

1 2

R333 0_1206_5%~D

1

2

RJ_TIP
RJ_RING

RJ_TIP
RJ_RING

1000P_0402_50V7K~D

4

3

SUB_R_OUT1
SUB_R_OUT2

1000P_0402_50V7K~D

FBMA-L11-160808-301LMA20T_0603~D

1 2
1 2

FBMA-L11-160808-301LMA20T_0603~D

MDC_SDIN

ICH_AZ_MDC_RST1#

ICH_AZ_MDC_RST#22

MDC_RST_DIS#38

C332

@

C333

@

L74

L75

2

1

1

2

3
5
7
9

11
13

15
17

+5VSUS

2

3

1

1

2

3

C9

@

1000P_1808_3KV7K~D

IAC_SDATA_OUT
GND2
IAC_SYNC
IAC_SDATA_IN
IAC_RESET#

13
15
17

TYCO_1-1734054-2~D

1 2

R855 0_0402_5%~D@

12

R857
10K_0402_5%~D

+12VRUN

D14

@

DA204U_SOT323~D

D13

@

DA204U_SOT323~D

+12VRUN

1

1

C10

@

2

2

1000P_1808_3KV7K~D

BSS138_SOT23~D

D

1 3

RES0
RES1

GND3
GND4

IAC_BITCLK

Q74

S

G

2

1
2
3
4

3.3V

2
4
6
8
10
12

14

14

16

16

18

18

ICH_AZ_MDC_RST1#

12

R856
100K_0402_5%~D

JWOFR

1
2
G1
G2

MOLEX_53398-0271~D

JPHON

1

1

2

2

3

GND

4

GND

FOX_JM34613-L001-7F~D

ICH_AZ_MDC_BITCLK 22

Spacing W=20 mil

ICH_AZ_MDC_SDOUT
ICH_AZ_MDC_BITCLK

10_0402_5%~D@

+3VSUS

C308

4.7U_0805_10V4Z~D

R299

C305

10P_0402_50V8J~D@

1

1

C304

2

2

0.1U_0402_16V4Z~D

R280

10_0402_5%~D@

1 2

1 2

MDC_AC_BITCLK_TERM

ICH_AC_SDOUT_MDCTERM

2

2

C284

10P_0402_50V8J~D@

1

1

DELL CONFIDENTIAL/PROPRIETARY

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

3

2

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

SUBWOOFER & BT & MDC

Greenland-LA2732P

29 63W ed nes da y, De ce mber 28, 2005

1

X03

of

5

FRONT_OUT_R26,27

D D

FRONT_OUT_L26,27

BACK_OUT_R26

BACK_OUT_L26

C C

LFE_OUT26

CENTER_OUT26

B B

VREFOUT_B26

SIDE_OUT/IN_R26

SIDE_OUT/IN_L26

A A

FRONT_OUT_L

BACK_OUT_L

LFE_OUT

CENTER_OUT

VREFOUT_B

SIDE_OUT/IN_L

4

1 2

1 2

FRONT_R1

FRONT_L1

BACK_R1BACK_OUT_R

BACK_L1

LFE_OUT1

CENTER_OUT1

SIDE_R1SIDE_OUT/IN_R

SIDE_L1

1 2

R358 4.99_0603_1%~D

1 2

R359 4.99_0603_1%~D

1 2

R356 4.99_0603_1%~D

1 2

R357 4.99_0603_1%~D

1 2

R352 4.99_0603_1%~D

1 2

R353 4.99_0603_1%~D

R354 4.99_0603_1%~D

R355 4.99_0603_1%~D

C43

C42

C41

C40

C39

C38

C37

C36

FRONT_R2

FRONT_L2

BACK_R2

BACK_L2

LFE_OUT2

CENTER_OUT2

1 2

2.2U_0805_10V6K~D

1 2

2.2U_0805_10V6K~D

1 2

2.2U_0805_10V6K~D

1 2

2.2U_0805_10V6K~D

1 2

2.2U_0805_10V6K~D

1 2

2.2U_0805_10V6K~D

1 2

2.2U_0805_10V6K~D

1 2

2.2U_0805_10V6K~D

SIDE_R2

12

R29

12

R27

12

R19

12

R12

R25

1 2

20K_0402_1%~D

47K_0402_5%~D

47K_0402_5%~D

47K_0402_5%~D

12

R10

4.7K_0402_5%~D

R24

1 2

20K_0402_1%~D

12

12

12

4.7K_0402_5%~D

3

L11

BLM18AG121SN1D_0603~D

12

12

L10

BLM18AG121SN1D_0603~D

R28

47K_0402_5%~D

L6

BLM18AG121SN1D_0603~D

L5

BLM18AG121SN1D_0603~D

R26

47K_0402_5%~D

L4

BLM18AG121SN1D_0603~D

L3

BLM18AG121SN1D_0603~D

R22

47K_0402_5%~D

L2

BLM18AG121SN1D_0603~D

L1

BLM18AG121SN1D_0603~D

C18

100P_0402_50V8J~D

12

12

C16

100P_0402_50V8J~D

12

12

C14

100P_0402_50V8J~D

12

12

C348

100P_0402_50V8J~D

FRONT_R3FRONT_OUT_R

FRONT_L3

2

C17

1

BACK_R3

BACK_L3

2

C15

1

LFE_OUT3

CENTER_OUT3

2

C19

1

SIDE_R3

SIDE_L3SIDE_L2

2

C349

1

2

1

2

1

100P_0402_50V8J~D

1

C347

2

2

1

100P_0402_50V8J~D

2

1

100P_0402_50V8J~D

SPDIF26

33_0402_5%~D@

27P_0402_50V8J~D

@

+3VRUN

0.1U_0402_16V4Z~D

Q49

R574

C685

C345

1 2

0.1U_0402_16V4Z~D

S

G

2

SI2301BDS-T1-E3_SOT23-3~D

D

1 3

+3V_DONGLE

SENSE_A26
SENSE_B26

R11 1K_0402_5%~D

12

SPDIF

12

BLAST1_IRSL41
BLAST1_SLI41
BLAST1_IRO41

BLAST0_IRSL41
BLAST0_SLI41

1

BLAST0_IRO41

2

12

R350

100K_0402_5%~D

DONGLE_IN

FRONT_R3
FRONT_L3

BACK_R3
BACK_L3
LFE_OUT3
CENTER_OUT3

SIDE_R3
SIDE_L3

SENSE_A
SENSE_B

+3V_DONGLE
DONGLE_IN

BLAST1_IRSL
BLAST1_SLI
BLAST1_IRO

BLAST0_IRSL
BLAST0_SLI
BLAST0_IRO

JDONG

27

27

26

26

25

25

24

24

23

23

22

22

21

21

20

20

19

19

18

18

17

17

16

16

15

31

15

31

14

30

14

30

13

29

13

29

12

28

12

28

11

11

10

10

9

9

8

8

7

7

6

6

5

5

4

4

3

3

2

2

1

1

TYCO_1759069-1~D

2

1

100P_0402_50V8J~D

http://hobi-elektronika.net

5

DELL CONFIDENTIAL/PROPRIETARY

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

4

3

2

Title

Size Document Number Rev

Date: Sheet

Compal Elec tronics, Inc.

Audio DONGLE

Greenland-LA2732P

30 63Wednesday, December 28, 2005

1

X03

of

5

4

3

2

1

USB TABLE

+USB_BACK_PWR

D D

C C

B B

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

A A

C23

C350

C654

1

C25

2

150U_D2_6.3VM~D

1

+

2

150U_D2_6.3VM~D@

+5VSUS

+5VSUS

+

C13

1

2

1

2

1

C12

2

USBP4-_R
USBP4+_R

0.1U_0402_16V4Z~D

+USB_BACK_PWR

1

2

USBP5-_R
USBP5+_R

0.1U_0402_16V4Z~D

1

C351
10U_1206_16V4Z~D

@

2

1

C653
10U_1206_16V4Z~D

@

2

JUSB1

1
2
3
4
5
6

SUYIN_020133MR004S513ZL~D

JUSB2

1

VCC

2

D-

3

D+

4

GND

5

GND

6

GND

SUYIN_020133MR004S513ZL~D

USB_BACK_EN#38

USB_SIDE_EN#38

VCC
D­D+
GND
GND
GND

USB_BACK_EN#

USB_SIDE_EN#

+5VALW

Q99

2

1 3

D

G

S

USBP4-23

USBP4+23

USBP5-23

USBP5+23

2N7002_SOT23~D

CIR_WAKE_EN#37,41

OC1#

OC2#

OC1#

OC2#

U52

1
2
3

IP4220CZ6_SO6~D

@

+USB_BACK_PWR

8
7
6
5

+USB_SIDE_PWR

8
7
6
5

USBP4+ USBP4-

USBP5- USBP4-

U29

1

GND

2

IN

3
4

1
2
3
4

OUT1

EN1#

OUT2

EN2#

TPS2062DR_SO8~D

U34

GND
IN

OUT1

EN1#

OUT2

EN2#

TPS2062DR_SO8~D

CIR_WAKE_EN# WUSB_WAKE_EN#

+5VSUS

USBP5+

4

D2+

D1+
GND
D2-

5

VCC

6

D1-

USB_OC4_5#

USB_OC6_7#

USB_OC4_5# 23

USB_OC6_7# 23

ECE_USBP3+38
ECE_USBP3-38

R955 0_0402_5%~D

1 2

+5VSUS

C970

NB_MICIN_DETECT26,28

ECE_USBP3+
ECE_USBP3-

+3VSRC

1

2

0.1U_0402_16V4Z~D

USBP4+ USBP4+_R

USBP5+

USBP7-23
USBP7+23

MIC_L328
MIC_R328

HP_SPK_L228
HP_SPK_R228

HP_NB_SENSE26,28

1 2

@

0_0402_5%~D

R14 0_0402_5%~D

1 2

L12 DLW21SN900SQ2_0805~D@

1

1

4

4

1 2

R13 0_0402_5%~D

R16 0_0402_5%~D

1 2

L13 DLW21SN900SQ2_0805~D@

1

1

4

4

1 2

R15 0_0402_5%~D

R959

2

2

3

3

2

2

3

3

USBP7­USBP7+

MIC_L3
MIC_R3
NB_MICIN_DETECT
HP_SPK_L2
HP_SPK_R2
HP_NB_SENSE

JWUSB

1

1

2

2

3

3

4

4

9

9

10

10

5

5

6

6

7

7

8

8

JST_SM8B-SRSS~D

USBP4-_R

USBP5-_RUSBP5-

USBP5+_R

JAUDIO

112
334
556

7

7

9

9

11

11

13

13

15

15

17

17

19

19
G121G2

JST_SM20B-SRDS-G-TF~D

2
4
6
8

8

10

10

12

12

14

14

16

16

18

18

20

20

22

PORT#

0
1
2
3
4
5
6
7

USBP6­USBP6+

P_PBAT_SMBCLK
P_PBAT_SMBDAT

P_PBAT_PRES#
P_PBAT_ALARM#

This is analog ground for
Headphone and MIC use

USB

DESTINATION

BLUETOOTH
USB[0] of ECE5011
Express Card

CIR

JUSB1(M/B)
JUSB2(M/B)
JUSB3(USB/BD)
JUSB4(USB/BD)

USBP6- 23

USBP6+ 23

P_PBAT_SMBCLK 46
P_PBAT_SMBDAT 46

P_PBAT_PRES# 46
P_PBAT_ALARM# 46

BT_RE_PAIR_R# 29,3 8

DELL CONFIDENTIAL/PROPRIETARY

Compal Elec tronics, Inc.

USB 2.0 PORT

Greenland-LA2732P

31 63Wednesday, December 28, 2005

1

X03

of

http://hobi-elektronika.net

5

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

4

3

2

Title

Size Document Number Rev

Date: Sheet

S

45

G

3

VCC

WP
SCL
SDA

R119 0_0402_5%~D@

SPEED_10#_L
SPEED_100#_L
SPEED_1000#_L

R124

12

X2

5

VAUX_LAN

8
7
6
5

1 2

WP

12
12

SCL
SDA

5753_SI
5753_SO

SCLK

CS#

R61

1 2

4.7K_0402_5%~D

LAN_ACT#

XTALO

XTALI

2

C117

1

5

L35

1 2

BLM31AJ260SN1L_1206~D

+V_3P3_LAN

12

12

R111

R113

1K_0402_5%~D@

1K_0402_5%~D@

U6A

J10

GPIO0_TST_CLKOUT

J12

GPIO1

D9

SMB_CLK

D8

SMB_DATA

H10

EECLK

J11

EEDATA

F11

SI

E10

SO

D10

SCLK

D11

CS#

H2

PWR_IND#

J2

ATTN_IND#

B3

ATTN_BTTN#

B10

LINKLED#

C10

SPD100LED#

B11

SPD1000LED#

C9

TRAFFICLED#

N10

XTALO

M10

XTALI

BCM5753KFBG C1_FPBGA196~D

27P_0402_50V8J~D

C435

2

1

12

R106

1K_0402_5%~D@

WP
SCL
SDA

BCM5753

Misc

Hot Plug

Support

LED

Clock

Layout Notice : No high
speed signal should be
routed near RDAC or on
adjacent layer to RDAC

4.7U_0805_10V4Z~D
C408

Media

Power

Control

Control

Regulator

PCI-ETEST

Bias

0.1U_0402_16V4Z~D
C406

2

1

+V_1P2_LAN

1

C385

2

4.7U_0805_10V4Z~D

LOW_PWR

REGSUP12

REGCTL12

REGSEN12
REGOUT25
REGSUP25

PCIE_TXDN
PCIE_TXDP

PCIE_RXDN

PCIE_RXDP

REFCLK-

REFCLK+

REFCLK_SEL

PCIE_TST

PERST#

2

1

C393

TRD3+

TRD3-

TRD2+

TRD2-

TRD1+

TRD1-

TRD0+

TRD0-

WAKE#

TCK
TDO

TMS

TRST#

RDAC

+3VSRC

ENAB_3VLAN42

D D

+V_3P3_LAN

C146

0.1U_0402_16V4Z~D@

C C

+V_3P3_LAN

B B

A A

Q9

SI3456DV-T1-E3_TSOP6~D

D

6
2

1

1

2

U11@

1

A0

2

A1

3

NC

4

GND

AT24C256_SO8~D

Place R119 as close to the test
pin (J10) as possible

R74 47K_0402_5%~D
R73 47K_0402_5%~D

+V_3P3_LAN

SPEED_10#_L33
SPEED_100#_L33
SPEED_1000#_L33
LAN_ACT#33

200_0402_1%~D

25MHz_20P_1BX25000CK1A~D

1 2

2

C116

1

27P_0402_50V8J~D

http://hobi-elektronika.net

0.1U_0402_16V4Z~D
C436

1

2

0.1U_0402_16V4Z~D

TDI

4

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D
C370

C371

2

1

C426

0.1U_0402_16V4Z~D

C12
C13
D12
D13
E12
E13
F12
F13

J5

L13
K12
K13

N13
M13

N4
M4
M8
N8
B5

M6
N6
C4

D7
C2

C6
G4
C5
F4
E5

B9

2

2

1

1

Layout Notice : 1.2V filter. Place as close
chip as possible.

1

1

C398

C392

2

2

0.1U_0402_16V4Z~D

LAN_TX3+
LAN_TX3­LAN_TX2+
LAN_TX2­LAN_TX1+
LAN_TX1­LAN_TX0+
LAN_TX0-

LAN_LOW_PWR

PCIE_IRX_C_PTX_N3
PCIE_IRX_C_PTX_P3

PCIE_WAKE#
CLK_PCIE_LOM#
CLK_PCIE_LOM
CLK_SEL

R72 4.7K_0402_5%~D

PLTRST2# 10,21,37

R62

1 2

4.7K_0402_5%~D@

R66

1 2

1.24K_0603_1%~D

4

+V_3P3_LAN

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

C376

2

1

1

1

C432

C396

2

2

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

LAN_TX3+ 33
LAN_TX3- 33
LAN_TX2+ 33
LAN_TX2- 33
LAN_TX1+ 33
LAN_TX1- 33
LAN_TX0+ 33
LAN_TX0- 33

LAN_LOW_PWR 38

(From EC)

+V_3P3_LAN

REGCTL_PNP

+V_1P2_LAN

+V_2P5_LAN
+V_3P3_LAN

C119

0.1U_0402_16V4Z~D

1 2
1 2

C113

0.1U_0402_16V4Z~D

PCIE_WAKE# 36,38,40
CLK_PCIE_LOM# 6
CLK_PCIE_LOM 6

1 2

+V_3P3_LAN

5753_SI

1

C430

2

0.1U_0402_16V4Z~D

1

1

C427

C431

2

2

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

Layout Notice : Place as close
chip as possible.

C446

PCIE_IRX_PTX_N3 23
PCIE_IRX_PTX_P3 23
PCIE_ITX_C_PRX_N3 23
PCIE_ITX_C_PRX_P3 23

1 2

4.7K_0402_5%~D

1 2

4.7K_0402_5%~D@

U9

8
7
6
5

SI

SO

SCK

GND

RESET#

VCC

CS#

WP#

AT45DB011B-SJ_SO8~D

R71

R70

1

2

0.1U_0402_16V4Z~D

1
2
3
4

+V_2P5_LAN

1

C417

2

+V_3P3_LAN

3

+V_3P3_LAN

+V_3P3_LAN_R

REGCTL_PNP
+V_1P2_LAN

1

1

1

C457

C372

2

2

2

22U_0805_6.3V6M~D

22U_0805_6.3V6M~D

22U_0805_6.3V6M~D

+V_3P3_LAN

1

1

C437

(From ICH)

5753_SO
SCLK

CS#

0.1U_0402_16V4Z~D

C454

2

2

4.7U_0805_10V4Z~D

+V_3P3_LAN

12

12

R93

1K_0402_5%~D

+V_3P3_LAN

12

R907

4.7K_0402_5%~D

@

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

3

12

2

R127

1_1210_5%~D

C111

Q51

1

0.1U_0402_16V4Z~D

+V_1P2_LAN

R97

1K_0402_5%~D

1

MMJT9435T1G_SOT223~D

2 3

4

+V_1P2_LAN

1

C123

2

+V_2P5_LAN

1

C433

2

0.1U_0402_16V4Z~D

Layout Notice : Filter place as close
chip as possible.

+V_2P5_LAN

BLM11A601S_0603~D

BLM11A601S_0603~D

BLM11A601S_0603~D

BLM11A601S_0603~D

4.7U_0805_10V4Z~D

L39

BLM11A601S_0603~D

0.1U_0402_16V4Z~D

L36

BLM11A601S_0603~D

0.1U_0402_16V4Z~D

L38

BLM11A601S_0603~D

0.1U_0402_16V4Z~D

L19

C87

4.7U_0805_10V4Z~D

L20

C91

4.7U_0805_10V4Z~D

L43

C462

4.7U_0805_10V4Z~D

L41

C458

C108

0.1U_0402_16V4Z~D

C442

0.1U_0402_16V4Z~D

12

12

12

12

1

2

12

1

2

12

1

2

12

1

2

+V_3P3_LAN

2

1

4.7U_0805_10V4Z~D

+V_1P2_LAN

1

C136

10U_0805_10V4Z~D

2

1

2

+XTALVDD
1

C423

2

+AVDD

1

C375

2

+AVDD1

1

C397

2

+AVDDL

1

C402

0.1U_0402_16V4Z~D

2

+GPHY_PLLVDD

1

C409

0.1U_0402_16V4Z~D

2

+PCIE_PLLVDD

1

C438

0.1U_0402_16V4Z~D

2

+PCIE_SDS_VDD

1

C441

0.1U_0402_16V4Z~D

2

2

Layout Notice : 3.3V filter. Place as close
chip as possible.

+V_3P3_LAN

1

1

1

C369

2

4.7U_0805_10V4Z~D

+V_3P3_LAN

+3VRUN

+V_3P3_LAN

T2

@

PAD~D

T23

@

PAD~D

2

C390

2

0.1U_0402_16V4Z~D

+V_3P3_LAN

+V_2P5_LAN
+XTALVDD
1 2

1K_0402_5%~D

1 2

1K_0402_5%~D

+PCIE_SDS_VDD

Debug serial
port

R413

1 2

4.7K_0402_5%~D@

R412

1 2

4.7K_0402_5%~D@

R411

1 2

4.7K_0402_5%~D @

R105

1 2

4.7K_0402_5%~D@

R889

1 2

4.7K_0402_5%~D@

+PCIE_PLLVDD

+GPHY_PLLVDD

C447

R63

R101

0.1U_0402_16V4Z~D

+AVDDL

2

+AVDD
+AVDD1

+V_1P2_LAN

A10

D3

E11

G2

H11

M2

P12

H4

M12

J13

C7

H12

C8
D1
D2
D4
D5

G1
G3
H1
H3

K11

L11

M1
M5
M9
N2
N3
N9

G11
G12
B12
G13

H13

1

MMJT9435

C

2

C

B

1

U6B

E6
E7
E8
E9
J6
J7
J9
K5

A2
A6

B4

K3

B6

L5
A1

A4
A5
A7
A9
B2
B7
B8

E1
E2
E4
F2
F3

J3
J4
K1
K2

L1
L2
L3
L4
L8
L9

P1
P2

L7

BCM5753

VDDC_0
VDDC_1
VDDC_2
VDDC_3
VDDC_4
VDDC_5
VDDC_6
VDDC_7

VDDIO_0
VDDIO_1
VDDIO_2
VDDIO_3
VDDIO_4
VDDIO_5
VDDIO_6
VDDIO_7
VDDIO_8
VDDIO_9
VDDIO_10

VDDP_0
VDDP_1
VDDP_2
XTALVDD
VAUXPRSNT
VMAINPRSNT
PCIE_SDSVDD

NC_0
NC_1
NC_2
NC_3
NC_4
NC_5
NC_6
NC_7
NC_8
NC_9
NC_10
NC_11
NC_12
NC_13
NC_14
NC_15
NC_16
NC_17
NC_18
NC_19
NC_20
NC_21
NC_22
NC_23
NC_24
NC_25
NC_26
NC_27
NC_28
NC_29
NC_30
NC_31
NC_32
NC_33
NC_34
NC_35
NC_36
NC_37
NC_38
NC_39
NC_40
NC_41

AVDDL_0

Analog

AVDDL_1
AVDD_0

power

AVDD_1
PCIE_PLLVDD

GPHY_PLLVDD

BCM5753KFBG C1_FPBGA196~D

PLL

Digial power

Disconnected

4

GND

BIAS

Don't care

E

3

VSS_0
VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8

VSS_9
VSS_10
VSS_11
VSS_12
VSS_13
VSS_14
VSS_15
VSS_16
VSS_17
VSS_18
VSS_19
VSS_20
VSS_21
VSS_22
VSS_23
VSS_24
VSS_25
VSS_26
VSS_27
VSS_28
VSS_29
VSS_30
VSS_31

DC_0
DC_1
DC_2
DC_3
DC_4
DC_5
DC_6
DC_7
DC_8

DC_9
DC_10
DC_11
DC_12
DC_13
DC_14
DC_15
DC_16
DC_17
DC_18
DC_19
DC_20
DC_21
DC_22
DC_23
DC_24
DC_25
DC_26
DC_27
DC_28
DC_29
DC_30
DC_31
DC_32
DC_33
DC_34
DC_35
DC_36
DC_37
DC_38
DC_39

BIASVDD

A3
A8
A12
A14
B1
C1
C3
C11
F1
F5
F6
F7
F8
F9
F10
G5
G6
G7
G8
G9
G10
H6
H7
H8
H9
J1
M3
M7
N1
N7
P11
P14

A11
A13
B14
C14
D6
D14
E3
E14
F14
G14
H5
H14
J8
J14
K4
K6
K7
K8
K9
K10
K14
L6
L10
L12
L14
M11
M14
N5
N11
N12
N14
P3
P4
P5
P6
P7
P8
P9
P10
P13

B13

+V_2P5_LAN

L37

+V_BIAS

C388

12

1

2

BLM11A601S_0603~D

0.1U_0402_16V4Z~D

DELL CONFIDENTIAL/PROPRIETARY

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

LAN Controller (BCM5753)

Greenland-LA2732P

32 63W ed nes da y, De ce mber 28, 2005

1

of

X03

5

Layout Notice : Place
termination as close as
chip as possible

D D

LAN_TX0+32

LAN_TX0-32
LAN_TX1+32

LAN_TX1-32
LAN_TX2+32

LAN_TX2-32
LAN_TX3+32

C C

LAN_TX3-32

1 2

49.9_0603_1%~D
R67

1 2

49.9_0603_1%~D
R83

1 2

49.9_0603_1%~D

49.9_0603_1%~D
R52

R68

1 2

R53

1 2

49.9_0603_1%~D
R89

1 2

4

49.9_0603_1%~D
R90

1 2

49.9_0603_1%~D
R84

1 2

49.9_0603_1%~D

3

+V_3P3_LAN

R21
10K_0402_5%~D

1 2

LAN_ACT#32

LAN_ACT#

+V_2P5_LAN +V_3P3_LAN

12

L18

C48 0.1U_0402_10V6K~D

0_0402_5%~D

BLM11A601S_0603~D

+V_2P5_LAN_R

C47 0.1U_0402_10V6K~D

C49 0.1U_0402_10V6K~D

12

R64

C50 0.1U_0402_10V6K~D

R20
150_0402_5%~D

1 2

+LANLED0

+LANLED1

SPEED_10#
SPEED_100#

2

JLOM

13

YELLOW

14
11
12
10

4
6
5
3
1
2
8
7
9

16

17
15

COMMON0
TRD1P
TRCT1
TRD1N
TRD2P
TRCT2
TRD2N
TRD3P
TRCT3
TRD3N
TRD4P
TRCT4
TRD4N
COMMON1

GREEN
ORANGE

1CT:1CT

1CT:1CT

1CT:1CT

1CT:1CT

4 X 75 OHMS

1000pF 2KV

1

TRP1P

TRP1N

TRP2P

TRP2N

TRP3P

TRP3N

TRP4P

TRP4N

SPEED_10#_L32

0.1U_0402_16V4Z~D

2

C69

1

SPEED_1000#_L

+V_3P3_LAN

R78
10K_0402_5%~D

@

1 2

+V_3P3_LAN

12

R87
10K_0402_5%~D

@

+V_3P3_LAN

R79
10K_0402_5%~D

@

1 2

1

D9
RB495D_SC59~D

@

SPEED_10#_L

3
2

R77

1 2

150_0402_5%~D

SPEED_100#_L

R65

1 2

150_0402_5%~D

1

1

2

1

1

2

2

2

Place these caps as close
to the center tap pins
of the mag/connector.

TYCO_1368398-2~D

SHIELD018SHIELD1

19

0.1U_0402_16V4Z~D

2

C57

1

B B

A A

0.1U_0402_16V4Z~D

2

C58

1

0.1U_0402_16V4Z~D

2

C68

1

SPEED_1000#_L32

SPEED_100#_L32

DELL CONFIDENTIAL/PROPRIETARY

Compal Elec tronics, Inc.

LAN Transfomer and RJ45

Greenland-LA2732P

33 63Wednesday, December 28, 2005

1

X03

http://hobi-elektronika.net

5

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

4

3

2

Title

Size Document Number Rev

Date: Sheet of

5

PCI_AD[0..31]21

+3VRUN+3V_R5C843

R876

1 2

0_0805_5%~D

D D

100K_0402_5%~D

CBUS_GRST#38

1U_0603_10V6K~D

CLK_PCI_P CCARD

@

10_0402_5%~D

12

R228

C C

@

4.7P_0402_50V8C~D

CK33M_CBS_TERM

C218

2

1

+3V_R5C843

CLKRUN#23,37

B B

A A

+3V_R5C843

+3V_R5C843

SYS_PME#38

+3V_R5C843

CB_HWSPND#38

SDDATA1_MSDATA1_XDD1

SDDATA2_MSDATA2_XDD2

+12VRUN

1 2

R491 10K_0402_5%~D

http://hobi-elektronika.net

+3V_R5C843

12

R212

R858

1 2

0_0402_5%~D@

CLK_PCI_P CCARD6

SDCD#_XDCD0#

CBS_GRST#

1

C202

2

PCI_C_BE3#21
PCI_C_BE2#21
PCI_C_BE1#21
PCI_C_BE0#21

PCI_PAR21

PCI_FRAME#21
PCI_TRDY#21
PCI_IRDY#21
PCI_STOP#21
PCI_DEVSEL#21

PCI_AD17 CBS_IDSEL

1 2

R478 100_0402_1%~D

PCI_PERR#21
PCI_SERR#21

PCI_REQ2#21
PCI_GNT2#21

PCI_RST#21

R470 10K_0402_5%~D @

1 2

R469 10K_0402_5%~D@

1 2

R468 0_0402_5%~D

1 2

PCI_PIRQD#21
PCI_PIRQC#21
PCI_PIRQB#21

IRQ_SERIRQ23,37

R465 10K_0402_5%~D

1 2

R461 10K_0402_5%~D

1 2

R877 0_0402_5%~D@

1 2

R464 100K_0402_5%~D

1 2

R863 0_0402_5%~D@

1 2

1 2

1 3

2N7002_SOT23~D

2

G

Q58

2N7002_SOT23~D

5

PCI_AD31
PCI_AD30
PCI_AD29
PCI_AD28
PCI_AD27
PCI_AD26
PCI_AD25
PCI_AD24
PCI_AD23
PCI_AD22
PCI_AD21
PCI_AD20
PCI_AD19
PCI_AD18
PCI_AD17
PCI_AD16
PCI_AD15
PCI_AD14
PCI_AD13
PCI_AD12
PCI_AD11
PCI_AD10
PCI_AD9
PCI_AD8
PCI_AD7
PCI_AD6
PCI_AD5
PCI_AD4
PCI_AD3
PCI_AD2
PCI_AD1
PCI_AD0

PCI_C_BE3#
PCI_C_BE2#
PCI_C_BE1#
PCI_C_BE0#

PCI_PAR

PCI_FRAME#
PCI_TRDY#
PCI_IRDY#
PCI_STOP#
PCI_DEVSEL#

PCI_PERR#
PCI_SERR#

PCI_REQ2#
PCI_GNT2#

CLK_PCI_P CCARD

PCI_RST#

CBS_GRST#

D

S

Q63
2N7002_SOT23~D

G

2

Q62

13

D

S

@

0_0402_5%~D

1 2

D

1 3

U17A

M2

AD31

M1

AD30

N5

AD29

N4

AD28

N2

AD27

N1

AD26

P5

AD25

P4

AD24

R4

AD23

R2

AD22

R1

AD21

T2

AD20

T1

AD19

U2

AD18

U1

AD17

V1

AD16

T7

AD15

V7

AD14

W7

AD13

R8

AD12

T8

AD11

V8

AD10

W8

AD9

R9

AD8

V9

AD7

W9

AD6

T11

AD5

V11

AD4

W11

AD3

T12

AD2

V12

AD1

W12

AD0

P2

C/BE3#

W2

C/BE2#

W6

C/BE1#

T9

C/BE0#

V6

PAR

V3

FRAME#

W4

TRDY#

V4

IRDY#

V5

STOP#

T5

DEVSEL#

P1

IDSEL

W5

PERR#

T6

SERR#

M4

REQ#

M5

GNT#

K1

PCICLK

L4

PCIRST#

G2

GBRST#

L5

CLKRUN#

J2

INTA#

K4

INTB#

K2

INTC#

J4

UDIO0/SERIRQ#

H1

UDIO1

H2

UDIO2

H4

UDIO3

H5

UDIO4

G1

UDIO5

G4

RI_OUT#/PME#

F1

SPKROUT

F2

HWSPND#

F4

TEST

R5C843-CSP208P_CSP208~D

R932

R933

@

0_0402_5%~D

S

G

2

+3V_R5C843

R494

10K_0402_5%~D

XD_CDSW#

SI2303BDS-T1-E3_SOT23-3~D

1 2

Q94

2

4

CAD31/CDATA10

CAD30/CDATA9
CAD29/CDATA1

R5C843

CSTSCHG/BVD1(STSCHG#/RI#)

SDDATA1

SDDATA2

+3VRUN_CARD

G

1 3

CAD28/CDATA8
CAD27/CDATA0

CAD19/CADR25
CAD17/CADR24

CAD16/CADR17

CAD12/CADR11

CAD8/CDATA15
CAD6/CDATA13
CAD4/CDATA12
CAD2/CDATA11

CC/BE3#/REG#

CC/BE2#/CADR12

CC/BE1#/CADR8

CFRAME#/CADR23

CTRDY#/CADR22

CIRDY#/CADR15

CSTOP#/CADR20

CDEVSEL#/CADR21

RESERVED/CADR19

CPERR#/CADR14

CSERR#/WAIT#

CREQ#/INPACK#

CCLKRUN#/WP(IOIS16#)

CINT#/RDY(IREQ#)

CAUDIO/BVD2(SPKR#/LED)

RESERVED/CDATA14

RESERVED/CDATA2
RESERVED/CADR18

S

R495
0_0805_5%~D

@

D

1 2

+3.3V_RUN_XD

4

CAD26/CADR0
CAD25/CADR1
CAD24/CADR2
CAD23/CADR3
CAD22/CADR4
CAD21/CADR5
CAD20/CADR6

CAD18/CADR7

CAD15/IOWR#
CAD14/CADR9

CAD13/IORD#

CAD11/OE#

CAD10/CE2#

CAD9/CADR10
CAD7/CDATA7
CAD5/CDATA6
CAD3/CDATA5
CAD1/CDATA4

CAD0/CDATA3

CC/BE0#/CE1#

CPAR/CADR13

CGNT#/WE#

CCLK/CADR16

CRST#/RESET

CCD1#/CD1#
CCD2#/CD2#

CVS1/VS1#
CVS2/VS2#

CF_CDATA10

B19
C18
D19
D18
E19
E16
F18
F15
G18
G15
H18
H15
J18
J16
J15
P16
P19
R19
P18
R18
T19
T18
U19
U18
W17
V17
W16
V16
W15
V15
T15
R14

F16
K18
P15
V19

N15

K16
L16
K15
M16
L18
N19
N18
G16
G19
M15
E18
A18
L19

M18

H19

F19

T14
D15
R16
H16

W18
C19
N16

CF_CDATA9
CF_CDATA1
CF_CDATA8
CF_CDATA0

CF_CADR0
CF_CADR1
CF_CADR2
CF_CADR3
CF_CADR4
CF_CADR5
CF_CADR6

CF_CADR7

CF_CADR9

CF_CADR10
CF_CDATA15
CF_CDATA7
CF_CDATA13
CF_CDATA6
CF_CDATA12
CF_CDATA5
CF_CDATA11
CF_CDATA4
CF_CDATA3

CF_CADR8

CF_CDATA14
CF_CDATA2

CF_CDATA0

CF_CDATA1

CF_CDATA2

CF_CDATA3

CF_CDATA4

CF_CDATA5

CF_CDATA6

CF_CDATA7

CF_CDATA8

CF_CDATA9

CF_CDATA10

CF_CDATA11

CF_CDATA12

CF_CDATA13

CF_CDATA14

CF_CDATA15

SDCLK_MSCLK_XDRE#

CF_WAIT# 35
CF_INPACK# 35
CF_WE# 35
CF_BVD1 35
CF_WP 35

CF_RDY# 35

CF_RESET 35

CF_BVD2 35

CF_CD1# 35
CF_CD2# 35
CF_VS1# 35
CF_VS2# 35

C530

1 2

18P_0402_50V8J~D

C531

1 2

18P_0402_50V8J~D

CF_IOWR# 35
CF_IORD# 35
CF_OE# 35

CF_CE2# 35

CF_CADR0
CF_CADR1
CF_CADR2
CF_CADR3
CF_CADR4
CF_CADR5
CF_CADR6
CF_CADR7
CF_CADR8
CF_CADR9
CF_CADR10

CF_REG# 35

CF_CE1# 35

CF_CDATA[0..15] 35

MSCD#_XDCD1#

UDIO3 UDIO4 VPPEN0
Pull-up Pull-up

Pull-up

Solve MS Duo Adaptor short problem

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

3

R5C843XI

X4

24.576MHz_16P_1BG24576CKIA~D

1 2

1 2

R455 0_0402_5%~D

Layout Not e : Place close to R5C843
and Shield GND for these signals

R864

1 2

100K_0402_5%~D @

+3VRUN_CARD

SDCLK_MSCLK_XDRE# MS_CLK

+3VRUN_CARD

SDCLK_MSCLK_XDRE# SD_CLK

0_0402_5%~D

SDPWR0_MSPWR_XDPWR

0.1U_0402_16V4Z~D

1

C960

2

R940
0_0402_5%~D @

2 1

D36 RB751V_SOD323~D

R5C843XO

CF_CADR[0..10] 35

0.01U_0402_16V7K~D

2

C543

R453

1

SDDATA2
SDDATA3_MSDATA3_XDD3
SDCMD_MSBS_XDWE#

C950 0.01U_0402_16V7K~D

1 2

1 2

0_0402_5%~D

1 2

R885

+3V_R5C843 +3VRUN_CARD

SDDATA3_MSDATA3_XDD3
MS_INS#

R884

SDDATA2_MSDATA2_XDD2
SDDATA0_MSDATA0_XDD0
SDDATA1_MSDATA1_XDD1
SDCMD_MSBS_XDWE#

C951 0.01U_0402_16V7K~D

1 2

SDDATA0_MSDATA0_XDD0
SDDATA1

SDCD#_XDCD0#
SDWP#_XDRB#

U13

5

VIN

4

ON/OFF#

2

GND

AAT4250_SOT23~D

+3V_R5C843

12

R939

MS_INS#

Function
Enable

SD,MMC,MS,xD,CF Card

1 2

VOUT

10K_0402_5%~D

1 2

2N7002_SOT23~D

IEEE1394_TPAP035
IEEE1394_TPAN035

IEEE1394_TPBP035
IEEE1394_TPBN035

IEEE1394_TPBIAS035

10K_0402_1%~D

1
3

N/C

C539

1 2

+3V_R5C843

2

G

Q95

DELL CONFIDENTIAL/PROPRIETARY

3

R5C843XI
R5C843XO

0.01U_0402_16V7K~D

IEEE1394_TPAP0
IEEE1394_TPAN0

IEEE1394_TPBP0
IEEE1394_TPBN0

IEEE1394_TPBIAS0

R129

100K_0402_5%~D

1 2

VPPEN035
VPPEN135

VCC5EN#35
VCC3EN#35

1 2

100K_0402_5%~D

J5IN1

20

SD9_D2

21

SD1_D3

22

SD2_CMD

23

SD3_VSS

24

MS10_VSS

25

MS9_VCC

26

MS8_SCLK

27

MS7_D3

28

MS6_INS

29

MS5_D2

30

MS4_D0

31

MS3_D1

32

MS2_BS

33

MS1_VSS

34

SD4_VDD

35

SD5_CLK

36

SD6_VSS

37

SD7_D0

38

SD8_D1

39

CD_SW

40

COMMDN

41

WP_SW

ALPS_SCDE1C0400~D

0.1U_0402_16V4Z~D

1U_0603_10V4Z~D

1

1

C184

2

2

XD_CDSW#

13

D

R941
0_0402_5%~D

@

S

1 2

2

+3.3V_RUN_PHY

W14

W13

R475

150K_0402_5%~D

12

R449

C526

XD_SW#

2

U17B

D11

CPS

A16
B16
A14

B12
A12

B13
A13

B10
A10

B11
A11

D12
D10

D13
B14

V14

V13

R13
T13

R7

XD18_VCC

MDIO02

MDIO06

MDIO08

MDIO13
MDIO14
MDIO15

R5C843

XI
XO
FIL0

TPAP0
TPAN0

TPBP0
TPBN0

TPAP1
TPAN1

TPBP1
TPBN1

TPBIAS0
TPBIAS1

VREF
REXT

USBDP
USBDM

VPPEN0
VPPEN1

VCC5EN#
VCC3EN#

REGEN#

R5C843-CSP208P_CSP208~D

19

XD1_GND

18

XD0_CD

17

XD2_R/B#

16

XD3_RE#

15

XD4_CE#

14

XD5_CLE

13

XD6_ALE

12

XD7_WE#

11

XD8_WP#

10

XD9_GND

9

XD10_D0

8

XD11_D1

7

XD12_D2

6

XD13_D3

5

XD14_D4

4

XD15_D5

3

XD16_D6

2

XD17_D7

1
42

GND

43

GND

44

GND

45

GND

46

GND

Media I/F

MDIO00
MDIO01

MDIO03
MDIO04

MDIO05

MDIO07

MDIO09
MDIO10
MDIO11
MDIO12

MDIO16
MDIO17
MDIO18
MDIO19

Title

Size Document Number Rev

Date: Sheet of

1

Layout Note : Pl ace close to R5C843
and Shield GND for SDCLK_MSCLK

SDCD#_XDCD0#

B1

MDIO00
MDIO01
MDIO02
MDIO03
MDIO04
MDIO05
MDIO06
MDIO07
MDIO08
MDIO09
MDIO10
MDIO11
MDIO12
MDIO13
MDIO14
MDIO15
MDIO16
MDIO17
MDIO18
MDIO19

XD_SW#
SDWP#_XDRB#
SDCLK_MSCLK_XDRE#
XD_CE#
XDCLE
XDALE
SDCMD_MSBS_XDWE#
XDWP

SDDATA0_MSDATA0_XDD0
SDDATA1_MSDATA1_XDD1
SDDATA2_MSDATA2_XDD2
SDDATA3_MSDATA3_XDD3
XDD4
XDD5
XDD6
XDD7

2

C952

0.01U_0402_16V7K~D

1

SD Card

SDCD#

SDWP#
SDPWR0
SDPWR1
SDLED#

SDEXTCK
SDCCMD
SDCCLK
SDCDAT0
SDCDAT1
SDCDAT2

SDCDAT3

MSCD#_XDCD1#

A2

XD_CE#

A3

SDWP#_XDRB#

B3

SDPWR0_MSPWR_XDPWR

B4

XDWP

A5
B5

CK_48M

D5

SDCMD_MSBS_XDWE#

A6

SDCLK_MSCLK_XDRE#

B6

SDDATA0_MSDATA0_XDD0

D6

SDDATA1_MSDATA1_XDD1

E6

SDDATA2_MSDATA2_XDD2

A7

SDDATA3_MSDATA3_XDD3

B7

XDD4

D7

XDD5

E7

XDD6

A8

XDD7

B8

XDCLE

D8

XDALE

E8

CK_48M_CB

R882
0_0402_5%~D

1 2

CK_48M

12

R883
0_0402_5%~D@

SD Access speed
For external clock 48MHz: Populate R882
For internal clock 33MHz: Populate R883

XD_CDSW#

1

C953

2.2U_0805_10V6K~D

2

MMC Card

MMCCD#

MMCPWR0
MMCPWR1

MMCLED#

MMCEXTCK

MMCCMD
MMCCLK
MMCDAT0
MMCDAT1

MMCDAT2
MMCDAT3
MMCDAT4
MMCDAT5
MMCDAT6
MMCDAT7

MS Card

MSCD#

MSWR

MSLED#
MSEXTCK
MSBS

MSCCLK

MSCDAT0

MSCDAT1
MSCDAT2
MSCDAT3

Compal Elec tronics, Inc.

CardBus Controller(R5C843)

Greenland-LA2732P

1

CK_48M_CB 6

D12

SDCD#_XDCD0#

21

RB751V_SOD323~D

D11

MSCD#_XDCD1#

21

RB751V_SOD323~D

R481

1 2

470K_0402_5%~D

+3.3V_RUN_XD

XD Card

XDCD0#

XDCD1#

XDCE#
XDR/B#
XDPWR
XDWP#
XDLED#

XDWE#
XDRE#
XDCDAT0
XDCDAT1
XDCDAT2
XDCDAT3
XDCDAT4
XDCDAT5
XDCDAT6
XDCDAT7
XDCLE
XDALE

34 63Wednesday, December 28, 2005

T46

R934

@

10_0402_5%~D

C966

@

4.7P_0402_50V8C~D

+3VRUN_CARD

12

1

2

X03

5

+3V_R5C843

4

3

2

1

10U_0805_10V4Z~D

C547

C552

1

0.01U_0402_16V7K~D

C567

C568

1

2

10U_0805_10V4Z~D

C564

C563

2

1

0.01U_0402_16V7K~D

C548

1

2

IEEE1394_TPBIAS0

IEEE1394_TPAP0
IEEE1394_TPAN0
IEEE1394_TPBP0
IEEE1394_TPBN0

270P_0402_50V7K~D

2

0.01U_0402_16V7K~D

C585

1

2

0.1U_0402_16V4Z~D

C553

1

2

0.47U_0603_16V7K~D

0.01U_0402_16V7K~D

C555

1

2

56.2_0603_1%~D

5

D D

+3V_R5C843

10U_0805_10V4Z~D

C588

1

2

+3V_R5C843

C C

C566

1

2

B B

IEEE1394_TPBIAS034

IEEE1394_TPAP034
IEEE1394_TPAN034
IEEE1394_TPBP034
IEEE1394_TPBN034

A A

http://hobi-elektronika.net

0.01U_0402_16V7K~D

0.01U_0402_16V7K~D

C575

C549

1

1

2

2

0.01U_0402_16V7K~D

0.01U_0402_16V7K~D

C536

C532

1

1

2

2

0.01U_0402_16V7K~D

0.01U_0402_16V7K~D

C569

1

1

2

2

0.47U_0603_16V7K~D

C570

1

2

56.2_0603_1%~D

12

R160

R162

12

R163

R161

Z3008

R447

C524

2

1

0.01U_0402_16V7K~D

C535

1

1

2

2

0.01U_0402_16V7K~D

1

2

+3.3V_RUN_PHY

56.2_0603_1%~D
C525

12

12

56.2_0603_1%~D

5.1K_0603_1%~D

1 2

0.01U_0402_16V7K~D

0.1U_0402_16V4Z~D

U17C

F5

VCC_3V1

G5

VCC_3V2

J19

VCC_3V3

K19

VCC_3V4

W3

VCC_PCI3V1

R11

VCC_PCI3V2

R12

VCC_PCI3V3

A4

VCC_MD3V

R6

VCC_RIN1

E13

VCC_RIN2

L1

VCC_ROUT1

E14

VCC_ROUT2

E10

AVCC_PHY1

E11

AVCC_PHY2

A17

AVCC_PHY3

B17

AVCC_PHY4

A9

AGND1

B9

AGND2

D9

AGND3

D14

AGND4

A15

AGND5

B15

AGND6

J1

GND1

J5

GND2

K5

GND3

E9

GND4

R10

GND5

T10

GND6

V10

GND7

W10

GND8

L15

GND9

M19

GND10

R5C843-CSP208P_CSP208~D

R5C843

Layout Not e : Place close to R5C843

0.33U_0603_10V7K~D

0.01U_0402_16V7K~D
C528

1

1

2

2

IEEE1394_TPAP0

IEEE1394_TPAN0

IEEE1394_TPBP0
IEEE1394_TPBN0

SUYIN_020115FR004S502ZL~D

Layout Note: Shield GND for
IEEE1394_TPA and TPB

NC1
NC2
NC3
NC4
NC5
NC6
NC7
NC8
NC9

J1394

6
5

4
3
2
1

C1
D1
E1
C2
D2
E2
E4
L2
E12

VPPEN034
VPPEN134

VCC3EN#34
VCC5EN#34

Layout Not e : Place close to R5C843

+3V_R5C843

CF_CDATA4
CF_CDATA6
CF_CE1#
CF_OE#
CF_CADR8

CF_CADR5
CF_CADR3
CF_CADR1
CF_CDATA0
CF_CDATA2
CF_CD2#
CF_CDATA11
CF_CDATA13
CF_CDATA15
CF_VS1#
CF_IOWR#
CF_RDY#

CF_RESET
CF_INPACK#
CF_DVB2
CF_CDATA8
CF_CDATA10

CF_IOWR#34
CF_RDY#34

CF_RESET34

CF_INPACK#34

CF_BVD234

CF_CE1#34
CF_OE#34

+CF_VCC

CF_CD2#34

CF_VS1#34

+5VRUN

C93

1

2

C92

1

2

L47

1 2

BLM21A601SPT_0805~D

1

C97

C955

2

270P_0402_50V7K~D

0.01U_0402_16V7K~D

0.1U_0402_16V4Z~D

1

2

JCF

JAE_JC26E-BB13_RT~D

1

2

U10

11

13
15

3
4

2
1

5

16

R5531V002-E2-FA_SSOP16~D

0.1U_0402_16V4Z~D

10U_0805_10V4Z~D

C533

1

2

GND1D03
D043D05
D065D07
CE1#7A10
OE#9A09
A0811A07
VCC13A06
A0515A04
A0317A02
A0119A00
D0021D01
D0223WP
CD2#25CD1#
D1127D12
D1329D14
D1531CE2#
VS1#33IORD#
IOWR#35WE#
RDY37VCC
CSEL#39VS2#
RESET41WAIT#
INPACK#43REG#
BVD245BVD1
D0847D09
D1049GND
GND51GND
GND53GND

VCC3IN

VCC5IN
VCC5IN

EN0
EN1

VCC3_EN
VCC5_EN

FLG
GND

0.1U_0402_16V4Z~D

C544

1

2

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54

VCCOUT
VCCOUT
VCCOUT

VPPOUT

+3.3V_RUN_PHY

1000P_0402_50V7K~D

C550

C542

1

2

CF_CDATA3
CF_CDATA5
CF_CDATA7
CF_CADR10
CF_CADR9
CF_CADR7
CF_CADR6
CF_CADR4
CF_CADR2
CF_CADR0
CF_CDATA1
CF_WP
CF_CD1#
CF_CDATA12
CF_CDATA14
CF_CE2#
CF_IORD#
CF_WE#

CF_VS2#
CF_WAIT#
CF_REG#
CF_BVD1
CF_CDATA9

1

C114
270P_0402_50V7K~D

2

9
14
12

8

7

NC

6

NC

10

NC

1000P_0402_50V7K~D

C538

1

2

+CF_VCC+3V_R5C843

C94

1

2

Place close to JCF

0.01U_0402_16V7K~D

1

1

C102

2

2

CF_WP 34
CF_CD1# 34

CF_CE2# 34
CF_IORD# 34
CF_WE# 34

+CF_VCC

CF_VS2# 34
CF_WAIT# 34
CF_REG# 34
CF_BVD1 34

0.1U_0402_16V4Z~D

+CF_VCC

0.01U_0402_16V7K~D

10U_0805_10V4Z~D

1

C106

C112

2

CF_CADR0
CF_CADR1
CF_CADR2
CF_CADR3
CF_CADR4
CF_CADR5
CF_CADR6
CF_CADR7
CF_CADR8
CF_CADR9
CF_CADR10

CF_CDATA0
CF_CDATA1
CF_CDATA2
CF_CDATA3
CF_CDATA4
CF_CDATA5
CF_CDATA6
CF_CDATA7
CF_CDATA8
CF_CDATA9
CF_CDATA10
CF_CDATA11
CF_CDATA12
CF_CDATA13
CF_CDATA14
CF_CDATA15

CF_CADR[0..10] 34

CF_CDATA[0..15] 34

DELL CONFIDENTIAL/PROPRIETARY

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

4

3

2

Title

Size Document Number Rev

Date: Sheet of

Compal Elec tronics, Inc.
CardBus/SD card Socket

Greenland-LA2732P

35 63Wednesday, December 28, 2005

1

X03

5

4

3

2

1

Mini-Express Card

Wire less LAN

+3VRUN

1

C902

D D

PCIE_WAKE#3 2 ,38,40
COEX2_WLAN_ACTIVE29
COEX1_BT_ACTIVE29

MINI_CARD2_REQ#6

CLK_PCIE_MINI_CARD2#6
CLK_PCIE_MINI_CARD26

HOST_DEBUG_RX_R37

8051_TX_R37

PCIE_IRX_PTX_N223
PCIE_IRX_PTX_P223

PCIE_ITX_C_PRX_N223
PCIE_ITX_C_PRX_P223

C C

PCIE_WAKE#

R806 0_0402_5%~D @

1 2

R807 0_0402_5%~D @

1 2

MINI_CARD2_REQ#
CLK_PCIE_MINI_CARD2#

CLK_PCIE_MINI_CARD2
HOST_DEBUG_RX_R

8051_TX_R
PCIE_IRX_PTX_N2

PCIE_IRX_PTX_P2

PCIE_ITX_C_PRX_N2
PCIE_ITX_C_PRX_P2

+3VRUN

JMINI2

1

1

3

3

5

5

7

7

9

9

11

11

13

13

15

15

17

17

19

19

21

21

23

23

25

25

27

27

29

29

31

31

33

33

35

35

37

37

39

39

41

41

43

43

45

45

47

47

49

49

51

51

53

GND1

TYCO_1775838-1~D

GND2

+3VRUN

2

2

4

4

6

6

8

8

10

10

12

12

14

14

16

16

18

18

20

20

22

22

24

24

26

26

28

28

30

30

32

32

34

34

36

36

38

38

40

40

42

42

44

44

46

46

48

48

50

50

52

52

54

+1.5VRUN

HOST_DEBUG_TX_R
WLAN_RADIO_OFF#

PLTRST1#

ICH_SMBCLK
ICH_SMBDATA

ECE_USBP1­ECE_USBP1+

8051_RX_R
LED_WLAN_OUT#

1 2

R851

@

0_0402_5%~D

HOST_DEBUG_TX_R 37

PLTRST1# 21,40

ICH_SMBCLK 6,23,40
ICH_SMBDATA 6,23,40

ECE_USBP1- 38

ECE_USBP1+ 38

8051_RX_R 37

LED_WLAN_OUT# 39

BT_ACTIVE 29,41

+V_3P3_LAN

1

C926

0.1U_0402_16V4Z~D

2

Suport for WoW
prevents backdrive when WoW is enabled

TVMini-Express Card

+3VRUN

B B

A A

PCIE_WAKE#3 2 ,38,40
COEX2_WLAN_ACTIVE29
COEX1_BT_ACTIVE29

MINI_CARD1_REQ#6

CLK_PCIE_MINI_CARD1#6
CLK_PCIE_MINI_CARD16

PCIE_IRX_PTX_N123
PCIE_IRX_PTX_P123

PCIE_ITX_C_PRX_N123
PCIE_ITX_C_PRX_P123

PCIE_WAKE#

R514 0_0402_5%~D

1 2

R512 0_0402_5%~D

1 2

MINI_CARD1_REQ#
CLK_PCIE_MINI_CARD1#

CLK_PCIE_MINI_CARD1

PCIE_IRX_PTX_N1
PCIE_IRX_PTX_P1

PCIE_ITX_C_PRX_N1
PCIE_ITX_C_PRX_P1

JMINI1

1

1

3

3

5

5

7

7

9

9

11

11

13

13

15

15

17

17

19

19

21

21

23

23

25

25

27

27

29

29

31

31

33

33

35

35

37

37

39

39

41

41

43

43

45

45

47

47

49

49

51

51

53

GND1

TYCO_1775838-1~D

GND2

+3VRUN

2

2

4

4

6

6

8

8

10

10

12

12

14

14

16

16

18

18

20

20

22

22

24

24

26

26

28

28

30

30

32

32

34

34

36

36

38

38

40

40

42

42

44

44

46

46

48

48

50

50

52

52

54

+1.5VRUN

WLAN_RADIO_DIS#
PLTRST1#

ICH_SMBCLK
ICH_SMBDATA

ECE_USBP4­ECE_USBP4+

LED_WLAN_OUT#

1 2

R853

@

0_0402_5%~D

WLAN_RADIO_DIS# 38

PLTRST1# 21,40

ICH_SMBCLK 6,23,40
ICH_SMBDATA 6,23,40

ECE_USBP4- 38

ECE_USBP4+ 38

LED_WLAN_OUT# 39

BT_ACTIVE 29,41

+V_3P3_LAN

1

C601

0.1U_0402_16V4Z~D

2

0.047U_0402_16V4Z~D

2

WLAN_RADIO_DIS#38

+3VRUN

1

C254

0.047U_0402_16V4Z~D

2

+1.5VRUN

+1.5VRUN

1

2

1

C903

0.047U_0402_16V4Z~D

2

1

C900

0.047U_0402_16V4Z~D

2

RB751V_SOD323~D

1 2

@

0_0402_5%~D

1

C257

0.047U_0402_16V4Z~D

2

C586

0.047U_0402_16V4Z~D

D38

21

R951

1

2

1

C918

0.1U_0402_16V4Z~D

2

1

C901

0.047U_0402_16V4Z~D

2

WLAN_RADIO_OFF#

1

C260

0.1U_0402_16V4Z~D

2

C596

0.047U_0402_16V4Z~D

1

C927

0.1U_0402_16V4Z~D

2

Mini-Card Latch

1

C571

0.1U_0402_16V4Z~D

2

1
2
3
4

TYCO_1775837-1~D

Mini-Card Latch

1

C917

4.7U_0805_10V4Z~D

2

JCLIP2

1

GND1

2

GND2

3

GND3

4

GND4

TYCO_1775837-1~D

1

2

JCLIP1

GND1
GND2
GND3
GND4

C576

4.7U_0805_10V4Z~D

DELL CONFIDENTIAL/PROPRIETARY

Compal Elec tronics, Inc.

MINI-CARD WLAN/TV

Greenland-LA2732P

36 63Wednesday, December 28, 2005

1

X03

http://hobi-elektronika.net

5

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

4

3

2

Title

Size Document Number Rev

Date: Sheet of

5

+5VRUN

D D

LID_CL_SIO# LID_CL#

PRE_LID_CL# PRE_LID_CL_R#

C C

Debug Serial port
Flash Recovery
Port

Molex_53261

JDEBG1

@

B B

1 2

R734 4.7K_0402_5%~D

1 2

R736 4.7K_0402_5%~D

1 2

R737 4.7K_0402_5%~D

1 2

R751 4.7K_0402_5%~D

+3VALW

12

1

C870

0.047U_0402_16V4Z~D

2

+3VALW

12

1

C938

0.047U_0402_16V4Z~D

2

R749

5

5

4

4

3

3

2

1 2

2

R833 0_0402_5%~D

1

1

LPC_LAD[0..3]22

No Stuff R833 when
doing Flash recovery

Place closely pin 58

CLK_PCI_SIO

R761

10_0402_5%~D

4.7P_0402_50V8C~D

C871

CLK_KBD
DAT_KBD
CLK_DOCK
DAT_DOCK

R744
100K_0402_5%~D

1 2

R755 10_0402_5%~D

R861
100K_0402_5%~D

1 2

R862 10_0402_5%~D

+3VALW

R794

10K_0402_5%~D

10K_0402_5%~D

1 2

1 2

LPC_LAD[0..3]

12

@

1

2

@

KSI5

LID_CL# 41

8051_RX_R36

8051_TX_R36

DEBUG_ENABLE#

CLK_PCI_SIO6

LPC_LFRAME#22

CLKRUN#23,34

IRQ_SERIRQ23,34

ICH_EC_SPI_CLK23

ICH_EC_SPI_DIN23
ICH_EC_SPI_DO23

SIO_PWRBTN#23

SW2

SMT1-05_4P~D

1
2

5

6

KSO[0..16]39

KSI[0..7]39

PRE_LID_CL_R# 41

SIO_A20GATE22

SIO_THRM#23

R912
0_0402_5%~D

1 2

R913
0_0402_5%~D

1 2

PLTRST2#10,21,32

BC_CLK38
BC_DAT38
BC_INT#38

R764
10K_0402_5%~D

1 2

+RTC_CELL

3

KSO9

4

KSO16
KSO15
KSO14
KSO13
KSO12
KSO11
KSO10
KSO9
KSO8
KSO7
KSO6
KSO5
KSO4
KSO3
KSO2
KSO1
KSO0

KSI7
KSI6
KSI5
KSI4
KSI3
KSI2
KSI1
KSI0

SIO_A20GATE
SIO_THRM#

CLK_KBD
DAT_KBD
CLK_DOCK
DAT_DOCK

8051_RX
8051_TX

PLTRST2#

CLK_PCI_SIO
LPC_LFRAME#
LPC_LAD0
LPC_LAD1
LPC_LAD2
LPC_LAD3
CLKRUN#
IRQ_SERIRQ

ICH_EC_SPI_CLK
ICH_EC_SPI_DIN
ICH_EC_SPI_DO

EC_FLASH_SPI_CLK
EC_FLASH_SPI_DIN
EC_FLASH_SPI_DO

SIO_PWRBTN#

BC_CLK
BC_DAT
BC_INT#

MEC5004_XTAL1
MEC5004_XTAL2

MEC5004_XOSEL

32 KHz Clock
Place closely pin 122 , 124

A A

32.768K_12.5PF_Q13MC30610003~D

1

C875

2

22P_0402_50V8J~D

http://hobi-elektronika.net

R847

0_0402_5%~D

Y1

1 4
2 3

12

5

MEC5004_XTAL2
MEC5004_XTAL1

1

C876

2

22P_0402_50V8J~D

R947

@

1 2

10K_0402_5%~D

ALWON_D

+3VALW

12

R944

R945

1 2

@

@

10K_0402_5%~D

100K_0402_5%~D

E

3

B

2

C

1

Q96

@

MMBT3906WT1G_SC70-3~D

4

R733

0_0402_5%~D

1 2

U48

12

KSO17/GPIOA1

13

KSO16/GPIOA0

14

GPIO5/KSO15

15

GPIO4/KSO14

16

KSO13/GPIO18

17

KSO12/OUT8

18

KSO11/GPIOC7

19

KSO10/GPIOC6

20

KSO9/GPIOC5

23

KSO8/GPIOC4

24

KSO7/GPIO3

25

KSO6/GPIO2

27

KSO5/GPIO1

28

KSO4/GPIO0

29

KSO3/GPIOC3

30

KSO2/GPIOC2

31

KSO1/GPIOC1

32

KSO0/GPIOC0

33

KSI7/GPIO19

34

KSI6/GPIO17

35

KSI5/GPIO10

36

KSI4/GPIO9

37

KSI3/GPIO8

38

KSI2/GPIO7

39

KSI1/GPIO6

40

KSI0/SGPIO30

92

SGPIO34/A20M

50

OUT5/KBRST

75

GPIO94/IMCLK

76

GPIO95/IMDAT

77

KCLK

78

KDAT

79

EMCLK

80

EMDAT

81

GPIO20/PS2CLK/8051RX

82

GPIO21/PS2DAT/8051TX

57

LRESET#

58

PCICLK

59

LFRAME#

60

LAD0

61

LAD1

62

LAD2

63

LAD3

64

CLKRUN#

56

SER_IRQ

102

HSTCLK

105

HSTDATAIN

107

HSTDATAOUT

103

FLCLK

106

FLDATAIN

108

FLDATAOUT

109

FLCS0

110

FLCS1

87

BC_CLK

86

BC_DAT

85

BC_INT

122

XTAL1

124

XTAL2

123

XOSEL

MEC5004_D_VTQFP128~D

1

2

BLM18AG121SN1D_0603~D

C971

@

4.7U_0603_6.3V6M~D

1 2

R948

@

100K_0402_5%~D

4

2

G

+3VALW

+RTC_CELL_R POWER_SW_IN#

1

C862

0.1U_0402_16V4Z~D

2

21

44

121

VCC1

VCC0

VCC1

65

83

116

VCC1

VCC1

VCC1

1

C863
10U_0805_10V4Z~D

2

SGPIO45/MSDATA/SPDOUT2

SGPIO44/MSCLK/SPCLK2

SYSOPT0/SGPIO32/LPC_TX

SYSOPT1/SGPIO33/LPC_RX

LPC InterfaceHost/8051 Keyboard and Mouse InterfaceBC Bus

AGND

125

12

L69

R946

@

0_0402_5%~D

13

D

Q97

@

2N7002_SOT23~D

S

VSS

VSS

26

51

74

12

VR_CAP

VSS

VSS

VSS

88

113

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

VSS_PLL

22

101

1

0.1U_0402_16V4Z~D

C872

2

4.7U_0603_6.3V6M~D

3

ALWON
POWER_ SW_IN2#
POWER_ SW_IN1#
POWER_ SW_IN0#

PWR SW

SGPIO31/TIN1/SPCLK1

ACAV_IN

BGPO0

AB1B_CLK

AB1B_DATA

AB1A_CLK

AB1A_DATA

GPIO11/AB2A_DATA

GPIO12/AB2A_CLK

GPIO13/AB2B_DATA

GPIO14/AB2B_CLK

GPIO87/AB1C_DATA

GPIO86/AB1C_CLK

GPIO85/AB1D_DATA

GPIO84/AB1D_CLK

GPIO93/AB1F_DATA

GPIO92/AB1F_CLK

GPIO91/AB1E_DATA

GPIO90/AB1E_CLK

GPIO82/FAN_TACH3
GPIO16/FAN_TACH2
GPIO15/FAN_TACH1

OUT2/PWM3

OUT9/PWM2
OUT11/PWM1
OUT10/PWM0

nEC_SCI/SPDIN2

SGPIO46/SPDIN1

SGPIO47/SPDOUT1

SGPIO40
SGPIO41
SGPIO42
SGPIO43

SGPIO35

SGPIO36 (SFPI_EN)

SGPIO37

GPIO96/TOUT1

OUT7/nSMI

nPWR_LED

nBAT_LED

GPIOA3/WINDMON

GPIO83/32KHZ_OUT

PWRGD

nRESET_OUT/OUT6

TEST_PIN

VCC_PLL

104

C873

+VCC_PLL

12

3

1

C864

0.1U_0402_16V4Z~D

2

120
119
126
127
128
118

8
7
6
5
93
94
95
96
111
112
9
10
97
98
99
100

43
42
41

48
47
46
45

66
55
54
69
68
67

70
71

91
90
89
4

1
2
3

52
11

115
114

84

nFWP

73
117
49
53
72

+3VALW

1

C865

0.1U_0402_16V4Z~D

2

21

@

RB751V_SOD323~D
D37

ALWON
CIR_WAKE_EN#

ACAV_IN

PBAT_SMBCLK
PBAT_SMBDAT
DOCK_SMB_CLK
DOCK_SMB_DAT
AUX_EN
SUS_ON
RUN_ON
ITP_DBRESET#
SBAT_SMBDAT
SBAT_SMBCLK
DAT_SMB
CLK_SMB
SIO_SLP_S5#
SIO_SLP_S3#
SIO_RCIN#
SIO_EXT_WAKE#

FAN2_TACH
FAN1_TACH

BREATH_LED_BADGE

BREATH_LED
SIO_EXT_SCI#

RUN_ON_D
PS_ID

LID_CL_SIO#
DEBUG_ENABLE#

HOST_DEBUG_TX
HOST_DEBUG_RX

INSTANT_ON_LED#
POWER_BTN_LED#

1 2

R958 0_0402_5%~D

BAT1_LED#
SFPI_EN
PS_ID_DISABLE#

ATF_INT#
SIO_EXT_SMI#

BAT2_LED#

FWP#

EC_32KHZ
RUNPWROK
RESET_OUT#

L68

BLM18AG121SN1D_0603~D

1 2

SPI_CS#
FDATAIN_R HOLD#
W#

R891 0_0402_5%~D @

1 2

R943

0_0402_5%~D

SPI_CS#

1
2
3
4

1

C866

0.1U_0402_16V4Z~D

2

ALWON_D

ALWON 48

R743 10K_0402_5%~D

1 2

R742 10K_0402_5%~D

1 2

ACAV_IN 16,19,46,52

PBAT_SMBCLK 46,52
PBAT_SMBDAT 46,52
DOCK_SMB_CLK 39
DOCK_SMB_DAT 39

SUS_ON 42,43,48
RUN_ON 19,42,43,47,48,49,50
ITP_DBRESET# 7,23

SBAT_SMBDAT 19
SBAT_SMBCLK 19
DAT_SMB 16

CLK_SMB 16
SIO_SLP_S5# 23
SIO_SLP_S3# 23

SIO_RCIN# 22
SIO_EXT_WAKE# 23

FAN2_TACH 16
FAN1_TACH 16

BREATH_LED_BADGE 41

BREATH_LED 41
SIO_EXT_SCI# 23
PS_ID 45

R914 0_0402_5%~D
R915 0_0402_5%~D

INSTANT_ON_LED# 39
POWER_BTN_LED# 39

SPI_CS#

SPI_CS# 23

BAT1_LED# 41
PS_ID_DISABLE# 45

ATF_INT# 16

SIO_EXT_SMI# 23
BAT2_LED# 41

1 2

@

M25P80-VMW6TP_SO8~D

BIA_PWMSIO_BIAPWM

EC_32KHZ 38

RUNPWROK 19,38,42,43,47,51
RESET_OUT# 43

1 2

R848

47_0402_5%~D

U53

S#

VCC

Q

HOLD#
W#
VSS

C
D

200 MIL SO8

+RTC_CELL

12

1 2
1 2

12

R765
10K_0402_5%~D

+3VSUS

8
7

EC_FLASH_SPI_CLK

6

EC_FLASH_SPI_DO

5

2

1

C867

0.1U_0402_16V4Z~D

2

R738
100K_0402_5%~D

INSTANT_ON_SW#INSTANT_SW_IN#
POWER_SW#POWER_SW_IN#

R956
0_0402_5%~D

1 2

12

R757

@

BIA_PWM 19

W#

150 MIL SO8

2

R793

1 2

100K_0402_5%~D

PRE_LID_CL#

HOST_DEBUG_TX_R 36
HOST_DEBUG_RX_R 36

3
2

12

10K_0402_5%~D

1

й

Host Debug port is
for CPU serial out

R758

@

10K_0402_5%~D

0.1U_0402_16V4Z~D

Flash ROM

U49

1

S#

2
3
4

VCC

Q

HOLD#
W#
VSS

M25P80-VMW6TP_SO8~D

C
D

Title

Size Document Number Rev

Date: Sheet of

INSTANT_SW_IN#

CIR_WAKE_EN# 31,41
INSTANT_ON_SW# 39
POWER_SW# 16,39

AUX_EN 42,48

SBAT_SMBDAT
SBAT_SMBCLK
PBAT_SMBDAT
PBAT_SMBCLK
DAT_SMB
CLK_SMB
ATF_INT#
DOCK_SMB_DAT
DOCK_SMB_CLK

JDEBG2

3
2
1

1.5mm SMT~D

+3VSUS

1

C874

2

8
7
6
5

Greenland-LA2732P

1

R735

100K_0402_5%~D

1

2

1

2

12

C868
1U_0603_10V4Z~D

R739

100K_0402_5%~D

12

C869
1U_0603_10V4Z~D

1 2

R745 8.2K_0402_5%~D

1 2

R746 8.2K_0402_5%~D

1 2

R747 8.2K_0402_5%~D

1 2

R748 8.2K_0402_5%~D

1 2

R750 10K_0402_5%~D

1 2

R752 10K_0402_5%~D
R756 10K_0402_5%~D
R754 10K_0402_5%~D
R753 10K_0402_5%~D

12
12
12

Place inside RAM door

+3VALW

SW1

@

45

67

1

1 2

2

1 2

3

1 2

RST-1202_3P

1=Flash Recovery Enabled
0=Flash Recovery Disabled

Flash write protect
bottom 4K of internal
bootblock flash

+3VSUS

12

R846

HOLD#FDATAIN_REC_FLASH_SPI_DIN
EC_FLASH_SPI_CLK
EC_FLASH_SPI_DO

10K_0402_5%~D

0=write protected

Compal Elec tronics, Inc.
SIO (1/2)

1

+RTC_CELL

+RTC_CELL

R952
1K_0402_5%~D@

R953
1K_0402_5%~D@

R954
1K_0402_5%~D

100K_0402_5%~D

FWP#

@

100K_0402_5%~D

37 63Wednesday, December 28, 2005

SFPI_EN

+3VALW

R766

R767

+3VALW

+3VSUS
+5V_MEDIA

12

12

X03

5

4

+3VALW

3

2

1

+3VALW

R782

1 2

10K_0402_5%~D

@

R783

5

PCIE_WAKE#
SYS_PME#
PBAT_ALARM#

IMVP6_PROCHOT#

R838
0_0402_5%~D@

1 2

R784

R785

1 2

1 2

10K_0402_5%~D

10K_0402_5%~D

@

10K_0402_5%~D

@

PCIE_WAKE#3 2,36,40

SYS_PME#34

ODD_EJECT_REC#25

PBAT_PRES#46

BT_WAKE#29

ODD2BOT39

BC_INT#37
BC_DAT37

BC_CLK37

KEY_BATT_FAULT_R#46

SLND_STAT#41
SLND_DATA41

SLND_CLK41

ODD2TOP39

ODD_OVER_TEMP#25

5V_CAL_SIO1# 16

ODD_MOTOR_DIRECTION144

ODD_MOTOR_POWER_OC44

ODD_MOTOR_STANDBY44

ODD_MOTOR_DIRECTION244

SYSOPT straps are
sampled at power up.

1 2

R786 10K_0402_5%~D
R787 10K_0402_5%~D@
R788 10K_0402_5%~D
R789 10K_0402_5%~D

ODD_STAT#25

MDC_RST_DIS#29

ADAPT_OC52

EXPRCRD_STDBY#40

SIO_GFX_PWR19

YPRPB_DET#19,20

NB_MUTE28

AC_OFF45
TS_INT39

IMVP6_PROCHOT#51

KB_DETECT_R#46

ODD_MEDIA_STATUS39

PBAT_ALARM#46

EN_KB_PRECHG_5V#46

LAN_LOW_PWR32 RUNPWROK 19,37,42,43,47,51

AUDIO_AVDD_ON26

ADAPT_TRIP_SEL52

ODD_MEDIA_STAT2#25

ICH_PCIE_WAKE#23

ICH_PME#21

THERMTRIP_SIO16

CBUS_GRST#34
FPBACK_EN19

CB_HWSPND#34

CPU_PROCHOT#7

HDDC_EN#42
MODC_EN#42

5V_CAL_SIO2# 16
USB_SIDE_EN#31
USB_BACK_EN#31

+3VALW

1 2
1 2
1 2
1 2

BEEP26

CPPE#40

1 2

PCIE_WAKE#
SYS_PME#
ODD_EJECT_REC#
PBAT_PRES#
BT_WAKE#

100P_0402_50V8J~D

C974

ODD2BOT
BC_INT#
BC_DAT
BC_CLK

KEY_BATT_FAUL T_R#
SLND_STAT#
SLND_DATA
SLND_CLK
BT_RE_PAIR#
ODD2TOP
ODD_OVER_TEMP#
5V_CAL_SIO1#

ODD_STAT#
ODD_MOTOR_DIRECTION1
MDC_RST_DIS#
ADAPT_OC
EXPRCRD_STDBY#
SIO_GFX_PWR
YPRPB_DET#
NB_MUTE
AC_OFF

TS_INT
IMVP6_PROCHOT#
KB_DETECT_R#
ODD_MOTOR_POW E R_OC
ODD_MEDIA_STATUS
ODD_MOTOR_STANDBY
ODD_MOTOR_DIRECTION2

PBAT_ALARM#
EN_KB_PRECHG_5V#

LAN_LOW_PW R
AUDIO_AVDD_ON
BEEP

ADAPT_TRIP_SEL

ODD_MEDIA_STAT2#
ICH_PCIE_WAKE#

ICH_PME#
THERMTRIP_SIO
CBUS_GRST#
CPPE#
FPBACK_EN
CB_HWSPND#
CPU_PROCHOT#

HDDC_EN#
MODC_EN#

BID3
BID2
BID1
BID0

CIRRX

R89310K_0402_5%~D

5V_CAL_SIO2#
USB_SIDE_EN#
USB_BACK_EN#

4

1

2

1 2

R769 10K_0402_5%~D

1 2

R770 10K_0402_5%~D

1 2

D D

C C

B B

A A

R772 10K_0402_5%~D

+3VRUN

1 2

R860 10K_0402_5%~D

BT_RE_PAIR_R#29,31

BID0
BID1
BID2
BID3

http://hobi-elektronika.net

U50

97

GPIOA[0]

98

GPIOA[1]

99

GPIOA[2]

100

GPIOA[3]

101

GPIOA[4]

102

GPIOA[5]

103

GPIOA[6]

104

GPIOA[7]

24

GPIOH[0]

25

GPIOH[1]

26

GPIOH[4]

27

GPIOH[5]

58

BC_INT

59

BC_DAT

60

BC_CLK

1

GPIOE[0]

2

GPIOE[1]

3

GPIOE[2]

4

GPIOE[3]

5

GPIOE[4]

84

GPIOE[5]

83

GPIOE[6]

6

GPIOE[7]

65

GPIOB[0]

66

GPIOB[1]

67

GPIOC[2]

68

GPIOC[3]

69

GPIOC[4]

70

GPIOC[5]

71

GPIOC[6]

73

GPIOC[7]

74

GPIOD[0]

75

GPIOC[1]

76

GPIOC[0]

77

GPIOB[7]

78

GPIOB[6]

79

GPIOB[5]

80

GPIOB[4]

81

GPIOB[3]

82

GPIOB[2]

61

GPIOD[1]/CIRTX

62

GPIOD[2]/CIRRX

63

GPIOD[3]/VBUS_DET

28

GPIOD[4]/OCS1_N

29

GPIOD[5]/OCS2_N

30

GPIOD[6]/OCS3_N

31

GPIOD[7]/OCS4_N

32

GPIOH[6]

33

GPIOH[7]

88

GPIOG[0]

89

GPIOG[1]

90

GPIOG[2]

91

GPIOG[3]

92

GPIOG[4]

93

GPIOG[5]

94

GPIOG[6]

95

GPIOG[7]

106

GPIOH[2]

107

GPIOH[3]

109

GPIOF[7]

110

GPIOF[6]

111

GPIOF[5]

112

GPIOF[4]

113

CIRTX

114

CIRRX

115

GPIOF[3]

116

GPIOF[2]

117

GPIOF[1]

118

GPIOF[0]

ECE5011_VTQFP128~D

34

43

57

85

108

119

VCC1

VCC142VCC1

VCC1

VCC1

VCC1

VCC1

VDDA33
VDDA33

ECE5011

USB

GPIO

VSS

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

3

VDDA33

USBDP0
USBDN0
USBDP1
USBDN1
USBDP2
USBDN2
USBDP3
USBDN3
USBDP4
USBDN4

VDDA33PLL
VDDA18PLL

VDD18

CAP_LDO

RBIAS

TEST_PIN

ATEST

XTAL1/CLKIN

XTAL2

KHz_32

PWRGD

OUT65

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

1

C877

2

8
14
20

9
10
13
12
15
16
19
18
21
22

125
124
120
86
127

Route RBIAS and its
return to pin 128 very

35

short.

126

ECE5011_XTAL1

123

ECE5011_XTAL2

122

46

NC

96
7
105

54
52
49
47
41
56
37
44
39
64
55
53
50
48
38
45
40
11
17
23
36
51
72
87
121
128

EC_32KHZ
RUNPWROK
WLAN_RADIO_DIS#

1

2

0.1U_0402_16V4Z~D

+VDDA33

USBP1+
USBP1­ECE_USBP1+
ECE_USBP1­ECE_USBP2+
ECE_USBP2­ECE_USBP3+
ECE_USBP3­ECE_USBP4+
ECE_USBP4-

C878

0.1U_0402_16V4Z~D

VDDA18PLL
VDD18
CAP_LDO
RBIAS

12

EC_32KHZ 37

1

1

C881

2

0.1U_0402_16V4Z~D

1

C889

2

12K_0402_1%~D

C879

4.7U_0805_6.3V6K~D

2

USBP1+ 23

USBP1- 23

ECE_USBP1+ 36

ECE_USBP1- 36

ECE_USBP2+ 41

ECE_USBP2- 41

ECE_USBP3+ 31

ECE_USBP3- 31

ECE_USBP4+ 36

ECE_USBP4- 36

R773

WLAN_RADIO_DIS# 36

Bring Up
SST
PT2

2

1

C880

2

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

1

1

C882

2

C887 4.7U_0805_6.3V6K~D

1 2

C886 4.7U_0805_6.3V6K~D

1 2

C888 0.1U_0402_16V4Z~D

1 2

ECE5011_XTAL1

ECE5011_XTAL2 ECE5011_XTAL2_R

1

C883

2

2

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

R859

1 2

0_0402_5%~D

C884

BID2 BID1

0

0

001X01

00 01X03

DELL CONFIDENTIAL/PROPRIETARY

Title

Size Document Number Rev

Greenland-LA2732P

Date: Sheet

L70

BLM18PG181SN1_0603~D

1

2

0.1U_0402_16V4Z~D

1 2

1

C885

C937

2

@

4.7U_0805_6.3V6K~D

4.7U_0805_6.3V6K~D

REG_EN

15P_0402_50V8J~D

12

R775

1M_0402_5%~D

18P_0402_50V8J~D

BID0BID3

000

+3VALW

12

C890

1 2

12

Y2

24MHZ_12PF_1BX24000CE1B~D

C891

1 2

REV
X00

Compal Elec tronics, Inc.
SIO (2/2)

38 63Wednesday, December 28, 2005

1

+3VALW

R774
10K_0402_5%~D

of

X03

5

4

3

2

1

+5VALW

12

11
13
15
17
19
21
23
25
27
29

7
9

2

JMEDIA

112
334
556
7
9
11
13
15
17
19
21
23
25
27
29
G131G2

B

10
12
14
16
18
20
22
24
26
28
30

+5VALW

E

2
4
6
8

8

10
12
14
16
18
20
22
24
26
28
30
32

C

3 1

Q80
PMBT3904_SOT23~D

POWER_BTN_LED

LED_WLAN_OUT
BREATH_LED_BLUE#
LED_BAT_ORG

DOCK_SMB_CLK

MEP_IO6

LED_INSTANT_ON
ODD_MEDIA_STATUS#
ODD2BOT#
+ODD_POWER-+ODD_POWER+

+5V_MEDIA

PMBT3904_SOT23~D

BREATH_LED_BLUE# 41
LED_BAT_ORG 41

DOCK_SMB_CLK 37

+ODD_POWER- 44

R887

D D

POWER_BTN_LED#37

+5VALW

1

C8

0.1U_0402_16V4Z~D

C C

2

POWER_SW#16,37

ACTLED_BLUE41
LED_BAT_BLUE41
BT_LED_BLUE#41

DOCK_SMB_DAT37

TS_INT38

+5V_MEDIA

INSTANT_ON_SW#37

+5VRUN

+ODD_POWER+44

10K_0402_5%~D

2

G

POWER_SW#
ACTLED_BLUE

LED_BAT_BLUE
BT_LED_BLUE#
DOCK_SMB_DAT
TS_INT

INSTANT_ON_SW#
ODD2TOP#

13

D

Q81
2N7002_SOT23~D

S

JST_BM30B-SRDS-G-TFC~D

Media CONN.

POWER_SW#

2

3

@

D25
SM05TCT_SOT23-3~D

1

ESD damage
prevention

B B

KSI[0..7]37

KSO[0..16]37

A A

http://hobi-elektronika.net

5

KSI7
KSI6
KSI5
KSI4
KSI3
KSI2
KSI1
KSI0

KSO16
KSO15
KSO14
KSO13
KSO12
KSO11
KSO10

KSO9
KSO8
KSO7
KSO6
KSO5
KSO4
KSO3
KSO2
KSO1
KSO0

+5VSUS +5 V RUN +5V_MEDIA

JUMP7

2

112

JUMP_43X118

KSI7
KSI6
KSI4
KSI2
KSI5
KSI1
KSI3
KSI0
KSO5
KSO4
KSO7
KSO6
KSO8
KSO3
KSO1
KSO2
KSO0
KSO12
KSO16
KSO15
KSO13
KSO14
KSO9
KSO11
KSO10

4

JUMP6

@

112

JUMP_43X118

JKYBD

25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1

JAE_FK2S030W11~D@

2

30
29
28
27
26

31
32

33
34

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

+5VRUN

R852

330_0402_5%~D

C

Q90

12

B

E

3 1

3

2

2N7002_SOT23~D

+5VRUN

12

R937

10K_0402_5%~D

13

D

Q91

S

Level shift for EC

2

G

+3VRUN

R949

10K_0402_5%~D

+5VALW

12

12

LED_WLAN_OUT# 36

INSTANT_ON_LED#37

R888

10K_0402_5%~D

2

G

22K_0402_5%~D

ODD2TOP#

22K_0402_5%~D

ODD2BOT#

22K_0402_5%~D

ODD_MEDIA_STATUS#

13

D

Q83
2N7002_SOT23~D

S

+5VRUN

12

R200

+5VRUN

12

R202

+5VRUN

12

R201

+5VALW

C

Q82

2

B

PMBT3904_SOT23~D

E

3 1

LED_INSTANT_ON

+3VRUN

12

R213

8.2K_0402_5%~D

ODD2TOP

13

Q31

47K

2

47K

47K

2

47K

47K

2

47K

PDTC144EK_SOT23~D

+3VRUN

12

R215

8.2K_0402_5%~D

13

Q32
PDTC144EK_SOT23~D

+3VRUN

12

R214

8.2K_0402_5%~D

ODD_MEDIA_STATUS

13

Q30
PDTC144EK_SOT23~D

ODD2BOT

ODD2TOP 38

ODD2BOT 38

ODD_MEDIA_STATUS 38

DELL CONFIDENTIAL/PROPRIETARY

Title

Size Document Number Rev

2

Date: Sheet of

Compal Electronics, Inc.

INT KB & Media Conn.

Greenland-LA2732P

39 63Wednesday, December 28, 2005

1

X03

5

D D

+3VSUS

+1.5VRUN+3VRUN

4

+1.5V_CARD

3

2

+3V_CARD

+3V_CARD_AUX

+1.5V_CARD

1

1

C C

C64

2

0.1U_0402_16V4Z~D

EXPRCRD_STDBY#38

1

C63

2

0.1U_0402_16V4Z~D

PLTRST1#21,36

+3VSUS

+3VSUS
+3VSUS

CPPE#38

1 2

R540 100K_0402_5%~D

1 2

R541 0_0402_5%~D@

1 2

R122 100K_0402_5%~D

1 2

R136 100K_0402_5%~D

PLTRST1#

CPPE#

1

C65

2

0.1U_0402_16V4Z~D

EXPRCRD_STDBY_R#EXPRCRD_STDBY#

CPPE#
EXPR_CPUSB#

U4

12

1.5Vin

14

1.5Vin

2

3.3Vin

4

3.3Vin
AUX_IN17AUX_OUT

6

SYSRST#

20

SHDN#

1

STBY#

10

CPPE#

9

CPUSB#

18

RCLKEN

R5538_QFN20~D

1.5Vout

1.5Vout

3.3Vout

3.3Vout

OC#

PERST#

GND

11
13

3
5

15
19
8
16

NC

7

C79

EXPR_CARD_RST#

1

1

C80

2

2

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

+3V_CARD_AUX

1

C66

2

+1.5V_CARD Max. 650mA, Average 500mA

B B

+3V_CARD Max. 1300mA, Average 1000mA

USBP2-23

USBP2+23

R144 0_0402_5%~D

1 2

L23

USBP2-

USBP2+ USBP2+_R

DLW21SN900SQ2_0805~D@

1

1

4

4

1 2

R138 0_0402_5%~D

+3V_CARD

1

1

C77

C75

0.1U_0402_16V4Z~D

2

10U_1206_6.3V7K~D

2

2

3

3

2

0.1U_0402_16V4Z~D

USBP2-_R

1

C78

2

0.1U_0402_16V4Z~D

1

C147

2

0.1U_0402_10V6K~D

USBP2-_R
USBP2+_R
EXPR_CPUSB#

1

2

JEXP

1

GND

2

USBD-

3

USBD+

4

CPUSB#

5

RESERVED

6

RESERVED

7

SMBCLK

8

SMBDATA

9

+1.5V

10

+1.5V

11

WAKE#

12

+3.3VAUX

13

PERST#

14

+3.3V

15

+3.3V

16

CLKREQ#

17

CPPE#

18

REFCLK-

19

REFCLK+

20

GND

21

PERn0

22

PERp0

23

GND

24

PETn0

25

PETp0

26

GND

JAE_PX10BRB02_RB~D

1

C137

C120

2

0.1U_0402_10V6K~D

0.1U_0402_10V6K~D

ICH_SMBCLK6,23,36
ICH_SMBDATA6,23,36

PCIE_WAKE#32,36,38

EXPR_CARD_REQ#6

CLK_PCIE_EXPR#6
CLK_PCIE_EXPR6

PCIE_IRX_PTX_N423
PCIE_IRX_PTX_P423

PCIE_ITX_C_PRX_N423
PCIE_ITX_C_PRX_P423

ICH_SMBCLK
ICH_SMBDATA

PCIE_WAKE#
EXPR_CARD_RST#

EXPR_CARD_REQ#
CPPE#
CLK_PCIE_EXPR#
CLK_PCIE_EXPR

PCIE_IRX_PTX_N4
PCIE_IRX_PTX_P4

PCIE_ITX_C_PRX_N4
PCIE_ITX_C_PRX_P4

A A

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Greenland-LA2732P

40 63Wednesday, December 28, 2005

1

X03

of

http://hobi-elektronika.net

5

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

4

3

2

Title

EXPRESS CARD

Size Document Number Rev

Custom

Date: Sheet

5

4

3

2

1

OUT

IN

+5VRUN

+5VRUN

D D

SATA_ACT#22

C C

B B

A A

BAT1_LED#37

BAT2_LED#37

BREATH_LED37

BT_ACTIVE29,36

+3VALW

47K

10K

2

1 3

BREATH_LED BREATH_LED_B

BT_ACTIVE BT_MPCI_ACTIVE

12

13

D

2

G

S

+5VALW

47K

10K

2

Q46
DTA114YKA_SOT23~D

R6

1 2

10K_0402_5%~D

R345

1 2

10K_0402_5%~D

R938
10K_0402_5%~D

Q93
2N7002_SOT23~D

Q45
DTA114YKA_SOT23~D

1 3

R_BAT1_LED LED_BAT_BLUE

R_BAT2_LED

12

C

Q92

2

B

PMBT3904_SOT23~D

E

3 1

R344

330_0402_5%~D

R341

330_0402_5%~D

BREATH_LED_BLUE#

C

Q1

2

B

PMBT3904_SOT23~D

E

3 1

C

Q48

2

B

PMBT3904_SOT23~D

E

3 1

R342
330_0402_5%~D

12

LED_BAT_ORG

12

BT_LED_BLUE#

GND

1

32

DTA114YKA

ACTLED_BLUE

LED_BAT_BLUE 39

LED_BAT_ORG 39

BREATH_LED_BLUE# 39

BT_LED_BLUE# 39

ACTLED_BLUE 39

PRE_LID_CL_R#37

BLAST1_IRO30
BLAST1_SLI30
BLAST1_IRSL30

PRE_LID_CL_R#

USBP3-23
USBP3+23

+3VALW

LID_CL#37

D35

RB751V_SOD323~D

2 1

BREATH_LED_BADGE37

JCIR

2

112

4

334

6

BLAST1_IRO BLAST0_IRO
BLAST1_SLI
BLAST1_IRSL

LID_CL#
LID_CLS2_R

1

C939

2

0.1U_0603_25V7K~D

LID_CLS2_R

+12V_PHASE

556

7

8

7

9

10

9

11

12

11

13

14

13

15

16

15

17

18

17

19

20

19
G121G2

JST_SM20B-SRDS-G-TF~D

JHING

1

1

2

2

4

3

3

5

MOLEX_53261-0371~D

+PWR_SRC

1

C940

2

10U_1206_25V6M~D

+5VALW

8

BLAST0_SLI

10

BLAST0_IRSL

12
14
16
18
20
22

4
5

JSLND

112
334
556
778
9910

11

11

13

13
151516
171718
191920
212122
232324
252526

27

27

29

29

31

GND

32

GND

33

GND

TYCO_3-1775014-0~D

SLND_DATA38

SLND_CLK38

ECE_USBP2+
ECE_USBP2-

12
14

28
30

GND
GND
GND

+3VALW

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30

34
35
36

2.2K_0402_5%~D

+3VALW

SLND_CLK

+3VALW

S

+5VRUN
+5VRUN

BLAST0_IRO 30
BLAST0_SLI 30
BLAST0_IRSL 30

SLND_CLK_Q
SLND_DATA_Q
SLND_STAT#

C961

0.1U_0603_25V7K~D

12

R896

Q98

G

2

2N7002_SOT23~D

13

D

ECE_USBP2+ 38

ECE_USBP2- 38

1

1

C962

2

2

10U_1206_25V6M~D

12

R897

2.2K_0402_5%~D

S

S

CIR_WAKE_EN#CIR_WAKE_EN_Q#

CIR_WAKE_EN# 31,37

+5VRUN

1

C949

0.1U_0402_16V4Z~D

2

1

C675

2

0.1U_0402_16V4Z~D

200mA for Camera

+3VALW+5VRUN

1

C676

2

0.1U_0402_16V4Z~D

Place close to JCIR connector

SLND_STAT# 38

+12VALW_SLND

Q84

D

13

G

2N7002_SOT23~D

2

G

2

2N7002_SOT23~D

13

D

Q85

SLND_DATA_QSLND_DATA

SLND_CLK_Q

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.
LED & CIR & SOLENOID

Greenland-LA2732P

41 63Wednesday, December 28, 2005

1

X03

http://hobi-elektronika.net

5

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

4

3

2

Title

Size Document Number Rev

Custom

Date: Sheet of

5

+3VSRC

1

R850
100K_0402_5%~D

RUN_ON_5V#

D

Q20
2N7002_SOT23~D

S

2

G

12

R360

200K_0402_5%~D

Q41

2N7002_SOT23~D

D39

3

2

MMBD4148-7-F_SOT23-3~D

+PWR_SRC

12

R849
100K_0402_5%~D

RUN_ENABLE

13

D

2

G

S

Q21

2N7002_SOT23~D

+PWR_SRC+PWR_SRC

11

12

R42
100K_0402_5%~D

13

D

Q8

S

2N7002_SOT23~D

+5VSUS

Q39

578

3 6

241

1

1

C618

C616

2

2

0.01U_0402_25V7K~D

4.7U_1206_16V6K~D

200K_0402_5%~D

R923

12

R38
365K_0402_1%~D

3Amp

+5VHDD

JUMP5

1 2

@

PAD-OPEN 4x4m

12

R515
100K_0402_5%~D

12

Run Planes Enable

D D

C C

AUX_EN37,48

B B

+5VHDD Source

HDDC_EN#38

A A

http://hobi-elektronika.net

RUN_ENABLE48

RUN_ON19 , 37 , 43,47,48,49,50

2

R899

100K_0402_5%~D

G

+3VALW

12

2

G

12

R361
100K_0402_5%~D

N21917830

13

D

Q50

S

2N7002_SOT23~D

SI4800DY-T1-E3_SO8~D

+12VRUN

2

G

5

+5VALW

12

13

100K_0402_5%~D

12

R513

HDD_EN

13

D

S

4

Q38
SI3456DV-T1-E3_TSOP6~D

D

6
2

1

G

R950

1 2

+5VSUS

STS11NF30L_SO8~D

8
7

5

C924

365K_0402_1%~D

0.01U_0402_25V7K~D

ENAB_3VLAN 32

+5VRUN

4

S

45

3

4.7U_0805_10V4Z~D

1

C972
470P_0402_50V7K~D

2

+5VRUN Source

Q42

4

4.7U_0805_10V4Z~D

1

1

C925

2

2

0.022U_0603_25V7K~D

RUNPWROK19,3 7 ,38,43,47,51

RUN_ON19 , 37 , 43,47,48,49,50

SUS_ON37,43,48

1
2
36

1

C309

2

1

C306

2

R929

0_0402_5%~D

1 2

R930

0_0402_5%~D@

1 2

SUS_ON

Q37

2N7002_SOT23~D

3

+3VRUN Source

+3VRUN

+VCC_CORE

12

R960
150_0805_5%~D

Q100

2N7002_SOT23~D

Q88
SI4435BDY-T1-E3_SO8~D

1
2
3 6

1

Z4005

2 22

13

D

2

G

S

4

R132

Q15

8
7

5

12

1

2

G

+12VRUN

12

Z4006

13

D

S

R928

R180

Q22

22_0805_5%~D@

2N7002_SOT23~D@

10K_0402_5%~D@

SUS_ON_5V#

47_0805_5%~D@

2N7002_SOT23~D@

1

2

C963

4.7U_1206_25V6K~D

12

RUN_ON_5V#19

+5VRUN

12

SUS_ON_ENABLE48

R297

10K_0402_5%~D@

R294

10K_0402_5%~D@

+12VALW_SLND

2

G

RUN_ON_5V#

12

R927
100K_0402_5%~D

RUN_ON_12V#

13

D

Q89
2N7002_SOT23~D

S

SUS_ON_ENABLE

+12VRUN

12

1

Z400A

2

13

D

2

G

S

+12VALW_SLND

1

C964

2

0.1U_0603_25V7K~D

+3VSUS Source

+5VALW

11

12

R266
100K_0402_5%~D

SUS_ON_5V#

13

D

2

G

S

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

2

G

12

R262
200K_0402_5%~D

13

D

Q36

S

3

+3VSRC+PWR_SRC +3VSUS

Q35

STS11NF30L_SO8~D

8
7

5

12

R259

2N7002_SOT23~D

470K_0402_5%~D

1
2
36

4

1

C244

0.1U_0603_25V7K~D

2

MODC_EN#38

1

C230

4.7U_0805_10V4Z~D

2

2

+3VRUN +1.5VRUN+0.9V_DDR_VTT +VCCP

2

G

R196

22_0805_5%~D

D

Q27

2N7002_SOT23~D

S

12

1

R143

22_0805_5%~D@

Z4008

Q18

13

D

2N7002_SOT23~D@

S

+3VSUS_PD+1.8VSUS_PD +5VSUS_PD

2

G

12

R131

22_0805_5%~D@

Z4007

2

Q16

13

D

2N7002_SOT23~D@

2

G

S

+1.8VSUS

12

13

2

G

+5VMOD Source

+12VRUN

12

2

G

R18
100K_0402_5%~D

2

MOD_EN

13

D

C35

S

0.01U_0402_25V7K~D

R898

100K_0402_5%~D

2N7002_SOT23~D

+3VALW

12

Q6

DELL CONFIDENTIAL/PROPRIETARY

Title

Size Document Number Rev

Custom

2

Date: Sheet of

1

+5VRUN

12

11

R133

22_0805_5%~D@

+5VRUN_PD

Z4009

2

Q14

13

D

2N7002_SOT23~D@

2

G

S

+3VSUS +5VSUS

12

R197

22_0805_5%~D@

13

D

Q28

@

2N7002_SOT23~D

S

+5VSUS

6

2

1

D

G

3

1

2

Q5
SI3456DV-T1-E3_TSOP6~D

S

4 5

1

C44

2

4.7U_1206_16V6K~D

2

G

2

G

+5VMOD

1 2

12

@

R31
100K_0402_5%~D

12

1

2

13

D

S

12

R206

13

D

2N7002_SOT23~D

S

3Amp

JUMP4

PAD-OPEN 4x4m

Compal Electronics, Inc.

Power Control

Greenland-LA2732P

42 63Wednesday, December 28, 2005

1

R134

Q17

22_0805_5%~D@

Q33

@

22_0805_5%~D@

2N7002_SOT23~D@

+5VRUN

X03

5

4

3

2

1

D D

+3VSUS

14

No Stuff

+5VSUS

+5VRUN

R866

1 2

200K_0402_5%~D

@

C C

+3VRUN

R868

1 2

200K_0402_5%~D

@

B B

E

3

B

2

C

1

@

+3VSUS

E

3

B

2

C

1

@

5V_3V_RUN_PWRGD

2.5V_RUN_PW RGD16
SUSPWROK_1P8V50

VCCP_PWRGD47

@

MMBT3906_SOT23~D
Q75

R867

1 2

4.7K_0402_5%~D

@

MMBT3906_SOT23~D
Q77

R869

1 2

4.7K_0402_5%~D

@

R870

2

2

B

B

E

E

0_0402_5%~D

1 2

C

Q76
PMBT3904_SOT23~D

@

3 1

C

Q78
PMBT3904_SOT23~D

@

3 1

@

@

0_0402_5%~D

R871

R872

1 2

1 2

0_0402_5%~D

+3VRUN

12

R142
20K_0402_5%~D

3VRUNRC

2

C171

0.1U_0402_16V4Z~D

1

IMVP_PWRGD23,51
RESET_OUT#37

+3VSUS

C151

0.1U_0402_16V4Z~D

1 2

U12A

8

74LVC3G14DC_VSSOP8~D

P

7

A1Y

G

4

IMVP_PWRGD
RESET_OUT#

RUN_ON1 9 ,3 7 , 42,47,48,49,50

U14A

1

P

IN1

3

OUT

2

IN2

G

74VHC08MTCX_NL_TSSOP14~D

7

+3VSUS

U12B

8

74LVC3G14DC_VSSOP8~D

P

A6Y

G

4

ICH_PWRGD

2

RUN_ON

4
5

+3VSUS

C196

0.1U_0402_16V4Z~D

1 2

14

U14B
74VHC08MTCX_NL_TSSOP14~D

P

IN1

6

OUT

IN2

G

7

+3VSUS

+3VALW

2

G

R873

1 2

13

D

S

100K_0402_5%~D

Q79
2N7002_SOT23~D

+3VSUS

U12C

8

74LVC3G14DC_VSSOP8~D

P

5

A3Y

G

4

+3VSUS

14

U14D

13

P

IN1

11

SUS_ON37,42,48

SUS_ON

OUT

12

IN2

G

74VHC08MTCX_NL_TSSOP14~D

7

SUSPWROK_1P8V50

A A

SUSPWROK_1P8V

10K_0402_5%~D

R874

1 2

0.1U_0402_16V4Z~D

2

C948

1

+3VSUS

12

R153
100K_0402_5%~D

ICH_PWRGD#

13

D

Q19

2

G

2N7002_SOT23~D

S

ICH_PW RGD 10,23

+3VSUS

14

U14C

10

P

IN1

OUT

9

IN2

G

74VHC08MTCX_NL_TSSOP14~D

7

8

RUNPWROK

SUSPWROK 16,23

ICH_PWRGD# 16

RUNPWROK 19,37,38,42,47,51

http://hobi-elektronika.net

5

DELL CONFIDENTIAL/PROPRIETARY

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

4

3

2

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.
Power sequence

Greenland-LA2732P

43 63Wednesday, December 28, 2005

1

X03

of

5

4

3

2

1

With Charge pump

+3VRUN+5VALW

2

C53

D D

10U_0805_10V4Z~D

1

R34
1K_0402_5%~D

1 2

MOTOR_INC

+3VRUN

C45 0.01U_0402_16V7K~D

12

+MOTOR_PWRSRC

ODD_MOTOR_DIRECTION1
ODD_MOTOR_DIRECTION2

MOTOR_INC

U1

1

C2L

2

C1H

3

C1L

4

VM

5

VM

6

NC

7

NC

8

NC

9

VDD

10

IN1

11

IN2

12

INC

uPD16805MA-6A5_TSSOP24~D

1 2

C31 0.01U_0402_16V7K~D

DGND

PGND
PGND

OUT1
OUT1

OUT2
OUT2

STBY

C2H

13

+MOTOR_PWRSRC

14

VM

15

VM

VG

16
17
18
19
20
21
22
23
24

+ODD_POWER+

+ODD_POWER­ODD_MOTOR_STANDBY

2

C7

0.01U_0402_16V7K~D

1

+ODD_POWER+ 39

+ODD_POWER- 39

+3VRUN

ODD_MOTOR_DIRECTION138

C C

ODD_MOTOR_DIRECTION238

ODD_MOTOR_STANDBY38

B B

ODD_MOTOR_DIRECTION1

+3VRUN

ODD_MOTOR_DIRECTION2

+3VRUN

ODD_MOTOR_STANDBY

Input Signal

1 2

R542 10K_0402_5%~D

1 2

R543 10K_0402_5%~D

1 2

R544 10K_0402_5%~D

limited current: 650mA

+MOTOR_PWRSRC +MOTOR_PWRSRC_L ODD_MOTOR_POW E R_OC

1 2

L56 BLM18PG181SN1_0603~D

Function

+5VRUN +5VALW +5VALW

12

R55

0.3_1206_1%~D

+5VRUN

U3

5

INA138NAG4_SOT23-5~D

3

P

V+

OUT

4

V-

G

2

C55

1 2

0.1U_0402_16V4Z~D

1

12

R40

1 2

120K_0402_5%~D

R39
51K_0402_1%~D

12

R56
30K_0402_5%~D

12

R54
20K_0402_1%~D

5

U2

1

P

IN+

4

O

3

IN-

G

2

LMV331IDCKRG4_SC70-5~D

1 2

R57 1M_0402_5%~D

12

R44

3.3K_0402_5%~D

ODD_MOTOR_POWER_OC 38

MOTOR_IN1 MOT OR_IN2 MOTOR_INC MOTOR_STBY#

H
H
L

A A

LL

L
H

XX

X

http://hobi-elektronika.net

5

HH
H
H
H
L
XX

H
H
H
H
H
L

Brake Mode
Forward Mode
Reverse Mode

Stop Mode

Stop Mode
Standby Mode

4

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF DELL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SE CRET INFOR MATI ON. T HIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY DELL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF DELL ELECTRONICS, INC.

3

2

DELL CONFIDENTIAL/PROPRIETARY

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

CD ROM Motor

Greenland-LA2732P

44 63Wednesday, December 28, 2005

1

X03

5

4

3

2

1

+5VALW

D D

PR2

@

1 2

0_0402_5%~D

A_PS_ID

PR5

1 2

100K_0402_5%~D

C C

PR6

1 2

15K_0402_1%~D

D

1 3

2

G

S

PQ1

G

2

FDV301N_SOT23~D

13

D

PQ2
RHU002N06_SOT323

S

Z-series AC Adaptor
Connctor

PJPDC1

9

B B

GND_4

8

GND_3

7

GND_2

6

GND_1

MH1

MH2

1

Low_PWR

2

DC+_1

3

DC+_2

4

DC-_1

5

DC-_2

FOX_JPD113D-507-TR~D

PD1

DA204U_SOT323~D

PR181

33_0402_5%~D

1 2

+5VALW

PR4
10K_0402_1%~D

1 2

PR3

@

1 2

100_0402_5%~D

Follow CoE ref Rev A02 Schematics.

PWR_ID

FBMA-L18-453215-900LMA90T_1812~D

1 2

DCIN+

AC_OFF38

3

PL1

BLM11A121S_0603~D

PL2

@

PR261
47K_0402_5%

2

2

1

+5VALW

12

12

G

2

1 3

13

@

DTC115EUA_SC70~D

+3VALW

PR1

1 2

2.2K_0402_5%~D

2

3

PD23

@

DA204U_SOT323~D

1

A_PS_ID

+DC_IN

PC3

S

D

1 2

@

0.47U_1812_50V7M~D

PQ64
SI2301DS_SOT23~D

PQ63

PS_ID 37

+DC_IN

PR7

150K_0402_1%~D

PS_ID_DISABLE# 37

DC_IN+ Source

1
2
3

12

PQ_G

PQ3

4

12

PR8

100K_0402_1%~D

SI7459DP~D

5

+3.3VRTC Source

+PWR_SRC

PU1

1

IN

12

PC1

1U_0805_25V4Z~D

+DC_IN_SS

12

PC4

0.01U_0402_25V7K~D

12

12

12

PC5

PR287

10K_0603_1%~D

0.1U_0805_25V7K~D

PC6

10U_1210_25V6K

3

EN

5

OUT

4

NC

GND

MIC5235-3.3BM5_SOT23-5~D

2

+3.3VX

12

PC2

2.2U_0603_6.3V6K

PR261, PQ64, PQ63 FOR LOW POWER LATCH-OFF PREVENTION

THE POINT

NOTE: "THE POINT LOCATED
AT PS MODULE

A A

DELL CONFIDENTIAL/PROPRIETARY

Compal Elec tronics, Inc.

+DCIN

Greenland-LA2732

45 63Wednesday, December 28, 2005

1

X03

of

http://hobi-elektronika.net

5

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

4

3

2

Title

Size Document Number Rev

Date: Sheet

5

4

+3VALW

3

2

1

ESD Diodes

2

2

D D

3

3

2

2

3

Battery signals come from 20 Pin connector

PD3

P_PBAT_SMBCLK31

P_PBAT_SMBDAT31

P_PBAT_PRES#31

C C

12

PC8

P_PBAT_SMBCLK
P_PBAT_SMBDAT
P_PBAT_PRES#

P_PBAT_ALARM#

PJBAT6

7

GND

8

GND

FOX_BP02063-P7261-7F~D

BATT+
BATT+

USB_PWR

GND
BATT­BATT-

1
2
3
4
5
6

DA204U_SOT323~D@

PR10

100_0402_5%~D

1 2

+PBATT

PC7

1

1 2

+PBATT

1 2

0.1U_0805_50V7M~D

PD4

DA204U_SOT323~D@

PR11

100_0402_5%~D

1

100_0402_5%~D

1 2

PD5

1

DA204U_SOT323~D@

PR12

PR13

100_0402_5%~D

1 2

PL3

FBM-L18-453215-900LMA90T_1812~D

1 2

PL4

FBM-L18-453215-900LMA90T_1812~D

1 2

3

+3VALW

PD6

1

DA204U_SOT323~D@

PBAT_SMBCLK 37,52
PBAT_SMBDAT 37,52

PBAT_ALARM# 38P_PBAT_ALARM#31

+VCHGR

12

PR9

10K_0402_5%~D

PBAT_PRES# 38

2200P_0402_50V7K~D

KEY_BATT_FAULT_R#

PD32
DA204U_SOT323~D

B B

+5V_Pre-charge

A A

1

12

PR204

0_0402_5%~D

PR288

100K_0402_5%~D

1 2

KEY_BATT_FAULT#

JKBDK

+5V_Pre-charge

KEY_BATT_FAULT#

7

+5V_Pre-charge

8

GND

MOLEX_52610-087~D

3
2

+5VALW

GND

KB_DETECT#
+BT_5V_ALW

GND

38

KB_DETECT_R#

+5VALW +5VALW

12

PC170

0.1U_0603_25V7K~D

0.1U_0603_25V7K~D

1
2
3
4
5
6

1

12

PR205

0_0402_5%~D

KB_DETECT#

+5V_Pre-charge

1 2

PC171

38

PD33
DA204U_SOT323~D

3
2

PR289

100K_0402_5%~D

1 2

PD42

RB751V-40_SOD323~D

21

DTC115EUA_SC70~D

+5VALW

PQ41

PD34

+5VSUS

PR184

13

PC160

12

100K_0603_5%~D

G

2

12

0.1U_0603_16V7K~D

S

D

1 3

12

2

+USB_SIDE_PWR

+PWR_SRC

1

21

EC10QS04_SOD106~D

12

PC159

4.7U_0805_10V4Z~D

PQ40
SI2301BDS_SOT23~D

PC161

4.7U_0805_10V4Z~D

PJP13

1

JUMP_43X118

2

2

12

+BT_5V_ALW

PC166

10U_1210_25V6K

JUMP_43X118

12

PC164

0.1U_0805_25V7K~D

PJP14

112

12

2

+5V_Pre-charge

PD31

@

2 1

EC10QS04_SOD106~D

PC173

10U_1206_10V4Z

thermal: 0.8A
Peak: 1A
OCP: 2.5A~3A
Output_V: 5V+/-5%

@

12

PC165

Built in 130% OV
Built in FB disconnection protection

12

12

PC162

0.1U_0805_25V7K~D

220P_0603_50V8J~D

1 2

ACAV_IN16 ,19,37,52

PD43

RB751V-40_SOD323~D

L5973D013TR_HSOP8~D

8
6
4

PC169

0.022U_0603_50V4Z~D

PR200

4.7K_0603_5%~D
PR290

127K_0603_1%~D

1 2

PU10

VCC
REF
COMP

SYNC

2

2N7002_SOT23~D

21

PC252

22U_SIL104-220_2.9A_30%~D

OUT

FB

GND7INH

Thermal pad

3

9

PQ70

13

D

2

G

S

12

1

5

1 2

2 1

EC10QS04_SOD106~D

PL30

PD30

12

PC236

PR201

12

1000P_0603_50V7K

PR286

220_0402_5%

PR203

3.24K_0603_1%

12

10K_0603_1%~D

12

1

+

PC163

68U_6.3VM

2

DELL CONFIDENTIAL/PROPRIETARY

EN_KB_PRECHG_5V# 38

http://hobi-elektronika.net

5

1U_0603_10V6K~D

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

4

3

2

Title

Size Document Number Rev

Date: Sheet of

Compal Elec tronics, Inc.

Battery Conn/Kybrd_CHG

Greenland-LA2732

46 63Wednesday, December 28, 2005

1

X03

A

B

C

D

+PWR_SRC

+1.5VRUNP / +VCCP_1P05VP

1 1

1

PC14

PC15

2

0.1U_0603_25V7K~D

10U_1206_25V6M~D

TDC: 4.6A
Peak: 6.6A
OCP: 9.5A

2 2

+1.5VRUNP

3.8UH_SIL1045R-3R8F_8A

1 2

PL6

EP10QY03~D

1

PC25

2

330U_D2E_2.5VM_R9~D

PR35

0_0603_5%~D@

1 2

PJP7

1 2

PAD-OPEN 4x4m

PJP8

1 2

PAD-OPEN 4x4m

PD10

2 1

@

NC_TEST1

3 3

+1.5VRUNP

+VCCP

12

+

PC26

+VCCP_1P05VP

+1.5VP OCP
Ton=1/255k * Vo/Vin=0.31us
Toff=1/225k - 0.31us = 3.61us
DeltaI=1.5V/3.8uH * 3.61us = 1.425A

4 4

Iimit=(VILM*0.1)/Rds(on)+1/2 DeltaI
VILM=2*100/(100+76.8)=1.13V *0.1=113mV
IC 15% tolerance (min 96mV)(Typ 113mV)(max 130mV)
Iimit=(VILM)/Rds(on)+1/2 Delta I
Iimit Min=96mV/(11.5mOhm*1.4)+1/2 Delta I=6.7A
Iimit Typ=113mV/(9mOhm*1.4)+1/2 Delta I=9.5A

http://hobi-elektronika.net

12

0.1U_0805_25V7K~D

12

+1.5VRUN

A

12

PR2710K_0402_1%~D

12

PR3020K_0402_1%~D

PR260_0402_5%~D

RDSon Typ:9m Max:11.5m ohm

PC311000P_0402_50V7K~D@

VCCP_PWRGD43

RUN_ON19 , 37 , 42,43,48,49,50

1 2

PC16

PQ68

FDS6670AS_SO8~D

RUNPWROK19, 37 ,38,42,43,51

PR206

10K_0402_5%~D

12

2200P_0402_50V7K~D

8

D6D5D7D

G

S

S

S

3

2

1

578

3 6

241

@

0_0402_5%~D

0_0402_5%~D

12

12

PC221

0.022U_0603_25V7K~D

4

SI4800BDY-T1-E3_SO8~D

PR29

PR275

PQ67

@

1

12

+5VSUS

21

21

VDD

GND

23

PC21

1 2

4.7U_0805_6.3V6K~D

1.05V_BST

25

BST1

OUT1

ILIM1
ILIM2

MAX8743EEI_QSOP28~D

DH1
LX1
CS1
DL1

FB1

REF

TON

26
27
28
24
1
2

10

PC30

5
3
13

1.05V_DH

1.05V_LX

1.05V_DL

1.05V_OUT

1.05V_FB

MAX1845_REF

12

1U_0603_10V6K~D

PR22

0_0603_5%~D

1 2

PR31

0_0402_5%~D

@

1 2

PD8

RB751V-40_SOD323~D

1.5V_BST2

12

PC23

1.5V_V+

PR23

0.1U_0805_50V7M~D
0_0603_5%~D

1.5V_BST

12

1.5V_DH

1.5V_LX

1.5V_DL

1.5V_OUT

1.5V_FB

VCCP_PWRGD_1

12

MAX1845_VCC

PD12

2 1

RB751V-40_SOD323~D

12

12

PC32

1000P_0402_50V7K~D

12

PR38

33K_0402_5%~D

12

PR41

11K_0402_1%~D

13

D

S

PR21

20_0603_1%~D

1 2

12

PC22

4
19
18
17
16
20
15
14

7
11
12

6

8

9

1U_0603_10V6K~D

PU3

V+
BST2
DH2
LX2
CS2
DL2
OUT2
FB2
PGOOD
ON1
ON2
SKIP
OVP
UVP

MAX1845_VCC

22

VCC

Ton=open: out1 345Khz, out2 255Khz

2

G

PQ7
2N7002_SOT23~D

RUNPWROK 19,37,38,42,43,51

MAX8743 Current Limit Characteristics
min typ max Tolerance
ILIM=0.5V 40mV 50mV 60mV 20%
ILIM=1.0V 85mV 100m 115mV 15%

PR32

PR39

21

PD9

RB751V-40_SOD323~D

1.05V_BST2

12

PR33

76.8K_0402_1%

43K_0402_1%~D

12

PR40

100K_0402_1%~D

100K_0402_1%~D

D6D5D7D

12

4

PC24

0.1U_0805_50V7M~D

12

G

S

3

578

3 6

RDSon Typ: 9m Max: 11.5m ohm

12

VCCP OCP
Ton=T*Vo/Vin=2.8985us*1.05/19=0.16us
Toff=1/345k-Ton=2.8985-0.16=2.738us
Delta_I=2.739us*1.05V/1.5uH=1.917A
VILM=2*100/(100+43)=1.40*0.1=140mV
IC 15% tolerance (min 119mV)(Typ 140mV)(max 161mV)
Iimit=(VILM)/Rds(on)+1/2 Delta I
Iimit min =119mV/(11.5mOhm*1.4)+1/2 Delta I=8.3A
Iimit typ =140mV/(9mOhm*1.4)+1/2 Delta I=12.0A

+

PC248

68U_25V_M

2

@

8

PQ4

S

S

SI4800BDY-T1-E3_SO8~D

2

1

PL7

1.5uH_SIL104-1R5_10A_30%~D

1 2

PQ6

FDS6670AS_SO8~D

241

PC17

2200P_0402_50V7K~D

DELL CONFIDENTIAL/PROPRIETARY

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

B

C

Title

Size Document Number Rev

Date: Sheet

PL5

FBM-L18-453215-900LMA90T_1812~D

1 2

1

12

PC19

PC18

0.1U_0603_25V7K~D
10U_1206_25V6M~D

1

PC20

2

2

10U_1206_25V6M~D

TDC: 5.6A
Peak: 8A
OCPmin : 8.3A

+VCCP_1P05VP

1

PC290.1U_0805_25V7K~D

12

12

PR28

1K_0402_1%~D

PR34

1 2

0_0603_5%~D@

12

PR36

20K_0402_1%~D

Compal Electronics, Inc.

+1.5VRUNP /+VCCP_1P05VP

1

+

PC27

2

2

330U_D2E_2.5VM_R9~D

Greenland-LA2732

D

@

PC28330U_D2E_2.5VM~D

+

NC_TEST2

47 63Wednesday, December 28, 2005

X03

of

5

MAX8734 Current Limit Characteristics
min typ max Tolerance
VLIM=0.5V 40mV 50mV 60mV 20%
VLIM=1.0V 93mV 100m 107mV 7%

PL8

FBM-L18-453215-900LMA90T_1812~D

1 2

PC51

0.1U_0805_50V7M~D

PR278 0_0402_1%~D@

1
2

12

PR51

@

1 2

3

G

I1
I0

P

5

+3.3VX



1 2

0_0402_5%~D

O

+3VSRC

D

+3VALW

1

+

PC249

68U_25V_M

PC33

2

@

10U_1206_25V6M~D

5.2UH_HMU1362-5R2_11A_10%~D

1 2

RDSon Typ:5.9m Max:7.25m ohm

THERM_STP#16

4

PU9
TC7SH32FU_SSOP5~D

PQ69

FDC655BN_NL_SSOT-6~D

S

6

PR276

1 2

3

G

0_0603_5%~D

PR277

1 2

2451

0_0603_5%~D@





1

1

PC34

2

2

10U_1206_25V6M~D

PL10

12

3

PR207 0_0402_5%~D

ALWON37



PC35

1 2

SUS_ON37,42,43

RUN_ENABLE 42

SUS_ON_ENABLE 42

+PWR_SRC

D D

6TPE330ML
(SANYO 330uF 25mohm 6.3V)

thermal: 6A

330U_D3L_6.3VM_R25~D

PR52

0_0603_5%~D@

1

+

2

PC174



@

Peak: 8.4A
OCP: 10.9A

1

+

2

PC233

330U_D3L_6.3VM_R25~D

PR54

0_0402_5%~D

12

+3VSRCP

C C

PC50

NC_TEST3

B B

1 2

SUS_ON37,42,43
AUX_EN37,42

0.1U_0603_25V7K~D

+3.3VSRCP OCP
Ton=T*Vo/Vin=1/300k*3.3/19=0.578us

A A

Toff=1/300k-Ton=2.752us
Delta_I=2.752us*3.3V/5.2uH=1.75A
VILM=2*100/(100+140)=1.177 *0.1=83.3mV
IC 7% tolerance (min 77.5mV)(Typ 83.3mV)(max 89.1mV)
Iimit=(VILM)/Rds(on)+1/2 Delta I



Iimit min =77.5mV/(7.25mOhm*1.4)+1/2 Delta I=8.52A
Iimit typ =83.3mV/(5.9mOhm*1.4)+1/2 Delta I=10.9A

http://hobi-elektronika.net

5

4

12

12

PC36

0.1U_0805_50V7M~D

2200P_0402_50V7K~D

PQ9

FDS8880_SO8~D

241

PQ11

FDS6676AS_SO8~D

241

PR208 0_0402_5%~D

1 2

4

PC41

@

578

3 6

578

3 6

PR69 1K_0402_5%~D

1 2

PR63

ILIM5
ILIM3
PRO#
TON

PR67

0_0402_5%~D





12

PC42

0.1U_0603_25V7K~D

4.7U_1206_25V6K~D

PC47

0.1U_0603_25V7K~D

FB3

1 2

2K_0402_1%~D

1 2

240K_0402_5%~D

PR58

174K_0402_1%

1 2

PR65

1 2

1 2

100K_0402_1%~D

3

DC/DC +3V/ +5V

200Khz Freq: +5VSUSP300Khz Freq: +3VSRC

PR42

PR43

0_1206_5%~D

12

12

PR56

REF

PR59

PR66

@

1 2

PC54

1 2

140K_0402_1%~D

1 2

100K_0402_1%~D

VCC_MAX8734

1 2

0_1206_5%~D

PC45

PR48
0_0603_5%~D

1 2

12

1000P_0402_50V7K~D@

VCC_MAX8734

PR60

100K_0402_5%~D

1 2

@

13

2

G

@

THERM_STP#

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

1U_0603_10V6K~D

BST3
DH3
LX3

PC53

D

S

47_0603_5%~D

12

20
17

28
26
27
24
22

25

12

10U_1206_6.3V7K~D

PR62

0_0402_5%~D

PQ65

16

RHU002N06_SOT323

PR44

PU4

6

7
3

4

+3VALW

1 2

PR68

1 2

@

V+
VCC
SHDN
BST3
DH3
LX3
DL3
OUT3
FB3
ON3

ON5
LDO3

12

PR64

0_0402_5%~D

0_0402_5%~D

3

12

1

PD13

2

3

RB717F_SOT323~D

SKIP

MAX8734EEI_QSOP28~D

12

MAX8734_SKIP#

+5VALW

PC44

PC46

0.1U_0603_25V7K~D

1 2

12

+3VSRCP

VCC_MAX8734

12

1U_0603_10V6K~D

PR55
100K_0402_1%~D

1 2

SUSPWROK_5V50

LDO5
BST5

DH5

LX5
DL5

OUT5

N.C.

FB5

PRO

ILIM5
ILIM3

REF
TON

GND

PGOOD

PR57

@

0_0402_5%~D

0_0402_5%~D@

BST_5BST_3

PR61

18
14
16
15
19
21

1
9
10

11
5
8
13
23
2

12

12

PC43

4.7U_1206_25V6K~D

PR45

0_0603_5%~D

BST5

1 2

DH5
LX5
DL5

FB5DL3
PRO#

ILIM5
ILIM3
REF

TON

PC52

1U_0805_10V7K~D

12

RUN_ON 19,37,42,43,47,49,50

+5VSUSP OCP
Ton=T*Vo/Vin=1/200k*3.3/19=1.316us
Toff=1/200k-Ton=3.684us
Delta_I=2.752us*3.3V/5.2uH=3.54A
VILM=2*100/(100+174)=1.177 *0.1=73mV
IC 7% tolerance (min67.89mV)(Typ 73mV)(max 78.11mV)
Iimit=(VILM)/Rds(on)+1/2 Delta I
Iimit min =67.8mV/(7.25mOhm*1.4)+1/2 Delta I=8.52A
Iimit typ =73mV/(5.9mOhm*1.4)+1/2 Delta I=10.5A

2

Follow CoE ref Rev A04 Schematics.

12

PC40

PC39

0.1U_0805_50V7M~D

2200P_0402_50V7K~D

578

PQ8

FDS8880_SO8~D

3 6

578

3 6

241

241

PL9

5.2UH_HMU1362-5R2_11A_10%~D

1 2

3

PQ10

FDS6676AS_SO8~D

RDSon Typ:5.9m Max:7.25m ohm

+5VSUSP

+3VSRCP

PAD-OPEN 4x4m

PJP10

1 2

PAD-OPEN 4x4m

PJP9

1 2

(4A,160mils ,Via NO.= 8)











DELL CONFIDENTIAL/PROPRIETARY

Title

Size Document Number Rev

2

Date: Sheet

1

12

1

PC37

2

10U_1206_25V6M~D

1

PC38

2

10U_1206_25V6M~D

thermal: 6.3A
Peak: 8.4A
OCP: 10.5A

PR47

0_0402_5%~D

1 2

@

PR50

1 2

0_0402_5%~D

6TPE330ML
(SANYO 330uF 25mohm/2 6.3V)

+5VSUS

+3VSRC







Compal Elec tronics, Inc.

+3.3V/+5V

Greenland-LA2732

PC49

0.1U_0805_50V7M~D

PR53

1 2

0_0603_5%~D@

1

12

48 63Wednesday, December 28, 2005

PC148

10U_1206_25V6M~D

PC48

330U_D3L_6.3VM_R25~D

NC_TEST4

1

2

1

2

+

+5VSUSP

PC150

of

1

2

330U_D3L_6.3VM_R25~D

+

X03

5

D D

4

3

2

1

fz=550k*(1-D)=500*(1-12/19)=184Khz
Toff=(1-12/19)/184Khz=2us
Delta I=12V*2us/10uH=2.4A
OCP(min)=85mV/15m ohm - 2.4A/2 =4.5A
OCP(tyo)=100mV/15m ohm-2.4A/2=5.5A

Reserve Jump for EMI test

+PWR_SRC

C C

B B

PJP1

112

JUMP_43X118

PR170

2

1 2

0_1206_5%~D

PC172

0.1U_0603_25V7K~D

RUN_ON19 , 37 , 42,43,47,48,50

+3.3VX

1

12

+

PC237

@

2

15U_D2_25M_R90~D

PR73

0_0603_5%~D

PR75 0_0603_5%~D@

4.7U_0805_6.3V6K~D

12

PC140

12

12

PC143

PC142 from 4.7u 1210 25V change to 4.7U 1206 25V

12

PC142

4.7U_1206_25V6K~D

8

10

IN

VH

EXT

CS

OUT

FB

GND

MAX1745EUB_10UMAX~D

1

MAX1745_G

9

6
5

4

10U_1210_25V6K

12

12

PC141

1U_0805_25V4Z~D

PC144

12

0.1U_0402_10V6K~D

PU5

7

SHDN

2

VL

3

REF

36

241

PQ37

SI4835DY_SO8~D

Note: PL11 from 22uH chnage to 10uH

+12V_PHASE

578

EC31QS04~D

10U_PLC1045-100_4.9A_20%

PD22

2 1

1 2

OCP(Max)=115mV/15m ohm-2.4A/2=6.5A

(+12V+-5%,2A)

PL11

PR171

0.015_2512_1%~D

1
2

PC145

270P_0402_50V7K~D

+12VP

4
3

12

12

PR172

182K_0603_1%~D

PR173

1 2

21K_0603_1%~D

PC146

1

+

2

47U_D3L_16VM_R70~D

TDC: 2.5A
Peak: 3.5A
OCP: 4.5A

PC147

PC139

1

1

+

+

@

2

2

47U_D3L_16VM_R70~D

47U_D3L_16VM_R70~D

T520V476M016AS
(KEMET 47uF 70mohm 16V)

+12VP

A A

http://hobi-elektronika.net

5

4

3

PJP5

112

JUMP_43X118

(2A,80mils ,Via NO.= 4)

2

+12VALW_SLND

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

12VRUN
Greenland-LA2732

49 63Wednesday, December 28, 2005

1

X03

+PWR_SRC

5

Reserve Jump for EMI test

1 2

4

3

2

1

Follow CoE ref Rev A04 Schematics.

PL12FBM-L18-453215-900LMA90T_1812~D

1

+

68U_25V_M

2

PC70

10U_1206_25V6M~D

PC250

D D

@

thermal: 8.3A
Peak: 10.4A
OCP: 11.8A

+1.8VSUSP

PC76

C C

330U_D2E_2.5VM

2R5TPE330M0
(SANYO 330uF 9mohm 2.5V)

B B

Vtrip=7.9kX10uA=79mV
fs=400kHz
Ton=T*Vo.Vin=0.25us
Toff=2.25us
delta I=2.25*1.8/1.4=2.9A

A A

IC 10% TOL: 70mV
RDS(on)max=7.6mohm
Iocp=Vtrip/RDS+1/2 delta I=11.8A (temperature factor has been compensated inside IC)









http://hobi-elektronika.net

Keep using this (used in Turtuga)

1.4UH_CEP125-1R4_15.5A_20%~D

PC77

1

12

+

PC78

2

12

0.1U_0805_25V7K~D

Internal or external feedback choice







5

100P_0402_50V8K~D@

12

PR85

105K_0603_1%~D

@

12

PR88

75K_0603_1%~D

@

+5VSUS

PR174

PR89

12

PC71

PL13

3

0_0603_5%~D

1 2
12

PR87

4.7_0603_5%~D

0_0402_5%~D

1 2

10U_1206_25V6M~D

12

12

PC72

PR84

3.3_1206_5%~D

@

PC83

1000P_0603_50V7K~D

@

12

0.1U_0805_25V7K~D

D8D7D6D

S1S2S3G

3 6

241

5

4

578

12

12

PQ13

SI4392DY_SO8~D

PQ14

SI4856ADY_SO8~D

RDSon Typ:6.3m Max: 7.6m ohm

PC85

1 2

4.7U_0805_6.3V6K~D

SUSPWROK_1P8V43

SUSPWROK_5V48

RUN_ON19,37,42,43,47,48,49

4

+5VSUS

21

@

PD40, PC220 and PR264 for match second source consideration

PD40

RB751V-40_SOD323~D

0.1U_0805_50V7M~D

1.8V_LX

+3VSUS

PR90

1 2

100K_0402_5%~D

PR210
0_0402_5%~D

PC74

PR86

7.87K_0402_1%~D

12

1 2

PR209
0_0402_5%~D

12

PR82

2.2_0603_5%~D

12

PC84

1000P_0603_50V7K~D

12

12

PU6

VBST

DRVH

LL

DRVL

PGND

CS

V5FILT

PGOOD

S5

S3

NC

V5IN

15

PC149

1 2

22

12

21

20

19

18

16

14

13

11

10

7

NC

CS_GND

Thermal pad

TPS51116RGE_QFN24~D

17

25

CS_GND is CS sense "+" terminal should
connect to source of bootom MOSFET

4.7U_0805_6.3V6K~D

VLDOIN

VTT

VTTGND

VTTSNS

GND

MODE

VTTREF

COMP

VDDQSNS

VDDQSET

23

24

1

2

3

4

5

6

8

9

PR264

PR285

0_0402_5%~D

+1.8VSUSP

+0.9V_DDR_VTTP



PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

3

2

+PWR_SRC

12

@

1M_0402_5%~D

12

@

12

PC86

1 2

0.033U_0603_25V7M~D

PJP11

2

112

JUMP_43X79

VTTSNS pin that the sense trace
need separated with power pass trace
and close to terminal of output cap.

+1.8VSUSP

Thermal: 1.5A

PR263

0_0402_5%~D

PC220

1000P_0603_50V7K~D

12

PC80

PC79

12

10U_1206_6.3V6M~D

V_DDR_MCH_REF 10,17,18

PJP3

2

112

JUMP_43X118

PJP4

2

112

<>

JUMP_43X118

PJP12

2

112

JUMP_43X118

+0.9V_DDR_VTTP

12

12

PC81

10U_1206_6.3V6M~D

(12A,480mils ,Via NO.=24)

(1.2A,48mils ,Via NO.=3)

+0.9V_DDR_VTT

PC82

10U_1206_6.3V6M~D

+1.8VSUS

Peak: 3A
OCP: 3.8A

12

0.1U_0805_25V7K~D

DELL CONFIDENTIAL/PROPRIETARY

Title

Size Document Number Rev

Date: Sheet

Compal Elec tronics, Inc.

+1.8V / +0.9V
Greenland-LA2732

50 63Wednesday, December 28, 2005

1

X03

of

8

7

6

5

4

3

2

1

Follow CoE ref Rev A03 Schematics.

IMVP-6 solution for Merom: 3-phase/44A

H H

+PWR_SRC

12

PR100

7.32K_0603_1%

12

PR101

@

PR107

PC186

PC189

390P_0402_50V7K

1.91K_0603_1%~D

RUNPWROK19,37,38,42, 43,47

1 2

PR110

28.7K_0603_1%~D

12

0_0402_5%~D

DPRSLPVR10,23

PH1

@

100K_0603_5%_TH11-4H104FT

0_0402_5%~D

IMVP_PWRGD

4700P_0402_25V7K

PC187
18P_0402_50V8K

1 2

PR273
499_0402_1%

1 2

H_DPRSTP#7,22

PR108

1 2

G G

Thermistor PH1 should be placed
close to the hot spot of the VR

F F

E E

D D

C C

B B

A A

+3VRUN

12

12

PR106

IMVP_PWRGD23,43

CLK_ENABLE#6

1.91K_0603_1%~D

PC183

1000P_0402_50V7K~D

1 2

PC185
330P_0402_25V8K

12

PR109

1.65K_0402_1%

NOTE:PR111 is reserved for loop
gain measurement purpose

PC188

12

0.015U_0402_16V7K

220P_0402_50V7K~D

12

1 2

VCCSense 8

VSSSense 8

H_PSI#8

VID68
VID58
VID48
VID38
VID28
VID18

VID08

12

PC184

12

12

PC180

0.01U_0402_25V7K~D

PR236 0_0402_5%~D

1 2

PR235 0_0402_5%~D

1 2

PR234 0_0402_5%~D

PU11

1

EN

2

PWRGD

3

PGDELAY

4

CLKEN

5

FBRTN

6

FB

7

COMP

8

SS

9

STSET

10

DPRSLP

PR241

@

1 2

0_0402_5%~D

1 2

ILIMIT11RRPM

PR115

1 2

140K_0603_1%

PC218

@

+5VRUN

12

PR103
10_0603_5%

PC181

0_0402_5%~D

PR104

0_0402_5%~D

39

12

12

1U_0805_25V4Z~D

12

1 2

0_0402_5%~D

12

12

12

PR2390_0402_5%~D

PR2380_0402_5%~D

PR2370_0402_5%~D

ADP3207JCP-RL_LFCSP -40

RT14RAMPADJ15LLSET16CSREF17CSSUM18CSCOMP

VRPM

13

1 2

1 2

ADP3207_RAMPADJ

154K_0603_1%~D

PR116 56.2K_0603_1%

PR117

1 2

PR118 280K_0603_1%

1000P_0402_50V7K~D

12

12

PC194

PR243 0_0402_5%~D

1000P_0402_50V7K~D

+PWR_SRC

PC195

1000P_0402_50V7K~D

@

PR255 0_0402_5%~D

NOTE:Populate PR255 for 2 phase,

12

PR102

PR233

12

PR2400_0402_5%~D

VID634VID535VID436VID337VID238VID040VID1

ADP3207_CSREF

12

De-POP PR255 for 3 phase

NOTE:Populate PR102 and de-pop PR104 for 3 phase,

12

De-POP PR102 and populate PR104 for 2 phase.

ADP3207_VCC

32

33

31

PSI

VCC

DPRSTP

TTSENSE

VRTT

PWM1
PWM2
PWM3

GND

20

19

12

ADP3207_CSSUM

PC219

PC192

@

470P_0603_50V8J~D

1 2

2

G

ADP3207_TTSENSE

30

ADP3207_VRTT

29

ADP3207_#DCM

28

DCM

ADP3207_#OD

27

OD

ADP3207_PWM1

26

ADP3207_PWM2

25

ADP3207_PWM3

24

PR129 0_0402_5%~D

23

SW1
SW2
SW3

12

470P_0603_50V8J~D

PR130 0_0402_5%~D

22

PR256 0_0402_5%~D

21

Place PH2 close to
output inductor of phase 1.

12

PC193

1 2

1800P_0402_50V7K

PR121

147K_0402_1%~D

113K_0603_1%

113K_0603_1%

113K_0603_1%

13

D

S

PR124

1 2

71.5K_0402_1%

PR127

PR128

PR257

PQ42
2N7002_SOT23~D

IMVP6_PROCHOT# 38

PH2

RUNPWROK19,37,38,42, 43,47

@

12
12
12

12

220K_0402_5%_TH11-4H104FT

12

12

12

http://hobi-elektronika.net

8

7

6

5

+5VRUN

+5VRUN

+5VRUN

PD37

RB751V-40_SOD323~D

12

PC196

PU12

4.7U_0805_10V6K

1

IN

2

SD#

3

DRVLSD#

4

CROWBAR

5

VCC

ADP3419JRM_MSOP-10

PD38

RB751V-40_SOD323~D

12

PC198

4.7U_0805_10V6K
PU13

1

IN

2

SD#

3

DRVLSD#

4

CROWBAR

5

VCC

ADP3419JRM_MSOP-10

PD39

RB751V-40_SOD323~D

12

PC217

4.7U_0805_10V6K
PU14

1

IN

2

SD#

3

DRVLSD#

4

CROWBAR

5

VCC

ADP3419JRM_MSOP-10

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

4

AD3419_BST1

12

12

PR131

PC197

1 2

2.2_0603_5%

0.33U_0603_10V7K

10

BST

AD3419_DRVH1

9

DRVH

8

SW

7

GND

6

DRVL

AD3419_BST2

12

10

BST

9

DRVH

8

SW

7

GND

6

DRVL

AD3419_BST3

12

10

BST

9

DRVH

8

SW

7

GND

6

DRVL

AD3419_DRVL1

PR132

1 2

2.2_0603_5%

AD3419_DRVH2

AD3419_DRVL2

PR247

1 2

2.2_0603_5%

AD3419_DRVH3

12

PC199

0.33U_0603_10V7K

12

PC216

0.33U_0603_10V7K

AD3419_DRVL3

AD3419_SW1

AD3419_SW2

AD3419_switch

5

D

4

G

S3S

S

2

1

578

9

3 6

241

5

D

4

G

S3S

S

2

1

578

9

3 6

241

5

D

4

G

S3S

S

2

1

578

9

3 6

241

3

PQ53

FDS7088SN3_SO8~D

PQ57

FDS7088SN3_SO8~D

PQ61

FDS7088SN3_SO8~D

STSJ50NH3LL

PQ55

STSJ50NH3LL

PQ59

STSJ50NH3LL

PQ62

1

+

PC239

PC253

2

0.1U_0805_25V7K~D

15U_D2_25M_R90~D

1
2

1

+

PC240

@

2

15U_D2_25M_R90~D

1
2

1

+

+

PC243

@

2

@

15U_D2_25M_R90~D

PL34

1
2

FBM-L18-453215-900LMA90T_1812~D

12

12

PC255

PC254

@

@

0.1U_0805_25V7K~D

1000P_0402_50V7K~D

Reserved for EMI

4
3

1

+

PC241

@

2

PC256

@

15U_D2_25M_R90~D

Reserved for EMI

+VCC_CORE

4
3

Reserved for EMI

12

12

PC258

PC259

@

0.1U_0805_25V7K~D

1000P_0402_50V7K~D

+VCC_CORE

4
3

CPU_PWR_SRC

PC202

PC203

1

12

+

PC238

@

@

10U_1210_25V6K

2

15U_D2_25M_R90~D

PL32

12

12

PC208

PC204

10U_1210_25V6K

10U_1210_25V6K

PL33

12

0.45U_MPC1040LR45_27A_20%~D

1

12

PC242

PC210

@

2

15U_D2_25M_R90~D

10U_1210_25V6K

PC201

0.1U_0805_25V7K~D

PR248

@

2.7_1206_5%~D

12

1000P_0402_50V7K~D

1 2
12

2.7_1206_5%~D

12

PC215

PR250

2.7_1206_5%~D

12

1 2
12

PC211

@

PC207

0.1U_0805_25V7K~D

PC212

@

0.01U_0805_50V7K~D

CPU_PWR_SRC

12

0.1U_0805_25V7K~D

1 2
12

PC213

@

0.01U_0805_50V7K~D

12

10U_1210_25V6K

0.45U_MPC1040LR45_27A_20%~D

0.01U_0805_50V7K~D

CPU_PWR_SRC

12

0.45U_MPC1040LR45_27A_20%~D

PC209

10U_1210_25V6K

12

PC200

1000P_0402_50V7K~D

PC206

PR249

@

PC214

1000P_0402_50V7K~D

@

DELL CONFIDENTIAL/PROPRIETARY

Title

Size Document N u mb er Rev

Date: Sheet

2

Compal Electronics, Inc.

+VCORE
Greenland-LA2732

12

PC231

220U_CE-AX_25V_M ~D

@

+VCC_CORE

PR251

10_0402_1%~D

1 2

12

@

1000P_0402_50V7K~D

PR252
10_0402_1%~D

1 2

PR253

10_0402_1%~D

1 2

51 63Wednesday, December 28, 2005

1

PL14

1 2

1

+

2

12

PC257

0.1U_0805_25V7K~D

of

X03

5

4

3

2

1

Follow CoE ref Rev A09 Schematics.

+DC_IN discharge path

D D

+DC_IN_SS

12

13

D

S

12

PR262
10K_0402_1%~D

PR188

15.8K_0402_1%~D

12

PC93

PR191

10K_0402_1%~D

12

0.01U_0402_25V8K

ADAPT_TRIP_SEL38

@

PR161

10K_0402_1%~D

2

G

12

0.1U_0402_10V7K~D

12

PR291

100_0402_1%

12

PR281

68K_0402_1%~D

13

D

S

12

PC113

10U_1210_25V6K

C C

B B

A A

PR187

49.9K_0402_1%~D

12

PC90

0.01U_0402_25V7K~D

12

PBAT_SMBCLK37,46

PBAT_SMBDAT37,46

http://hobi-elektronika.net

ACAV_IN16,19,37,46

PR186

1 2

365K_0402_1%~D

MAX8731_LDO

PR189

0_0402_5%~D

1 2

ACAV_IN16,19,37,46

+5VALW

0.1U_0402_10V7K~D

5

PC91

PQ30

2N7002_SOT23~D

PR259

16.2K_0603_1%~D

12

PR266

0_0402_5%

1 2

2

G

1 2

1 2

PC224

PQ27

5

PQ29

@

2N7002_SOT23~D

PR144

10K_0402_1%~D

12

PR190

4.7K_0402_5%~D

12

PC95

PC94

0.01U_0402_25V7K~D

0.01U_0402_25V7K~D

12

PR267

20K_0402_1%

12

PR268

13K_0402_1%

12

PR269

10K_0402_1%

SI7459DP~D

4

12

PC92

1U_0805_25V4Z~D

12

PC96

0.01U_0402_25V7K~D

12

PC225

0.01U_0402_25V8K

4

1
2
3

PR145

100K_0402_5%~D

12

12

12

PC97

1U_0603_10V6K~D

+SDC_IN CHG_IN

12

+DC_IN

12

PR283

0_0402_5%~D

12

PC98

0.1U_0402_10V7K~D

Smart Charger

12

PR282

@

0_0402_5%~D

PU8

22

DCIN

2

ACIN

13

ACOK

11

VDD

10

SCL

9

SDA

14

BATSEL

8

IINP

6

CCV

5

CCI

4

CCS

3

REF

7

DAC

12

GND

12

PC226

100P_0402_50V8K

+PWR_SRC

PR142

0.01_2512_1%~D

1
2

1

MAX8731_TQFN28~D

PC227

100P_0402_50V8K

4
3

27

28

26

VCC

CSSP

CSSN

ACSNS

BST

LDO

DHI

LX

DLO

PGND

CSIP

CSIN
FBSA
FBSB

12

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DIS CLOSE D T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

0_0603_5%~D

25

1 2

MAX8731_LDO

21

24
23

1 2

PC232

1 2

220P_0402_50V7K~D

20

19
18

17
15
16

12

0.01U_0603_25V

@

649K_0402_1%

1 2

4

2

G

IN-

3

IN+

P

8

+5VALW

3

PR192

PR274

1_0603_5%

PC234

PR270

O

PC228

PC111

0.1U_0603_25V7K~D

12

+VCHGR

PU16A
LM393DR_SO8~D

1

12

100P_0402_50V8K

PL17

PL18

PR193

2 1

12

12

12

PC99

1U_0603_10V6K~D

1 2

PC100

1 2

33_0603_1%~D

1U_0603_10V6K~D

1 2

PC235

1 2

3300P_0402_50V7K~D

@

FBM-L18-453215-900LMA90T_1812~D

FBM-L18-453215-900LMA90T_1812~D

12

PD11

RB751V-40_SOD323~D

PR280

100_0402_5%~D

PC229

0.01U_0402_25V8K

1

+

PC251

68U_25V_M

2

@

D6D5D7D

4

G

S

3

578

PC130

1 2

1000P_0402_50V7K~D

@

+5VALW +3VALW

12

PR271

100K_0402_1%~D

12

PC230

10P_0402_50V8J~D

3 6

PR272

100K_0402_5%~D

2

G

8

PQ31

S

S

2

1

241

12

13

D

PQ66

S

RHU002N06_SOT323

PQ28
SI7459DP~D

1
2
3

4

12

8

D6D5D7D

4

G

S

HAT2198R-EL-E_SO8~D

FDS6670AS_SO8~D

S

3

2

1

5.6U_CEP125-5R6MC_8.8A_20%~D

PQ33

ADAPT_OC 38

2

5

+DC_IN_SS

PR260
470K_0402_5%~D

1 2

PL19

PC1150.1U_0805_25V7K~D

+VCHGR_L+VCHGR_B

5
6

PC245

@

15U_D2_25M_R90~D

0.01_2512_1%~D

1
2

+5VALW

8

P

IN+
IN-

G

4

1

+

@

2

O

12

PC1142200P_0402_50V7K~D

@

PQ32

S

HAT2198R-EL-E_SO8~D

1 2

3

ADAPTER (W) TRIP current PR270 PR267 PR268 PR269 PR281
150W 7.44 649k 20k 13k 10k 66.1k

1

+

PC247

PC246

@

2

15U_D2_25M_R90~D

15U_D2_25M_R90~D

PR155

4
3

7

PU16B
LM393DR_SO8~D

+VCHGR

1

+

2

PC126

0.1U_0603_25V7K~D

12

12

12

PC116

PC117

PC118

10U_1210_25V6K

10U_1210_25V6K

10U_1210_25V6K

+VCHGR

12

12

PC127

1 2

PC128

10U_1210_25V6K

10U_1210_25V6K

DELL CONFIDENTIAL/PROPRIETARY

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

Charger

Greenland

52 63W e dn e s d a y, D e ce mber 28, 2005

1

of

PD41

12

+5VALW

PR284

1K_0603_5%

PC129

21

1 2

10U_1210_25V6K

X02

5

4

3

2

1

FD4

1

SMD40M80@

FD13

1

SMD40M80@

FD22

1

SMD40M80@

Fiducial Mark

FD5

1

SMD40M80@

1

SMD40M80@

1

SMD40M80@

SMD40M80@

FD14

SMD40M80@

FD23

FIDUCAL@

PCB

BARE PCB

1

NC

EAX20_LA-2732P_REV0_M/B~D

CABLE13

1

NC

SPK-CIR cable

CABLE11

1

NC

Internal MIC cable

CABLE3

1

NC

BlueTooth Cable

CABLE7

1

1

1

FD6

FD15

FD24

Cable

Cable

Cable

FD7

1

SMD40M80@

FD16

1

FIDUCAL@

FD25

1

FIDUCAL@

FD8

1

SMD40M80@

FD17

1

FIDUCAL@

JCOIN

1

NC

Battery

CABLE12

1

NC

Hing sensor cable

CABLE4

1

NC

Media Sensor BD to Motor BD Cable

CABLE8

FD9

1

SMD40M80@

FD18

1

FIDUCAL@

BARE PCB

Cable

Cable

FD10

1

SMD40M80@

FD19

1

SMD40M80@

FD11

1

SMD40M80@

FD20

1

SMD40M80@

H34
H_C276D110

D D

1

Solenoid Standoffs

H19
H_C276D150

1

C C

B B

MDC Standoffs

@

@

@

H35
H_C276D110

H22
H_C276D150

H1
H_C236D98

1

H15
H_C315D118

1

H27
H_C394B433D118

1

1

H5

@

H_C315D118

1

H16

@

H_C300D173x134

1

H28

@

H_C394B433D118

H10

@

H_C354D150

H6

@

H_C315D118

1

H23

@

H_C394D118

1

H29

@

H_C394B433D118

1

H8
H_C276D110

1

H7

@

H_C394D118

H24

@

H_S288D118

H30

@

H_C354D118

1

1

H17

@

H_C354D150

1

H9
H_C276D110

H11

@

H_C354D150

1

CPU Screw holes

H20
H_C276D110

1

1

VGA Standoffs

H12

@

H_C315D118

1

H25

@

H_C315D118

1

H31

@

H_C315D118

H18

@

H_C354D150

H14

@

H_C315D118

1

H26

@

H_C394B433D118

1

H32
H_C335D161

1

H21
H_C276D110

1

CLIP1

MDC_CLIP

1

FFC1

FFC

1

NC

KB CONTACTS FFC

CABLE1

Cable

1

NC

20.1" LCD HINGE Cable

CABLE5

FD3

1

FIDUCAL@

FD12

1

SMD40M80@

FD21

1

SMD40M80@

EMI Clip

CLIP4

EMI_CLIP

1

@

FPC1

1

NC

PATA ODD FPC

CABLE2

1

NC

20.1" LCD HINGE PLUS Cable

CABLE6

FPC

Cable

1

H33

@

H_C236D98

A A

1

1

EXPCG

CAGE

1

NC

EXPRESS CARD CAGE

1

1

CFCG

1

NC

CF CARD CAGE

CAGE

1

1

1

NC

MDC-RJ11 CABLE

CABLE9

1

NC

Motor Cable

Cable

Cable

1

NC

Media Board Cable

CABLE10

1

NC

SATA Cable

Cable

Cable

1

NC

Audio USB Cable

Cable

1

NC

SATA Cable

Cable

DELL CONFIDENTIAL/PROPRIETARY

Compal Elec tronics, Inc.

PAD and Standoff

Greenland-LA2732P

53 63Wednesday, December 28, 2005

1

X03

http://hobi-elektronika.net

5

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

4

3

2

Title

Size Document Number Rev

Date: Sheet of

5

Version Change List ( P. I. R. List ) for EE Circuit

Solution Description Rev.Page#

TitleItem Issue DescriptionDa te

Request
Owner

4

3

2

1

D D

29 CoE update 2005/08/22 M07-MDC-A03 CoE update:

1

Dell CoE

This change is due to circuit issues seen by the Travis platform regarding the varying
Vgs threshold of different 2N7002 FETs.

change Q74 to BSS138 from 2n7002.
The BSS138 FET has a Vgs threshold of 1.3V (typical) and 1.6V (max). This
should ensure proper operation of the circuit.
This change i s o n ly required by platforms using the disable circuit.

38 5011 Library correct 2005/08/22

2

Willis

5011 USB port 1,3 +/- pin mistake on early version datasheet, we correct it. U50: 5011

pin 13: USBDP1, pin 12: USBDN1
pin 19: USBDP3, pin 18: USBDN3

3

29 2005/08/23 Dell/CompalJWIRE Conn. Ch a ng e Change JWIRE conne ct or fr om 5pins include GND pin to 2 pins connetcor. Change JWIRE connector to JST_BM02B-SRSS-TB1~D from

JST_BM03(5-2.3)B-SRSSTB1LFSN~D

4

37 CoE update 2005/08/23 Dell CoE M07-EC-Inspiron-A04 CoE update:

Enable SPI ROM Boot Block are write enable on developer phase, disable it on
when production.

5

10 CoE update 2005/08/23

Dell CoE M07-945pm_gm_m07_a02 Update

Delete R611, R612, Add Test point T33, T36 only X01B

Delete reserved pull down resistor on M_OCDCOMP0, M_OCDCOMP1. Intel

C C

6

10 CoE update 2005/08/23 Dell CoE M07-945pm_gm_m07_a02 Update

DG1.0 no require.

Add C738 (0.1uF) but depop it now. X01B

Add 0.1uF on V_DDR_MCH_REF (total 2pcs)

7

42 CoE update 2005/08/23 Dell CoE M07-sy st em power sequence a02 Update

Add +5VRUN, +5VSUS, +3VSUS clamp ckt

1. Delete R263(100K 0402), R197 (@100K 0402), Q28 (@2N7002)

2. Change R266/1 to +5VALW from +PWR_SRC

3. Change Q27/2 to SUS_ON_5V#

4. Add Q17 (@2N7002), Q28 (@2N7002), Q33(@2N7002), R134 (@22 0805),
R197 (@22 0805), R206 (@22 0805), depop them.

8

37,41CoE update 2005/08/25 Dell CoE Change net name same as CoE, GG issue list item 33 X01C

Change net name from LID_CL# to LID_CL_SIO#.
Change net name from LID_CL_R# to LID_CL#

9

6, 37 CoE update 2005/08/25 Dell CoE Change net name same as CoE, GG issue list item 34

10

CoE update 2005/08/25 Dell CoE Change net name same as CoE, GG issue list item 35 Change net name from ICHO_ECI_SPI_DATA to ICH_EC_SPI_DIN

37

11

B B

37 CoE update 2005/08/25 Dell CoE Change net nam e s a me as C oE , G G i ss u e l i st i t em 36 Change net name from FCLK to EC_FLASH_SPI_CLK

Change net name from CK_33M_SIOPCI to CLK_PCI_SIO. X01C

Change net name from ICHI_ECO_SPI_DATA to ICH_EC_SPI_DO

Change net name from FDATAIN to EC_FLASH_SPI_DIN
Change net name from FDATAOUT to EC_FLASH_SPI_DO

12

37, 42 CoE update 2005/08/25 Dell CoE Change net name same as CoE, GG issue list item 37 Change net name from VAUX_EN to AUX_EN X01C

13

38, 40 CoE update 2005/08/25 Dell CoE Chan ge n et n am e sa m e a s C o E, G G i s su e l i st i t em 38 Change net name from EXPR_CPPE# to CPPE# X01C

14
15

38 CoE update 2005/08/25 Dell CoE Change net name same as CoE, GG issue list item 39 Change net name f r o m IRRX to CIRRX X01C

22, 26 CoE update 2005/08/25 Dell CoE Cha ng e n e t na m e s a me a s C o E , GG issue list item 68, 78, 80, 82, 84 Rename ICH_AC_SDIN0 to ICH_AZ_CODEC_SDIN0

Rename AUDIO_AC_BITCLK to ICH_AZ_CODEC_BITCLK
Rename ICH_RST_AUDIO# to ICH_AZ_CODEC_RST#
Rename ICH_SYNC_AUDIO to ICH_AZ_CODEC_SYNC
Rename ICH_SDOUT_AUDIO to ICH_AZ_CODEC_SDOUT

16

22, 29 CoE update 2005/08/25 Dell CoE Cha ng e n e t na m e s a me a s C o E , GG issue list item 69, 79, 81, 83, 85 Rename ICH_AC_SDIN1 to ICH_AZ_MDC_SDIN1

Rename MDC_AC_BITCLK to ICH_AZ_MDC_BITCLK

A A

Rename ICH_RST_MDC# to ICH_AZ_MDC_RST#
Rename ICH_SYNC_MDC to ICH_AZ_MDC_SYNC
Rename ICH_SDOUT_MDC to ICH_AZ_MDC_SDOUT

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD

http://hobi-elektronika.net

5

4

PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

3

X01A

X01ACompal

X01B

X01Bpop R766 100Kohm, depop R767

X01B

X01C23,

X01C

X01C

X01C

DELL CONFIDENTIAL/PROPRIETARY

Title

Size Document Number Rev

2

Date: Sheet

Compal Electronics, Inc.

EE-Changed-List History

Greenland-LA2732P

54 63W ed nes da y, De ce mber 28, 2005

1

X03

of

5

Version Change List ( P. I. R. List ) for EE Circuit

Solution Description Rev.Page#

TitleItem Issue DescriptionDa te

Request
Owner

4

3

2

1

D D

23, 25 CoE update 2005/08/25

17
18

6,

CoE update 2005/08/25 Dell CoE Change net name sa m e a s Co E , G G is s ue li s t it e m 8 9 , 90 Rename CK_1 4M _I C H t o CLK_ICH_14M

23

19

34, 35 GG Issue fix e d 2005/08/25 Soo Lee Modify pin numbe r as s i gnment for NC1 to NC7. Do match the Ricoh reference

Dell CoE

Change net name same as CoE, GG issue list item 88 Rename IDE_RST_MOD to IDERST_MOD X01C

Rename CK_48M_ICH to CLK_ICH_48M

schematic. GG issue list item 96.

20

10, 12 Mohammed Add MCH CFG10, 12 strapping pins reserved pull down resistors. GG issue list

GG Issue fixed

2005/08/25 X01C

Add R622, R624, depop them.

item 104

21

20

GG Is s u e fixed 2005/08/25 Mohammed change the ESD diodes (of D3, D2, D1) protection powerr rail to +3VRUN. GG

Change D3, D2, D1 pull up to +3VRUN from +3VSUS. X01C

Issue list item 105

22

7 CoE update 2005/08/25 Dell CoE

M07-Yonah A01 Update

Add C746 2200pf on CPU side, depop it.
Add the 2200 PF cap to the H_THERMDA and _THERMDC pins next to he CPU
pins

23

C C

24

38 Board ID Change 2005/08/25 Compal

Change Board ID to X01 for SST Pop R782 (10Kohm), Depop R786 (10Kohm) X01C

Great

26 GG Issue fixed 2005/08/26 Ty A 1000pF capacitor to ground should be added to SENSE_A and SENSE_B.

Add C2, C46 (1000pf 0402), depop it now. X01D
These should be placed close to the 9220.

25

26

27

29 BT module support 2005/08/29 Compal

Great

G06 BT module pin 5: BT_RE_PAIR#, and other BT module pin 5:
BT_RADIO_D I S #, Standard B T mo d ul e w ill disable w hen install on G06 machines.

31 WUSB connector 2005/08/29 Mohammed Change WUSB connector pin define, follow Mohammed forward Cypress

recommend @08/26/2005 mail.

36, 37 Debug port 2005/08/30 Mohammed Debug signals routed to WLAN mCard connector, follow Mohammed forward Kris

recommend @08/3 0 /2005 mail.

(33pf) depop. enable standard BT on developer phase.

Change JWUSB pin2 to +3VSRC from +3VSUS , pin3 to NC from +3VRUN

Delete C683 (0.1 uF ) f o r + 3 VRUN capacitor

1. Connect U48.70 to JMINI2.16, and add serial resistor as 0 ohm (R914)

2. Connect U48.71 to JMINI2.17, and add serial resistor as 0 ohm (R915)

3. Connect U48.82 to JMINI2.19, and add serial resistor as 0 ohm (R913)

4. Connect U48.81 to JMINI2.42, and add serial resistor as 0 ohm (R912)

28

41 LID circuit 2005/10/07 Due to LID_CL# and PRE_LID_CL# always high on Solenoid board, correct

B B

29

10 CP U latency circuit 2005/10/11

Compal
Great

Mohammed

LID circuit
Change the population option for the CPU latency circuit change

per Intel's update. GG issue list item 5

1. change JHING pin1 connection fr om D34 pin2 to D34 pin1 f or LID_CL

2. change JHING pin2 connection from D35 pin2 to D35 pin1 for PRE_LID_CL

Populate R841, Depop R610

X01C

X01CUpdate U17 R5C843 library

X01C

X01Echange R323 from pull down to pull up +BT_PWR, R838 (0ohm) depop, C934

X01E

X01F

X02A

X02B

30

20 CRT 2005/10/11

Mohammed

Add the HSYNC and VSYNC buf fers to the VGA page, the Graphics card will not
have it populated. Copy the same circuit on ZRS schemaitcs (X02) for U4 and U5.

Add R916~R922, U54 and U55. Depop R916 and R922, others pop

X02B

GG issue list item 6

31

32 LO M 2005/10/11 LOM ASIC (U6) symbol name should specify 'C1' revision instead of 'C0' X02B

32

33 LOM 2005/10/11

33

42 VGS rating of FET 2005/10/11

A A

Mohammed

Mohammed

Shiguo

De-pop R78, R79, R87 & D9. These are not required for BCM5753. Once LED
circuit is verified on X00, these components can be removed, GG issue list item 9

RUN_ENABLE and SUS_ON_ENABLE voltage may be high up to 20.5V, so
PQ69 has VGS voltage stress issue, by Dell derating, these FET signal should be
80% of VGS rating, so a resistor divider should be applied to nodes at
RUN_ENABLE and SUS_ON_ENABLE.

Update U6 symbol name as C1

De-pop R78, R79, R87 & D9.

Add R923 470K ohm, pop it.

X02B

X02B

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

EE-Changed-List History

Greenland-LA2732P

55 63W ed nes da y, De ce mber 28, 2005

1

X03

of

http://hobi-elektronika.net

5

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

4

3

2

Title

Size Document Number Rev

Date: Sheet

5

Version Change List ( P. I. R. List ) for EE Circuit

Solution Description Rev.Page# TitleItem Issue DescriptionDate

Request
Owner

4

3

2

1

D D

34

43 Mohammed fix a back drive on the RUNPWROK circuit 1. Change Q75 and Q77 from DTA114YKA to MMBT3906, keep no stuff

35

36

37

38

C C

39

40

41

42

43

44

B B

45

RUNPWROK circuit 2005/10/12

41

29 Mohammed Missing 10K Pulldown on BT, COEX2_WLAN_ACTIVE signal. GG issue list item13 Add R926 10k ohm pull down on JBT pin4BT 2005/10/12 X02C

42 +12VRUN 2005/10/13 Original +12VP is transferred to +12RUN, Due to Solenoid board need

41 Solenoid 2005/10/13 For Dual voltage solenoid board JSLND pin24, 26, 28 and 30 connect to +12VALW_SLND X02DCompal

22 Crystal circuit 2005/10/13 R900 should be between Y3 pin 4 and R680 pin2, GG issue list item35 move R900 between Y3 pin 4 and R680 pin2 X02DRichard

22 ICH7 2005/10/13 add a 0.1uF No Stuff cap to THRMTRIP_ICH# at R689 pin 1, GG issue list item36Richard Add C965 as 0.1uF no stuff X02D

ICH723

23,31 USB O C circuit pin 5 and pin 8 are gan ged on U 29 and U34, and change net name to

23 Solve MS Duo

Adaptor circuit

34 48MHz Add R934 and C966 no stuff X02D2005/10/13 C. Massery Need AC termination for CK_48M clock input to R5C843, GG issue list item40

BIOS For flash EC code easily following ZRS, add SW1, R924 and R925 X02B37 EC flash circuit 2005/10/11

Mohammed change the power rail to the CIR Wake microcontroller from +3VSRC to

+3VALW (Pin 15), GG issue list item14

Compal
Great

+12ALW_SLND powe r r a il , s o c ha n ge +1 2 VP t o t r an sf e r t o + 1 2ALW_SLND, then
add PMOS for +12A LW_SLND to +12RUN by RUNPWROK or RUN_ON control
signal to turn on +12VRUN

Great

i.e. USB_OC4# and USB_OC5# can be ganged and named USB_OC4_5#, GG
issue list item38

NoPop if the circuit is not needed, GG issue list item39

2. Change R867 and R869 from 20K to 4.7K ohm, keep no stuff

3. Change R866 from 10K to 200K ohm, keep no stuff

4. Change R868 from 10K to 100K ohm, keep no stuff

Change JCIR pin15 from +3VSRC to +3VALW X02CCIR 2005/10/12

Add Q88, Q89, R927~R930, C963 and C964. R928 and R930 no stuff, others

pop it

Add R931 as 10 ohm no stuff X02Dadd a 10 ohm No Stuff pulldow n to CLKRUN# at R707 pin 2, GG issue list item37Richard2005/10/13

USB_OC4_5# and USB_OC6_7#

Add R932 and R933 as 0 ohm no stuff X02D2005/10/13 C. Massery Q62 and Q63 need by pass resistor. As it is right now, circuit cannot be set to

X02C

X02D

X02D2005/10/13 Richard USB OC pins at U 29 and U34 should be ganged, since the outputs are ganged.

35 Power switch 2005/10/13 C. Massery CardBus po wer switch input should be 5VRUN and not 5VSUS. Wake states

46

7 IT P 2005/10/13 ITP termination need value changes: R577=51 Ohm, R581=39 Ohm, R582=27 Ohm

47

are not supported so SUS plane is not needed. GG issue list item42

per CoE input, GG issue list item44

Change U10 pin 13 and 15 from +5VSUS to +5VRUN X02D

1. Change R577 form 54.9 to 51 ohm

X02DMohammed

2. Change R581 from 39.2 to 39 ohm

3. Change R582 from 27.4 to 27 ohm

20 S-VEDIO 2005/10/13 Need to add the caps (No pop) across L9, L8, L7, 27PF caps ,nopop per CoE ref

48

22 ICH 7 2005/10/13 Mohammed Need to add 0 Om resistor pulldown to GND on iCH_INVRMEN per CoE ref

49

50

A A

2005/10/13Flash BIOS37 X02D

Mohammed

Schematics. GG issue list item46

schematics, please make it no pop. GG issue list item48
Need to add a switch that will short KSI5 and KSo9 to simulate the END Key Press

for flash recovery. We need to place the switch on the bottom side by the memory.
Need ot be exposed through the door. GG issue list item50

Add C967~C969 as 27pF, no stuff

Add R935 as 0 ohm, no stuff

Add SW2

X02DMohammed

X02D

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

EE-Changed-List History

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56 63W ed nes da y, De ce mber 28, 2005

1

X03

of

http://hobi-elektronika.net

5

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

4

3

2

Title

Size Document Number Rev

Date: Sheet

5

Version Change List ( P. I. R. List ) for EE Circuit

Solution Description Rev.Page# TitleItem Issue DescriptionDate

Request
Owner

4

3

2

1

D D

51

52

Mohammed Follow Dell_Greenland_WUSB_Module_NoHub_SCH_V01.pdf by

Mohammed's mail 2005/10/12 to modify JWUSB pin define

MohammedBT31,29 2005/10/13

For the BT_RE_PAIR# signal We need to add a switch on the bottom side
of the board, near the memory to short the signal to. GND. Please make
sure to have a s er i es zero Ohm resistor betw een the BT_RE_PAIR# signal
and the GPIO on the EC. We can have the zero Ohm depoped. Also for PT2
we will have an external swit ch for repairing the BT module. We will need to
send the signal BT_RE_PAIR# JAUDIO (may be pin 20 has to chage from
GND to BT_RE_PAIR#). We need to disucss the detiails.

31 SATA L ED Great Blue LED issue

53

Power BTN LED

39

54

C C

55

56

57

58

B B

59

60

61

62

63

64

65

A A

Instant On LED
WLAN LED

35

1394 chock

35

MS DUO adapter

20 CRT 2005/10/14

7 CPU 2005/10/14 Change R901 from 51 to 1K ohm, no stuffMohammed Follow COE yonah_m07_a02 X02E

34 4 IN o n e c a rd 2005/10/14 Del J4IN1, and add J5IN1Mohammed ME change 4in1 card connector to 5in1 connector X02E

20 TV, C R T 2005/10/15 Change R7~9, R30, R32 and R33 from 75 to 150 ohm, pop itMohammed Follow COE X02F

19 VGA 2005/10/15 Add R942 as 0 ohm, no stuffMohammed Follow ZRS X02F

42 Power sequence 2005/10/15 Mohammed GG issue list item21 R38, R259 and R923 change to 365K ohm X02F

20 CRT 2005/10/15 Mohammed GG issue list item65 R921 and R919 change to 365K ohm X02F

37 MEC5004 2005/10/15 Mohammed Modify by Mohammed's mail 10/15/2005, mail title is Greenland issues list updates Add R943 as 0 ohm, pop it X02F

37 MEC5004 2005/10/15 Mohammed Modify by Mohammed's mail 10/15/2005, mail title is Greenland issues list updates 1. C872 change from 4.7u to 22uF

2005/10/13

2005/10/13 Blue LED issue X02D

2005/10/13 C. Massery

Great

Check impedance of 1394 choke. Impedance should be
110ohm. Reference schematic recommended part is
DLW21HN121SQ2

2005/10/13

C. Massery

Mohammed

Follow COE to modify MS Duo Short counter measure circuit

Follow COE, GG issue list item45

1. JWUSB pin4 connect to +5VSUS

2. JWUSB pin6 and pin7 change to NC

3. JWUSB pin8 connect to ECE_USBP3-

4. JWUSB pin8 connect to ECE_USBP3+

1. Add R936 as 0 ohm, no stuff

2. Add SW1 for the BT_RE_PAIR# signal

1. DEL Q44

2. Add Q92, Q93 an d R938

1. Q81 and Q83 change from 2N3904 to 2N7002

2. R887 and R888 pin1 change from +3VALW to +5VALW

3. DEL Q73

4. Add Q90, Q91 an d R937

1. DEL L29

2. follow ZRS , A d d L 76 an d L77 as DLW21SN121SQ2L

1. DEL Q55 and Q54

2. Add Q94, Q95 , D36, R939~R941

3. Change net name of J4IN1 pin 18 from XDCD# to XD_SW#

4. Change net name of J4IN1 pin 28 from MSCD#_XDCD1# to MS_INS#

Change D5 from RB751 to RB500V-40

2. Add Q96(2N7002), Q97(2N3906), R945 and R947 as 10K, R944 and R946 as

100K, C971 as 4.7uF, D37 as RB751, pop it

3. R946 as 22 ohm, pop it

X02D31 WUSB 2005/10/13

X02D

X02D

X02D

X02D

X02E

X02F

http://hobi-elektronika.net

5

DELL CONFIDENTIAL/PROPRIETARY

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

4

3

2

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

EE-Changed-List History

Greenland-LA2732P

57 63W ed nes da y, De ce mber 28, 2005

1

X03

of

5

Version Change List ( P. I. R. List ) for EE Circuit

Solution Description Rev.Page# TitleItem Issue DescriptionDate

Request
Owner

4

3

2

1

D D

66

22 SATA LED 2005/11/28 Willis SATALED# of pi n A F 18 of U42 need pull up t o +3VRUN. Please ref er t o Int el

67

28 Audio caps 2005/11/28 Mohammed total recommendations to move to X5R caps for improved audio performance on

68

CIR

69

41

2005/11/28 Willis Due to CIR_WAKE_EN# will be pull low to 0.6V by U7 of CIR board when

Willis LED_WLAN_OUT# signal will be NC when JMIN1 and 2 have been not installed

any mini card. Then Wireless LED can not work normally.

ICH7M, doc no. 17837

ALL M07 designs, follow Mohammed's mail on 11/17

system in S5 state of battery mode only.This will cause ALWON active then
turn on +5VALW and +3VALW.

09 CPU caps 2005/11/28 Dell total recommendations to move to X5R caps for improved audio performance on

70

C C

41 BADGE LED 2005/11/28 Willis Badge LED need +5VALW power plane Change JCIR pin16 from +3VRUN to +5VALW, the rating current of this connector

71

72

BT 2005/12/01 Willis Original co n n e ct i o n se q u e n ce f o r BT_RE _PA IR#, t hat BT re-pair func t ion of

29,
31, 38

73

Power sequence 2005/12/01 SS Following M07 System Power Sequence rev. A06

43

ALL M07 designs, follow Mohammed's mail on 11/17

software and hardware can not be separated by R838.

Add Pull up resistor (R949 = 10K) to +3VRUN X03A39 Wireless LED 2005/11/28

2. Change C206 from 10uF Y5V to X7R

3. C205 and C233 from 0.1uF Y5V to X5R

4. Change C606, C604, C278 and C593 from 1U_0805_25V_6K to

1U_0603_10V_6K

Add Q98 to isolate U48 pin119 of M/B to U7 pin2 of CIR board in S5 state of

battery mode only

Change C689~C720 form 22uF X5R to X6S X03A

is 1A per pin.

1. Change connection sequence from U51 --> SW3 pin 1&2 and R936 pin2 -->

R838 --> JBT pin5 to U51 --> R838 --> SW3 pin 1&2 and JAUDIO pin20 -->JBT

pin5

2. Del R936

Note. BT_RE_PAIR_R# will short to GND when use Rev. 0.3 AUDIO & USB BD

1. Change R868 from 100K to 200K ohm, to minimize the leakage current

2. Add R950=200K ohm and C972=470pF for delay +3VRUN, to fix

IMVP_PWRGD glitch issue

X03AChange R845 from de-pop to stuff it

X03A1. Change C598, C207, C240, C219 and C574 form 1uF Y5V to X5R

X03A

X03A

X03A

X03A

B B

74

75

76

77

78

79

80

A A

Mini card 2005/12/01 B. McFarland Following M07 Minicard rev. A07, to Add Intel WoWLAN Support Circuit Add pop components D38, and un-pop componet R951. X03A

36

HDD and ODD

42

power
EC 2005/12/01 Dell Following M07 EC Inspiron Rev.A06 Change R946 from 22 to 0 ohm X03A

37

Flash recovery circuit 2005/12/01 Willis Simplify flash recovery circuit

37

LID SW 2005/12/04

41

2005/12/01 R. To nr y Following M07 ICH7 rev. A07 1. Change R898 and R899 from 10K to 100K, and pop it. X03A

1. remove R760, R763, R924 and R925

2. Add R952, R953 and R954 = 1K ohm, depop R952 and R953, pop R954

Willis Reduce component Remove D34 and JHING pin1 direct connect to LID_CL# signal X03B

2005/12/04USB Camera41

USB Camera use +5VRUN power planeWillis X03B

Change JCIR pin16 from +3VRUN to +5VRUN, the rating current of this connector

is 1A per pin.

41 BADGE LED 2005/12/04 Willis Change Badge LED circuit connection from CIR BD to Solenoid BD 1. Change JCIR pin19 from BREATH_LED_BADGE signal to NC

2. Change JSLND pin25 from NC to +5VALW

X03A

X03B

pin27 from NC to BREATH_LED_BADGE signal

http://hobi-elektronika.net

5

pin29 from NC to GND

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

4

3

2

DELL CONFIDENTIAL/PROPRIETARY

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

EE-Changed-List History

Greenland-LA2732P

58 63W ed nes da y, De ce mber 28, 2005

1

of

X03

5

Version Change List ( P. I. R. List ) for EE Circuit

Solution Description Rev.Page# TitleItem Issue DescriptionDate

Request
Owner

4

3

2

1

D D

81

82

83

84

85

86

C C

87

23,38,

88

42

+3VRUN power

42

9

CPU Caps Shiguo

23

ICH 2005/12/08 DELL

Mini card 2005/12/08 Mohammed

Subwoofer 2005/12/13 Mohammed

USB, 1394 2005/12/13 DELL

HDD,MOD
enable circuit

2005/12/04 X03BAdd D39 between R950 pin1 and Q38 pin3

2005/12/08

2005/12/14 Mohammed

Compal The Media BTN BD use +5VRUN power source, but its SMBUS has pull up to

+5VALW. This will cause back drive issue in AC mode.

Following M07 System Power Sequence rev. A06SS

use Dell recommended cost reduction CAP combination for CPU decoupling: 4
Bulk CAPs (6moh m at 3 30uF)+ 32 10uF CerCAPs

ZRS.

Greenland Filter circuit for Sub amp change by Mohammed's mail on 12/09/2005

of GG list

This is to address a problem with the drives spinning up during a SNIFFER
functionality, as well as a power glitch during a system warm boot. The ICH and
SIO schematics will be updated and released tomorrow on CEC. Please refer to
the attachment for the time being. follow Mohammed's mail on 12/9

89

90

37,39 X03B

Media BTN 2005/12/14 Mohammed

41,49 X03B

Solenoid 2005/12/14 Compal Fix +12V only have 8ms pulse width issue when use Solenoid DV BD(LS-273EP)

Change Media BTN power source from +5VRUN to +5VSUS for remove Media
BTN self test when system from S3 to S0 state

Change R754 and R753 pin 1 from +5VALW to +5VRUN X03B5, 37 SMBUS of Media BTN 2005/12/04

1. Change C689~C720 form 22uF/X6S to 10uF/X6S

2. Change C721~C726 form 330uF/7m ohm to 330uF/6m ohm

3. Depop C721 and C725

Added C973Added 0.1uF cap as a short-term solution for IMVP_PWRGD glitch issue. Follow

2. Change U27 pin12 input circuit

Remove EMI component of USB port6 & 7 and 1394

1. USB port6 &7 --- L55, L28, R521, R520, R295 and R292

2. 1394 --- L29, R303, R305, R307 and R308

1. Move HDDC_EN# to ECE5011 pin 106

2. Move MODC_EN# to ECE5011 pin 107

3. Rename ICH pin R4 to RSVD_HDDC_EN#. This pin should be No Connected.

4. Rename ICH pin E22 to RSVD_MODC_EN#. This pin should be No Connected.

5. R898 and R899 change from 100k to 10k

1. JMEDIA pin 18 and 19 change from +5VRUN to +5VSUS

2. R753 and R754 change pull up from +5VRUN to +5VSUS

Add +12V_PHASE to connect JSLND pin23 and PL11 pin1

X03B

X03B

X03B36 Follow item 15 of GGG list by Mohammed's mail on 12/08/2005 depop R807 and R806.

X03B29 1. Remove C320

X03B31,35 Remo v i ng t h e common mode chocks for the USB ports 6,7 and 1394 port, item 3

X03B

91

B B

92

93

31 X03B

Wireless USB 2005/12/14 Mohammed

39 X03B

POWER SW 2005/12/14 Mohammed

6,22,

Crystal 2005/12/14 Compal

34,38

94

95

96

A A

43 X03B

Power Sequence 2005/12/14 Mohammed

16 X03C

FAN 2005/12/15 Mohammed

17 X03C

DDR 2005/12/15 Cody

Change JWUSB from 10 pin to 8 pin, item2 of GG list 1. Change JWUSB from 10 pin to 8 pin

2. Add Q99 and R955

3. Remove C684

Depop D25, because it have leakage issue Depop D25

Change Crystal circuit base on EA result 1. Change C890 form 22p to 15pF , C891 from 22p to 18pF

2. Change C809 and C810 from 12p to 1pF

3. Change R209 from 0 to 390 ohm

4. Change C530 and C531 from 12p to 18pF

Change Q79 to a 2N7002 FET per M07 design guide recommendation Change Q79 from 2N3904 to 2N7002

Follow M07_GUARDIANII_X05_081205, for fix noise issue R551 and R553 change 120K, R552 change to 78.7K, and C679 change to .22uF

Follow M07_Memory_X03_072105 Remove R911

X03B

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

EE-Changed-List History

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59 63W ed nes da y, De ce mber 28, 2005

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X03

of

http://hobi-elektronika.net

5

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

4

3

2

Title

Size Document Number Rev

Date: Sheet

5

Version Change List ( P. I. R. List ) for EE Circuit

Solution Description Rev.Page# TitleItem Issue DescriptionDate

Request
Owner

4

3

2

1

D D

97

44 Motor 2005/12/15 Compal Change motor current limit from 300mA to 650mA, base on motor spec Change R55 from 0.68 ohm/2512 size to 0.4 ohm/1206 size X03C

98

38 BID 2005/12/15 Compal Change board ID to 0010 for PT2

99

39,41 All LED 2005/12/16 Compal For fix the light of LED is too bright issue

100

41 2005/12/19 Mohammed Change pull up from +3VRUN to +3VALW, item 36 of GG list

101

39 2005/12/19

102

26~30 Audio 2005/12/19 Mohammed Add analog ground Add AGND symbol for connect to analog ground X03E

103

C C

23 SPI_CS# 2005/12/19 Mohammed

104

37 SPI_CS# 2005/12/19 Mohammed

105

31 WUSB 2005/12/19 Mohammed

106

39 Power/Instan t LE D 2005/12/19 Compal

107

MEC5004

HDD,MOD
enable circuit

Media BTN Mohammed

2005/12/15

Mohammed Please move the PRE_LID_CL# sigfnal from GPIO46 to GPIO45 pin 55 (currenlty

it is RUN_ON_D). Issue with the boot block. Item 38 of GG list

Add an option to Jumper either +5VRUN or +5VSUS rails to the Media
BTN for wake from ODD buttons press.

Add 47 ohm Series resistor to SPI_CS# as ICH pin P6 (close to ICH). Populate the
resistor. Item 39 og GG list

add 0 ohm series resistor to SPI_CS# at SIO pin 4. Populate the resistor.
Item 40 of GG list

Change +5VRUN to +5VSUS. JWUSB pin 8 connect to +3VSRC for WUSB
wake up function

remove serial resistor on MB side, since POWER BTN BD already has it.

108

109

28 1. Add D18~D 21and C665~C668

110

SPK 2005/12/20 Compal

Due to CIR BD has Speaker connector, remove ESD and Caps on MB side,
add them on CIR BD

1. Due to CIR BD has no +12VRUN power rail to use for ESD diode, so keep ESD
and EMI circuit on MB

2. Change JSPK to 2A/pin, currently is 1A/pin

111

B B

38,22 2005/12/21 X03F

112

42 2005/12/21 X03F

113

Crystal Compal Change Crystal circuit base on EA result

Power sequence Compal +1.8VSUS and +12VRUN discharge too slowly issue base on EA result 1. Pop R196 and Q27, follow ZRS

Please add a 100PF cap from ODD_EJECT_REC# to GND due ot a glitch on the
signal found during EA. Item 41 of GG list

Move the PRE_LID_CL# signal from GPIO46 to GPIO45 pin 55 and add R957 to

cascade them

Change R786 and R783 from non-pop to pop, R782 and R787 change pop to

non-pop

1. Change R5, R343 and R853 from 150 to 330 ohm

2. Change R342 from 100 to 330 ohm

1. Change pull up of R898 and R899 pin1 from +3VRUN to +3VALW.

2. Change Q6 and Q41 from PDTC144 to 2N7002

3. Change R898 and R899 from 10K to 100K

1. Add JUMP6 and JUMP7 for power source option

2. Change pull up of R753 and R754 from +5VSUS to +5V_MEDIA

Add R957 as 47 ohm on SPI_CS# X03E

1. Change JWUSB pin 7 from +5VRUN to +5VSUS

2. Change JWUSB pin 8 from Gnd to +3VSRC

Remove R5 and R343

Add JUMP8~1226 Audio 2005/12/19 Compal Add Jumpe r to sh o rt AGND an d G ND f or E M I re qu r ie m en t X03E

Remove D18~D21and C665~C66828 SPK 2005/12/19 Compal

2. Change JSPK from MOLEX_87438-0443_4P to MOLEX_53325-0460

Add C97438 ODD 2005/12/21 Compal

1. Change Y2 from 24MHz/20pf to 24MHz/12pf

2. Change Y3 from 32.768kHz/12.5pf to 32.768kHz/6pf

2. Add R960 and Q100 for +12VRUN discharge

X03C37

X03C

X03D

X03E

X03E

X03EAdd R958 as 0 ohm on SPI_CS#

X03E

X03E

X03E

X03F

X03F

37 2005/12/23 X03G

114

20 2005/12/23 X03G

115

All 2005/12/29 X03GAdd subsystem ID

116

A A

MEC5004 Compal Depop SMSC work around proposed on EMC5004 revision D chip 1. Depop R944~R948, C971, Q96, Q97 and D37

2. Change C872 from 22uF to 4.7uF

Headphone/MIC Compal Separate audio ground from power ground on AUDIO&USB board (LS-2736P) for

Change net name of JAUDIO pin14 from GND to AGND
fix headphone noise in battery mode only

Subsystem ID DELL Add subsystem ID

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

EE-Changed-List History

Greenland-LA2732P

60 63W ed nes da y, De ce mber 28, 2005

1

X03

of

http://hobi-elektronika.net

5

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

4

3

2

Title

Size Document Number Rev

Date: Sheet

5

Version Change List ( P. I. R. List ) for Power Circuit

Solution Description Rev.Page#

TitleItem Issue DescriptionDa te

Request
Owner

4

3

2

1

D D

C C

9

B B

10

1

2

3

4

5

6

7

8

P45

+DCIN

P46

Battery Conn/KB_CHG

P47

+1.5VSUSP /+VCCP_1P05VP

P48

+3.3V/ +5V

P49

12V

P50

+1.8VSUSP/ +0.9V_DDR

P51

+VCORE

P52

Charger_new

P51

+VCORE

P51

+VCORE

P51

+VCORE

P51 +VCORE

+3.3V/5V

P48

+1.5VRUN

P47

P47

+1.05V

P48

+3.3V/5V

+3.3V/5VP48

0727/2005 Dell Reserve AL- Caps on CPU PWR_SRC for buzzing noise. Add PC231 220U_25V X00

0729/2005

0729/2005

0802/2005 For support three or two phases options. Rename PU11 PIN 24 from ADP3207_VCC change to ADP3207_PWM3. Compal

0826/2005

0826/2005 Dell Increased +1.5VRUN rating current

0826/2005 Dell Reduced +1.05V rating current 1. PQ6 change to FDS6670A

0826/2005 Dell Redesign 5VSRS OCP setting

0831/2005 Dell Redesign 3.3VSUS OCP setting

Dell0715/2005 Power source rename. Power source rename to +PWR_SRC from PWR_SRC. X00

Dell

Dell

The Original High side MOSFETs are error. The manufacture PN of PQ53,PQ57.PQ61 change to FDS6294 from FDS6982.

Dell Increased +3.3VSRC rating current

Add PR273 499_0402_1%Dell request to add 499ohm 1% series resistor at the CPU VR ADP3207.

1. PQ9 change to FDS8880

2. PR59 change to 66.5K.

3. PL10 change to 5.2uH_HMU1362_5R2_11A

1. PQ68 change to FDS6670A

2. PL6 change to 3.8uH SIL1045R-3R8F8A

3. PR33 change to 76.8K

4. PC25 change to 330uF@9m ohm_2.5V

5. PR40 change to 100K

2. PL7 change to SIL104-1R5PF

3. PR32 change to 80.6K

4. PC27 change to 330uF@9mohm_2.5V

5. De-pop PC28

6. PQ4 change to SI4800

1. PR58 change to 158K

2. Net name rename to AUX_EN from VAUX_EN

1. PQ11 change to FD6676AS

2. PR59 change to 140k

3. Add PC233 a 330uF_6.3V_25mohm CAP paralleled at PC50

X00

X00

X00

X01

X01

X01

X01

12

13

14

15

16

17

A A

18

19

http://hobi-elektronika.net

P48 +3.3V/5V

P46 Battery Conn/KB_CHG

+3.3V/5VP48

P48 +3.3V/5V

P51 +VCORE

P51 +VCORE

P48 +3.3V/5V

P48 +3.3V/5V

5

0831/2005 Dell Redesign 5VSUS OCP setting

0929/2005 Compal Support JKBDK Pin 2 current rating 1A JKBDK Pin 7 change to +5V_Pre-charge from GND for support current rating 1A

1004/2005

Dell Improve +3VALW droop issue Add an an external FET PQ69.

1007/2005 Compal Reserve optional path of PQ69 Pin gate which connect to SUS_ON ENABLE.Add PR276 and Nopop PR277

1011/2005 Dell Redesign load line adjustment. Change PR127 PR128 PR257 from 93.1K ohm to 113K ohm.

1011/2005 Dell Redesign input noise filter. Move PC231 from PL14's pin 2 end to pin 1 end.

1011/2005 Dell Delate a filter Unpopulate PR43 and PC41.

1011/2005 Dell Unpop PR60.

Redesign for Pin_Pro# should be ketp at Low voltage to enable
OVP/UVP and discharge function.

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

4

3

PR58 change to 174K

DELL CONFIDENTIAL/PROPRIETARY

Title

Size Document Number Rev

2

Date: Sheet

Compal Electronics, Inc.

Power-Changed-List History

Greenland-LA2732P

1

61 63W ed nes da y, De ce mber 28, 2005

X02

of

5

Version Change List ( P. I. R. List ) for Power Circuit

Solution Description Rev.Page#

TitleItem Issue DescriptionDa te

Request
Owner

4

3

2

1

P48 +3.3V/5V

20

D D

P51 +VCORE

21

P51 +VCORE

22

P47

+1.5VSUSP /+VCCP_1P05VP

P48

+3.3V/ +5V

P49

1



2V

P50

23

24

25

26

C C

27

28

29

30

31

+1.8VSUSP/ +0.9V_DDR

P51

+VCORE

P47 + 1.05V

+1.5VSUSP /+VCCP_1P05VP

P47

+3.3/ +5V

P48

+1.8VSUSP/ +0.9_DDR

P50

P51

P51 +VCORE

P52 Charger

P52 Charger

P52 Charger

P52 Charger

+VCORE

1011/2005

1011/2005

1011/2005

1011/2005 Dell Follow CoE grounded form. Follow CoE grounded symbol.

1011/2005 Dell Redesign OCP setting. Change PR32 from 80.6K to 43K.

1011/2005 Dell

1013/2005

1013/2005 Dell Remove un-needed device. Del PD41

1013/2005 Dell Remove un-needed device. Del PR146 PR147 PR160 PR242.

1013/2005 Dell Follow CoE ref schematics. Add PR279 100 ohm ,PC234 0.01U, PC235 0.01U.

1013/2005 Dell Rename net name. Change PQ28 gate connect to +DC_IN_SS.

1013/2005

Dell Reserve a path and unpop PR278 0 ohm resister between PU9 pin4 and SUS_ON.

Dell

Dell Unpop PQ42 PR101 PH1.

Dell Redesign L/S Vgs miller CAP voltage. Change PR131 PR132 PR247 to 2.2 ohm.

Dell Follow CoE ref Schematics. Add PU16 PQ66 PC224 PC225 PC226 PC227 PC228 PC229

Follow CoE schematics.

Follow Napa Platform. Unpop PR241 and pop PR233.

Delete unuseful function.

Redesign EMI filter rating current. Change PL5 PL8 to rating current 9A.

Change jump PJP2 to PL12(rating current 9A).

PR266 PR267 PR268 PR269 PR281 PR271 PR272.

X02

X02

X02

X02

X02

X02

X02

X02

X02

X02

X02

X02

P52 Charger

32

B B

1015/2005 Dell

Follow CoE ref Rev A06 Schematics.

* PT build MEMO need add item 32.*

1. Add PR283 0 ohm ,between +DC_IN_SS with PU8 DCIN_Pin.

2. Del PC235, PR279.

3. Pop PR280 100 ohm 0402

4. Short PU8 FBSA_Pin with PBSB_Pin

5. Change DC_IN net name to +DC_IN

X02

6. Add PR280 0 ohm ,btween +VCHGR with PU8 Pin 15.

1. Move and unpop PC234 to connect with PU8 FBSA and FBSB pins.

P52 Charger

33

+DCIN

P45

Battery Conn/KB_CHG

P46

+1.5VSUSP /+VCCP_1P05VP

P47

+3.3V/ +5V

P48

34

P50



P51
P52

35

P45,P46
P49,P51
P52

A A

+1.8VSUSP/ +0.9V_DDR
+VCORE
Charger_new

MITSUBISHI
Cap 10u 25V X7R EOL

1121/2005 Dell Follow CoE ref Rev A09 Schematics.

1121/2005 Compal Take the daul layout to enter second source of bead.

1129/2005 Compal

MITSUBISHI Cap 10u 25V X7R EOL

2. Add PC235 between PQ31 gate and switching node.

3. Change PR268 from 11.8K to 13K ohm.

4. Change PR269 from 12.1K to 10K ohm.

5. Change PR281 from 154K to 66.5K ohm.

6. Change PR270 from unpopulated to populated.

7. Correct PR270 pin 1 connect with PU16 pin3.

Change PL2,PL3,PL4,PL5,PL8,PL12,PL14,PL17,PL18 PCB Footpoint
from L_1812 to L_1812-S.

Change PC113, PC116, PC117, PC118, PC127, PC128, PC129, PC140, PC166, PC202,
PC203, PC204, PC208, PC209, PC210, PC6 to SAMSUNG 10u 25V M X5R 1210 H2.5

X03

X03

X03

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Power-Changed-List History

Greenland-LA2732P

1

62 63W ed nes da y, De ce mber 28, 2005

X02

of

http://hobi-elektronika.net

5

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

4

3

2

Title

Size Document Number Rev

Date: Sheet

5

Version Change List ( P. I. R. List ) for Power Circuit

Solution Description Rev.Page# TitleItem Issue DescriptionDate

Request
Owner

4

3

2

1

P52 Charger

36

D D

P46 +5V_Pre-charge

37

P50 +1.8V

38

P49
P51
P52

39

P51 Vcore

40

P46 +5V_Pre-charge

41

C C

P45 +DCIN

42

P46 +5V_Pre-charge

43

P52 Charger

44

P51 Vcore

45

+12V
Vcore
Charger

1201/2005 Dell Follow CoE ref Rev A10 Schematics. Add PD41, PR284

1206/2005 Dell to improve control loop stability Add PC236, PR286.

1206/2005 Dell

1207/2005

Dell Proposed solutions to accoustic noise issues:

Add a PR285 0ohm resistor between the pin 5 and the outpu
for 2nd SC480 application

add dual pads for all input caps (ceramics and POSCAPS) on PWR_SRC.

Corrected PC169 to 0.022uf

Add PR285

Add Vcore POSCAP on input (Unpop) :PC238, PC239, PC240, PC241, PC242, PC243.
Add Charger POSCAP on input (Unpop): PC245, PC246, PC247
Add +12VP POSCAP on input (Unpop) : PC237

1207/2005 Dell to improve Vcore VR slew rate PC189 from 680pf to 390pf

1207/2005 Compal to improve +5V+Pre-charger leakage when battery only. Add PQ70 2N7002. X03

1215/2005 Dell Dell require Add PR287 10K_0603 at PQ3 pin5 to GND

1.Add PR288 100K , PR289 100K, PR290 127K.

1215/2005 Dell Improve +5V_Pre-charge

1219/2005 Dell Dell require 1.Change PR281 from 66.5K to 68K

1227/2005 Dell Dell EMI require.

2.Add PD42 PD43

3.Add PQ70

4.Add PC252

2.Add PR291 100 ohm

Add PC253 and reserve PC254 PC255 PC256 PC257 PC258 PC259 . X03

X03

X03

X03

X03

X03

X03

X03

X03

B B

A A

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Power-Changed-List History

Greenland-LA2732P

1

63 63W ed nes da y, De ce mber 28, 2005

X02

of

http://hobi-elektronika.net

5

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

4

3

2

Title

Size Document Number Rev

Date: Sheet