Dell Vostro Inspiron 3470 Schematic

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Project Namel: Gambit MLK SFF
PCB Number: 17530
PCBA Ver.: A00
SCH Ver.: A00
Project Code : 3PD06M010001

D D

C C

B B

A A

PCB Size: 285.7 x 200mm, 1.6mm, 4 Layers

PAGE

TITLE

01

Cover Page

02

Block Diagram

03 CPU_DDRA_DDRB

CPU_CFG/CLOCK

04

CPU_(PCIE)

05
06

CPU_(VSS)
CPU_(VCC_CORE/SENCE)

07
08

CPU_(DDI/EDP)

09

CPU_(POWER CAP)
CPU_(R)

10
11

DDR4 CHA DIMM 0

12

(R)

13

DDR4 CHB DIMM 0
14 (R)
15

PCH_(Audio/SMBUS/JTAG/GPIO)
16

PCH_(CLK)
17

PCH_(SATA/PCIE/HOST)

PCH_(DMI/USB2/USB3/PCIE)

18
19

PCH_(DDI/USB3/GPIO)
20

PCH_(UART/GPIO/I2C)
21

PCH_(Strap Pin)

PCH_(VCC)

22

PCH_(VSS/GPIO)

23

SIO_(SMSC5533)

24
25

SPI/RTC/BAT

FAN Control/Thermal sensor

26
27

AUDIO_(ALC3820)

(R)

28
29

AUDIO JACK

(R)

30
31

LAN_(RTL8111H)
32

RJ45+USB2.0
33

Card Reader_(RTS5170)
34

(R)

(R)

35

Rear USB2.0

36

(R)

37
38

(R)
39

Front USB3.0
40

(R)
41

ATX CONNECTOR

(R)

42

3P3V_SB & 5V_S0 Power

43
44

VCORE/V_GT_(NCP81203)
45

VCORE OUTPUT_(NCP81166)
46

V_GT OUTPUT_(NCP81166)
47

VCCSA_(RT8237C)
48

VCCIO_(APL5611A)
49

5V_S5/3P3V_S5_(RT6575D)
50

DDR_PWR_(RT8231A)
51

PCH_1D0V_(RT8237C)

DDR_2D5V_VPP

52

MINUS 12V_(NCP3063)

53

3P3V_S0 Power

54

Sequence Circuit

55

PAGE

57
58 VGA_(RTD2166)
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107

TITLE
HDMI56
(R)

(R)
HDD/ODD
(R)
NGFF
PCI_SLOT
PWR BTM/LED
(R)
(R)
(R)
LPC/UART Port
(R)
(R)
(R)
(R)
(R)
(R)
(R)
(R)
(R)
(R)
(R)
(R)
(R)
(R)
(R)
(R)
(R)
(R)
(R)
(R)
(R)
(R)
TPM
(R)
PCIeX16
PCIeX1
(R)
(R)
(R)
(R)
XDP & APS
(R)
(R)
Power Sequence
Power Block Diagram
Power Good & Reset Diagram
Clock Diagram
Reset Flow Chart
Change Histroy

Jumper Setting

With Jumper to ME Disable
Without Jumper to Clear Password
With Jumper to Clear CMOS
PD 1K to GND for Debug, All Power-On

JMP1

DB1

Pin 1-2
Pin 3-4
Pin 5-6
PD 1K

BOM Configuration

(R_): Unmount
(X_): Debug
(GAM_): Gambit MLK SFF
(EAG_): Eagle SFF
(TPM_): With TPM
(NONTPM_): Without TPM

Power sates

+12V

-12V

3.3V

VBAT
VDDQ
DIMM

V_12P0_A
+12V
V_12V_CPU_S0

-12V
5V_S0
USBVCC12
USBVCC34

+5V

USBVCC78
5V_S5
V_5_CODEC
3P3V_S0
3P3V_AUD_S0
3P3V_SB
3P3V_SPI
3P3V_LAN
3P3V_M2VAUX
3P3V_PCIVAUX
3P3V_S5
3P0V_BAT_VREG
VBAT1
VBAT2
+VCCPLL_OC
V_SM
V_SM_VTT
V_VPP
V1P0_PCH_SB
+V1P0A_VCCAPLL
+V1P0A_VCCF24_1P0

PCH

+V1P0A_VCCAMPHYPLL
V_CPU_ST_PLL
V_CPU_CORE
V_CPU_GT
V_CPU_IO

CPU

V_CPU_SA
+VCCFUSEPRG

G3 DSW S4 S3 S0Name

O O OO

O O O O O

O O O O O

O

O
O

O
O

OOOS5O

O

OOOO

OOOO

OOOOOO

O
OO

O

OOOO

O

5

4

3

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Title

Title

Cover Page

Cover Page

Cover Page

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Gambits MLK SFF

Gambits MLK SFF

Gambits MLK SFF

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Taipei Hsien 221, Taiwan, R.O.C.

1 107Friday, February 02, 2018

1 107Friday, February 02, 2018

1

1 107Friday, February 02, 2018

A00C

A00C

A00C

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PCB BOARD SIZE

285.7 x 200mm
4 Layer

D D

PCIE X16 SLOT

HDMI PORT v1.4

D-SUB PORT

eDP to VGA
Realtek RTD2166

PCI EXPRESS Gen3

DDI1

eDP(1.4)

INTEL

Coffee Lake-S

(65W 4C + GT2)

SKT H4 LGA1151

42.5 mm x 42.5 mm

Channel A

64 bit

2666MHz

Channel B

64 bit

2666MHz

DDR4 UDIMM *1

DDR4 UDIMM *1

ATX-6PIN CONN

CPU-4PIN CONN

IMVP8

(Vcore 4 Phase + VGT 2 Phase)

DMI

C C

B B

SATA 3.0

(Port 0)

SATA 2.0

(Port 1)

SATA 2.0

(Port 2)

Front USB 3.0*2

Rear USB 2.0*2

(RJ45 USB Conn.)

Rear USB 2.0*2

(DUAL USB Conn.)

SATA3.0

SATA3.0

SATA3.0

USB3.0

USB2.0

USB2.0

INTEL PCH
Canonlake
PCH-H370

FCBGA 837PIN

23 mm x 23 mm

PCIE Interface

PCIE Gen2 Interface

PCIE Interface

USB2.0

CNVI

SATA3.0

Realtek
RTL8111H

PCIE X1 SLOT

WLAN NGFF Conn.

SSD M.2 E KEY Conn.

RJ45 Conn.

3 in 1 Card reader

Rear AUDIO

Line - In
Line - Out
Mic - In

Front AUDIO

CTIA (Apple)
Standard Headset

Realtek
RTS5170

HDA CODEC
Realtek
ALC3820

32.768KHz

A A

5

24MHz

4

USB2.0

HDA

32.768KHz

24MHz

SPI BUS

LPC BUS

3

SPI Flash ROM
(32MB)

Nuvoton TPM
NPCT750

SIO
SMSC SCH5553

Debug Conn.

2

Eagle only

CPU FAN CNTL

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

CPU 1X4 FAN

Block Diagram

Block Diagram

Block Diagram

Gambits MLK SFF

Gambits MLK SFF

Gambits MLK SFF

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

2 107Friday, February 02, 2018

2 107Friday, February 02, 2018

1

2 107Friday, February 02, 2018

A00C

A00C

A00C

5

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CPU1C

PEG_RX_CPU_P0[93]
PEG_RX_CPU_N0[93]

PEG_RX_CPU_P1[93]
PEG_RX_CPU_N1[93]

PEG_RX_CPU_P2[93]
PEG_RX_CPU_N2[93]

PEG_RX_CPU_P3[93]
PEG_RX_CPU_N3[93]

PEG_RX_CPU_P4[93]
PEG_RX_CPU_N4[93]

PEG_RX_CPU_P5[93]
PEG_RX_CPU_N5[93]

C C

0D95V_CPU_VCCIO

B B

R301 24D9R2F-L-GP

1 2

PEG_RX_CPU_P6[93]
PEG_RX_CPU_N6[93]

PEG_RX_CPU_P7[93]
PEG_RX_CPU_N7[93]

PEG_RX_CPU_P8[93]
PEG_RX_CPU_N8[93]

PEG_RX_CPU_P9[93]
PEG_RX_CPU_N9[93]

PEG_RX_CPU_P10[93]
PEG_RX_CPU_N10[93]

PEG_RX_CPU_P11[93]
PEG_RX_CPU_N11[93]

PEG_RX_CPU_P12[93]
PEG_RX_CPU_N12[93]

PEG_RX_CPU_P13[93]
PEG_RX_CPU_N13[93]

PEG_RX_CPU_P14[93]
PEG_RX_CPU_N14[93]

PEG_RX_CPU_P15[93]
PEG_RX_CPU_N15[93]

DMI_RX_CPU_P0[16]
DMI_RX_CPU_N0[16]

DMI_RX_CPU_P1[16]
DMI_RX_CPU_N1[16]

DMI_RX_CPU_P2[16]
DMI_RX_CPU_N2[16]

DMI_RX_CPU_P3[16]
DMI_RX_CPU_N3[16]

PEG_RX_CPU_P0
PEG_RX_CPU_N0

PEG_RX_CPU_P1
PEG_RX_CPU_N1

PEG_RX_CPU_P2
PEG_RX_CPU_N2

PEG_RX_CPU_P3
PEG_RX_CPU_N3

PEG_RX_CPU_P4
PEG_RX_CPU_N4

PEG_RX_CPU_P5
PEG_RX_CPU_N5

PEG_RX_CPU_P6
PEG_RX_CPU_N6

PEG_RX_CPU_P7
PEG_RX_CPU_N7

PEG_RX_CPU_P8
PEG_RX_CPU_N8

PEG_RX_CPU_P9
PEG_RX_CPU_N9

PEG_RX_CPU_P10
PEG_RX_CPU_N10

PEG_RX_CPU_P11
PEG_RX_CPU_N11

PEG_RX_CPU_P12
PEG_RX_CPU_N12

PEG_RX_CPU_P13
PEG_RX_CPU_N13

PEG_RX_CPU_P14
PEG_RX_CPU_N14

PEG_RX_CPU_P15
PEG_RX_CPU_N15

PEG_RCOMP_CPU

DMI_RX_CPU_P0
DMI_RX_CPU_N0

DMI_RX_CPU_P1
DMI_RX_CPU_N1

DMI_RX_CPU_P2
DMI_RX_CPU_N2

DMI_RX_CPU_P3
DMI_RX_CPU_N3

B8
B7

C7
C6

D6
D5

E5
E4

F6
F5

G5
G4

H6
H5

J5
J4

K6
K5

L5
L4

M6
M5

N5
N4

P6
P5

R5
R4

T6
T5

U5
U4

L7

Y3
Y4

AA4
AA5

AB4
AB3

AC4
AC5

Lake-S

PEG_RXP_0
PEG_RXN_0

PEG_RXP_1
PEG_RXN_1

PEG_RXP_2
PEG_RXN_2

PEG_RXP_3
PEG_RXN_3

PEG_RXP_4
PEG_RXN_4

PEG_RXP_5
PEG_RXN_5

PEG_RXP_6
PEG_RXN_6

PEG_RXP_7
PEG_RXN_7

PEG_RXP_8
PEG_RXN_8

PEG_RXP_9
PEG_RXN_9

PEG_RXP_10
PEG_RXN_10

PEG_RXP_11
PEG_RXN_11

PEG_RXP_12
PEG_RXN_12

PEG_RXP_13
PEG_RXN_13

PEG_RXP_14
PEG_RXN_14

PEG_RXP_15
PEG_RXN_15

PEG_RCOMP

DMI_RXP_0
DMI_RXN_0

DMI_RXP_1
DMI_RXN_1

DMI_RXP_2
DMI_RXN_2

DMI_RXP_3
DMI_RXN_3

SKYLAKE-1,SKL-S,LAKE-S

3 OF 12

PEG_TXP_0
PEG_TXN_0

PEG_TXP_1
PEG_TXN_1

PEG_TXP_2
PEG_TXN_2

PEG_TXP_3
PEG_TXN_3

PEG_TXP_4
PEG_TXN_4

PEG_TXP_5
PEG_TXN_5

PEG_TXP_6
PEG_TXN_6

PEG_TXP_7
PEG_TXN_7

PEG_TXP_8
PEG_TXN_8

PEG_TXP_9
PEG_TXN_9

PEG_TXP_10
PEG_TXN_10

PEG_TXP_11
PEG_TXN_11

PEG_TXP_12
PEG_TXN_12

PEG_TXP_13
PEG_TXN_13

PEG_TXP_14
PEG_TXN_14

PEG_TXP_15
PEG_TXN_15

DMI_TXP_0
DMI_TXN_0

DMI_TXP_1
DMI_TXN_1

DMI_TXP_2
DMI_TXN_2

DMI_TXP_3
DMI_TXN_3

A5
A6

B4
B5

C3
C4

D2
D3

E1
E2

F2
F3

G1
G2

H2
H3

J1
J2

K2
K3

L1
L2

M2
M3

N1
N2

P2
P3

R2
R1

T2
T3

AC2
AC1

AD3
AD2

AE2
AE1

AF2
AF3

PEG_TX_CPU_P0
PEG_TX_CPU_N0

PEG_TX_CPU_P1
PEG_TX_CPU_N1

PEG_TX_CPU_P2
PEG_TX_CPU_N2

PEG_TX_CPU_P3
PEG_TX_CPU_N3

PEG_TX_CPU_P4
PEG_TX_CPU_N4

PEG_TX_CPU_P5
PEG_TX_CPU_N5

PEG_TX_CPU_P6
PEG_TX_CPU_N6

PEG_TX_CPU_P7
PEG_TX_CPU_N7

PEG_TX_CPU_P8
PEG_TX_CPU_N8

PEG_TX_CPU_P9
PEG_TX_CPU_N9

PEG_TX_CPU_P10
PEG_TX_CPU_N10

PEG_TX_CPU_P11
PEG_TX_CPU_N11

PEG_TX_CPU_P12
PEG_TX_CPU_N12

PEG_TX_CPU_P13
PEG_TX_CPU_N13

PEG_TX_CPU_P14
PEG_TX_CPU_N14

PEG_TX_CPU_P15
PEG_TX_CPU_N15

DMI_TX_CPU_P0
DMI_TX_CPU_N0

DMI_TX_CPU_P1
DMI_TX_CPU_N1

DMI_TX_CPU_P2
DMI_TX_CPU_N2

DMI_TX_CPU_P3
DMI_TX_CPU_N3

PEG_TX_CPU_P0 [93]
PEG_TX_CPU_N0 [93]

PEG_TX_CPU_P1 [93]
PEG_TX_CPU_N1 [93]

PEG_TX_CPU_P2 [93]
PEG_TX_CPU_N2 [93]

PEG_TX_CPU_P3 [93]
PEG_TX_CPU_N3 [93]

PEG_TX_CPU_P4 [93]
PEG_TX_CPU_N4 [93]

PEG_TX_CPU_P5 [93]
PEG_TX_CPU_N5 [93]

PEG_TX_CPU_P6 [93]
PEG_TX_CPU_N6 [93]

PEG_TX_CPU_P7 [93]
PEG_TX_CPU_N7 [93]

PEG_TX_CPU_P8 [93]
PEG_TX_CPU_N8 [93]

PEG_TX_CPU_P9 [93]
PEG_TX_CPU_N9 [93]

PEG_TX_CPU_P10 [93]
PEG_TX_CPU_N10 [93]

PEG_TX_CPU_P11 [93]
PEG_TX_CPU_N11 [93]

PEG_TX_CPU_P12 [93]
PEG_TX_CPU_N12 [93]

PEG_TX_CPU_P13 [93]
PEG_TX_CPU_N13 [93]

PEG_TX_CPU_P14 [93]
PEG_TX_CPU_N14 [93]

PEG_TX_CPU_P15 [93]
PEG_TX_CPU_N15 [93]

DMI_TX_CPU_P0 [16]
DMI_TX_CPU_N0 [16]

DMI_TX_CPU_P1 [16]
DMI_TX_CPU_N1 [16]

DMI_TX_CPU_P2 [16]
DMI_TX_CPU_N2 [16]

DMI_TX_CPU_P3 [16]
DMI_TX_CPU_N3 [16]

SKYLAKE SOCKET

SKT301

Load Plate

(22.78003.021)

SKT303

ILMCOVER

(22.78005.281)

SKT302

Back Plate

(22.78006.031)

SKT304

ASSY BACK PLATE

(60.3EQ19.002)

PCH HSINK D7 AURAS

(R_)

A A

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

3 107Friday, February 02, 2018

3 107Friday, February 02, 2018

1

3 107Friday, February 02, 2018

A00C

A00C

A00C

5

4

3

Title

Title

Title

CPU_(PCIE/DMI)

CPU_(PCIE/DMI)

CPU_(PCIE/DMI)

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Gambits MLK SFF

Gambits MLK SFF

Gambits MLK SFF

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

5

www.teknisi-indonesia.com

4

3

2

1

PLACE NEAR CPU

R401 56D2R2F-GP

V_CPU_ST_PLL

D D

VIDSOUT_CPU_R[44]

PROCHOT#_CPU_R[24,44]

C C

20170417
add R2422

VIDALERT#_CPU_R[44]

VIDSCK_CPU_R[44]

VCCST_GD_DRIVER[40,99]

PM_DOWN_PCH[17]

1 2

R403 100R2F-L1-GP-U

1 2

R404 1KR2F-3-GP

1 2

VIDALERT#_CPU_R

VIDSCK_CPU_R

VIDSOUT_CPU_R

PROCHOT#_CPU_R

VCCST_GD_DRIVER

R405 220R2F-GP

VIDALERT#_CPU

1 2

R407 0R0402-PAD-2-GP

VIDSCK_CPU

1 2

R408 0R0402-PAD-2-GP

VIDSOUT_CPU

1 2

R409 499R2F-2-GP

PROCHOT#_CPU

1 2

R419 6K04R2F-GP

1 2

R421 20R2F-GP

PM_DOWN_CPUPM_DOWN_PCH

1 2

VCCST_GD_CPU

12

R420
2K8R2F-GP

0D95V_CPU_VCCIO

PCH_CPU_BCLK_DP[18]
PCH_CPU_BCLK_DN[18]

PCH_CPU_PCIBCLK_DP[18]
PCH_CPU_PCIBCLK_DN[18]

PCH_CPU_NSSC_CLK_DP[18]
PCH_CPU_NSSC_CLK_DN[18]

H_SKTOCC_CPU[24]

H_PWRGD[20,99]
PLTRST_CPU_N[17,99]
PM_SYNC_CPU[17]

PECI_CPU[24]

THERMTRIP#_CPU[17]

1 2

R422 10KR2J-3-GP

(R_)

TP403

PCH_CPU_BCLK_DP
PCH_CPU_BCLK_DN

PCH_CPU_PCIBCLK_DP
PCH_CPU_PCIBCLK_DN

PCH_CPU_NSSC_CLK_DP
PCH_CPU_NSSC_CLK_DN

VIDALERT#_CPU
VIDSCK_CPU
VIDSOUT_CPU
PROCHOT#_CPU

SM_PGCNTL
H_SKTOCC_CPU

VCCST_GD_CPU
H_PWRGD

PLTRST_CPU_N
PM_SYNC_CPU
PM_DOWN_CPU
PECI_CPU
THERMTRIP#_CPU

SKL_CNL_N
CATERR#_CPU

1

CPU1E

W5

BCLKP

W4

BCLKN

W1

PCI_BCLKP

W2

PCI_BCLKN

K9

CLK24P

J9

CLK24N

E39

VIDALERT#

E38

VIDSCK

E40

VIDSOUT

C39

PROCHOT#

AC36

DDR_VTT_CNTL

AC38

SKTOCC#

U2

VCCST_PWRGD

F8

PROCPWRGD

E7

RESET#

E8

PM_SYNC

D8

PM_DOWN

G7

PECI

D11

THERMTRIP#

AB36

PROC_SELECT#

D13

CATERR#

SKYLAKE-1,SKL-S,LAKE-S

For EMI

H_PWRGD

PLTRST_CPU_N

Lake-S

PROC_TDO

PROC_TDI
PROC_TMS
PROC_TCK

PROC_TRST#
PROC_PREQ#
PROC_PRDY#

CFG_RCOMP

C402 SCD1U16V2KX-L-GP

1 2

(R_)

C403 SCD1U16V2KX-L-GP

1 2

(R_)

5 OF 12

CFG_0
CFG_1
CFG_2
CFG_3
CFG_4
CFG_5
CFG_6
CFG_7
CFG_8

CFG_9
CFG_10
CFG_11
CFG_12
CFG_13
CFG_14
CFG_15

CFG_17
CFG_16
CFG_19
CFG_18

BPM#_0
BPM#_1
BPM#_2
BPM#_3

SKL_PCUDEBUG_0

H15

SKL_PCUDEBUG_1

F15

SKL_PCUDEBUG_2

F16

SKL_PCUDEBUG_3

H16

SKL_PCUDEBUG_4

F19

SKL_PCUDEBUG_5

H18

SKL_PCUDEBUG_6

G21

SKL_PCUDEBUG_7

H20

SKL_PCUDEBUG_8

G16

SKL_PCUDEBUG_9

E16

SKL_PCUDEBUG_10

F17

SKL_PCUDEBUG_11

H17

SKL_PCUDEBUG_12

G20

SKL_PCUDEBUG_13

F20

SKL_PCUDEBUG_14

F21

SKL_PCUDEBUG_15

H19

SKL_PCUSTB_0_DP

F14

SKL_PCUSTB_0_DN

E14

SKL_PCUSTB_1_DP

F18

SKL_PCUSTB_1_DN

G18

BPM_CPU_N0

D16

BPM_CPU_N1

D17

BPM_CPU_N2

G14

BPM_CPU_N3

H14

H_TDO

H13

H_TDI

G12

H_TMS

F13

H_TCK

F11

H_TRST_N

F12

H_PREQ_N

B9

H_PRDY_N

B10

TPEV_CFG_RCOMP

M11

SKL_PCUDEBUG_3 XDP_PCUDEBUG_3

1
1
1
1
1 2

R424 1KR2J-1-GP

1
1
1
1
1 2

R425 1KR2J-1-GP (R_)

1
1
1
1
1 2

R426 1KR2J-1-GP (R_)

1
1

1
1
1

1
1
1
1

H_TDO

H_PREQ_N [99]
H_PRDY_N [99]

R418 49D9R2F-GP

1 2

R423
1K5R2F-2-GP

1 2

SKL_PCUDEBUG_0 [99]

TP404
TP405
TP406
TP407

TP408
TP409
TP410
TP411

TP412
TP413
TP414
TP415

TP416
TP419

TP420
TP421
TP422

TP417
TP418
TP401
TP402
R402 100R2F-L1-GP-U

R410 0R0402-PAD-2-GP
R411 0R0402-PAD-2-GP
R412 0R0402-PAD-2-GP

R417 0R0402-PAD-2-GP

1 2
1 2

1 2
1 2

1 2

0D95V_CPU_VCCIO

XDP_PCUDEBUG_3 [99]

12

R427
51R2F-2-GP

(R_)

12

V_CPU_ST_PLL

PCH_JTAG_TDO
PCH_JTAG_TDI
PCH_JTAG_TMS

H_TRST_N_R

R415
51R2F-2-GP

20170607
Remove R406 & C401

PCH_JTAG_TDO [20]
PCH_JTAG_TDI [20]
PCH_JTAG_TMS [20]
H_TCK [20]

H_TRST_N_R [22]

B B

3D3V_SB

12

R413
10KR2J-3-GP

DDR_VTT_CNTL_GATE

A A

5

4

3

U401

6
5
4

MMDT3904-2-GP

3D3V_SB

12

R414
100KR2J-1-GP

1

DDR_VTT_CNTL_R SM_PGCNTL

2

DDR_VTT_CNTL_CPU

3

2

R416 10KR2J-3-GP

1 2

DDR_VTT_CNTL_CPU [40]

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Title

Title

CPU_(THERMAL/CLOCK/PM/CFG)

CPU_(THERMAL/CLOCK/PM/CFG)

CPU_(THERMAL/CLOCK/PM/CFG)

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Gambits MLK SFF

Gambits MLK SFF

Gambits MLK SFF

Date: Sheet of

Date: Sheet of

Date: Sheet of

Taipei Hsien 221, Taiwan, R.O.C.

4 107Friday, February 02, 2018

4 107Friday, February 02, 2018

1

4 107Friday, February 02, 2018

A00C

A00C

A00C

5

www.teknisi-indonesia.com

D D

4

3

2

1

M_A_DQ[0..63][11]

C C

B B

M_A_DQ5
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ0
M_A_DQ6
M_A_DQ7
M_A_DQ13
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ8
M_A_DQ12
M_A_DQ14
M_A_DQ15
M_A_DQ21
M_A_DQ16
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ17
M_A_DQ22
M_A_DQ23
M_A_DQ25
M_A_DQ28
M_A_DQ27
M_A_DQ31
M_A_DQ29
M_A_DQ24
M_A_DQ30
M_A_DQ26
M_A_DQ32
M_A_DQ36
M_A_DQ34
M_A_DQ35
M_A_DQ33
M_A_DQ37
M_A_DQ39
M_A_DQ38
M_A_DQ44
M_A_DQ40
M_A_DQ47
M_A_DQ43
M_A_DQ41
M_A_DQ45
M_A_DQ46
M_A_DQ42
M_A_DQ49
M_A_DQ54
M_A_DQ53
M_A_DQ50
M_A_DQ52
M_A_DQ51
M_A_DQ48
M_A_DQ55
M_A_DQ61
M_A_DQ63
M_A_DQ60
M_A_DQ59
M_A_DQ62
M_A_DQ57
M_A_DQ58
M_A_DQ56

CPU1A

AE38

DDR0_DQ_0/DDR0_DQ_0

AE37

DDR0_DQ_1/DDR0_DQ_1

AG38

DDR0_DQ_2/DDR0_DQ_2

AG37

DDR0_DQ_3/DDR0_DQ_3

AE39

DDR0_DQ_4/DDR0_DQ_4

AE40

DDR0_DQ_5/DDR0_DQ_5

AG39

DDR0_DQ_6/DDR0_DQ_6

AG40

DDR0_DQ_7/DDR0_DQ_7

AJ38

DDR0_DQ_8/DDR0_DQ_8

AJ37

DDR0_DQ_9/DDR0_DQ_9

AL38

DDR0_DQ_10/DDR0_DQ_10

AL37

DDR0_DQ_11/DDR0_DQ_11

AJ40

DDR0_DQ_12/DDR0_DQ_12

AJ39

DDR0_DQ_13/DDR0_DQ_13

AL39

DDR0_DQ_14/DDR0_DQ_14

AL40

DDR0_DQ_15/DDR0_DQ_15

AN38

DDR0_DQ_16/DDR0_DQ_32

AN40

DDR0_DQ_17/DDR0_DQ_33

AR38

DDR0_DQ_18/DDR0_DQ_34

AR37

DDR0_DQ_19/DDR0_DQ_35

AN39

DDR0_DQ_20/DDR0_DQ_36

AN37

DDR0_DQ_21/DDR0_DQ_37

AR39

DDR0_DQ_22/DDR0_DQ_38

AR40

DDR0_DQ_23/DDR0_DQ_39

AW37

DDR0_DQ_24/DDR0_DQ_40

AU38

DDR0_DQ_25/DDR0_DQ_41

AV35

DDR0_DQ_26/DDR0_DQ_42

AW35

DDR0_DQ_27/DDR0_DQ_43

AU37

DDR0_DQ_28/DDR0_DQ_44

AV37

DDR0_DQ_29/DDR0_DQ_45

AT35

DDR0_DQ_30/DDR0_DQ_46

AU35

DDR0_DQ_31/DDR0_DQ_47

AY8

DDR0_DQ_32/DDR1_DQ_0

AW8

DDR0_DQ_33/DDR1_DQ_1

AV6

DDR0_DQ_34/DDR1_DQ_2

AU6

DDR0_DQ_35/DDR1_DQ_3

AU8

DDR0_DQ_36/DDR1_DQ_4

AV8

DDR0_DQ_37/DDR1_DQ_5

AW6

DDR0_DQ_38/DDR1_DQ_6

AY6

DDR0_DQ_39/DDR1_DQ_7

AY4

DDR0_DQ_40/DDR1_DQ_8

AV4

DDR0_DQ_41/DDR1_DQ_9

AT1

DDR0_DQ_42/DDR1_DQ_10

AT2

DDR0_DQ_43/DDR1_DQ_11

AV3

DDR0_DQ_44/DDR1_DQ_12

AW4

DDR0_DQ_45/DDR1_DQ_13

AT4

DDR0_DQ_46/DDR1_DQ_14

AT3

DDR0_DQ_47/DDR1_DQ_15

AP2

DDR0_DQ_48/DDR1_DQ_32

AM4

DDR0_DQ_49/DDR1_DQ_33

AP3

DDR0_DQ_50/DDR1_DQ_34

AM3

DDR0_DQ_51/DDR1_DQ_35

AP4

DDR0_DQ_52/DDR1_DQ_36

AM2

DDR0_DQ_53/DDR1_DQ_37

AP1

DDR0_DQ_54/DDR1_DQ_38

AM1

DDR0_DQ_55/DDR1_DQ_39

AK3

DDR0_DQ_56/DDR1_DQ_40

AH1

DDR0_DQ_57/DDR1_DQ_41

AK4

DDR0_DQ_58/DDR1_DQ_42

AH2

DDR0_DQ_59/DDR1_DQ_43

AH4

DDR0_DQ_60/DDR1_DQ_44

AK2

DDR0_DQ_61/DDR1_DQ_45

AH3

DDR0_DQ_62/DDR1_DQ_46

AK1

DDR0_DQ_63/DDR1_DQ_47

AU33

DDR0_ECC_0

AT33

DDR0_ECC_1

AW33

DDR0_ECC_2

AV31

DDR0_ECC_3

AU31

DDR0_ECC_4

AV33

DDR0_ECC_5

AW31

DDR0_ECC_6

AY31

DDR0_ECC_7

Lake-S

DDR0_DQSN_0/DDR0_DQSN_0
DDR0_DQSN_1/DDR0_DQSN_1
DDR0_DQSN_2/DDR0_DQSN_4
DDR0_DQSN_3/DDR0_DQSN_5
DDR0_DQSN_4/DDR1_DQSN_0
DDR0_DQSN_5/DDR1_DQSN_1
DDR0_DQSN_6/DDR1_DQSN_4
DDR0_DQSN_7/DDR1_DQSN_5

DDR0_DQSP_0/DDR0_DQSP_0
DDR0_DQSP_1/DDR0_DQSP_1
DDR0_DQSP_2/DDR0_DQSP_4
DDR0_DQSP_3/DDR0_DQSP_5
DDR0_DQSP_4/DDR1_DQSP_0
DDR0_DQSP_5/DDR1_DQSP_1
DDR0_DQSP_6/DDR1_DQSP_4
DDR0_DQSP_7/DDR1_DQSP_5

DDR0_DQSP_8/DDR0_DQSP_8
DDR0_DQSN_8/DDR0_DQSN_8

1 OF 12

DDR0_CKP_0
DDR0_CKN_0
DDR0_CKP_1
DDR0_CKN_1
DDR0_CKP_2
DDR0_CKN_2
DDR0_CKP_3
DDR0_CKN_3

DDR0_CKE_0
DDR0_CKE_1
DDR0_CKE_2
DDR0_CKE_3

DDR0_CS#_0
DDR0_CS#_1
DDR0_CS#_2
DDR0_CS#_3

DDR0_ODT_0
DDR0_ODT_1
DDR0_ODT_2
DDR0_ODT_3

DDR0_BA_0
DDR0_BA_1
DDR0_BG_0

DDR0_MA_16
DDR0_MA_14
DDR0_MA_15

DDR0_MA_0
DDR0_MA_1
DDR0_MA_2
DDR0_MA_3
DDR0_MA_4
DDR0_MA_5
DDR0_MA_6
DDR0_MA_7
DDR0_MA_8

DDR0_MA_9
DDR0_MA_10
DDR0_MA_11
DDR0_MA_12
DDR0_MA_13

DDR0_BG_1

DDR0_ACT#

DDR0_PAR

DDR0_ALERT#

AW18
AV18
AW17
AY17
AW16
AV16
AT16
AU16

AY24
AW24
AV24
AV25

AW12
AU11
AV13
AV10

AW11
AU14
AU12
AY10

AY13
AV15
AW23

AW13
AV14
AY11

AW15
AU18
AU17
AV19
AT19
AU20
AV20
AU21
AT20
AT22
AY14
AU22
AV22
AV12
AV23
AU24

AY15
AT23

AF39
AK39
AP39
AU36
AW7
AU3
AN3
AJ3

AF38
AK38
AP38
AV36
AV7
AU2
AN2
AJ2

AV32
AU32

M_A_CLK0
M_A_CLK#0
M_A_CLK1
M_A_CLK#1

M_A_CKE0
M_A_CKE1

M_A_CS#0
M_A_CS#1

M_A_ODT0
M_A_ODT1

M_A_BS0
M_A_BS1
M_A_BG0

M_A_A16
M_A_A14
M_A_A15

M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_BG1
M_A_ACT#

M_A_PARITY
M_A_ALERT#

M_A_DQS_DN0
M_A_DQS_DN1
M_A_DQS_DN2
M_A_DQS_DN3
M_A_DQS_DN4
M_A_DQS_DN5
M_A_DQS_DN6
M_A_DQS_DN7

M_A_DQS_DP0
M_A_DQS_DP1
M_A_DQS_DP2
M_A_DQS_DP3
M_A_DQS_DP4
M_A_DQS_DP5
M_A_DQS_DP6
M_A_DQS_DP7

M_A_CLK0 [11]
M_A_CLK#0 [11]
M_A_CLK1 [11]
M_A_CLK#1 [11]

M_A_CKE0 [11]
M_A_CKE1 [11]

M_A_CS#0 [11]
M_A_CS#1 [11]

M_A_ODT0 [11]
M_A_ODT1 [11]

M_A_BS0 [11]
M_A_BS1 [11]
M_A_BG0 [11]

M_A_A16 [11]
M_A_A14 [11]
M_A_A15 [11]

M_A_A0 [11]
M_A_A1 [11]
M_A_A2 [11]
M_A_A3 [11]
M_A_A4 [11]
M_A_A5 [11]
M_A_A6 [11]
M_A_A7 [11]
M_A_A8 [11]
M_A_A9 [11]
M_A_A10 [11]
M_A_A11 [11]
M_A_A12 [11]
M_A_A13 [11]
M_A_BG1 [11]
M_A_ACT# [11]

M_A_PARITY [11]
M_A_ALERT# [11]

M_A_DQS_DN0 [11]
M_A_DQS_DN1 [11]
M_A_DQS_DN2 [11]
M_A_DQS_DN3 [11]
M_A_DQS_DN4 [11]
M_A_DQS_DN5 [11]
M_A_DQS_DN6 [11]
M_A_DQS_DN7 [11]

M_A_DQS_DP0 [11]
M_A_DQS_DP1 [11]
M_A_DQS_DP2 [11]
M_A_DQS_DP3 [11]
M_A_DQS_DP4 [11]
M_A_DQS_DP5 [11]
M_A_DQS_DP6 [11]
M_A_DQS_DP7 [11]

DDR CHANNEL A

SKYLAKE-1,SKL-S,LAKE-S

A A

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

5 107Friday, February 02, 2018

5 107Friday, February 02, 2018

1

5 107Friday, February 02, 2018

A00C

A00C

A00C

5

4

3

Title

Title

Title

CPU_(DDR_CHA)

CPU_(DDR_CHA)

CPU_(DDR_CHA)

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Gambits MLK SFF

Gambits MLK SFF

Gambits MLK SFF

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

5

www.teknisi-indonesia.com

D D

C C

B B

4

M_B_DQ[0..63][12]

M_B_DQ4
M_B_DQ5
M_B_DQ7
M_B_DQ3
M_B_DQ1
M_B_DQ0
M_B_DQ6
M_B_DQ2
M_B_DQ13
M_B_DQ9
M_B_DQ14
M_B_DQ15
M_B_DQ12
M_B_DQ8
M_B_DQ10
M_B_DQ11
M_B_DQ16
M_B_DQ20
M_B_DQ22
M_B_DQ23
M_B_DQ17
M_B_DQ21
M_B_DQ18
M_B_DQ19
M_B_DQ28
M_B_DQ24
M_B_DQ30
M_B_DQ26
M_B_DQ25
M_B_DQ29
M_B_DQ27
M_B_DQ31
M_B_DQ32
M_B_DQ33
M_B_DQ38
M_B_DQ34
M_B_DQ36
M_B_DQ37
M_B_DQ39
M_B_DQ35
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ42
M_B_DQ41
M_B_DQ40
M_B_DQ47
M_B_DQ43
M_B_DQ52
M_B_DQ53
M_B_DQ55
M_B_DQ51
M_B_DQ48
M_B_DQ49
M_B_DQ54
M_B_DQ50
M_B_DQ61
M_B_DQ56
M_B_DQ63
M_B_DQ58
M_B_DQ60
M_B_DQ57
M_B_DQ59
M_B_DQ62

CPU1B

AD34

DDR1_DQ_0/DDR0_DQ_16

AD35

DDR1_DQ_1/DDR0_DQ_17

AG35

DDR1_DQ_2/DDR0_DQ_18

AH35

DDR1_DQ_3/DDR0_DQ_19

AE35

DDR1_DQ_4/DDR0_DQ_20

AE34

DDR1_DQ_5/DDR0_DQ_21

AG34

DDR1_DQ_6/DDR0_DQ_22

AH34

DDR1_DQ_7/DDR0_DQ_23

AK35

DDR1_DQ_8/DDR0_DQ_24

AL35

DDR1_DQ_9/DDR0_DQ_25

AK32

DDR1_DQ_10/DDR0_DQ_26

AL32

DDR1_DQ_11/DDR0_DQ_27

AK34

DDR1_DQ_12/DDR0_DQ_28

AL34

DDR1_DQ_13/DDR0_DQ_29

AK31

DDR1_DQ_14/DDR0_DQ_30

AL31

DDR1_DQ_15/DDR0_DQ_31

AP35

DDR1_DQ_16/DDR0_DQ_48

AN35

DDR1_DQ_17/DDR0_DQ_49

AN32

DDR1_DQ_18/DDR0_DQ_50

AP32

DDR1_DQ_19/DDR0_DQ_51

AN34

DDR1_DQ_20/DDR0_DQ_52

AP34

DDR1_DQ_21/DDR0_DQ_53

AN31

DDR1_DQ_22/DDR0_DQ_54

AP31

DDR1_DQ_23/DDR0_DQ_55

AL29

DDR1_DQ_24/DDR0_DQ_56

AM29

DDR1_DQ_25/DDR0_DQ_57

AP29

DDR1_DQ_26/DDR0_DQ_58

AR29

DDR1_DQ_27/DDR0_DQ_59

AM28

DDR1_DQ_28/DDR0_DQ_60

AL28

DDR1_DQ_29/DDR0_DQ_61

AR28

DDR1_DQ_30/DDR0_DQ_62

AP28

DDR1_DQ_31/DDR0_DQ_63

AR12

DDR1_DQ_32/DDR1_DQ_16

AP12

DDR1_DQ_33/DDR1_DQ_17

AM13

DDR1_DQ_34/DDR1_DQ_18

AL13

DDR1_DQ_35/DDR1_DQ_19

AR13

DDR1_DQ_36/DDR1_DQ_20

AP13

DDR1_DQ_37/DDR1_DQ_21

AM12

DDR1_DQ_38/DDR1_DQ_22

AL12

DDR1_DQ_39/DDR1_DQ_23

AP10

DDR1_DQ_40/DDR1_DQ_24

AR10

DDR1_DQ_41/DDR1_DQ_25

AR7

DDR1_DQ_42/DDR1_DQ_26

AP7

DDR1_DQ_43/DDR1_DQ_27

AR9

DDR1_DQ_44/DDR1_DQ_28

AP9

DDR1_DQ_45/DDR1_DQ_29

AR6

DDR1_DQ_46/DDR1_DQ_30

AP6

DDR1_DQ_47/DDR1_DQ_31

AM10

DDR1_DQ_48/DDR1_DQ_48

AL10

DDR1_DQ_49/DDR1_DQ_49

AM7

DDR1_DQ_50/DDR1_DQ_50

AL7

DDR1_DQ_51/DDR1_DQ_51

AM9

DDR1_DQ_52/DDR1_DQ_52

AL9

DDR1_DQ_53/DDR1_DQ_53

AM6

DDR1_DQ_54/DDR1_DQ_54

AL6

DDR1_DQ_55/DDR1_DQ_55

AJ6

DDR1_DQ_56/DDR1_DQ_56

AJ7

DDR1_DQ_57/DDR1_DQ_57

AE6

DDR1_DQ_58/DDR1_DQ_58

AF7

DDR1_DQ_59/DDR1_DQ_59

AH7

DDR1_DQ_60/DDR1_DQ_60

AH6

DDR1_DQ_61/DDR1_DQ_61

AE7

DDR1_DQ_62/DDR1_DQ_62

AF6

DDR1_DQ_63/DDR1_DQ_63

AR25

DDR1_ECC_0

AR26

DDR1_ECC_1

AM26

DDR1_ECC_2

AM25

DDR1_ECC_3

AP26

DDR1_ECC_4

AP25

DDR1_ECC_5

AL25

DDR1_ECC_6

AL26

DDR1_ECC_7

SKYLAKE-1,SKL-S,LAKE-S

DDR CHANNEL B

3

Lake-S

2 OF 12

DDR1_CKP_0
DDR1_CKN_0
DDR1_CKP_1
DDR1_CKN_1
DDR1_CKP_2
DDR1_CKN_2
DDR1_CKP_3
DDR1_CKN_3

DDR1_CKE_0
DDR1_CKE_1
DDR1_CKE_2
DDR1_CKE_3

DDR1_CS#_0
DDR1_CS#_1
DDR1_CS#_2
DDR1_CS#_3

DDR1_ODT_0
DDR1_ODT_1
DDR1_ODT_2
DDR1_ODT_3

DDR1_MA_16
DDR1_MA_14
DDR1_MA_15

DDR1_BA_0
DDR1_BA_1

DDR1_BG_0
DDR1_MA_0

DDR1_MA_1
DDR1_MA_2
DDR1_MA_3
DDR1_MA_4
DDR1_MA_5
DDR1_MA_6
DDR1_MA_7
DDR1_MA_8

DDR1_MA_9
DDR1_MA_10
DDR1_MA_11
DDR1_MA_12
DDR1_MA_13

DDR1_BG_1

DDR1_ACT#

DDR1_PAR

DDR1_ALERT#

DDR1_DQSN_0/DDR0_DQSN_2
DDR1_DQSN_1/DDR0_DQSN_3
DDR1_DQSN_2/DDR0_DQSN_6
DDR1_DQSN_3/DDR0_DQSN_7
DDR1_DQSN_4/DDR1_DQSN_2
DDR1_DQSN_5/DDR1_DQSN_3
DDR1_DQSN_6/DDR1_DQSN_6
DDR1_DQSN_7/DDR1_DQSN_7

DDR1_DQSP_0/DDR0_DQSP_2
DDR1_DQSP_1/DDR0_DQSP_3
DDR1_DQSP_2/DDR0_DQSP_6
DDR1_DQSP_3/DDR0_DQSP_7
DDR1_DQSP_4/DDR1_DQSP_2
DDR1_DQSP_5/DDR1_DQSP_3
DDR1_DQSP_6/DDR1_DQSP_6
DDR1_DQSP_7/DDR1_DQSP_7

DDR1_DQSP_8/DDR1_DQSP_8
DDR1_DQSN_8/DDR1_DQSN_8

DDR_VREF_CA
DDR0_VREF_DQ
DDR1_VREF_DQ

AM20
AM21
AP22
AP21
AN20
AN21
AP19
AP20

AY29
AV29
AW29
AU29

AP17
AN15
AN17
AM15

AM16
AL16
AP15
AL15

AN18
AL17
AP16

AL18
AM18
AW28

AL19
AL22
AM22
AM23
AP23
AL23
AW26
AY26
AU26
AW27
AP18
AU27
AV27
AR15
AY28
AU28

AL20
AY25

AF34
AK33
AN33
AN29
AN13
AR8
AM8
AG6

AF35
AL33
AP33
AN28
AN12
AP8
AL8
AG7

AN25
AN26

AB40
AC40
AC39

M_B_CLK0
M_B_CLK#0
M_B_CLK1
M_B_CLK#1

M_B_CKE0
M_B_CKE1

M_B_CS#0
M_B_CS#1

M_B_ODT0
M_B_ODT1

M_B_A16
M_B_A14
M_B_A15

M_B_BS0
M_B_BS1
M_B_BG0

M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_BG1
M_B_ACT#

M_B_PARITY
M_B_ALERT#

M_B_DQS_DN0
M_B_DQS_DN1
M_B_DQS_DN2
M_B_DQS_DN3
M_B_DQS_DN4
M_B_DQS_DN5
M_B_DQS_DN6
M_B_DQS_DN7

M_B_DQS_DP0
M_B_DQS_DP1
M_B_DQS_DP2
M_B_DQS_DP3
M_B_DQS_DP4
M_B_DQS_DP5
M_B_DQS_DP6
M_B_DQS_DP7

V_SM_VREF_CNT
M_VREF_DQ_DIM0
M_VREF_DQ_DIM1

2

M_B_CLK0 [12]
M_B_CLK#0 [12]
M_B_CLK1 [12]
M_B_CLK#1 [12]

M_B_CKE0 [12]
M_B_CKE1 [12]

M_B_CS#0 [12]
M_B_CS#1 [12]

M_B_ODT0 [12]
M_B_ODT1 [12]

M_B_A16 [12]
M_B_A14 [12]
M_B_A15 [12]

For DDR4 Modify

M_B_BS0 [12]
M_B_BS1 [12]
M_B_BG0 [12]

M_B_A0 [12]
M_B_A1 [12]
M_B_A2 [12]
M_B_A3 [12]
M_B_A4 [12]
M_B_A5 [12]
M_B_A6 [12]
M_B_A7 [12]
M_B_A8 [12]
M_B_A9 [12]
M_B_A10 [12]
M_B_A11 [12]
M_B_A12 [12]
M_B_A13 [12]
M_B_BG1 [12]
M_B_ACT# [12]

For DDR4 Modify

M_B_PARITY [12]
M_B_ALERT# [12]

M_B_DQS_DN0 [12]
M_B_DQS_DN1 [12]
M_B_DQS_DN2 [12]
M_B_DQS_DN3 [12]
M_B_DQS_DN4 [12]
M_B_DQS_DN5 [12]
M_B_DQS_DN6 [12]
M_B_DQS_DN7 [12]

M_B_DQS_DP0 [12]
M_B_DQS_DP1 [12]
M_B_DQS_DP2 [12]
M_B_DQS_DP3 [12]
M_B_DQS_DP4 [12]
M_B_DQS_DP5 [12]
M_B_DQS_DP6 [12]
M_B_DQS_DP7 [12]

1

TP601

M_VREF_DQ_DIM1 [12]

12

C601
SCD1U16V2KX-3DLGP

R601 2R2F-GP

1 2

C602
SCD022U16V2KX-3DLGP

2 1

DIMM_CA_CPU_VREF_RC

12

R602
24D9R2F-L-GP

1

DIMM_CA_VREF_AV_SM_VREF_CNT

DIMM_CA_VREF_A [11]

M_VREF_DQ_DIM1

A A

5

4

3

1 2

C603 SCD1U16V2KX-3DLGP

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Title

Title

CPU_(DDR_CHB)

CPU_(DDR_CHB)

CPU_(DDR_CHB)

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Gambits MLK SFF

Gambits MLK SFF

Gambits MLK SFF

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Taipei Hsien 221, Taiwan, R.O.C.

6 107Friday, February 02, 2018

6 107Friday, February 02, 2018

1

6 107Friday, February 02, 2018

A00C

A00C

A00C

5

www.teknisi-indonesia.com

D D

4

3

2

1

HDMI_DATA_CPU_P0[56]
HDMI_DATA_CPU_N0[56]
HDMI_DATA_CPU_P1[56]
HDMI_DATA_CPU_N1[56]

C C

B B

HDMI_DATA_CPU_P2[56]
HDMI_DATA_CPU_N2[56]
HDMI_DATA_CPU_P3[56]
HDMI_DATA_CPU_N3[56]

HDMI_DATA_CPU_P0
HDMI_DATA_CPU_N0
HDMI_DATA_CPU_P1
HDMI_DATA_CPU_N1
HDMI_DATA_CPU_P2
HDMI_DATA_CPU_N2
HDMI_DATA_CPU_P3
HDMI_DATA_CPU_N3

CPU1D

C21

DDI1_TXP_0

D21

DDI1_TXN_0

D22

DDI1_TXP_1

E22

DDI1_TXN_1

B23

DDI1_TXP_2

A23

DDI1_TXN_2

C23

DDI1_TXP_3

D23

DDI1_TXN_3

B13

DDI1_AUXP

C13

DDI1_AUXN

B18

DDI2_TXP_0

A18

DDI2_TXN_0

D18

DDI2_TXP_1

E18

DDI2_TXN_1

C19

DDI2_TXP_2

D19

DDI2_TXN_2

D20

DDI2_TXP_3

E20

DDI2_TXN_3

A12

DDI2_AUXP

B12

DDI2_AUXN

B14

DDI3_TXP_0

A14

DDI3_TXN_0

C15

DDI3_TXP_1

B15

DDI3_TXN_1

B16

DDI3_TXP_2

A16

DDI3_TXN_2

C17

DDI3_TXP_3

B17

DDI3_TXN_3

B11

DDI3_AUXP

C11

DDI3_AUXN

SKYLAKE-1,SKL-S,LAKE-S

Lake-S

4 OF 12

EDP_TXP_0
EDP_TXN_0
EDP_TXP_1
EDP_TXN_1
EDP_TXN_2
EDP_TXP_2
EDP_TXN_3
EDP_TXP_3

EDP_AUXP
EDP_AUXN

EDP_DISP_UTIL

DISP_RCOMP

PROC_AUDIO_CLK

PROC_AUDIO_SDI

PROC_AUDIO_SDO

E10

D10

D9

C9

DDI_VGA_DATA_CPU_N2

H10

DDI_VGA_DATA_CPU_P2

G10

DDI_VGA_DATA_CPU_N3

G9

DDI_VGA_DATA_CPU_P3

F9

DP_AUX_CPU_P

D12

DP_AUX_CPU_N

E12

DISP_UTIL_CPU

D14

FDI_COMP

M9

AUD_AZACPU_SCLK

V3

AUD_AZACPU_SDO

V2

AUD_AZACPU_SDI AUD_AZACPU_SDI_R

U1

DDI_VGA_DATA_CPU_N2 [59]
DDI_VGA_DATA_CPU_P2 [59]
DDI_VGA_DATA_CPU_N3 [59]
DDI_VGA_DATA_CPU_P3 [59]

DP_AUX_CPU_P [59]
DP_AUX_CPU_N [59]

1

TP701

R701 24D9R2F-L-GP

1 2

1 2

R702
20R2J-3-GP

0D95V_CPU_VCCIO

AUD_AZACPU_SCLK [20]
AUD_AZACPU_SDO [20]

AUD_AZACPU_SDI_R [20]

A A

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

7 107Friday, February 02, 2018

7 107Friday, February 02, 2018

1

7 107Friday, February 02, 2018

A00C

A00C

A00C

5

4

3

Title

Title

Title

CPU_(DDI/EDP)

CPU_(DDI/EDP)

CPU_(DDI/EDP)

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Gambits MLK SFF

Gambits MLK SFF

Gambits MLK SFF

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

5

www.teknisi-indonesia.com

4

3

2

1

CPU1G

A25
A26
A27
A28
A29
A30
B25
B27
B29

D D

C C

B B

B31
B32
B33
B34
B35
B36
B37
C25
C26
C27
C28
C29
C30
C32
C34
C36
D25
D27
D29
D31
D32
D33
D34
D35
D36
E24
E25
E26
E27
E28
E29
E30
E32
E34
E36
F23
F24
F25
F27
F29
F31
G30
G32
H22
H23
H25
H27
H29

H31
AJ11
AJ13
AJ15
AJ17
AJ19
AJ21

M32

L31

K32

J33
H33
G34

AJ25
AJ26
AJ27
AJ28

SKYLAKE-1,SKL-S,LAKE-S

VCC1
VCC2
VCC3
VCC4
VCC5
VCC6
VCC24
VCC25
VCC26
VCC27
VCC28
VCC29
VCC30
VCC31
VCC32
VCC33
VCC34
VCC35
VCC36
VCC37
VCC38
VCC39
VCC40
VCC41
VCC42
VCC43
VCC44
VCC45
VCC46
VCC47
VCC48
VCC49
VCC50
VCC51
VCC52
VCC53
VCC54
VCC55
VCC56
VCC57
VCC58
VCC59
VCC60
VCC61
VCC62
VCC63
VCC64
VCC65
VCC66
VCC67
VCC80
VCC81
VCC84
VCC85
VCC86
VCC87
VCC88
VCC89
VCC7
VCC9
VCC11
VCC13
VCC15
VCC17

VCC146
VCC134
VCC115
VCC104
VCC91
VCC82
VCC18
VCC19
VCC20
VCC21

Lake-S

7 OF 12

VCC90
VCC93
VCC68
VCC69
VCC70
VCC73
VCC74
VCC75
VCC76
VCC77
VCC78
VCC79
VCC94
VCC95
VCC96
VCC97
VCC98

VCC99
VCC100
VCC101
VCC102
VCC103
VCC106
VCC107
VCC108
VCC109
VCC110
VCC111
VCC112
VCC113
VCC114
VCC117
VCC118
VCC119
VCC120
VCC121
VCC122
VCC123
VCC124
VCC125
VCC126
VCC127
VCC128
VCC129
VCC130
VCC131
VCC132
VCC133
VCC136
VCC137
VCC138
VCC139
VCC140
VCC141
VCC142
VCC143
VCC144
VCC145

VCC8
VCC10
VCC12
VCC14
VCC16

VCC22
VCC23
VCC71
VCC72
VCC83
VCC92

VCC105
VCC116
VCC135

VCC_SENSE
VSS_SENSE

H32

1V_CPU_CORE1V_CPU_CORE 1V_CPU_GT 1D05V_CPU_SA

J21
F32
F33
F34
G23
G24
G25
G26
G27
G28
G29
J22
J23
J24
J25
J26
J27
J28
J29
J30
J31
K16
K18
K20
K21
K23
K25
K27
K29
K31
L14
L15
L16
L17
L18
L19
L20
L21
L22
L23
L24
L25
L26
L27
L28
L29
L30
M13
M14
M16
M18
M20
M22
M24
M26
M28
M30
AJ12
AJ14
AJ16
AJ18
AJ20

AJ29
AK21
F35
F37
G35
H34
J35
K34
L33

VCORE_VCC_SEN

C38
D38

VCORE_VSS_SEN

VCORE_VCC_SEN [44]
VCORE_VSS_SEN [44]

CPU1H

AA34

VCCGT1

AA35

VCCGT2

AA36

VCCGT3

AA37

VCCGT4

AA38

VCCGT5

AB33

VCCGT6

AB34

VCCGT7

G36

VCCGT8

G37

VCCGT9

G38

VCCGT10

G39

VCCGT11

G40

VCCGT12

H36

VCCGT13

H38

VCCGT14

H40

VCCGT15

J36

VCCGT16

J37

VCCGT17

J38

VCCGT18

J39

VCCGT19

J40

VCCGT20

K36

VCCGT21

K38

VCCGT22

K40

VCCGT23

L34

VCCGT24

L35

VCCGT25

L36

VCCGT26

L37

VCCGT27

L38

VCCGT28

L39

VCCGT29

L40

VCCGT30

M33

VCCGT31

M34

VCCGT32

M36

VCCGT33

M38

VCCGT34

M40

VCCGT35

N34

VCCGT36

N35

VCCGT37

N36

VCCGT38

N37

VCCGT39

N38

VCCGT40

N39

VCCGT41

N40

VCCGT42

P33

VCCGT43

P34

VCCGT44

P36

VCCGT45

P38

VCCGT46

P40

VCCGT47

R34

VCCGT48

R35

VCCGT49

R36

VCCGT50

R37

VCCGT51

R38

VCCGT52

R39

VCCGT53

R40

VCCGT54

T33

VCCGT55

T34

VCCGT56

T36

VCCGT57

T38

VCCGT58

T40

VCCGT59

U34

VCCGT60

U35

VCCGT61

U36

VCCGT62

U37

VCCGT63

U38

VCCGT64

U39

VCCGT65

U40

VCCGT66

V33

VCCGT67

V34

VCCGT68

V36

VCCGT69

V38

VCCGT70

V40

VCCGT71

W34

VCCGT72

W35

VCCGT73

W36

VCCGT74

W37

VCCGT75

W38

VCCGT76

Y33

VCCGT77

Y34

VCCGT78

Y36

VCCGT79

Y38

VCCGT80

SKYLAKE-1,SKL-S,LAKE-S

Lake-S

8 OF 12

VCCGT_SENSE
VSSGT_SENSE

F39
F38

VCCGT_VCC_SEN
VCCGT_VSS_SEN

0D95V_CPU_VCCIO

V_CPU_ST_PLL

VCCGT_VCC_SEN [44]
VCCGT_VSS_SEN [44]

CPU1I

AA7

VCCSA2

AB6

VCCSA3

AB7

VCCSA4

AB8

VCCSA5

AC7

VCCSA6

AC8

VCCSA7

N7

VCCSA8

P7

VCCSA9

R7

VCCSA10

T7

VCCSA11

U7

VCCSA12

Y6

VCCSA15

Y7

VCCSA16

Y8

VCCSA17

W7

VCCSA14

V7

VCCSA13

AA6

VCCSA1

AK11

VCCIO2

AK14

VCCIO3

AK24

VCCIO4

AJ23

VCCIO1

M8

VCCIO5

P8

VCCIO6

T8

VCCIO7

U8

VCCIO8

W8

VCCIO9

V5

VCCST1

V6

VCCST2

V4

VCCPLL

SKYLAKE-1,SKL-S,LAKE-S

Lake-S

9 OF 12

VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8

VDDQ9
VDDQ10
VDDQ11
VDDQ12
VDDQ13
VDDQ14
VDDQ15
VDDQ16

VCCPLL_OC

VCCSA_SENSE

VCCIO_SENSE

VSS_SAIO_SENSE

AT18
AT21
AU13
AU15
AU19
AU23
AV11
AV17
AV21
AW10
AW14
AW25
AY12
AY16
AY18
AY23

AJ9

AD5
AF4
AE4

1D2V_SM_S3

VCCPLL_OC_R

VCCSA_SENSE
VCCIO_SENSE
VSS_SA_IO_SENSE

R801 0R0402-PAD-2-GP

1 2

VCCPLL_OC_R

20170414
follow CPU EDS change to mount 1x 1uF 0402

1D2V_SM_S3

C801 SC1U10V2KX-1DLGP

1 2

VCCSA_SENSE [47]
VCCIO_SENSE [48]
VSS_SA_IO_SENSE [47]

1D2V_SM_S3 1D2V_SM_S3

12

C808

SCD1U16V2KX-3DLGP

12

C807
SCD1U16V2KX-3DLGP

VCORE_VCC_SEN VCORE_VSS_SEN

A A

R802 49D9R2F-GP

1 2

(R_)

5

12V_S5

12

R807
100KR2J-1-GP

12

R810
100KR2J-1-GP

(R_)

4

Q802

5
6

2N7002KDW-1-GP

34
2
1

SLP_S4_N_SFR_2
SLP_S4_N_SFR

12V_S5

12

R804
47KR2J-2-GP

R809 0R0402-PAD-2-GP

1 2

12

C806
SCD1U16V2KX-L-GP

(R_)

SLP_S4_NSLP_S4_N_SFR_1

R805 10KR2J-3-GP

1 2

12

R806
100KR2J-1-GP

12

C802
SCD1U25V2KX-1-DL-GP

SLP_S4_N [20,24,32,38,39,40,99]

3

SLP_S4_N_SFR_G

12

C803
SCD1U16V2KX-L-GP

(R_)

1V_PCH_SB

G

DS

Q801
AO3418L-GP

(084.03404.0031)

12

R808
4K7R2J-2-GP

(R_)

R803 0R3J-0-U-GP

1 2

(R_)

2

V_CPU_ST_PLL

12

C804
SC10U25V5KX-DL-GP

V_CPU_ST_PLL

12

C805
SCD1U16V2KX-3DLGP

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Title

Title

CPU_(CPU Power)

CPU_(CPU Power)

CPU_(CPU Power)

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

C

C

C

Gambits MLK SFF

Gambits MLK SFF

Gambits MLK SFF

Date: Sheet of

Date: Sheet of

Date: Sheet of

Taipei Hsien 221, Taiwan, R.O.C.

8 107Friday, February 02, 2018

8 107Friday, February 02, 2018

1

8 107Friday, February 02, 2018

A00

A00

A00

5

www.teknisi-indonesia.com

4

3

2

1

Lake-S

11 OF 12

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

12 OF 12

C37
C5
C8
C10
D24
D26
D28
D30
D37
D39
D4
D7
E11
E13
E15
E17
E19
E21
E23
E3
E31
E33
E35
E37
E6
E9
F1
F10
F22
F26
F28
F30
F4
F40
F7
G11
G13
G15
G17
G19
G22
G3
G31
G33
G6
H1
H21
H24
H26
H28
H30
H35
H37
H39
H4
H7
H9
J10
J12
L11
J16
J18
J20
J3
J32
J34
J6
K1
K14
K15
K17
K19
K22
K24
K26
K28
K30
K33
K35
K37

CPU1L

K39

VSS

K4

VSS

K7

VSS

L13

VSS

L3

VSS

L32

VSS

L6

VSS

L9

VSS

M1

VSS

M10

VSS

M12

VSS

M15

VSS

M17

VSS

M19

VSS

M21

VSS

M23

VSS

M25

VSS

M27

VSS

M29

VSS

M35

VSS

M37

VSS

M39

VSS

M4

VSS

M7

VSS

N3

VSS

N33

VSS

N6

VSS

N8

VSS

P1

VSS

P35

VSS

P37

VSS

P39

VSS

P4

VSS

R3

VSS

R33

VSS

R6

VSS

R8

VSS

T1

VSS

T35

VSS

T37

VSS

T39

VSS

T4

VSS

U3

VSS

U33

VSS

U6

VSS

V1

VSS

V35

VSS

V37

VSS

V39

VSS

V8

VSS

W3

VSS

W33

VSS

W6

VSS

Y35

VSS

Y37

VSS

Y5

VSS

A4

VSS_NCTF_A4

B38

VSS_NCTF_B38

C2

VSS_NCTF_C2

D40

VSS_NCTF_D40

SKYLAKE-1,SKL-S,LAKE-S

Lake-S

AJ24

VSS

AJ30

VSS

AK22

VSS

AK27

VSS

AR22

VSS

AR23

VSS

AT15

VSS

AU39

VSS

AU40

VSS

AV39

VSS

AW38

VSS

F36

VSS

H11

VSS

H12

VSS

TP_CPU1_L8

1

TP903

20170519
Remove R903, CPU1_AY3 change to test point

R902 0R0402-PAD-2-GP

1 2
1 2

PROC_TRIGIN_CPU[22]

PROC_TRIGOUT_PCH[22]

PROC_TRIGOUT_PCH PROC_TRIGOUT_CPU

1 2

R901
20R2F-GP

R903 0R0402-PAD-2-GP

CPU1_G8
CPU1_AY3

PROC_TRIGIN_CPU

20170519
Remove R903, CPU1_AY3 change to test point

CPU1J

J8

RSVD_TP2

J7

RSVD_TP1

L8

IST_TRIG

K8

RSVD_TP3

AV1

RSVD8

AW2

RSVD9

H8

RSVD13

K10

RSVD20

L10

RSVD24

J17

RSVD18

B39

RSVD10

C40

RSVD11

J19

RSVD19

G8

VSS_G8

AY3

VSS_AY3

D1

PROC_TRIGIN

B3

PROC_TRIGOUT

L12

RSVD25

K12

RSVD22

SKYLAKE-1,SKL-S,LAKE-S

Lake-S

10 OF 12

RSVD4
RSVD1
RSVD2
RSVD3

RSVD5
RSVD12
RSVD21

RSVD17
RSVD16

RSVD7

RSVD6

RSVD15
RSVD23
RSVD14

AC37
AB35
AB37

20170510

AB38

Remove TP901 & TP902 & TP904

AJ22

TP905 &TP906 & TP907

D15
K11

J15
J14

AU9
AU10

J13
K13
J11

D D

C C

B B

A11

VSS

A13

VSS

A15

VSS

A17

VSS

A24

VSS

A7

VSS

AA3

VSS

AA33

VSS

AA8

VSS

AB39

VSS

AB5

VSS

AC3

VSS

AC33

VSS

AC34

VSS

AC35

VSS

AC6

VSS

AD1

VSS

AD33

VSS

AD36

VSS

AD37

VSS

AD38

VSS

AD39

VSS

AD4

VSS

AD40

VSS

AD6

VSS

AD7

VSS

AD8

VSS

AE3

VSS

AE33

VSS

AE36

VSS

AE5

VSS

AE8

VSS

AF1

VSS

AF33

VSS

AF36

VSS

AF37

VSS

AF40

VSS

AF5

VSS

AF8

VSS

AG1

VSS

AG2

VSS

AG3

VSS

AG33

VSS

AG36

VSS

AG4

VSS

AG5

VSS

AG8

VSS

AH33

VSS

AH36

VSS

AH37

VSS

AH38

VSS

AH39

VSS

AH40

VSS

AH5

VSS

AH8

VSS

AJ1

VSS

AJ31

VSS

AJ32

VSS

AJ33

VSS

AJ34

VSS

AJ35

VSS

AJ36

VSS

AJ4

VSS

AJ5

VSS

AJ8

VSS

AK10

VSS

AK12

VSS

AK13

VSS

AK15

VSS

AK16

VSS

AK17

VSS

AK18

VSS

AK19

VSS

AK20

VSS

AK23

VSS

AK25

VSS

AK26

VSS

AK28

VSS

SKYLAKE-1,SKL-S,LAKE-S

AK29

VSS

AK30

VSS

AK36

VSS

AK37

VSS

AK40

VSS

AK5

VSS

AK6

VSS

AK7

VSS

AK8

VSS

AK9

VSS

AL1

VSS

AL11

VSS

AL14

VSS

AL2

VSS

AL21

VSS

AL24

VSS

AL27

VSS

AL3

VSS

AL30

VSS

AL36

VSS

AL4

VSS

AL5

VSS

AM11

VSS

AM14

VSS

AM17

VSS

AM19

VSS

AM24

VSS

AM27

VSS

AM30

VSS

AM31

VSS

AM32

VSS

AM33

VSS

AM34

VSS

AM35

VSS

AM36

VSS

AM37

VSS

AM38

VSS

AM39

VSS

AM40

VSS

AM5

VSS

AN1

VSS

AN10

VSS

AN11

VSS

AN14

VSS

AN16

VSS

AN19

VSS

AN22

VSS

AN23

VSS

AN24

VSS

AN27

VSS

AN30

VSS

AN36

VSS

AN4

VSS

AN5

VSS

AN6

VSS

AN7

VSS

AN8

VSS

AN9

VSS

AP11

VSS

AP14

VSS

AP24

VSS

AP27

VSS

AP30

VSS

AP36

VSS

AP37

VSS

AP40

VSS

AP5

VSS

AR1

VSS

AR11

VSS

AR14

VSS

AR16

VSS

AR17

VSS

AR18

VSS

AR19

VSS

AR2

VSS

AR20

VSS

AR21

VSS

6 OF 12

CPU1F

Lake-S

CPU1K

AR24

VSS

AR27

VSS

AR3

VSS

AR30

VSS

AR31

VSS

AR32

VSS

AR33

VSS

AR34

VSS

AR35

VSS

AR36

VSS

AR4

VSS

AR5

VSS

AT10

VSS

AT11

VSS

AT12

VSS

AT13

VSS

AT14

VSS

AT17

VSS

AT24

VSS

AT25

VSS

AT26

VSS

AT27

VSS

AT28

VSS

AT29

VSS

AT30

VSS

AT31

VSS

AT32

VSS

AT34

VSS

AT36

VSS

AT37

VSS

AT38

VSS

AT39

VSS

AT40

VSS

AT5

VSS

AT6

VSS

AT7

VSS

AT8

VSS

AT9

VSS

AU1

VSS

AU25

VSS

AU30

VSS

AU34

VSS

AU4

VSS

AU5

VSS

AU7

VSS

AV2

VSS

AV26

VSS

AV28

VSS

AV30

VSS

AV34

VSS

AV38

VSS

AV5

VSS

AV9

VSS

AW3

VSS

AW30

VSS

AW32

VSS

AW34

VSS

AW36

VSS

AW5

VSS

AW9

VSS

AY27

VSS

AY30

VSS

AY5

VSS

AY7

VSS

AY9

VSS

B24

VSS

B26

VSS

B28

VSS

B30

VSS

B6

VSS

C12

VSS

C14

VSS

C16

VSS

C18

VSS

C20

VSS

C22

VSS

C24

VSS

C31

VSS

C33

VSS

C35

VSS

SKYLAKE-1,SKL-S,LAKE-S

A A

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

9 107Friday, February 02, 2018

9 107Friday, February 02, 2018

1

9 107Friday, February 02, 2018

A00C

A00C

A00C

5

4

3

Title

Title

Title

CPU_(VSS)

CPU_(VSS)

CPU_(VSS)

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Gambits MLK SFF

Gambits MLK SFF

Gambits MLK SFF

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

5

www.teknisi-indonesia.com

PLACE ALL 0805 CAPS ON TOP SIDE OF CPU CAVITY PLACE ALL 0603 CAPS

1V_CPU_CORE

12

PC1007

SC22U6D3V5MX-2DLGP

D D

20170518
Follow Tahoe MT MLK A00 22uF 0805*12pcs

12

PC1008
SC22U6D3V5MX-2DLGP

12

PC1009
SC22U6D3V5MX-2DLGP

(R_)

12

PC1010

SC22U6D3V5MX-2DLGP

(R_)

4

12

PC1011
SC22U6D3V5MX-2DLGP

(R_)

12

PC1012
SC22U6D3V5MX-2DLGP

12

PC1018
SC22U6D3V5MX-2DLGP

3

20170518
Follow Tahoe MT MLK A00 22uF 0603*2pcs

1V_CPU_CORE

1V_CPU_CORE

ON TOP SIDE OF CPU CAVITY

12

PC1001
SC22U6D3V3MX-1-DL-GP

12

PC1002
SC22U6D3V3MX-1-DL-GP

PLACE ALL 0805 CAPS AT TOP SOCKET EDGE

12

PC1019
SC22U6D3V5MX-L3-GP

(78.22610.51LDL)

12

PC1020
SC22U6D3V5MX-L3-GP

(78.22610.51LDL)

12

PC1021
SC22U6D3V5MX-L3-GP

(78.22610.51LDL)

20170518
Follow Tahoe MT MLK A00 unmount 22uF 0805*5pcs

12

PC1022
SC22U6D3V5MX-L3-GP

(78.22610.51LDL)

2

20170518
Follow Tahoe MT MLK A00 unmount 22uF 0805*3pcs

1V_CPU_CORE

IF Have enough TOP SIDE OF CPU CAVITY, On it,
Or at socket EDGE

12

PC1004
SC22U6D3V5MX-L3-GP

(78.22610.51LDL)

12

PC1023
SC22U6D3V5MX-L3-GP

(78.22610.51LDL)

12

PC1005
SC22U6D3V5MX-L3-GP

(78.22610.51LDL)

12

PC1006
SC22U6D3V5MX-L3-GP

(78.22610.51LDL)

1

Need EE check

PLACE CAPS FOR DIMM PLACE CAPS IN SOCKET EDGE TOP

1D2V_SM_S3

12

C1025
SC22U6D3V5MX-L3-GP

(R_)

C C

PLACE CAPS ON TOP SIDE
SOCKET CAVITY

1V_CPU_GT

12

PC1034
SC22U6D3V5MX-2DLGP

(R_)

12

PC1042

B B

1D05V_CPU_SA

SC22U6D3V5MX-2DLGP

20170518
Follow Tahoe MT MLK A00 unmount 22uF 0805*4pcs

PLACE CAPS ON TOP SIDE
SOCKET CAVITY

12

PC1050
SC47U6D3V5MX-1DL-GP

12

PC1035

SC22U6D3V5MX-2DLGP

PLACE CAPS
AT SOCKET EDGE ON TOP

12

PC1043

SC22U6D3V5MX-2DLGP

12

PC1051
SC47U6D3V5MX-1DL-GP

12

C1026
SC22U6D3V5MX-L3-GP

(R_)

20170518
Follow Tahoe MT MLK A00 22uF 0805*7pcs + unmont 2pcs

12

PC1036

(R_)

20170518
Follow Tahoe MT MLK A00 47uF 0805*4pcs

SC22U6D3V5MX-2DLGP

(R_)

12

PC1044
SC22U6D3V5MX-2DLGP

12

PC1052
SC47U6D3V5MX-1DL-GP

12

C1027
SC22U6D3V5MX-L3-GP

(R_)

12

PC1037
SC22U6D3V5MX-2DLGP

(R_)

12

PC1045
SC22U6D3V5MX-2DLGP

PLACE CAPS AT TOP SOCKET EDGE

12

PC1053
SC47U6D3V5MX-1DL-GP

1D2V_SM_S3

12

PC1038
SC22U6D3V5MX-2DLGP

(R_)

12

C1028
SC47U6D3V5MX-1DL-GP

20170414
follow PDG change to mount 4x 47uF 0805

12

PC1039

SC22U6D3V5MX-2DLGP

(R_)

12

C1029
SC47U6D3V5MX-1DL-GP

12

0D95V_CPU_VCCIO

12

C1030
SC47U6D3V5MX-1DL-GP

PC1040
SC22U6D3V5MX-2DLGP

12

PC1046
SC22U6D3V3MX-1-DL-GP

12

C1031
SC47U6D3V5MX-1DL-GP

PLACE CAPS
IN SOCKET EDGE TOP

12

PC1041
SC22U6D3V5MX-2DLGP

20170518
Follow Tahoe MT MLK A00 22uF 0603*4pcs

12

12

PC1047
SC22U6D3V3MX-1-DL-GP

PC1058
SC22U6D3V5MX-2DLGP

12

PC1048
SC22U6D3V3MX-1-DL-GP

PLACE CAPS ON TOP SIDE
SOCKET CAVITY

12

PC1049
SC22U6D3V3MX-1-DL-GP

Need EE check

VCCST/VCCSTG
PLACE CAPS AT TOP SOCKET EDGE

V_CPU_ST_PLL

12

C1032
SC22U6D3V5MX-2DLGP

CRB:1*22U
0805,1*1U 0402

12

C1033
SC1U10V2KX-1DLGP

A A

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

10 107Friday, February 02, 2018

10 107Friday, February 02, 2018

1

10 107Friday, February 02, 2018

A00

A00

A00

5

4

3

Title

Title

Title

CPU Power CAP

CPU Power CAP

CPU Power CAP

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

C

C

C

Gambits MLK SFF

Gambits MLK SFF

Gambits MLK SFF

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

5

www.teknisi-indonesia.com

DIMM1:

SA0: 0, SA1: 0
Write Address: 0xA0
Read Address: 0xA1

DIMM_CA_VREF_A_L

M_A_ACT#[5]

M_A_ODT0[5]
M_A_ODT1[5]

M_A_CKE0[5]
M_A_CKE1[5]

M_A_CS#0[5]
M_A_CS#1[5]

M_A_CLK#0[5]

M_A_CLK0[5]

M_A_CLK#1[5]

M_A_CLK1[5]

M_A_BG0[5]
M_A_BG1[5]
M_A_BS0[5]
M_A_BS1[5]

M_A_A0[5]
M_A_A1[5]
M_A_A2[5]
M_A_A3[5]
M_A_A4[5]
M_A_A5[5]
M_A_A6[5]
M_A_A7[5]
M_A_A8[5]

M_A_A9[5]
M_A_A10[5]
M_A_A11[5]
M_A_A12[5]
M_A_A13[5]
M_A_A14[5]
M_A_A15[5]
M_A_A16[5]

SMB_CLK_MAIN
SMB_DATA_MAIN

M_A_ACT#
M_A_ALERT#
DIMM1_EVENT_N
SM_DRAMRST#
M_A_PARITY

DIMM1_EVENT_N

M_A_ODT0
M_A_ODT1

M_A_CKE0
M_A_CKE1

M_A_CS#0
M_A_CS#1

M_A_CLK#0
M_A_CLK0
M_A_CLK#1
M_A_CLK1

M_A_BG0
M_A_BG1
M_A_BS0
M_A_BS1

M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15
M_A_A16

3D3V_S0

SMB_CLK_MAIN[12,24,59]

1D2V_SM_S3

SMB_DATA_MAIN[12,24,59]

M_A_ALERT#[5]

SM_DRAMRST#[12,20]

M_A_PARITY[5]

R1101 240R2F-1-GP

1 2

D D

C C

DIMM1A

205

RFU#205

227

RFU#227

230

RFU#230

144

RFU#144

146

VREFCA

141

SCL

285

SDA

139

SA0

140

SA1

238

SA2

284

VDDSPD

62

ACT#

208

ALERT#

78

EVENT#

58

RESET#

222

PAR

49

CB0

194

CB1

56

CB2

201

CB3

47

CB4

192

CB5

54

CB6

199

CB7

87

ODT0

91

ODT1

60

CKE0

203

CKE1

84

S0#

89

S1#

93

S2#_C0

237

S3#_C1

235

C2

75

CK0#

74

CK0

219

CK1#

218

CK1

63

BG0

207

BG1

81

BA0

224

BA1

79

A0

72

A1

216

A2

71

A3

214

A4

213

A5

69

A6

211

A7

68

A8

66

A9

225

A10

210

A11

65

A12

232

A13

228

A14_WE#

86

A15_CAS#

82

A16_RAS#

234

A17

DDR4-288P-82-GP

(022.10010.0A61)

NP3
NP2
NP1

DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8

DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63

1/4

DIMM288_DDR4

1 OF 4

4

NP3
NP2
NP1

M_A_DQ0

5

M_A_DQ1

150

M_A_DQ2

12

M_A_DQ3

157

M_A_DQ4

3

M_A_DQ5

148

M_A_DQ6

10

M_A_DQ7

155

M_A_DQ8

16

M_A_DQ9

161

M_A_DQ10

23

M_A_DQ11

168

M_A_DQ12

14

M_A_DQ13

159

M_A_DQ14

21

M_A_DQ15

166

M_A_DQ16

27

M_A_DQ17

172

M_A_DQ18

34

M_A_DQ19

179

M_A_DQ20

25

M_A_DQ21

170

M_A_DQ22

32

M_A_DQ23

177

M_A_DQ24

38

M_A_DQ25

183

M_A_DQ26

45

M_A_DQ27

190

M_A_DQ28

36

M_A_DQ29

181

M_A_DQ30

43

M_A_DQ31

188

M_A_DQ32

97

M_A_DQ33

242

M_A_DQ34

104

M_A_DQ35

249

M_A_DQ36

95

M_A_DQ37

240

M_A_DQ38

102

M_A_DQ39

247

M_A_DQ40

108

M_A_DQ41

253

M_A_DQ42

115

M_A_DQ43

260

M_A_DQ44

106

M_A_DQ45

251

M_A_DQ46

113

M_A_DQ47

258

M_A_DQ48

119

M_A_DQ49

264

M_A_DQ50

126

M_A_DQ51

271

M_A_DQ52

117

M_A_DQ53

262

M_A_DQ54

124

M_A_DQ55

269

M_A_DQ56

130

M_A_DQ57

275

M_A_DQ58

137

M_A_DQ59

282

M_A_DQ60

128

M_A_DQ61

273

M_A_DQ62

135

M_A_DQ63

280

M_A_DQ[0..63] [5]

DIMM1B

DQS10#
DQS11#
DQS12#
DQS13#
DQS14#
DQS15#
DQS16#
DQS17#

2/4

DDR4-288P-82-GP

(022.10010.0A61)

DQS0#

DQS0

DQS1#

DQS1

DQS2#

DQS2

DQS3#

DQS3

DQS4#

DQS4

DQS5#

DQS5

DQS6#

DQS6

DQS7#

DQS7

DQS8#

DQS8

DQS9#

DQS9
DQS10
DQS11
DQS12
DQS13
DQS14
DQS15
DQS16
DQS17

DIMM288_DDR4

152
153
163
164
174
175
185
186
244
245
255
256
266
267
277
278
196
197
8
7
19
18
30
29
41
40
100
99
111
110
122
121
133
132
52
51

2 OF 4

M_A_DQS_DN0
M_A_DQS_DP0
M_A_DQS_DN1
M_A_DQS_DP1
M_A_DQS_DN2
M_A_DQS_DP2
M_A_DQS_DN3
M_A_DQS_DP3
M_A_DQS_DN4
M_A_DQS_DP4
M_A_DQS_DN5
M_A_DQS_DP5
M_A_DQS_DN6
M_A_DQS_DP6
M_A_DQS_DN7
M_A_DQS_DP7

1D2V_SM_S3

3

DIMM1C

2

VSS

4

VSS

6

VSS

9

VSS

11

VSS

13

VSS

15

VSS

17

VSS

20

VSS

12

TC1101
E820U2D5VM-6-GP

(R_)

22

VSS

24

VSS

26

VSS

28

VSS

31

VSS

33

VSS

35

VSS

37

VSS

39

VSS

42

VSS

44

VSS

46

VSS

48

VSS

50

VSS

53

VSS

55

VSS

57

VSS

94

VSS

96

VSS

98

VSS

101

VSS

103

VSS

105

VSS

107

VSS

109

VSS

112

VSS

114

VSS

116

VSS

118

VSS

120

VSS

123

VSS

125

VSS

127

VSS

129

VSS

131

VSS

134

VSS

136

VSS

138

VSS

DDR4-288P-82-GP

(022.10010.0A61)

M_A_DQS_DN0 [5]
M_A_DQS_DP0 [5]
M_A_DQS_DN1 [5]
M_A_DQS_DP1 [5]
M_A_DQS_DN2 [5]
M_A_DQS_DP2 [5]
M_A_DQS_DN3 [5]
M_A_DQS_DP3 [5]
M_A_DQS_DN4 [5]
M_A_DQS_DP4 [5]
M_A_DQS_DN5 [5]
M_A_DQS_DP5 [5]
M_A_DQS_DN6 [5]
M_A_DQS_DP6 [5]
M_A_DQS_DN7 [5]
M_A_DQS_DP7 [5]

1D2V_SM_S3

2

147

VSS

149

VSS

151

VSS

154

VSS

156

VSS

158

VSS

160

VSS

162

VSS

165

VSS

167

VSS

169

VSS

171

VSS

173

VSS

176

VSS

178

VSS

180

VSS

182

VSS

184

VSS

187

VSS

189

VSS

191

VSS

193

VSS

195

VSS

198

VSS

200

VSS

202

VSS

239

VSS

241

VSS

243

VSS

246

VSS

248

VSS

250

VSS

252

VSS

254

VSS

257

VSS

259

VSS

261

VSS

263

VSS

265

VSS

268

VSS

270

VSS

272

VSS

274

VSS

276

VSS

279

VSS

281

VSS

283

VSS

3/4

DIMM288_DDR4

3 OF 4

3D3V_S0

12

C1109
SCD1U16V2KX-3DLGP

1D2V_SM_S3

0D675V_VTT_S0

2D5V_VPP_S3

12

C1110
SC2D2U6D3V2MX-DL-GP

DIMM1D

59

VDD

61

VDD

64

VDD

67

VDD

70

VDD

73

VDD

76

VDD

80

VDD

83

VDD

85

VDD

88

VDD

90

VDD

92

VDD

204

VDD

206

VDD

209

VDD

212

VDD

215

VDD

217

VDD

220

VDD

223

VDD

226

VDD

229

VDD

231

VDD

233

VDD

236

VDD

77

VTT

221

VTT

142

VPP

143

VPP

286

VPP

287

VPP

288

VPP

DDR4-288P-82-GP

(022.10010.0A61)

1D2V_SM_S3

12

4/4

DIMM288_DDR4

C1101
SCD1U16V2KX-3DLGP

1

TP_DIMM1_PIN1

1

12V

145

12V

4 OF 4

TP_DIMM1_PIN145

12

C1102
SCD1U16V2KX-3DLGP

12

R1102
0R2J-2-GP

(R_)

B B

DIMM VREF DQ A (To DIMM/CPU)

Del for DDR4 Modify

Del C82, C83

2D5V_VPP_S3

12

C1103
SCD1U16V2KX-L-GP

12

C1104

(R_)

SCD1U16V2KX-L-GP

(R_)

For DDR4 Modify

1D2V_SM_S3

12

R1103
1KR2F-3-GP

DIMM_CA_VREF_A[6]

A A

5

DIMM_CA_VREF_A

12

R1106
1KR2F-3-GP

4

1 2

12

R1105 0R0402-PAD-2-GP

DIMM VREF CA A (To DIMM)

C1105
SCD1U16V2KX-3DLGP

12

C1106
SCD1U16V2KX-3DLGP

DIMM_CA_VREF_A_L

12

C1107

SC4D7U6D3V3KX-DLGP

20170410
change to 47U for Edison's and Alan's feedback
20170412
correct the capacitance to 4D7U for Alan's feedback

3

1D2V_SM_S3

12

R1104
470R2J-2-GP

SM_DRAMRST#

12

C1108
SCD1U16V2KX-L-GP

(R_)

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Title

Title

DDR DIMM_1

DDR DIMM_1

DDR DIMM_1

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Gambits MLK SFF

Gambits MLK SFF

Gambits MLK SFF

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Taipei Hsien 221, Taiwan, R.O.C.

11 107Friday, February 02, 2018

11 107Friday, February 02, 2018

1

11 107Friday, February 02, 2018

A00C

A00C

A00C

5

www.teknisi-indonesia.com

4

3

2

1

DIMM2:

SA0: 0, SA1: 1
Write Address: 0xA4
Read Address: 0xA5

DIMM_CA_VREF_B_L

SMB_CLK_MAIN[11,24,59]

1D2V_SM_S3

SMB_DATA_MAIN[11,24,59]

M_B_ALERT#[6]

SM_DRAMRST#[11,20]

M_B_PARITY[6]

R1201 240R2F-1-GP

1 2

M_B_CLK#0[6]
M_B_CLK#1[6]

M_B_ACT#[6]

M_B_ODT0[6]
M_B_ODT1[6]

M_B_CKE0[6]
M_B_CKE1[6]

M_B_CS#0[6]
M_B_CS#1[6]

M_B_CLK0[6]
M_B_CLK1[6]

M_B_BG0[6]
M_B_BG1[6]
M_B_BS0[6]
M_B_BS1[6]

M_B_A0[6]
M_B_A1[6]
M_B_A2[6]
M_B_A3[6]
M_B_A4[6]
M_B_A5[6]
M_B_A6[6]
M_B_A7[6]
M_B_A8[6]

M_B_A9[6]
M_B_A10[6]
M_B_A11[6]
M_B_A12[6]
M_B_A13[6]
M_B_A14[6]
M_B_A15[6]
M_B_A16[6]

M_B_ACT#
M_B_ALERT#
DIMM2_EVENT_N
SM_DRAMRST#
M_B_PARITY

DIMM2_EVENT_N

M_B_ODT0
M_B_ODT1

M_B_CKE0
M_B_CKE1

M_B_CS#0
M_B_CS#1

M_B_CLK#0
M_B_CLK0
M_B_CLK#1
M_B_CLK1

M_B_BG0
M_B_BG1
M_B_BS0
M_B_BS1

M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15
M_B_A16

3D3V_S0

D D

C C

DIMM2A

205

RFU#205

227

RFU#227

230

RFU#230

144

RFU#144

146

VREFCA

141

SCL

285

SDA

139

SA0

140

SA1

238

SA2

284

VDDSPD

62

ACT#

208

ALERT#

78

EVENT#

58

RESET#

222

PAR

49

CB0

194

CB1

56

CB2

201

CB3

47

CB4

192

CB5

54

CB6

199

CB7

87

ODT0

91

ODT1

60

CKE0

203

CKE1

84

S0#

89

S1#

93

S2#_C0

237

S3#_C1

235

C2

75

CK0#

74

CK0

219

CK1#

218

CK1

63

BG0

207

BG1

81

BA0

224

BA1

79

A0

72

A1

216

A2

71

A3

214

A4

213

A5

69

A6

211

A7

68

A8

66

A9

225

A10

210

A11

65

A12

232

A13

228

A14_WE#

86

A15_CAS#

82

A16_RAS#

234

A17

DDR4-288P-82-GP

(022.10010.0A61)

NP3

NP3

NP2

NP2

NP1

NP1

M_B_DQ0

5

DQ0

M_B_DQ1

150

DQ1

M_B_DQ2

12

DQ2

M_B_DQ3

157

DQ3

M_B_DQ4

3

DQ4

M_B_DQ5

148

DQ5

M_B_DQ6

10

DQ6

M_B_DQ7

155

DQ7

M_B_DQ8

16

DQ8

M_B_DQ9

161

DQ9

M_B_DQ10

23

DQ10

M_B_DQ11

168

DQ11

M_B_DQ12

14

DQ12

M_B_DQ13

159

DQ13

M_B_DQ14

21

DQ14

M_B_DQ15

166

DQ15

M_B_DQ16

27

DQ16

M_B_DQ17

172

DQ17

M_B_DQ18

34

DQ18

M_B_DQ19

179

DQ19

M_B_DQ20

25

DQ20

M_B_DQ21

170

DQ21

M_B_DQ22

32

DQ22

M_B_DQ23

177

DQ23

M_B_DQ24

38

DQ24

M_B_DQ25

183

DQ25

M_B_DQ26

45

DQ26

M_B_DQ27

190

DQ27

M_B_DQ28

36

DQ28

M_B_DQ29

181

DQ29

M_B_DQ30

43

DQ30

M_B_DQ31

188

DQ31

M_B_DQ32

97

DQ32

M_B_DQ33

242

DQ33

M_B_DQ34

104

DQ34

M_B_DQ35

249

DQ35

M_B_DQ36

95

DQ36

M_B_DQ37

240

DQ37

M_B_DQ38

102

DQ38

M_B_DQ39

247

DQ39

M_B_DQ40

108

DQ40

M_B_DQ41

253

DQ41

M_B_DQ42

115

DQ42

M_B_DQ43

260

DQ43

M_B_DQ44

106

DQ44

M_B_DQ45

251

DQ45

M_B_DQ46

113

DQ46

M_B_DQ47

258

DQ47

M_B_DQ48

119

DQ48

M_B_DQ49

264

DQ49

M_B_DQ50

126

DQ50

M_B_DQ51

271

DQ51

M_B_DQ52

117

DQ52

M_B_DQ53

262

DQ53

M_B_DQ54

124

DQ54

M_B_DQ55

269

DQ55

M_B_DQ56

130

DQ56

M_B_DQ57

275

DQ57

M_B_DQ58

137

DQ58

M_B_DQ59

282

DQ59

M_B_DQ60

128

DQ60

M_B_DQ61

273

DQ61

M_B_DQ62

135

DQ62

M_B_DQ63

280

DQ63

1/4

DIMM288_DDR4

1 OF 4

M_B_DQ[0..63] [6]

DIMM2B

DQS10#
DQS11#
DQS12#
DQS13#
DQS14#
DQS15#
DQS16#
DQS17#

2/4

DDR4-288P-82-GP

(022.10010.0A61)

DQS0#

DQS0

DQS1#

DQS1

DQS2#

DQS2

DQS3#

DQS3

DQS4#

DQS4

DQS5#

DQS5

DQS6#

DQS6

DQS7#

DQS7

DQS8#

DQS8

DQS9#

DQS9
DQS10
DQS11
DQS12
DQS13
DQS14
DQS15
DQS16
DQS17

DIMM288_DDR4

DIMM2C

2

VSS

4

VSS

6

VSS

9

VSS

11

M_B_DQS_DN0

152

M_B_DQS_DP0

153

M_B_DQS_DN1

163

M_B_DQS_DP1

164

M_B_DQS_DN2

174

M_B_DQS_DP2

175

M_B_DQS_DN3

185

M_B_DQS_DP3

186

M_B_DQS_DN4

244

M_B_DQS_DP4

245

M_B_DQS_DN5

255

M_B_DQS_DP5

256

M_B_DQS_DN6

266

M_B_DQS_DP6

267

M_B_DQS_DN7

277

M_B_DQS_DP7

278
196
197
8
7
19
18
30
29
41
40
100
99
111
110
122
121
133
132
52
51

1D2V_SM_S3

2 OF 4

M_B_DQS_DN0 [6]
M_B_DQS_DP0 [6]
M_B_DQS_DN1 [6]
M_B_DQS_DP1 [6]
M_B_DQS_DN2 [6]
M_B_DQS_DP2 [6]
M_B_DQS_DN3 [6]
M_B_DQS_DP3 [6]
M_B_DQS_DN4 [6]
M_B_DQS_DP4 [6]
M_B_DQS_DN5 [6]
M_B_DQS_DP5 [6]
M_B_DQS_DN6 [6]
M_B_DQS_DP6 [6]
M_B_DQS_DN7 [6]
M_B_DQS_DP7 [6]

VSS

13

VSS

15

VSS

17

VSS

20

VSS

22

VSS

24

VSS

26

VSS

28

VSS

31

VSS

33

VSS

35

VSS

37

VSS

39

VSS

42

VSS

44

VSS

46

VSS

48

VSS

50

VSS

53

VSS

55

VSS

57

VSS

94

VSS

96

VSS

98

VSS

101

VSS

103

VSS

105

VSS

107

VSS

109

VSS

112

VSS

114

VSS

116

VSS

118

VSS

120

VSS

123

VSS

125

VSS

127

VSS

129

VSS

131

VSS

134

VSS

136

VSS

138

VSS

DDR4-288P-82-GP

(022.10010.0A61)

1D2V_SM_S3

147

VSS

149

VSS

151

VSS

154

VSS

156

VSS

158

VSS

160

VSS

162

VSS

165

VSS

167

VSS

169

VSS

171

VSS

173

VSS

176

VSS

178

VSS

180

VSS

182

VSS

184

VSS

187

VSS

189

VSS

191

VSS

193

VSS

195

VSS

198

VSS

200

VSS

202

VSS

239

VSS

241

VSS

243

VSS

246

VSS

248

VSS

250

VSS

252

VSS

254

VSS

257

VSS

259

VSS

261

VSS

263

VSS

265

VSS

268

VSS

270

VSS

272

VSS

274

VSS

276

VSS

279

VSS

281

VSS

283

VSS

3/4

DIMM288_DDR4

3 OF 4

1D2V_SM_S3

0D675V_VTT_S0

2D5V_VPP_S3

DIMM2D

59

VDD

61

VDD

64

VDD

67

VDD

70

VDD

73

VDD

76

VDD

80

VDD

83

VDD

85

VDD

88

VDD

90

VDD

92

VDD

204

VDD

206

VDD

209

VDD

212

VDD

215

VDD

217

VDD

220

VDD

223

VDD

226

VDD

229

VDD

231

VDD

233

VDD

236

VDD

77

VTT

221

VTT

142

VPP

143

VPP

286

VPP

287

VPP

288

VPP

DDR4-288P-82-GP

(022.10010.0A61)

3D3V_S0

TP_DIMM2_PIN1

1

12V

145

12V

4/4

DIMM288_DDR4

4 OF 4

TP_DIMM2_PIN145

12

R1202
0R2J-2-GP

(R_)

DIMM VREF DQ B (To DIMM/CPU)

B B

Del for DDR4 Modify

12

0D675V_VTT_S0

12

C1201
SCD1U16V2KX-3DLGP

(R_)

C1204
SC4D7U6D3V3KX-DLGP

12

C1202
SCD1U16V2KX-3DLGP

12

C1205
SCD1U16V2KX-3DLGP

12

C1203
SC1U10V2KX-1DLGP

2D5V_VPP_S3

12

12

C1212
SCD1U16V2KX-3DLGP

20170410
change to mounted for Edison's feedback

C1206
SCD1U16V2KX-3DLGP

12

12

C1207
SCD1U16V2KX-3DLGP

C1213
SC2D2U6D3V2MX-DL-GP

For DDR4 Modify

1D2V_SM_S3

12

R1203
1KR2F-3-GP

R1204 2R2F-GP

M_VREF_DQ_DIM1[6]

A A

5

1 2

C1209
SCD022U16V2KX-3DLGP

2 1

DIMM_DQ_CPU_VREF_B_RC

12

R1207
24D9R2F-L-GP

DIMM_CA_VREF_B DIMM_CA_VREF_B_LM_VREF_DQ_DIM1

12

R1206
1KR2F-3-GP

4

DIMM VREF CA B (To DIMM)

12

C1208
SCD1U16V2KX-3DLGP

R1205 0R0402-PAD-2-GP

1 2

12

C1210
SCD1U16V2KX-3DLGP

12

C1211
SC4D7U6D3V3KX-DLGP

20170410
change to 47U for Edison's and Alan's feedback
20170412
correct the capacitance to 4D7U for Alan's feedback

3

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Title

Title

DDR DIMM_2

DDR DIMM_2

DDR DIMM_2

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Gambits MLK SFF

Gambits MLK SFF

Gambits MLK SFF

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Taipei Hsien 221, Taiwan, R.O.C.

12 107Friday, February 02, 2018

12 107Friday, February 02, 2018

1

12 107Friday, February 02, 2018

A00C

A00C

A00C

5

www.teknisi-indonesia.com

D D

C C

4

3

2

1

B B

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

A A

Title

Title

Title

Reserved

Reserved

Reserved

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Gambits MLK SFF

Gambits MLK SFF

Gambits MLK SFF

Date: Sheet of

Date: Sheet of

5

4

3

Date: Sheet of

2

Taipei Hsien 221, Taiwan, R.O.C.

13 107Friday, February 02, 2018

13 107Friday, February 02, 2018

13 107Friday, February 02, 2018

1

A00A

A00A

A00A

5

www.teknisi-indonesia.com

D D

C C

4

3

2

1

B B

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

A A

Title

Title

Title

Reserved

Reserved

Reserved

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Gambits MLK SFF

Gambits MLK SFF

Gambits MLK SFF

Date: Sheet of

Date: Sheet of

5

4

3

Date: Sheet of

2

Taipei Hsien 221, Taiwan, R.O.C.

14 107Friday, February 02, 2018

14 107Friday, February 02, 2018

14 107Friday, February 02, 2018

1

A00A

A00A

A00A

5

www.teknisi-indonesia.com

D D

1

TP1501

20170406
change to single 32MB SPI ROM
remove SPI_CS_PCH_N2
change SPI_CD_PCH_N1 to TPM

SPI_CLK_PCH[25,91]

SPI_CLK_PCH

4

PCH_PME_N

TP_VSS_AL37

SPI_SI_PCH[23,25,91,99]

SPI_SO_PCH[23,25,91]

SPI_CS_PCH_N0[25]

SPI_WP_PCH[23,25]

SPI_HOLD_PCH[23,25]

SPI_CS_PCH_N2[91]

SPI_SI_PCH
SPI_SO_PCH
SPI_CS_PCH_N0

SPI_WP_PCH
SPI_HOLD_PCH
SPI_CS_PCH_N2

SB1A

BE36

GPP_A11/PME#/SD_VDD2_PWR_EN#

R15

RSVD2

R13

RSVD1

AL37

VSS

AN35

TP

AU41

SPI0_MOSI

BA45

SPI0_MISO

AY47

SPI0_CS0#

AW47

SPI0_CLK

AW48

SPI0_CS1#

AY48

SPI0_IO2

BA46

SPI0_IO3

AT40

SPI0_CS2#

BE19

GPP_D1/SPI1_CLK/SBK1_BK1

BF19

GPP_D0/SPI1_CS#/SBK0_BK0

BF18

GPP_D3/SPI1_MOSI/SBK3_BK3

BE18

GPP_D2/SPI1_MISO/SBK2_BK2

BC17

GPP_D22/SPI1_IO3

BD17

GPP_D21/SPI1_IO2

CANON-LAKE-GP

(071.CANNO.0B0U)

3

1 OF 13

GPP_B13/PLTRST#

GPP_K16/GSXCLK

GPP_K12/GSXDOUT

GPP_K13/GSXSLOAD

GPP_K14/GSXDIN

GPP_K15/GSXSRESET#

GPP_E3/CPU_GP0
GPP_E7/CPU_GP1
GPP_B3/CPU_GP2
GPP_B4/CPU_GP3

GPP_H18/SML4ALERT#

GPP_H17/SML4DATA

GPP_H16/SML4CLK

GPP_H15/SML3ALERT#

GPP_H14/SML3DATA

GPP_H13/SML3CLK

GPP_H12/SML2ALERT#

GPP_H11/SML2DATA

GPP_H10/SML2CLK

INTRUDER#

20170406
USB charger function is removed
net CHAR_EN @ pin Y47
net PCH_CHAR_CTL3 @ pin AA45 is removed

PLTRST#_PCH

AV29

Y47
Y46

VGA_CABLE_DET_N

Y48
W46
AA45

WAKE_M2_SSD_N

AL47
AM45

ME_CNTL

BF32
BC33

AE44
AJ46
AE43

GPP_H_15

AC47
AD48
AF47

GPP_H_12

AB47
AD47
AE48

PCH_INTRUDER_N

BB44

R1504 33R2J-2-GP

PLTRST#_SIO

1 2

VGA_CABLE_DET_N [59]

WAKE_M2_SSD_N [62]

ME_CNTL [20]

GPP_H_15 [23]

1

TP1506

R1507 1MR2J-1-GP

1 2

20170512
Remove TP1502

20170512
Remove TP1503

3P0V_BAT_VREG

2

20170410
add 33R series resistor for Edison's & Alan's feedback

PLTRST#_SIO [24]

20170512
Remove R1501

VGA_CABLE_DET_N

WAKE_M2_SSD_N

20170418
mount R57 8K2R to follow D9 Bison

SPI_CLK_PCH

PLTRST#_SIO

R1502 10KR2J-3-GP

1 2

R1503 8K2R2F-1-GP

1 2

(R_)

1 2

R1515 100KR2J-1-GP

1 2

R1516 100KR2J-1-GP(R_)

1

3D3V_SB

20170423

R1506 10KR2J-3-GP

1 2

R1508 8K2R2F-1-GP

PCH_PME_N

1 2

R1509 10KR2J-3-GP

H_SKTOCC_N

1 2

R1510 10KR2J-3-GP

FP_CBL_DET

1 2

R1511 47KR2J-2-GP

GPP_J1

1 2

Remove R1505

PCIE_SLOT1_PRSNT_N

20170413
change to on board power switch
remove the net FP_CBL_DET @ pin BF8
20170420
add the net FP_CBL_DET back for SFF

CNV_BRI_DT_R[63]

CNV_BRI_RSP_R[63]

CNV_RGI_DT_R[63]

CNV_RGI_RSP_R[63]

PCIE_SLOT1_PRSNT_N[94]

CNV_BRI_DT[23]

R9932 33R2J-2-GP
R9933 22R2J-2-GP
R9934 33R2J-2-GP
R9935 22R2J-2-GP

CNV_RGI_DT[23]

3D3V_S0

C C

3D3V_SB

B B

TP1507

TP1508

FP_CBL_DET[64]

LPC_PME_N[24]

LPSS_GSPI1_MOSI

1

LPSS_GSPI0_MOSI

1

PCIE_SLOT1_PRSNT_N
UART0_TX

1

TP1504

UART0_RX

1

TP1505

FP_CBL_DET

LPC_PME_N

20170413
change to on board power switch
remove the net FP_CBL_DET @ pin BF8
20170420
add the net FP_CBL_DET back for SFF

H_SKTOCC_N[24]

1 2
1 2
1 2
1 2

H_SKTOCC_N

SB1K

BA26

GPP_B22/GSPI1_MOSI

BD30

GPP_B21/GSPI1_MISO

AU26

GPP_B20/GSPI1_CLK

AW26

GPP_B19/GSPI1_CS0#

BE30

GPP_B18/GSPI0_MOSI

BD29

GPP_B17/GSPI0_MISO

BF29

GPP_B16/GSPI0_CLK

BB26

GPP_B15/GSPI0_CS0#

BB24

GPP_C9/UART0_TXD

BE23

GPP_C8/UART0_RXD

AP24

GPP_C11/UART0_CTS#

BA24

GPP_C10/UART0_RTS#

BD21

GPP_C15/UART1_CTS#/ISH_UART1_CTS#

AW24

GPP_C14/UART1_RTS#/ISH_UART1_RTS#

AP21

GPP_C13/UART1_TXD/ISH_UART1_TXD

AU24

GPP_C12/UART1_RXD/ISH_UART1_RXD

AV21

GPP_C23/UART2_CTS#

AW21

GPP_C22/UART2_RTS#

BE20

GPP_C21/UART2_TXD

BD20

GPP_C20/UART2_RXD

BE21

GPP_C19/I2C1_SCL

BF21

GPP_C18/I2C1_SDA

BC22

GPP_C17/I2C0_SCL

BF23

GPP_C16/I2C0_SDA

BE15

GPP_D4/ISH_I2C2_SDA/I2C3_SDA/SBK4_BK4

BE14

GPP_D23/ISH_I2C2_SCL/I2C3_SCL

CANON-LAKE-GP

(071.CANNO.0B0U)

GPP_J1

CNV_BRI_DT
CNV_BRI_RSP
CNV_RGI_DT
CNV_RGI_RSP

GPP_D11/ISH_SPI_MISO/GP_BSSB_CLK/GSPI2_MISO

GPP_D15/ISH_UART0_RTS#/GSPI2_CS1#/CNV_WFEN

SB1M

AW13

GPP_G0/SD_CMD

BE9

GPP_G1/SD_D0

BF8

GPP_G2/SD_D1

BF9

GPP_G3/SD_D2

BG8

GPP_G4/SD_D3

BE8

GPP_G5/SD_CD#

BD8

GPP_G6/SD_CLK

AV13

GPP_G7/SD_WP

AP3

GPP_I11/M2_SKT2_CFG0

AP2

GPP_I12/M2_SKT2_CFG1

AN4

GPP_I13/M2_SKT2_CFG2

AM7

GPP_I14/M2_SKT2_CFG3

AV6

GPP_J0/CNV_PA_BLANKING

AY3

GPP_J1/CPU_VCCIO_PWR_GATE#

AR13

GPP_J11/A4WP_PRESENT

AV7

GPP_J10

AW3

GPP_J_2

AT10

GPP_J_3

AV4

GPP_J_4_CNV_BRI_DT_UART0_RTSB

AY2

GPP_J5/CNV_BRI_RSP/UART0_RXD

BA4

GPP_J6/CNV_RGI_DT/UART0_TXD

AV3

GPP_J7/CNV_RGI_RSP/UART0_CTS#

AW2

GPP_J8/CNV_MFUART2_RXD

AU9

GPP_J9/CNV_MFUART2_TXD

CANON-LAKE-GP

(071.CANNO.0B0U)

GPP_D9/ISH_SPI_CS#/GSPI2_CS0#
GPP_D10/ISH_SPI_CLK/GSPI2_CLK

GPP_D12/ISH_SPI_MOSI/GP_BSSB_DI/GSPI2_MOSI

GPP_D16/ISH_UART0_CTS#/CNV_WCEN

GPP_D14/ISH_UART0_TXD/I2C2_SCL

GPP_D13/ISH_UART0_RXD/I2C2_SDA

GPP_A17/SD_VDD1_PWR_EN#/ISH_GP7

GPPJ_RCOMP_1P81
GPPJ_RCOMP_1P82
GPPJ_RCOMP_1P83

11 OF 13

GPP_H20/ISH_I2C0_SCL

GPP_H19/ISH_I2C0_SDA

GPP_H22/ISH_I2C1_SCL

GPP_H21/ISH_I2C1_SDA

GPP_A23/ISH_GP5
GPP_A22/ISH_GP4
GPP_A21/ISH_GP3
GPP_A20/ISH_GP2
GPP_A19/ISH_GP1
GPP_A18/ISH_GP0

13 OF 13

CNV_WR_CLKN
CNV_WR_CLKP

CNV_WR_D0N
CNV_WR_D0P
CNV_WR_D1N
CNV_WR_D1P

CNV_WT_CLKN
CNV_WT_CLKP

CNV_WT_D0N
CNV_WT_D0P
CNV_WT_D1N
CNV_WT_D1P

CNV_WT_RCOMP

PCIE_RCOMPN

PCIE_RCOMPP
SD_RCOMP_1P8
SD_RCOMP_3P3

RSVD2
RSVD3

RSVD1

TP

BD4
BE3

BB3
BB4
BA3
BA2

BC5
BB6

BE6
BD7
BG6
BF6
BA1

B12
A13
BE5
BE4
BD1
BE1
BE2

Y35
Y36

BC1
AL35

BA20
BB20
BB16
AN18

BF14
AR18
BF17
BE17

AG45
AH46

AH47
AH48

AV34
AW32
BA33
BE34
BD34
BF35
BD38

CNV_WR_CLK_DN
CNV_WR_CLK_DP

CNV_WR_0_DN
CNV_WR_0_DP
CNV_WR_1_DN
CNV_WR_1_DP

CNV_WT_CLK_DN
CNV_WT_CLK_DP

CNV_WT_0_DN
CNV_WT_0_DP
CNV_WT_1_DN
CNV_WT_1_DP
CNV_WT_RCOMP

PCIE_RCOMP_N
PCIE_RCOMP_P

SD_RCOMP

BC1_TP

FORM_FAC_ID_2
FORM_FAC_ID_1
FORM_FAC_ID_0

1

TP1509

FORM_FAC_ID_2 [64]
FORM_FAC_ID_1 [64]
FORM_FAC_ID_0 [64]

CNV_WR_CLK_DN [63]
CNV_WR_CLK_DP [63]

CNV_WR_0_DN [63]
CNV_WR_0_DP [63]
CNV_WR_1_DN [63]
CNV_WR_1_DP [63]

CNV_WT_CLK_DN [63]
CNV_WT_CLK_DP [63]

CNV_WT_0_DN [63]
CNV_WT_0_DP [63]
CNV_WT_1_DN [63]
CNV_WT_1_DP [63]

CNV_WT_RCOMP

PCIE_RCOMP_N PCIE_RCOMP_P

SD_RCOMP

R1512 150R2F-1-GP

1 2

R1513 100R2F-L1-GP-U

1 2

R1514 200R2F-L-GP

1 2

R9937 20KR2F-L-GP

CNV_RGI_RSP

A A

5

1D8V_SB

1 2

R9936 20KR2F-L-GP

CNV_BRI_RSP

1 2

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Title

Title

PCH_(SPI/UART/I2C )

PCH_(SPI/UART/I2C )

PCH_(SPI/UART/I2C )

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

C

C

C

Gambits MLK SFF

Gambits MLK SFF

Gambits MLK SFF

Date: Sheet of

Date: Sheet of

4

3

2

Date: Sheet of

Taipei Hsien 221, Taiwan, R.O.C.

15 107Friday, February 02, 2018

15 107Friday, February 02, 2018

1

15 107Friday, February 02, 2018

A00

A00

A00

5

www.teknisi-indonesia.com

D D

4

3

2

1

DMI_TX_CPU_N3[3]

DMI_TX_CPU_P3[3]
DMI_RX_CPU_N3[3]
DMI_RX_CPU_P3[3]

DMI_TX_CPU_N2[3]

DMI_TX_CPU_P2[3]
DMI_RX_CPU_N2[3]
DMI_RX_CPU_P2[3]

DMI_TX_CPU_N1[3]

DMI_TX_CPU_P1[3]
DMI_RX_CPU_N1[3]
DMI_RX_CPU_P1[3]

DMI_TX_CPU_N0[3]

DMI_TX_CPU_P0[3]
DMI_RX_CPU_N0[3]
DMI_RX_CPU_P0[3]

C C

PCIE_RX_PCH_N5[31]

LAN

20170426
Change to PCIE*1 Slot to port7

B B

20170421
Remove PCIE8 PCIE Signal for PCI bridge IC
20170426
Change to WLAN to port8

PCIEx1 slot

WLAN

PCIE_RX_PCH_P5[31]

PCIE_TX_PCH_N5[31]
PCIE_TX_PCH_P5[31]

PCIE_TX_PCH_P7[94]
PCIE_TX_PCH_N7[94]

PCIE_RX_PCH_P7[94]
PCIE_RX_PCH_N7[94]

PCIE_RX_PCH_N8[63]
PCIE_RX_PCH_P8[63]

PCIE_TX_PCH_N8[63]
PCIE_TX_PCH_P8[63]

DMI_TX_CPU_N3
DMI_TX_CPU_P3
DMI_RX_CPU_N3
DMI_RX_CPU_P3
DMI_TX_CPU_N2
DMI_TX_CPU_P2
DMI_RX_CPU_N2
DMI_RX_CPU_P2
DMI_TX_CPU_N1
DMI_TX_CPU_P1
DMI_RX_CPU_N1
DMI_RX_CPU_P1
DMI_TX_CPU_N0
DMI_TX_CPU_P0
DMI_RX_CPU_N0
DMI_RX_CPU_P0

PCIE_RX_PCH_N5
PCIE_RX_PCH_P5
PCIE_TX_PCH_N5
PCIE_TX_PCH_P5

PCIE_TX_PCH_P7
PCIE_TX_PCH_N7
PCIE_RX_PCH_P7
PCIE_RX_PCH_N7
PCIE_RX_PCH_N8
PCIE_RX_PCH_P8
PCIE_TX_PCH_N8
PCIE_TX_PCH_P8

SB1B

K34

DMI0_RXN

J35

DMI0_RXP

C33

DMI0_TXN

B33

DMI0_TXP

G33

DMI1_RXN

F34

DMI1_RXP

C32

DMI1_TXN

B32

DMI1_TXP

K32

DMI2_RXN

J32

DMI2_RXP

C31

DMI2_TXN

B31

DMI2_TXP

G30

DMI3_RXN

F30

DMI3_RXP

C29

DMI3_TXN

B29

DMI3_TXP

A25

DMI7_TXP

B25

DMI7_TXN

P24

DMI7_RXP

R24

DMI7_RXN

C26

DMI6_TXP

B26

DMI6_TXN

F26

DMI6_RXP

G26

DMI6_RXN

B27

DMI5_TXP

C27

DMI5_TXN

L26

DMI5_RXP

M26

DMI5_RXN

D29

DMI4_TXP

E28

DMI4_TXN

K29

DMI4_RXP

M29

DMI4_RXN

G17

PCIE1_RXN/USB31_7_RXN

F16

PCIE1_RXP/USB31_7_RXP

A17

PCIE1_TXN/USB31_7_TXN

B17

PCIE1_TXP/USB31_7_TXP

R21

PCIE2_RXN/USB31_8_RXN

P21

PCIE2_RXP/USB31_8_RXP

B18

PCIE2_TXN/USB31_8_TXN

C18

PCIE2_TXP/USB31_8_TXP

K18

PCIE3_RXN/USB31_9_RXN

J18

PCIE3_RXP/USB31_9_RXP

B19

PCIE3_TXN/USB31_9_TXN

C19

PCIE3_TXP/USB31_9_TXP

N18

PCIE4_RXN/USB31_10_RXN

R18

PCIE4_RXP/USB31_10_RXP

D20

PCIE4_TXN/USB31_10_TXN

C20

PCIE4_TXP/USB31_10_TXP

F20

PCIE5_RXN

G20

PCIE5_RXP

B21

PCIE5_TXN

A22

PCIE5_TXP

K21

PCIE6_RXN

J21

PCIE6_RXP

D21

PCIE6_TXN

C21

PCIE6_TXP

B23

PCIE7_TXP

C23

PCIE7_TXN

J24

PCIE7_RXP

L24

PCIE7_RXN

F24

PCIE8_RXN

G24

PCIE8_RXP

B24

PCIE8_TXN

C24

PCIE8_TXP

CANON-LAKE-GP

(071.CANNO.0B0U)

2 OF 13

USB2N_1

USB2P_1

USB2N_2

USB2P_2

USB2N_3

USB2P_3

USB2N_4

USB2P_4

USB2N_5

USB2P_5

USB2N_6

USB2P_6

USB2N_7

USB2P_7

USB2N_8

USB2P_8

USB2N_9

USB2P_9
USB2N_10
USB2P_10
USB2N_11
USB2P_11
USB2N_12
USB2P_12
USB2N_13
USB2P_13
USB2N_14
USB2P_14

GPP_E9/USB2_OC0#
GPP_E10/USB2_OC1#
GPP_E11/USB2_OC2#
GPP_E12/USB2_OC3#

GPP_F15/USB2_OC4#
GPP_F16/USB2_OC5#
GPP_F17/USB2_OC6#
GPP_F18/USB2_OC7#

USB2_COMP

USB2_VBUSSENSE

RSVD1

USB2_ID

GPD7

PCIE24_TXP
PCIE24_TXN
PCIE24_RXP

PCIE24_RXN

PCIE23_TXP
PCIE23_TXN
PCIE23_RXP

PCIE23_RXN

PCIE22_TXP
PCIE22_TXN
PCIE22_RXP

PCIE22_RXN

PCIE21_TXP
PCIE21_TXN
PCIE21_RXP

PCIE21_RXN

J3
J2
N13
N15
K4
K3
M10
L9
M1
L2
K7
K6
L4
L3
G4
G5
M6
N8
H3
H2
R10
P9
G1
G2
N3
N2
E5
F6

AH36
AL40
AJ44
AL41
AV47
AR35
AR37
AV43

F4
F3
U13
G3

BE41
G45

G46
Y41
Y40
G48
G49
W44
W43
H48
H47
U41
U40
F46
G47
R44
T43

USB_PCH_PN1
USB_PCH_PP1
USB_PCH_PN2
USB_PCH_PP2

USB_PCH_PN5
USB_PCH_PP5
USB_PCH_PN6
USB_PCH_PP6
USB_PCH_PN7
USB_PCH_PP7
USB_PCH_PN8
USB_PCH_PP8
USB_PCH_PN9
USB_PCH_PP9

USB_PCH_PN14
USB_PCH_PP14

USB_OC0_R_N
USB_OC1_R_N
USB_OC2_R_N
USB_OC3_R_N
USB_OC4_R_N
USB_OC5_R_N
USB_OC6_R_N
GPIO_PCI_RESET_N

USB2_COMP
USB2_VBUSSENSE

USB2_ID
GPD7

20170421
Remove PCIE Signal

USB_PCH_PN1 [38]
USB_PCH_PP1 [38]
USB_PCH_PN2 [38]
USB_PCH_PP2 [38]

USB_PCH_PN5 [32]
USB_PCH_PP5 [32]
USB_PCH_PN6 [32]
USB_PCH_PP6 [32]
USB_PCH_PN7 [39]
USB_PCH_PP7 [39]
USB_PCH_PN8 [33]
USB_PCH_PP8 [33]
USB_PCH_PN9 [39]
USB_PCH_PP9 [39]

USB_PCH_PN14 [63]
USB_PCH_PP14 [63]

USB_OC0_R_N [19,38]
USB_OC1_R_N [19,39]

USB_OC3_R_N [32]
USB_OC5_R_N [19]

GPD7 [23]

Front USB3.0

Front USB3.0
20170516
Remove USB Port3

Rear USB2.0 w/ RJ-45

Rear USB2.0 w/ RJ-45

Rear USB2.0

Card Reader

Rear USB2.0

WLAN

20170515
Change to USB port 14 for WLAN BT function

20170418
GPIO_PCI_RESET change net name to GPIO_PCI_RESET_N

20170406
change net name from USB_OC7_R_N to GPIO_PCI_RESET
to control PLTRST_N of device and slot

GPIO_PCI_RESET_N

USB_OC3_R_N

USB_OC2_R_N

USB_OC6_R_N

USB_OC4_R_N

USB2_COMP

USB2_VBUSSENSE

USB2_ID

20170698
R1611 Change to pull down 10kohm

R1601 10KR2J-3-GP

1 2

R1604 10KR2J-3-GP

1 2

R1605 10KR2J-3-GP

1 2

R1606 10KR2J-3-GP

1 2

R1607 10KR2J-3-GP

1 2

R1609 113R2F-GP

1 2

R1610 10KR2J-3-GP

1 2

1 2

R1611 1KR2J-1-GP

3D3V_S0

3D3V_SB

A A

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

16 107Friday, February 02, 2018

16 107Friday, February 02, 2018

1

16 107Friday, February 02, 2018

A00C

A00C

A00C

5

4

3

Title

Title

Title

PCH_(DMI/PCI-E/USB)

PCH_(DMI/PCI-E/USB)

PCH_(DMI/PCI-E/USB)

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Gambits MLK SFF

Gambits MLK SFF

Gambits MLK SFF

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

5

www.teknisi-indonesia.com

D D

4

3

2

1

20170418
20170413
change to on board power switch
remove the net CHASSIS_ID_0 @ pin L47
20170420
add the net CHASSIS_ID_0 back for SFF

NGFF_WIFI_PWR_CRL[63]

C C

20170427
Change to SSD to SATA port1

B B

DP_HPD_CPU[19,59]

3D3V_SB

HDMI_DET_CPU[19,56]

WLAN_PEDET[63]

HDMI_DET_CPU HDMI1_DETECT

3D3V_SB

PW_CLEAR change from GPP_K9 to GPP_K10 to follow D9 Bison

PCH_RST_GPIO change from GPP_K10 to GPP_F23 to follow D9 Bison

R1701

DP_HPD_CPU VGA1_DETECT

R1712 10KR2J-3-GP

1 2

R1709 10KR2J-3-GP

1 2

SSD

HDD1

0R0402-PAD-2-GP

1 2

R1702

0R0402-PAD-2-GP

1 2

PW_CLEAR

PW_CLEAR[20]

CHASSIS_ID_0[64]

SATA_TX_PCH_N1[62]

SATA_TX_PCH_P1[62]
SATA_RX_PCH_N1[62]
SATA_RX_PCH_P1[62]

SATA_TX_PCH_N0[60]

SATA_TX_PCH_P0[60]
SATA_RX_PCH_N0[60]
SATA_RX_PCH_P0[60]

20170421
change to PCIE23, 24 to support Optane

CHASSIS_ID_0
NGFF_WIFI_PWR_CRL

GPP_K3

GPP_K3[63]

GPP_K5

SATA_TX_PCH_N1
SATA_TX_PCH_P1
SATA_RX_PCH_N1
SATA_RX_PCH_P1

SATA_TX_PCH_N0
SATA_TX_PCH_P0
SATA_RX_PCH_N0
SATA_RX_PCH_P0

SB1C

AR2

CL_CLK

AT5

CL_DATA

AU4

CL_RST#

P48

GPP_K8

V47

GPP_K9

V48

GPP_K10

W47

GPP_K11

L47

GPP_K0

L46

GPP_K1

U48

GPP_K2

U47

GPP_K3

N48

GPP_K4

N47

GPP_K5

P47

GPP_K6

R46

GPP_K7

C36

PCIE11_TXP/SATA0A_TXP

B36

PCIE11_TXN/SATA0A_TXN

F39

PCIE11_RXP/SATA0A_RXP

G38

PCIE11_RXN/SATA0A_RXN

AR42

GPP_F10/SATA_SCLOCK

AR48

GPP_F11/SATA_SLOAD

AU47

GPP_F13/SATA_SDATAOUT0

AU46

GPP_F12/SATA_SDATAOUT1

C39

PCIE14_TXN/SATA1B_TXN

D39

PCIE14_TXP/SATA1B_TXP

D46

PCIE14_RXN/SATA1B_RXN

C47

PCIE14_RXP/SATA1B_RXP

B38

PCIE13_TXN/SATA0B_TXN

C38

PCIE13_TXP/SATA0B_TXP

C45

PCIE13_RXN/SATA0B_RXN

C46

PCIE13_RXP/SATA0B_RXP

E37

PCIE12_TXP/SATA1A_TXP

D38

PCIE12_TXN/SATA1A_TXN

J41

PCIE12_RXP/SATA_1A_RXP

H42

PCIE12_RXN/SATA1A_RXN

B44

PCIE20_TXP/SATA7_TXP

A44

PCIE20_TXN/SATA7_TXN

R37

PCIE20_RXP/SATA7_RXP

R35

PCIE20_RXN/SATA7_RXN

D43

PCIE19_TXP/SATA6_TXP

C44

PCIE19_TXN/SATA6_TXN

N42

PCIE19_RXP/SATA6_RXP

M44

PCIE19_RXN/SATA6_RXN

CANON-LAKE-GP

(071.CANNO.0B0U)

3 OF 13

PCIE9_RXN
PCIE9_RXP
PCIE9_TXN

PCIE9_TXP

PCIE10_RXN
PCIE10_RXP
PCIE10_TXN

PCIE10_TXP

PCIE15_RXN/SATA2_RXN
PCIE15_RXP/SATA2_RXP

PCIE_15_SATA_2_TXN

PCIE15_TXP/SATA2_TXP
PCIE16_RXN/SATA3_RXN

PCIE16_RXP/SATA3_RXP
PCIE16_TXN/SATA3_TXN
PCIE16_TXP/SATA3_TXP

PCIE17_RXN/SATA4_RXN
PCIE17_RXP/SATA4_RXP
PCIE17_TXN/SATA4_TXN
PCIE17_TXP/SATA4_TXP

PCIE18_RXN/SATA5_RXN
PCIE18_RXP/SATA5_RXP
PCIE18_TXN/SATA5_TXN
PCIE18_TXP/SATA5_TXP

GPP_E8/SATA_LED#
GPP_E0/SATAXPCIE0/SATAGP0
GPP_E1/SATAXPCIE1/SATAGP1
GPP_E2/SATAXPCIE2/SATAGP2

GPP_F0/SATAXPCIE3/SATAGP_3

GPP_F1/SATAXPCIE4/SATAGP4
GPP_F2/SATAXPCIE5/SATAGP5
GPP_F3/SATAXPCIE6/SATAGP6
GPP_F4/SATAXPCIE7/SATAGP7

GPP_F21/EDP_BKLTCTL

GPP_F20/EDP_BKLTEN

GPP_F19/EDP_VDDEN

THRMTRIP#

PECI

PM_SYNC

PLTRST_CPU#

PM_DOWN

G36

20170423

F36

Remove PCIEx1 slot port from PCIE9

C34
D34

K37
J37
C35
B35

F44
E45
B40
C40

L41
M40
B41
C41

K43
K44
A42
B42

P41
R40
C42
D42

AK48
AH41
AJ43
AK47
AN47
AM46
AM43
AM47
AM48

AU48
AV46
AV44

AD3
AF2
AF3
AG5
AE2

20170427
Will add SATA2 Siganl Change to ODD Function

SATA_RX_PCH_N2
SATA_RX_PCH_P2
SATA_TX_PCH_N2
SATA_TX_PCH_P2

SATA_RX_PCH_N3
SATA_RX_PCH_P3
SATA_TX_PCH_N3
SATA_TX_PCH_P3

20170423
Will add SATA3 Siganl for SSD Function
20170427
Will add SATA3 Siganl Change to HDD2 Function

20170421
change to PCIE21, 22 to support Optane

PCH_SATA_LED_N

SSD_PEDET

PCH_PECI
PM_SYNC_PCH
PLTRST_CPU_N
PM_DOWN_PCH

R1710 619R2F-L1-GP
R1711 30R2J-1-GP

SATA_RX_PCH_N2 [60]
SATA_RX_PCH_P2 [60]
SATA_TX_PCH_N2 [60]
SATA_TX_PCH_P2 [60]

SATA_RX_PCH_N3 [60]
SATA_RX_PCH_P3 [60]
SATA_TX_PCH_N3 [60]
SATA_TX_PCH_P3 [60]

1 2

1 2

PLTRST_CPU_N [4,99]
PM_DOWN_PCH [4]

ODD

HDD2

PCH_SATA_LED_N [64]

SSD_PEDET [62]

THERMTRIP#_CPUTHERMTRIP#_PCH
PM_SYNC_CPU

THERMTRIP#_CPU [4]

THERMTRIP#_CPU

20170406
SATA LED add back to MB
TP_GPP_E8 change to PCH_SATA_LED_N

PCH_SATA_LED_N

VGA1_DETECT

20170609
Follow CRB will R1705 change to 3D3V_SB

SSD_PEDET

GPP_K5

(R_)

R1708
1KR2J-1-GP

1 2

PM_SYNC_CPU [4]

R1703 1KR2J-1-GP

1 2

R1704 10KR2J-3-GP

1 2

R1706 10KR2J-3-GP

1 2

R1705 10KR2J-3-GP

1 2

V_CPU_ST_PLL

3D3V_S0

3D3V_SB

R1714 10KR2J-3-GP

1 2

(R_)

R1713 10KR2J-3-GP

1 2

(R_)

3D3V_S0

A A

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

17 107Friday, February 02, 2018

17 107Friday, February 02, 2018

1

17 107Friday, February 02, 2018

A00C

A00C

A00C

5

4

3

Title

Title

Title

PCH_(PCI-E/SATA)

PCH_(PCI-E/SATA)

PCH_(PCI-E/SATA)

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Gambits MLK SFF

Gambits MLK SFF

Gambits MLK SFF

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

5

www.teknisi-indonesia.com

4

3

2

1

D D

PCH_CPU_NSSC_CLK_DP[4]
PCH_CPU_NSSC_CLK_DN[4]

PCH_CPU_BCLK_DP[4]

3D3V_S0

R1806 10KR2J-3-GP

PCIE_SLOT2_PRSNT_N

1 2

20170406
PCI bridge IC has no CLKREQ#
add a PD resistor
20170518
Remove R1808 for PEG_CLKREQ10_PCH#

C C

PCH_CPU_BCLK_DN[4]

1 2

R1802 60D4R2F-GP

PEG_CLKREQ1_PCH#[63]
PEG_CLKREQ2_PCH#[31]

PCIE_SLOT2_PRSNT_N[93]

PEG_CLKREQ8_PCH#[93]
PEG_CLKREQ9_PCH#[94]

20170518
Remove PEG_CLKREQ10_PCH# Signal for PCI Slot

20170423
Remove PEG_CLKREQ11_PCH# Signal for PCIE Slot

PCH_CPU_NSSC_CLK_DP
PCH_CPU_NSSC_CLK_DN

PCH_CPU_BCLK_DP
PCH_CPU_BCLK_DN

XTAL_24M_PCH_OUT
XTAL_24M_PCH_IN

XCLK_RBIAS
PCH_RTCX1

PCH_RTCX2

PEG_CLKREQ1_PCH#
PEG_CLKREQ2_PCH#
PEG_CLKREQ3_PCH#
PCIE_SLOT2_PRSNT_N

20170518
remove the net L_BAR_CTRL

PEG_CLKREQ8_PCH#
PEG_CLKREQ9_PCH#

SB1G

BE33

GPP_A16/CLKOUT_48

D7

CLKOUT_CPUNSSC_P

C6

CLKOUT_CPUNSSC#

B8

CLKOUT_CPUBCLK_P

C8

CLKOUT_CPUBCLK#

U9

XTAL_OUT

U10

XTAL_IN

T3

XCLK_BIASREF

BA49

RTCX1

BA48

RTCX2

BF31

GPP_B5/SRCCLKREQ0#

BE31

GPP_B6/SRCCLKREQ1#

AR32

GPP_B7/SRCCLKREQ2#

BB30

GPP_B8/SRCCLKREQ3#

BA30

GPP_B9/SRCCLKREQ4#

AN29

GPP_B10/SRCCLKREQ5#

AE47

GPP_H0/SRCCLKREQ6#

AC48

GPP_H1/SRCCLKREQ7#

AE41

GPP_H2/SRCCLKREQ8#

AF48

GPP_H3/SRCCLKREQ9#

AC41

GPP_H4/SRCCLKREQ10#

AC39

GPP_H5/SRCCLKREQ11#

AE39

GPP_H6/SRCCLKREQ12#

AB48

GPP_H7/SRCCLKREQ13#

AC44

GPP_H8/SRCCLKREQ14#

AC43

GPP_H9/SRCCLKREQ15#

V2

CLKOUT_PCIE_N15

V3

CLKOUT_PCIE_P15

T2

CLKOUT_PCIE_N14

T1

CLKOUT_PCIE_P14

AA1

CLKOUT_PCIE_N13

Y2

CLKOUT_PCIE_P13

AC7

CLKOUT_PCIE_N12

AC6

CLKOUT_PCIE_P12

CANON-LAKE-GP

(071.CANNO.0B0U)

7 OF 13

CLKOUT_ITPXDP#

CLKOUT_ITPXDP_P

CLKOUT_CPUPCIBCLK#

CLKOUT_CPUPCIBCLK_P

CLKOUT_PCIE_N0
CLKOUT_PCIE_P0

CLKOUT_PCIE_N1
CLKOUT_PCIE_P1

CLKOUT_PCIE_N2
CLKOUT_PCIE_P2

CLKOUT_PCIE_N3
CLKOUT_PCIE_P3

CLKOUT_PCIE_N4
CLKOUT_PCIE_P4

CLKOUT_PCIE_N5
CLKOUT_PCIE_P5

CLKOUT_PCIE_N6
CLKOUT_PCIE_P6

CLKOUT_PCIE_N7
CLKOUT_PCIE_P7

CLKOUT_PCIE_N8
CLKOUT_PCIE_P8

CLKOUT_PCIE_N9
CLKOUT_PCIE_P9

CLKOUT_PCIE_N10

CLKOUT_PCIE_P10

CLKOUT_PCIE_N11

CLKOUT_PCIE_P11

CLKIN_XTAL

Y3
Y4

PCH_CPU_PCIBCLK_DN

B6

PCH_CPU_PCIBCLK_DP

A6
AJ6

AJ7

PEG_CLK1_PCH#

AH9

PEG_CLK1_PCH

AH10

PEG_CLK2_PCH#

AE14

PEG_CLK2_PCH

AE15
AE6

20170423

AE7

Remove CLKOUT_PCIE3 Signal for SSD

AC2
AC3

AB2
AB3

W4
W3

W7
W6

PEG_CLK8_PCH#

AC14

PEG_CLK8_PCH

AC15

PEG_CLK9_PCH#

U2

PEG_CLK9_PCH

U3
AC9

20170421

AC11

Remove PEG_CLK10 Signal for PCI bridge IC

AE9

20170423

AE11

Remove PEG_CLK11 Signal for PCIE Slot

TP_CLKIN_XTAL

R6

20170504
add 38.4Mhz refclk from wifi card
20170607
Remove R1817 & R1815
R1816 change to unmount

PCH_CPU_PCIBCLK_DN [4]
PCH_CPU_PCIBCLK_DP [4]

PEG_CLK1_PCH# [63]
PEG_CLK1_PCH [63]

PEG_CLK2_PCH# [31]
PEG_CLK2_PCH [31]

PEG_CLK8_PCH# [93]
PEG_CLK8_PCH [93]

PEG_CLK9_PCH# [94]
PEG_CLK9_PCH [94]

1 2

R1816 0R0402-PAD-2-GP

WLAN

LAN

PCIEx16

PCIEx1

PULSAR_38D4M_REFCLK

PEG_CLKREQ1_PCH#

PEG_CLKREQ2_PCH#

PEG_CLKREQ3_PCH#

PEG_CLKREQ8_PCH#

PEG_CLKREQ9_PCH#

20170518
Remove R1810 for PEG_CLKREQ10_PCH#

20170423
Remove R1811 for PCIE Slot

PULSAR_38D4M_REFCLK [63]

R1801 10KR2J-3-GP

1 2

R1803 10KR2J-3-GP

1 2

R1805 10KR2J-3-GP

1 2

R1807 10KR2J-3-GP

1 2

20170414
duplicate net and pull up

R1809 10KR2J-3-GP

1 2

3D3V_S0

CLOCK BUFF

1 2

SUSCLK

SUSCLK[20]

B B

20170508
add to follow D9
20170627
Remove Clock Buff circuit

R1818 0R0402-PAD-2-GP

1 2

R1822 0R0402-PAD-2-GP

SUSCLK_SIO

SUSCLK_WIFI

SUSCLK_SIO [24]

SUSCLK_WIFI [63]

20170607
change to common part follow d9

1 2

R1814

10MR3J-L1-GP

A A

SC15P50V2JN-DL-GP

C1803

12

1 2

XTAL-32D768KHZ-88-GP

X1802

PCH_RTCX1

PCH_RTCX2

12

C1804
SC15P50V2JN-DL-GP

SC15P50V2JN-DL-GP

9/5 CL change to 15P for vendor

follow PDG
Frequecy: 32.768KHz
ESR: 50kohm
CL: 12pF

5

4

follow PDG
Frequecy: 24MHz
Series Resistance :< 30ohm MAX
CL: 12pF

5/12 P/N is 082.30006.0531

NOTE:The 200kohm Damping Resistor

follow CRB

C1802

1 2

R1812 200KR2F-L-GP

4 1

12

XTAL-24MHZ-182-GP

9/5 CL change to 15P for vendor

X1801

XTAL_24M_PCH_IN

XTAL_24M_PCH_OUT

23

12

C1801
SC15P50V2JN-DL-GP

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Title

Title

PCH_(CLOCK/CL)

PCH_(CLOCK/CL)

PCH_(CLOCK/CL)

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Gambits MLK SFF

Gambits MLK SFF

Gambits MLK SFF

Date: Sheet of

Date: Sheet of

3

2

Date: Sheet of

Taipei Hsien 221, Taiwan, R.O.C.

18 107Friday, February 02, 2018

18 107Friday, February 02, 2018

1

18 107Friday, February 02, 2018

A00C

A00C

A00C

5

www.teknisi-indonesia.com

D D

C C

B B

HDMI_DET_CPU[17,56]

DP_HPD_CPU[17,59]

USB30_TX_PCH_N1[38]
USB30_TX_PCH_P1[38]

USB30_RX_PCH_N1[38]

USB30_RX_PCH_P1[38]
USB30_TX_PCH_N2[38]
USB30_TX_PCH_P2[38]

USB30_RX_PCH_N2[38]

USB30_RX_PCH_P2[38]

HDMI_DET_CPU

DP_HPD_CPU

USB30_TX_PCH_N1
USB30_TX_PCH_P1
USB30_RX_PCH_N1
USB30_RX_PCH_P1
USB30_TX_PCH_N2
USB30_TX_PCH_P2
USB30_RX_PCH_N2
USB30_RX_PCH_P2

SB1E

AT6

GPP_I0/DDPB_HPD0/DISP_MISC0

AN10

GPP_I1/DDPC_HPD1/DISP_MISC1

AP9

GPP_I2/DPPD_HPD2/DISP_MISC2

AL15

GPP_I3/DPPE_HPD3/DISP_MISC3

AN6

GPP_I4/EDP_HPD/DISP_MISC4

CANON-LAKE-GP

(071.CANNO.0B0U)

SB1F

F9

USB31_1_TXN

F7

USB31_1_TXP

D11

USB31_1_RXN

C11

USB31_1_RXP

C3

USB31_2_TXN

D4

USB31_2_TXP

B9

USB31_2_RXN

C9

USB31_2_RXP

C17

USB31_6_TXN

C16

USB31_6_TXP

G14

USB31_6_RXN

F14

USB31_6_RXP

C15

USB31_5_TXN

B15

USB31_5_TXP

J13

USB31_5_RXN

K13

USB31_5_RXP

G12

USB31_3_TXP

F11

USB31_3_TXN

C10

USB31_3_RXP

B10

USB31_3_RXN

C14

USB31_4_TXP

B14

USB31_4_TXN

J15

USB31_4_RXP

K16

USB31_4_RXN

CANON-LAKE-GP

(071.CANNO.0B0U)

GPP_I10/DDPD_CTRLDATA

GPP_F23/DDPF_CTRLDATA

GPP_F22/DDPF_CTRLCLK

GPP_F14/EXT_PWR_GATE#/PS_ON#

GPP_A1/LAD0/ESPI_IO0
GPP_A2/LAD1/ESPI_IO1
GPP_A3/LAD2/ESPI_IO2
GPP_A4/LAD3/ESPI_IO3

GPP_A5/LFRAME#/ESPI_CS0#

GPP_A6/SERIRQ/ESPI_CS1#

GPP_A7/PIRQA#/ESPI_ALERT0#

GPP_A0/RCIN#/ESPI_ALERT1#

GPP_A14/SUS_STAT#/ESPI_RESET#

GPP_A9/CLKOUT_LPC0/ESPI_CLK

GPP_A10/CLKOUT_LPC1

GPP_E6/SATA_DEVSLP2
GPP_E5/SATA_DEVSLP1
GPP_E4/SATA_DEVSLP0
GPP_F9/SATA_DEVSLP7
GPP_F8/SATA_DEVSLP6
GPP_F7/SATA_DEVSLP5
GPP_F6/SATA_DEVSLP4
GPP_F5/SATA_DEVSLP3

20170417-2
add PCH heatsink hook and detect

PCH_HEATSINK_DET

HS1901

1
2

FOX-CON2-3-GP

(R_)

4

5 OF 13

GPP_I5/DDPB_CTRLCLK

GPP_I6/DDPB_CTRLDATA

GPP_I7/DDPC_CTRLCLK

GPP_I8/DDPC_CTRLDATA

GPP_I9/DDPD_CTRLCLK

GPP_K23/IMGCLKOUT1
GPP_K22/IMGCLKOUT0

GPP_K21
GPP_K20

GPP_H23/TIME_SYNC0

6 OF 13

BB39
AW37
AV37
BA38

BE38
AW35
BA36
BE39
BF38

BB36
BB34

T48

GPP_K19/SMI#

T47

GPP_K18/NMI#

AH40
AH35
AL48
AP47
AN37
AN46
AR47
AP48

20170418
PCH_RST_GPIO change from GPP_K10 to GPP_F23 to follow D9 Bison
change net name to PCIVAUX_CTRL

HDMI_CLK_CPU

AL13
AR8
AN13
AL10
AL9
AR3
AN40
AT49

AP41
M45

L48
T45
T46
AJ47

LPC_AD_PCH_P0
LPC_AD_PCH_P1
LPC_AD_PCH_P2
LPC_AD_PCH_P3

LPC_FRAME#_PCH_R
LPC_SERIRQ_PCH
GPP_A7
KBRST_N

LPC_CLK_PCH_P0
LPC_CLK_PCH_P1

DEVSLP_N

PCH_HEATSINK_DET

WLAN_USB_DET

HS1902

FOX-CON2-3-GP

(R_)

HDMI_DATA_CPU
DDPC_CTRL_CLK
DDPC_CTRL_DATA
DDPD_CTRL_CLK
DDPD_CTRL_DATA
PCIVAUX_CTRL
GPIO_PEG_RESET_N

PCH_PS_ON_N
GPIO_LAN_RESET_N
PIRQA_N

20170609
ADD R1917 & R1918 for TPM PIRQA_N singal

1
2

HDMI_CLK_CPU [56]
HDMI_DATA_CPU [23,56]

DDPC_CTRL_DATA [23]
DDPD_CTRL_DATA [23]

PIRQA_N [91]

LPC_AD_PCH_P0 [24,68]
LPC_AD_PCH_P1 [24,68]
LPC_AD_PCH_P2 [24,68]
LPC_AD_PCH_P3 [24,68]

LPC_SERIRQ_PCH [24,68]

KBRST_N [24]

DEVSLP_N [62]

WLAN_USB_DET [63]

3

20170418
GPIO_LAN_RESET change from GPP_F23 to GPP_K23
change net name to GPIO_LAN_RESET_N
GPIO_PEG_RESET change net name to GPIO_PEG_RESET_N

2

3D3V_SB

PIRQA_N

20170609
ADD R1917 & R1918 for TPM PIRQA_N singal

WLAN_USB_DET

20170418
change from 2K2R to 8K2R to follow D9 Bison

GPP_A7

20170418
mount R102 10KR to follow D9 Bison

20170609
Remove R1903 and PEG_SLOT_PWR_EN

PIRQA_N
PCIVAUX_CTRL

PCH_PS_ON_N

20170615
ADD R1919 foe PCH_PS_ON_N

DDPC_CTRL_CLK

DDPD_CTRL_CLK

HDMI_CLK_CPU

20170509
Remove R1909

LPC_SERIRQ_PCH

GPIO_PEG_RESET_N

GPIO_LAN_RESET_N

USB_OC5_R_N[16]
USB_OC1_R_N[16,39]

USB_OC0_R_N[16,38]

USB_OC5_R_N
PCH_HEATSINK_DET
USB_OC1_R_N
USB_OC0_R_N

R1917 10KR2J-3-GP

1 2

R1901 8K2R2F-1-GP

1 2

R1902 10KR2J-3-GP

1 2

1 2

R1918 10KR2J-3-GP(R_)

1 2

R1905 10KR2J-3-GP(R_)

1 2

R1919 10KR2J-3-GP(R_)

R1906 2K2R2J-2-GP

1 2

(R_)

R1907 2K2R2J-2-GP

1 2

(R_)

R1908 2K2R2J-2-GP

1 2

R1910 10KR2J-3-GP

1 2

R1911 10KR2J-3-GP

1 2

R1912 10KR2J-3-GP

1 2

R1913 33R2J-2-GP

1 2

R1914 22R2J-2-GP

1 2

R1915 22R2J-2-GP

1 2

R1916 22R2J-2-GP

1 2

1
2
3
4 5

SRN10KJ-6-GP

RN1901

LPC_FRAME#_PCHLPC_FRAME#_PCH_R

LPC_CLK_14M_EC

LPC_CLK_14M_DEBUGLPC_CLK_PCH_P0

LPC_CLK_33M_ECLPC_CLK_PCH_P1

3D3V_SB

8
7
6

3D3V_S0

20170406
add to control PLTRST_N of device and slot

LPC_FRAME#_PCH [24,68]

LPC_CLK_14M_EC [24]

LPC_CLK_14M_DEBUG [68]

LPC_CLK_33M_EC [24]

1

HEAT SINK DETECT

A A

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

19 107Friday, February 02, 2018

19 107Friday, February 02, 2018

1

19 107Friday, February 02, 2018

A00C

A00C

A00C

5

4

3

Title

Title

Title

PCH_(USB/ESPI)

PCH_(USB/ESPI)

PCH_(USB/ESPI)

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Gambits MLK SFF

Gambits MLK SFF

Gambits MLK SFF

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

5

www.teknisi-indonesia.com

HDA_BITCLK_PCH

HDA_BITCLK_CODEC

HDA_RST#_CODEC

HDA_SDOUT_CODEC

HDA_SYNC_CODEC

AUD_AZACPU_SDO

AUD_AZACPU_SCLK

PCM_OUT

PCM_SYNC

HDA_SDIN0_PCH
HDA_SDOUT_PCH
HDA_SYNC_PCH

HDA_RST#_PCH

I2S1_SFRM

AUD_AZACPU_SDO_R
AUD_AZACPU_SDI_R
AUD_AZACPU_SCLK_R

PCM_OUT_PCH
PCM_SYNC_PCH

PCH_RTCRST_PULLUP
PCH_SRTCRSTB_PULLUP

PCH_PWROK
RSMRST_SIO_N

PCH_DPWROK
SMBALERT_N
SMB_CLK_RESUME
SMB_DATA_RESUME
SML0ALERT#
SML0CLK_PCH
SML0DATA_PCH
TMIN_SHIFT_PCH
SMLICLK_PCH
SMLIDATA_PCH

R2017 33R2J-2-GP

1 2

R2019 33R2J-2-GP

1 2

R2020 33R2J-2-GP

1 2

R2022 33R2J-2-GP

1 2

R2025 30R2J-1-GP

1 2

R2027 30R2J-1-GP

1 2

R2032 33R2J-2-GP

1 2

R2033 33R2J-2-GP

1 2

HDA_SDIN0_PCH[27]

D D

20170410
change net name form TMIN_SHIFT to TMIN_SHIEF_PCH for Edison's feedback

C C

B B

AUD_AZACPU_SDI_R[7]

12

R2054
100KR2J-1-GP

(R_)

PCH_PWROK[40]

RSMRST_SIO_N[24,63,99]

PCH_DPWROK[26]

SMBALERT_N[23]
SMB_CLK_RESUME[24,93,94]
SMB_DATA_RESUME[24,93,94]

SML0ALERT#[23]

TMIN_SHIFT_PCH[23]

SMLICLK_PCH[24]

SMLIDATA_PCH[24]

HDA_BITCLK_CODEC[27]

HDA_RST#_CODEC[27]

HDA_SDOUT_CODEC[27]

HDA_SYNC_CODEC[27]

AUD_AZACPU_SDO[7]

AUD_AZACPU_SCLK[7]

PCM_OUT[63]

PCM_SYNC[63]

SB1D

BD11

HDA_BCLK/I2S0_SCLK

BE11

HDA_SDI0/I2S0_RXD

BF12

HDA_SDO/I2S0_TXD

BG13

HDA_SYNC/I2S0_SFRM

BE10

HDA_RST#/I2S1_SCLK

BF10

HDA_SDI1/I2S1_RXD

BE12

I2S1_TXD/SNDW2_DATA

BD12

I2S1_SFRM/SNDW2_CLK

AM2

HDACPU_SDO

AN3

HDACPU_SDI

AM3

HDACPU_SCLK

AV18

GPP_D8/I2S2_SCLK

AW18

GPP_D7/I2S2_RXD

BA17

GPP_D6/I2S2_TXD/MODEM_CLKREQ

BE16

GPP_D5/I2S2_SFRM/CNV_RF_RESET#

BF15

GPP_D20/DMIC_DATA0/SNDW4_DATA

BD16

GPP_D19/DMIC_CLK0/SNDW4_CLK

AV16

GPP_D18/DMIC_DATA1/SNDW3_DATA

AW15

GPP_D17/DMIC_CLK1/SNDW3_CLK

BE47

RTCRST#

BD46

SRTCRST#

AY42

PCH_PWROK

BA47

RSMRST#

AW41

DSW_PWROK

BE25

GPP_C2/SMBALERT#

BE26

GPP_C0/SMBCLK

BF26

GPP_C1/SMBDATA

BF24

GPP_C5/SML0ALERT#

BF25

GPP_C3/SML0CLK

BE24

GPP_C4/SML0DATA

BD33

GPP_B23/SML1ALERT#/PCHHOT#

BF27

GPP_C6/SML1CLK

BE27

GPP_C7/SML1DATA

CANON-LAKE-GP

(071.CANNO.0B0U)

HDA_BITCLK_PCH

HDA_RST#_PCH

HDA_SDOUT_PCH

HDA_SYNC_PCH

AUD_AZACPU_SDO_R

AUD_AZACPU_SCLK_R

PCM_OUT_PCH

PCM_SYNC_PCH

4

GPP_A12/BM_BUSY#/ISH_GP6/SX_EXIT_HOLDOFF#

GPP_B1/GSPI1_CS1#/TIME_SYNC1

GPP_K17/ADR_COMPLETE

GPP_A13/SUSWARN#/SUSPWRDNACK

4 OF 13

GPP_A8/CLKRUN#
GPD11/LANPHYPC
GPD9/SLP_WLAN#

DRAM_RESET#

GPP_B2/VRALERT#

GPP_B0/GSPI0_CS1#

GPP_B11/I2S_MCLK

SYS_PWROK

WAKE#

GPD6/SLP_A#

SLP_LAN#

GPP_B12/SLP_S0#

GPD4/SLP_S3#
GPD5/SLP_S4#

GPD10/SLP_S5#

GPD8/SUSCLK

GPD0/BATLOW#

GPP_A15/SUSACK#

GPD2/LAN_WAKE#
GPD1/ACPRESENT

SLP_SUS#

GPD3/PWRBTN#

SYS_RESET#

GPP_B14/SPKR

CPUPWRGD

ITP_PMODE

PCH_JTAGX

PCH_JTAG_TMS

PCH_JTAG_TDO

PCH_JTAG_TDI

PCH_JTAG_TCK

CRB
SLP_S0_N de-glitch circuit

20170411
reserve CEC control
20170517
Remove U2001 U2002 U2003

3

20170410
add net GPP_A8 for Edison's feedback

SIO_PECI_REQ_N

BF36

GPP_A8 GPP_A8

AV32
BF41

SLP_WLAN_N

BD42

SM_DRAMRST#

BB46

UART_BT_WAKE_N

BE32
BF33
BE29
R47
AP29

PCH_SYSPWROK

AU3

PCH_WAKE_N

BB47

PCH_SLP_A_N

BE40

TP_SLP_LAN_N

BF40

SLP_S0_N

BC28

SLP_S3_N

BF42

SLP_S4_N

BE42

SLP_S5_N

BC42
BE45

SUSCLK
BATLOW_N

BF44

SUS_PWR_ACK

BE35

SUS_WARNB

BC37

LANWAKE_R_N

BG44
BG42

ACPRESENT

BD39

PWRBTN_N

BE46

FP_RST_N

AU2
AW29

SPKR
H_PWRGD_R H_PWRGD

AE3

ITP_PMODE

AL3

H_TCK

AH4

PCH_JTAG_TMS

AJ4

PCH_JTAG_TDO

AH3

PCH_JTAG_TDI

AH2

PCH_JTAG_TCK

AJ3

SIO_PECI_REQ_N [24]

SM_DRAMRST# [11,12]
UART_BT_WAKE_N [63]

PCH_SYSPWROK [24,99]

PCH_WAKE_N [31,62,63,93,94]

SLP_S0_N [91]

1

TP2003

SUSCLK [18]

SUS_PWR_ACK [38]
SUS_WARNB [24]

PWRBTN_N [24,64,99]
FP_RST_N [99]

SPKR [23,27]

ITP_PMODE [99]
H_TCK [4]

PCH_JTAG_TMS [4]
PCH_JTAG_TDO [4]
PCH_JTAG_TDI [4]

12

Place Near PCH within 1.1 inch

R2011
51R2F-2-GP

(R_)

SLP_WLAN_N [63]

1

SLP_SUSB

R2006 0R0402-PAD-2-GP

1 2

SUS_PWR_ACK SUS_WARNB

TP2001

20170613
R2004 Change to unmount

SLP_SUSB [24,42,51]

H_PWRGD [4,99]

PCH_PWROK

2

R2004
0R2J-2-GP

1 2

(R_)

PCH_SLP_A_N [24,99]

SLP_S3_N [24,40,42,50,99]
SLP_S4_N [8,24,32,38,39,40,99]

DB2001 0R3J-0-U-GP

1 2

(R_)

20170411
remove LAN power control

For DB1 Debug Hole

SLP_S0_N SLP_S0_PLT_N

1 2

DB2002 0R3J-0-U-GP

(R_)

1

TP2002

1

R2001 10KR2J-3-GP

20170410
add net GPP_A8 for Edison's feedback

SIO_PECI_REQ_N

PCH_SYSPWROK

20170609
R2005 change to 1kohm follow CRB Design

UART_BT_WAKE_N

SML0CLK_PCH

SML0DATA_PCH

SMLICLK_PCH

SMLIDATA_PCH

FP_RST_N

20170411
remove WLAN power control
20170421
add WALN power control for BIOS's request

SLP_WLAN_N

PCH_WAKE_N

ACPRESENT

BATLOW_N
LANWAKE_R_N

20170607
R2021/R2024/R2026/R2028 change Power rail

H_TCK

PCH_JTAG_TDO

PCH_JTAG_TDI

PCH_JTAG_TMS

1 2

R2002 10KR2J-3-GP

1 2

R2003 1KR2J-1-GP

1 2

(R_)

R2007 10KR2J-3-GP

1 2

R2009 499R2F-2-GP

1 2

R2010 499R2F-2-GP

1 2

R2012 1KR2J-1-GP

1 2

R2013 1KR2J-1-GP

1 2

R2005 2K2R2J-2-GP

1 2

R2044 10KR2J-3-GP(R_)

1 2

R2014 1KR2J-1-GP

1 2

R2015 10KR2J-3-GP

1 2

RN2001

1
2 3

SRN10KJ-5-GP

R2021 1K5R2F-2-GP

1 2

(R_)

R2024 100R2F-L1-GP-U

1 2

R2026 51R2F-2-GP

1 2

R2028 51R2F-2-GP

1 2

For ITH/DCI debug

20170607
Remove R2030

4

V_CPU_ST_PLL

3D3V_S0

3D3V_SB

3D3V_S5

V_CPU_ST_PLL

HDA_BITCLK_PCH

ME ENABLE/DISABLE PASSWORD CLEAR CLEAR CMOS

With Jumper
Without Jumper

3D3V_SB

ME_CNTL[15]

A A

5

R2034 0R0402-PAD-2-GP

1 2

R2037 1KR2J-1-GP

1 2

R2038 1KR2J-1-GP

1 2

ME Disable
Normal Mode

ME_CNTL_2

ME_CNTL_1ME_CNTL

B

4

E

LMBT3906LT1G-1-GP
Q2001

C

R2039 0R0402-PAD-2-GP

1 2

With Jumper
Without Jumper

AUD_LINK_SDO_R1

PW_CLEAR[17]

PW_CLEAR

Normal Mode
Clear Password

JMP1
PIN-CONN6A-S3-GP

1 2

3 4

5 6

3D3V_SB

12

R2041
10KR2J-3-GP

3

PCH_RTCRST_DOWN

PCH_RTCRST_PULLUPAUD_LINK_SDO_CHDA_SDOUT_PCH

3P0V_BAT_VREG

With Jumper
Without Jumper

C2006 SC1U10V2KX-1DLGP

R2042 30K1R2F-L-GP

1 2

Clear CMOS
Normal Mode

R2035 4K7R2J-2-GP

1 2

R2036 0R0402-PAD-2-GP

PCH_RTCRST_N

1 2

R2040 30K1R2F-L-GP

1 2

1 2

12

C2007
SC1U10V2KX-1DLGP

PCH_RTCRST_N [99]

3P0V_BAT_VREG

PCH_SRTCRSTB_PULLUP

12

R2043
4K7R2J-2-GP

(R_)

2

HDA_RST#_PCH
SLP_WLAN_N
PCH_SLP_A_N
SLP_S3_N
SLP_S4_N
SLP_SUSB

Title

Title

Title

PCH_(GPIO/SMBUS/IHDA/JTAG)

PCH_(GPIO/SMBUS/IHDA/JTAG)

PCH_(GPIO/SMBUS/IHDA/JTAG)

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Gambits MLK SFF

Gambits MLK SFF

Gambits MLK SFF

Date: Sheet of

Date: Sheet of

Date: Sheet of

(R_)

1 2

R2052 100KR2J-1-GP

1 2

R2053 100KR2J-1-GP(R_)

1 2

R2048 100KR2J-1-GP(R_)

1 2

R2047 100KR2J-1-GP(R_)

1 2

R2046 100KR2J-1-GP(R_)

1 2

R2045 100KR2J-1-GP(R_)

1 2

R2055 100KR2J-1-GP(R_)

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

20 107Friday, February 02, 2018

20 107Friday, February 02, 2018

1

20 107Friday, February 02, 2018

A00C

A00C

A00C

5

www.teknisi-indonesia.com

4

3

2

1

D D

1V_PCH_SB

12

C2127

C C

VCCA_PRIM_3p3
Follow CRB ,
Mark

3D3V_SB

B B

1 2

L2101 HCB1608KF-601T10-GP

(68.00230.041)

1V_PCH_SB

1 2

L2102 HCB1608KF-601T10-GP

(68.00230.041)

1V_VCCAMPHYPLL1V_PCH_SB

1V_VCCA_XTAL

SC22U6D3V3MX-1-DL-GP

12

C2126
SC10U6D3V3MX-DL-GP

12

C2110
SC1U10V2KX-1DLGP

12

C2118
SC22U6D3V3MX-1-DL-GP

12

12

C2111
SC22U6D3V3MX-1-DL-GP

12

C2119
SC22U6D3V3MX-1-DL-GP

C2128
SC1U10V2KX-1DLGP

12

C2112
SC22U6D3V3MX-1-DL-GP

1V_PCH_SB

1V_PCH_SB

1V_PCH_SB

1V_VCCDSW

1V_VCCAMPHYPLL

1V_VCCA_XTAL

1V_PCH_SB

SB1H

AA22

VCCPRIM_1P051

AA23

VCCPRIM_1P052

AB20

VCCPRIM_1P053

AB22

VCCPRIM_1P054

AB23

VCCPRIM_1P055

AB27

VCCPRIM_1P056

AB28

VCCPRIM_1P057

AB30

VCCPRIM_1P058

AD20

VCCPRIM_1P059

AD23

VCCPRIM_1P0510

AD27

VCCPRIM_1P0511

AD28

VCCPRIM_1P0512

AD30

VCCPRIM_1P0513

AF23

VCCPRIM_1P0516

AF27

VCCPRIM_1P0517

AF30

VCCPRIM_1P0518

U26

VCCPRIM_1P0523

U29

VCCPRIM_1P0524

V25

VCCPRIM_1P0525

V27

VCCPRIM_1P0526

V28

VCCPRIM_1P0527

V30

VCCPRIM_1P0528

V31

VCCPRIM_1P0529

AD31

VCCPRIM_1P0514

AE17

VCCPRIM_1P0515

W22

VCCDUSB_1P051

W23

VCCDUSB_1P052

BG45

VCCDSW_1P051

BG46

VCCDSW_1P052

W31

VCCPRIM_MPHY_1P05

D1

VCCPRIM_1P0521

E1

VCCPRIM_1P0522

C49

VCCAMPHYPLL_1P051

D49

VCCAMPHYPLL_1P052

E49

VCCAMPHYPLL_1P053

P2

VCCA_XTAL_1P051

P3

VCCA_XTAL_1P052

W19

VCCA_SRC_1P051

W20

VCCA_SRC_1P052

C1

VCCAPLL_1P054

C2

VCCAPLL_1P055

V19

VCCA_BCLK_1P05

B1

VCCAPLL_1P051

B2

VCCAPLL_1P052

B3

VCCAPLL_1P053

CANON-LAKE-GP

(071.CANNO.0B0U)

3P0V_BAT_VREG

12

1V_PCH_SB

12

VCCPRIM_3P32

DCPRTC1
DCPRTC2

VCCPRIM_3P35

VCCRTC1
VCCRTC2

VCCPGPPG_3P3

VCCPRIM_3P33
VCCPRIM_3P34

VCCPGPPHK1
VCCPGPPHK2
VCCPGPPEF1
VCCPGPPEF2

VCCPGPPD
VCCPGPPBC1
VCCPGPPBC2

VCCPGPPA

VCCPRIM_3P31
VCCDSW_3P31
VCCDSW_3P32

VCCPRIM_1P83
VCCPRIM_1P84
VCCPRIM_1P85
VCCPRIM_1P86
VCCPRIM_1P87

VCCPRIM_1P81
VCCPRIM_1P82

VCCPRIM_1P0520
VCCPRIM_1P0519

VCCPRIM_1P241
VCCPRIM_1P242

VCCDPHY_1P241
VCCDPHY_1P242
VCCDPHY_1P243

VCCMPHY_SENSE
VSSMPHY_SENSE

3P0V_BAT_VREG
Current:0.000416A

C2102
SCD1U16V2KX-3DLGP

C2113
SCD1U16V2KX-3DLGP

8 OF 13

VCCSPI

VCCHDA

AW9
BF47

BG47
V23

AN44
BC49

BD49
AN21

AY8
BB7

AC35
AC36
AE35
AE36

AN24
AN26
AP26

AN32
AT44

BE48
BE49

BB14
AG19
AG20
AN15
AR15
BB11

AF19
AF20

AG31
AF31
AK22
AK23

AJ22
AJ23
BG5

K47
K46

12

C2103
SC1U10V2KX-1DLGP

12

C2114
SCD1U16V2KX-3DLGP

3D3V_SB

DCPRTC

3D3V_SB
3D3V_SB

3P0V_BAT_VREG

3D3V_SB

3D3V_SB
3D3V_SB

1D8V_SB_CNVI

3D3V_SB

3D3V_SB
3D3V_SB

3D3V_S5

3D3V_SB

1D8V_SB

1V_PCH_SB
1D24V_PCH

1D24V_PCH

TP_VCCPHY_SENSE
TP_VSSPHY_SENSE

C2101
SCD1U16V2KX-3DLGP

1 2

20170412
rename 1D24V_SB to 1D24V_PCH

1

TP2101

1

TP2102

3D3V_SB

12

C2104
SCD1U16V2KX-3DLGP

12

C2115
SCD1U16V2KX-3DLGP

12

C2105
SCD1U16V2KX-3DLGP

12

C2116
SCD1U16V2KX-3DLGP

3D3V_SB1D8V_SB

1 2

R21010R0603-PAD-2-GP-U

1 2

R21020R3J-0-U-GP (R_)

3D3V_SB 3D3V_S5 1D8V_SB

12

C2106
SCD1U16V2KX-3DLGP

12

C2117
SCD1U16V2KX-3DLGP

12

C2107
SCD1U16V2KX-3DLGP

20170412
rename 1D24V_SB to 1D24V_PCH

12

C2108

SC4D7U6D3V3KX-DLGP

1D24V_PCH

12

SC4D7U6D3V3KX-DLGP

C2109

12

C2120

1V_VCCDSW

12

C2125
SC1U10V2KX-1DLGP

A A

5

4

SC1U10V2KX-1DLGP

12

C2121
SC1U10V2KX-1DLGP

3

12

C2122
SC1U10V2KX-1DLGP

12

C2123
SC1U10V2KX-1DLGP

12

C2124
SC1U10V2KX-1DLGP

2

12

C2129
SC22U6D3V3MX-1-DL-GP

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Title

Title

PCH_(POWER1)

PCH_(POWER1)

PCH_(POWER1)

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Gambits MLK SFF

Gambits MLK SFF

Gambits MLK SFF

Date: Sheet of

Date: Sheet of

Date: Sheet of

Taipei Hsien 221, Taiwan, R.O.C.

21 107Friday, February 02, 2018

21 107Friday, February 02, 2018

1

21 107Friday, February 02, 2018

A00C

A00C

A00C

5

www.teknisi-indonesia.com

D D

9 OF 13

SB1I

A2

VSS_1

A28

VSS_2

A3

VSS_3

A33

VSS_4

A37

VSS_5

A4

VSS_6

A45

VSS_7

A46

VSS_8

A47

VSS_9

A48

VSS_10

A5

VSS_11

A8

VSS_12

AA19

VSS_13

AA20

VSS_14

AA25

VSS_15

AA27

VSS_16

AA28

VSS_17

AA30

VSS_18

AA31

VSS_19

AA49

VSS_20

C C

B B

AB19
AB25
AB31
AC12
AC17
AC33
AC38

AC46
AD19
AD22

AD25
AD49
AE12
AE33
AE38

AE46
AF22
AF25
AF28

AG22
AG23
AG25
AG27
AG28
AG30
AG49
AH12
AH17
AH33
AH38

AK19
AK20
AK25
AK27
AK28
AK30
AK31

AK46

AA5

AC4
AD1
AD2

AE4

AG1

AJ19
AJ20
AJ25
AJ27
AJ28
AJ30
AJ31

AK4

VSS_21
VSS_22
VSS_23
VSS_24
VSS_25
VSS_26
VSS_27
VSS_28
VSS_29
VSS_30
VSS_31
VSS_32
VSS_33
VSS_34
VSS_35
VSS_36
VSS_37
VSS_38
VSS_39
VSS_40
VSS_41
VSS_42
VSS_43
VSS_44
VSS_45
VSS_46
VSS_47
VSS_48
VSS_49
VSS_50
VSS_51
VSS_52
VSS_53
VSS_54
VSS_55
VSS_56
VSS_57
VSS_58
VSS_59
VSS_60
VSS_61
VSS_62
VSS_63
VSS_64
VSS_65
VSS_66
VSS_67
VSS_68
VSS_69
VSS_70
VSS_71

VSS_72

CANON-LAKE-GP

(071.CANNO.0B0U)

VSS_73
VSS_74
VSS_75
VSS_76
VSS_77
VSS_78
VSS_79
VSS_80
VSS_81
VSS_82
VSS_83
VSS_84
VSS_85
VSS_86
VSS_87
VSS_88
VSS_89
VSS_90
VSS_91
VSS_92
VSS_93
VSS_94
VSS_95
VSS_96
VSS_97
VSS_98

VSS_99
VSS_100
VSS_101
VSS_102
VSS_103
VSS_104
VSS_105
VSS_106
VSS_107
VSS_108
VSS_109
VSS_110
VSS_111
VSS_112
VSS_113
VSS_114
VSS_115
VSS_116
VSS_117
VSS_118
VSS_119
VSS_120
VSS_121
VSS_122
VSS_123
VSS_124
VSS_125
VSS_126
VSS_127
VSS_128
VSS_129
VSS_130
VSS_131
VSS_132
VSS_133
VSS_134
VSS_135
VSS_136
VSS_137
VSS_138
VSS_139
VSS_140
VSS_141
VSS_142
VSS_143
VSS_144

AL12
AL17
AL21
AL24
AL26
AL29
AL33
AL38
AM1
AM18
AM32
AM49
AN12
AN16
AN34
AN38
AP4
AP46
AR12
AR16
AR34
AR38
AT1
AT16
AT18
AT21
AT24
AT26
AT29
AT32
AT34
AT45
AV11
AV39
AW10
AW4
AW40
AW46
B47
B48
B49
BA12
BA14
BA44
BA5
BA6
BB41
BB43
BB9
BC10
BC13
BC15
BC19
BC24
BC26
BC31
BC35
BC40
BC45
BC8
BD43
BE44
BF1
BF2
BF3
BF48
BF49
BG17
BG2
BG22
BG25
BG28

BG33
BG37

BG48

BG3

BG4

C12
C25
C30

C4

C48

C5
D12
D16

D17
D30

D33

D8
E10
E13
E15
E17
E19
E22
E24

E26

E31
E33
E35
E40
E42

E8
F41
F43
F47
G44

G6

H8
J10
J26
J29

J4
J40
J46
J47
J48

J9
K11
K39

M16
M18
M21

4

SB1L

VSS_145
VSS_146
VSS_147
VSS_148
VSS_149
VSS_150
VSS_151
VSS_152
VSS_153
VSS_154
VSS_155
VSS_156
VSS_157
VSS_158
VSS_159
VSS_160
VSS_161
VSS_162
VSS_163
VSS_164
VSS_165
VSS_166
VSS_167
VSS_168
VSS_169
VSS_170
VSS_171
VSS_172
VSS_173
VSS_174
VSS_175
VSS_176
VSS_177
VSS_178
VSS_179
VSS_180
VSS_181
VSS_182
VSS_183
VSS_184
VSS_185
VSS_186
VSS_187
VSS_188
VSS_189
VSS_190
VSS_191
VSS_192
VSS_193
VSS_194

VSS_195

CANON-LAKE-GP

(071.CANNO.0B0U)

12 OF 13

VSS_196
VSS_197
VSS_198
VSS_199
VSS_200
VSS_201
VSS_202
VSS_203
VSS_204
VSS_205
VSS_206
VSS_207
VSS_208
VSS_209
VSS_210
VSS_211
VSS_212
VSS_213
VSS_214
VSS_215
VSS_216
VSS_217
VSS_218
VSS_219
VSS_220
VSS_221
VSS_222
VSS_223
VSS_224
VSS_225
VSS_226
VSS_227
VSS_228
VSS_229
VSS_230
VSS_231
VSS_232
VSS_233
VSS_234
VSS_235
VSS_236
VSS_237
VSS_238
VSS_239
VSS_240
VSS_241
VSS_242
VSS_243
VSS_244
VSS_245
VSS_246

3

10 OF 13

SB1J

M24
M32
M34
M49
M5
N12
N16
N34
N35
N37
N38
P26
P29
P4
P46
R12
R16
R26
R29
R3
R34
R38
R4
T17
T18
T32
T4
T49
T5
T7
U12
U15
U17
U21
U24
U33
U38
V20
V22
V4
V46
W25
W27
W28
W30
Y10
Y12
Y17
Y33
Y38
Y9

TRIGGER_OUT

CANON-LAKE-GP

(071.CANNO.0B0U)

RSVD7
RSVD8
RSVD6
RSVD5

RSVD3
RSVD4

RSVD2
RSVD1

PREQ#
PRDY#

CPU_TRST#

TRIGGER_IN

Y14
Y15
U37
U35

N32
R32

AH15
AH14

AL2
AM5
AM4
AK3
AK2

2

9/4 Remove TP2201 & TP2202 for(TP_PCH_AH15 &TP_PCH_AH14)

PCH_XDP_PREQ_R_N
PCH_XDP_PRDY_R_N
H_TRST_N_R
PROC_TRIGIN_PCH
PROC_TRIGOUT_PCH

1 2

R2201 30D1R2F-L-GP

Place close CPU <200mil

PROC_TRIGIN_CPU

1

PCH_XDP_PREQ_R_N [99]
PCH_XDP_PRDY_R_N [99]
H_TRST_N_R [4]

PROC_TRIGIN_CPU [9]

PROC_TRIGOUT_PCH [9]

A A

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

22 107Friday, February 02, 2018

22 107Friday, February 02, 2018

1

22 107Friday, February 02, 2018

A00C

A00C

A00C

5

4

3

Title

Title

Title

PCH_(VSS)

PCH_(VSS)

PCH_(VSS)

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Gambits MLK SFF

Gambits MLK SFF

Gambits MLK SFF

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

5

www.teknisi-indonesia.com

4

3

2

1

GPP_B14 / SPKR Top Swap

D D

GPP_B18 /
GSPI0_MOSI

GPP_C2 /
SMBALERT#

C C

20170613
Remove R2316,because CPU default Pull down

GPP_B22 /
GSPI1_MOSI

GPP_C5 /
SML0ALERT#

B B

SPI0_MOSI Reserved Rising edge of

A A

Override

No Reboot Rising edge of

TLS
Confidentiality

Boot BIOS
Strap Bit
BBS

eSPI or LPC Rising edge of

20170613
Remove R2321

SMBALERT_N[20]

SML0ALERT#[20]

20170609
R2325 change to unmounted follow CRB

Rising edge of
PCH_PWROK

SPKR

SPKR[20,27]

PCH_PWROK

20170515
Remove R2308 &R2311 ,default is internal pull down
add TP at PCH side

Rising edge of
RSMRST#

SMBALERT_N

Rising edge of
PCH_PWROK

20170515
Remove R2319 &R2320 ,default is internal pull down
add TP at PCH side

RSMRST#

SML0ALERT#

RSMRST#

SPI_SI_PCH

SPI_SI_PCH[15,25,91,99]

SPI_SO_PCH[15,25,91]

SPI_SO_PCH

The signal has a weak internal Pull-down.
0 = Disable “Top Swap” mode. (Default)
1 = Enable “Top Swap” mode. This inverts an address
on access to SPI and firmware hub, so the
processor believes it fetches the alternate boot
block instead of the original boot-block. PCH will
invert A16 (default) for cycles going to the upper
two 64-KB blocks in the FWH or the appropriate
address lines (A16, A17, or A18) as selected in Top
Swap Block size soft strap .

The signal has a weak internal Pull-down.
0 = Disable “No Reboot” mode. (Default)
1 = Enable “No Reboot” mode (PCH will disable the
TCO Timer system reboot feature). This function is
useful when running ITP/XDP.

This signal has a weak internal Pull-down.
0 = Disable Intel ME Crypto Transport Layer Security
(TLS) cipher suite (no confidentiality). (Default)
1 = Enable Intel ME Crypto Transport Layer Security
(TLS) cipher suite (with confidentiality). Must be
pulled up to support Intel AMT with TLS.

This Signal has a weak internal Pull-down.
This field determines the destination of accesses to the
BIOS memory range. Also controllable using Boot BIOS
Destination bit (Bus0, Device31, Function0, offset DCh,
bit 6).

Boot BIOS Destination

Bit 6

SPI (Default)

0

LPC

1

This signal has a weak internal Pull-down.
0 = LPC is selected (for EC). (Default)
1 = eSPI is selected (for EC).

External pull-up is required. Recommend 100K if pulled
up to 3.3V or 75K if pulled up to 1.8V.
This strap should sample HIGH. There should NOT be
any on-board device driving it to opposite direction
during strap sampling.

R2302 4K7R2J-2-GP

1 2

(R_)

R2304 20KR2J-L2-GP

1 2

(R_)

R2314 10KR2J-3-GP

1 2

R2323 20KR2J-L2-GP

1 2

R2325 1KR2J-1-GP

1 2

(R_)

R2326 4K7R2J-2-GP

1 2

(R_)

R2328 4K7R2J-2-GP

1 2

(R_)

3D3V_S0

3D3V_SB

3D3V_SPI

GPP_H15 /
SML3ALERT#

GPP_B23 /
SML1ALERT# /
PCHHOT#

20170410
change net name form TMIN_SHIFT to TMIN_SHIEF_PCH for Edison's feedback
add reserved series resistor to solate the net from SIO for Edison's feedback

SPI0_IO3 Reserved

HDA_SDO /
I2S0_TXD

GPP_H12 /
SML2ALERT#

GPP_I6 /
DDPB_CTRLDATA

GPP_I8 /
DDPC_CTRLDATA

GPP_I10 /
DDPD_CTRLDATA

Reserved

Reserved

TMIN_SHIFT_PCH[20]

ReservedSPI0_IO2 External pull-up is required. Recommend 100K if pulled

SPI_WP_PCH[15,25]

20170613
R2313 change to muount

SPI_HOLD_PCH[15,25]

20170613
R2317 change to muount

Flash
Descriptor
Security
Override

eSPI Flash
Sharing
Mode

Display
Port B
Detected

HDMI_DATA_CPU[19,56]

Display
Port C
Detected

DDPC_CTRL_DATA[19]

Display
Port D
Detected

DDPD_CTRL_DATA[19]

Rising edge of
RSMRST#

GPP_H_15

GPP_H_15[15]

Rising edge of
RSMRST#

TMIN_SHIFT_PCH

Rising edge of
RSMRST#

SPI_WP_PCH

Rising edge of
RSMRST#

SPI_HOLD_PCH

Rising edge of
PCH_PWROK

Rising edge of
RSMRST#

Rising edge of
PCH_PWROK

HDMI_DATA_CPU

Rising edge of
PCH_PWROK

DDPC_CTRL_DATA

Rising edge of
PCH_PWROK

DDPD_CTRL_DATA

External pull-up is required. Recommend 100K if pulled
up to 3.3V or 75K if pulled up to 1.8V.
This strap should sample HIGH. There should NOT be
any on-board device driving it to opposite direction
during strap sampling.

R2301 4K7R2J-2-GP

1 2

This signal has an internal Pull-down. External pull-up is
required.
This strap should sample HIGH. There should NOT be
any on-board device driving it to opposite direction
during strap sampling.

R2306 0R2J-2-GP

1 2

(R_)

R2307 4K7R2J-2-GP

1 2

R2309 20KR2J-L2-GP

1 2

(R_)

up to 3.3V or 75K if pulled up to 1.8V.
This strap should sample HIGH. There should NOT be
any on-board device driving it to opposite direction
during strap sampling.

R2313 20KR2J-L2-GP

1 2

External pull-up is required. Recommend 100K if pulled
up to 3.3V or 75K if pulled up to 1.8V.
This strap should sample HIGH. There should NOT be
any on-board device driving it to opposite direction
during strap sampling.

R2317 20KR2J-L2-GP

1 2

This signal has a weak internal Pull-down.
0 = Enable security measures defined in the Flash
Descriptor. (Default)
1 = Disable Flash Descriptor Security (override). This
strap should only be asserted high using external
Pull-up in manufacturing/debug environments
ONLY.

ME DISABLE JUMPER

This signal has a weak internal pull-down.
0 = Master Attached Flash Sharing (MAFS) enabled
(Default)
1 = Slave Attached Flash Sharing (SAFS) enabled.

20170512
Remove R2322
GPP_H_12
add TP at PCH side follow D9

This signal has a weak internal Pull-down.
0 = Port B is not detected. (Default)
1 = Port B is detected.

R2324 2K2R2J-2-GP

1 2

This signal has a weak internal Pull-down.
0 = Port C is not detected. (Default)
1 = Port C is detected.

R2327 2K2R2J-2-GP

1 2

(R_)

This signal has a weak internal pull-down.
0 = Port D is not detected. (Default)
1 = Port D is detected.

R2329 2K2R2J-2-GP

1 2

(R_)

TMIN_SHIFT

3D3V_SB

TMIN_SHIFT [24]

3D3V_SB

3D3V_SPI

3D3V_SPI

3D3V_S0

3D3V_S0

3D3V_S0

GPP_F23 Display

GPP_J4 /
CNV_BRI_DT /
UART0_RTS#

GPP_J6 /
CNV_RGI_DT /
UART0_TXD

GPP_J9

GPD7 Reserved Rising edge of

Port F
Detected

XTAL
Frequency
Select

CNV_BRI_DT[15]

20170504
Will R2303 change to mount
Follow PCH EDS 0.7

Modem
Reference
Clock
Source
Select

CNV_RGI_DT[15]

20170613
R2310 Change to mount
R2312 Change to unmount

1.8V
VCCPSPI

Rising edge of
PCH_PWROK

PCIVAUX power control

Rising edge of
RSMRST#

CNV_BRI_DT

Rising edge of
RSMRST#

CNV_RGI_DT

Rising edge of
RSMRST#

DSW_PWROK

GPD7

GPD7[16]

20170609
update R2318 pull high 1kohm follow CRB

This signal has a weak internal pull-down.
0 = Port F is not detected. (Default)
1 = Port F is detected.

This signal has a weak internal pull-down.
0 = 38.4/19.2MHz XTAL frequency selected. (Default)
1 = 24MHz XTAL frequency selected.

R2303 10KR2J-3-GP

1 2

R2305 10KR2J-3-GP

1 2

(R_)

An external pull-up or pull-down is required.
0 = Integrated CNVI enable (Default)
1 = Integrated CNVI disable

R2310 20KR2J-L2-GP

1 2

R2312 10KR2J-3-GP

1 2

(R_)

The signal has a weak internal pull-down
0 = VCCPSPI is connected to 3.3V rail
1 = VCCPSPI is connected to 1.8V rail

External pull-up is required. Recommend 100K.
This strap should sample HIGH. There should NOT be
any on-board device driving it to opposite direction
during strap sampling

1 2

R2318 1KR2J-1-GP

1D8V_SB

1D8V_SB

3D3V_S5

5

4

3

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Title

Title

PCH_(Strap Pin)

PCH_(Strap Pin)

PCH_(Strap Pin)

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

C

C

C

Gambits MLK SFF

Gambits MLK SFF

Gambits MLK SFF

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Taipei Hsien 221, Taiwan, R.O.C.

23 107Friday, February 02, 2018

23 107Friday, February 02, 2018

1

23 107Friday, February 02, 2018

A00

A00

A00

5

www.teknisi-indonesia.com

FAN

CPU_FAN_ TACH_SI O[26]

CPU_FAN_ CTRL_S IO[26]
SYS_FAN_ TACH_SI O[26]

SYS_FAN_ CTRL_S IO[26]

CLOCK

LPC_CL K_14M_E C[19]
LPC_CL K_33M_E C[19]
SUSCLK_ SIO[18]

LPC

D D

C C

B B

LPC_AD _PCH_P0[19,68]
LPC_AD _PCH_P1[19,68]
LPC_AD _PCH_P2[19,68]
LPC_AD _PCH_P3[19,68]

LPC_FR AME#_PC H[19,68]

SMBUS

SMB_CLK _MAIN[11,1 2,59]
SMB_DAT A_MAIN[1 1,12,59]
SMB_DAT A_RESUME[20,93,94 ]
SMB_CLK _RESUME[20,93,94 ]

SMLICLK _PCH[20]
SMLIDAT A_PCH[20]

OTHERS

PROCHOT #_CPU_R[4,44]

KBRST_ N[19]

LPC_SE RIRQ_P CH[19 ,68]

GPIO

PCH_SLP _A_N[20,99]

Power Manager

PCH_SIO _DPWR OK[26]

RSMRST_ SIO_N[20,6 3,99]

PCH_SYSP WROK[20,24,99 ]

TMIN_SHIF T[23]
VR_REA DY[4 0]

SUS_WA RNB[20]

SLP_SUS B[20,42,51 ]

PSPWR GD[42,43]

VCTRL_ VCC_EN[42]

PECI

PECI_C PU[4]

LED

SIO_YEL LOW[6 4]

SIO_GR EEN[64]

Power Botton/Reset

PWRBT N_N[2 0,64,99]

Layout Note: place 2200PF near SIO,
others near PCH location

SYS_THER MDA+

12

C2402

SC2200 P50V2K X-2DLGP

SYS_THER MDA-

LMBT390 4LT1G-G P

20170410
change to common part

20170406
remove net SIO_SMBCLK1
remove net SIO_SMBDAT1
20170421
add back to follow vendor's feedback

V_CPU_S T_PLL

12

3D3V_S 0

C

12

B

Q2403

E

C2411
SC4D7U6 D3V3KX -DLGP

20170410
change to 4D7U for Edison's feedback

R2435

1 2

10KR2J -3-GP

D

Q2407

2N7002K -2-GP

S

G

VCTRL_ VCC_EN

20170518

C2403

(R_)

SC100P 50V2JN-3 DLGP

add for SSD

Q2409
LMBT390 4LT1G-G P

20170509
change from SUSCLK to SUSCLK_SIO to follow D9

LPC I/F

SMLIDAT A_PCH
SMLICLK _PCH

PECI_C PU

V_CPU_S T_PLL

When 3P3V_SB ready,
RSMRST asserted

PCH_PW ROK_EC
RSMRST_ SIO_N

DPWROK pull up when
V3_Dual pull out to 50%

SUS_WA RNB SUS_WA RNB_R

1 2

R2422 0R0402 -PAD-2-GP

1 2

R2426 0R0402 -PAD-2-GP

1 2

R2428 43D2R2 F-GP

1 2

R2430 10KR2J -3-GP

1 2

R2433 33R2J-2 -GP

1 2

R2434 0R0402 -PAD-2-GP

1 2

R2438 0R0402-P AD-2-GP

12

C2412 SC1U10V 2KX-1DL GP

(R_)

1 2

R2446 330KR2 F-L-GP

1 2

R2448 10KR2J -3-GP

1 2

R2449 10KR2J -3-GP

1 2

R2450 1KR2J-1 -GP

1 2

R2452 10KR2J -3-GP

3D3V_S B

PU : Disable Pre-Post Diagnostic
PD : Enable Pre-Post Diagnostic

(R_)

KBMS

SCH5553(T)SCH5555(S)

VSSPin 3

GP001
Pin 5
Pin 6
Pin 61
Pin 62
Pin 63
Pin 64
Pin 82
Pin 83
Pin 84
Pin 85
Pin 86
Pin 88
Pin 91

A A

Pin 92
Pin 105
Pin 107
Pin 110
Pin 112 NC

GP002

GP003

GP111

GP112

GP113

GP114

DDC_DAT_5V

GP100

DDC_DAT_2P5V

GP101

DDC_CLK_5V

GP102

DDC_CLK_2P5V

GP103

GP104

GP106

PCIAUX_CTRL#

GP124

PCIAUX_GATE

GP125

GP053

GP055

GP060

GP062

NC
NC
NC
NC
NC
NC
VSS
VSS
NC
NC
VSS
VSS
NC
GP125
NC
NC
NC

12V_S5 12V_S5 5V_S5

12

R2466
20KR2F -L-GP

SCD1U16V2KX-3DLGP

12

12

C2425

R2471
1K65R2 F-GP

4

Layout Note: place 2200PF near SIO,
others near CPU core MOS locat ion

CPU_THER MDA+

E

12

B

C2427

(R_)

SC100P 50V2JN-3 DLGP

C

SCD1U16 V2KX-3D LGP

SUSCLK_ SIO
LPC_CL K_14M_E C
LPC_AD _PCH_P0
LPC_AD _PCH_P1
LPC_AD _PCH_P2
LPC_AD _PCH_P3
LPC_FR AME#_PC H
PLTRST #_SIO

PLTRST #_SIO[15]

LPC_CL K_33M_E C
LPC_SE RIRQ_P CH
LPC_PME _N

LPC_PME _N[1 5]

PCH_SLP _A_N

20170613
Remove R2420

SIO_SMB CLK1
SIO_SMB DAT1 SIO_SMB CLK1
SIO_SMB DAT2
SIO_SMB CLK2

SIO_PE CI_REQ _N[20]

PECI_E C
PECI_R EADY

SIO_PS _ON_N[43]

EC_PW RGD_3V
RSMRST_ SIO_N_1

PWRGD _PS

SLP_S3 _N

SLP_S3 _N[20,40,42,50 ,99]

SLP_S4 _N

SLP_S4 _N[8,20,32,38,39,40 ,99]

PCH_SIO _DPWR OK

SLP_SUS B

V5_ALW _MON_2

The divider must give a voltage above 1.37V while V_5P0_A in the system is valid.
If V_5P0_A begins to fall unexpectedly, the V5_ALW_MON voltage must be below 1.11V
before V_3P3_A or SB3V become invalid to PCH

SIO_PE CI_REQ _N

PCIRST 1#
PCIRST 2#
SIO_PS _ON_N

SIO_YEL LOW
SIO_GR EEN
TMIN_SHIF T
PWRBT N_N
FP_CBL _DET_P D
PC_SPK R_DET_ PD

TRST_N
SIO_SP KR

12

R2453
10KR2J -3-GP

Q2408

1
2
3

MMDT3904 -2-GP

6
5
4

127
126

123

121
122

124
125

V5_ALW _MON_1

V5_ALW _MON

C2404

SC2200 P50V2K X-2DLGP

CPU_THER MDA-

12

C2406

V5_ALW _MON

15

U2401

19

CLK32

7

CLOCKI

8

LAD0

9

V5_ALW_MON

LAD1

10

LAD2

11

LAD3

12

LFRAME#

14

LRESET#

16

PCICLK
SER_IRQ

75

GP041/IO_PME#
SLP_M#/GP071/IO_SMI#

13

GP117

70

GP036/SMB_CLK1

72

GP040/SMB_DAT1

25

SMBDAT2/GP010

26

SMBCLK2/GP011

20

H_CPURST#/GP005/PECI_REQUEST#

29

PECI_VREF

30

PECI/LVSMB_CLK1

31

PECI_READY/LVSMB_DAT1

51

PCI_RST_1#/GP026

52

PCI_RST_2#/GP027

53

PS_ON#/GP030

57

PWR_GOOD_3V/GP033

58

RSMRST#

67

LATCHED_BF_CUT/GP035
PWRGD_PS

SLP_S3#

69

SLP_S4#
SLP_S5#/GP066

28

DPWROK/GP013

68

SUS_WARN#/GP004

71

SLP_SUS#

74

SUS3V_ON#/GP076

56

SUS3V_FON#/GP032

73

SUS5V_ON#/GP075

23

YELLOW#/GP006

24

GREEN#/GP007

33

TMIN_SHIFT/GP014

34

PWRBTN#/GP015

50

FP_CBL_DET#/GP025

54

PC_SPKR_DET/GP031

76

GP042
TRST#
SPEAKER/DIAG_EN#/GP070

NC#55NC#66NC#6161NC#6262NC#6363NC#6464NC#8484NC#8585NC#9191NC#105

12

R2467
100KR2 J-1-GP

6K8R2F -2-GP

3D3V_S 0

4

LPC Interface

105

12

LMBT390 4LT1G-G P

VCC

SMB

Deep Sleep Logic

Miscellaneous

NC#107

NC#110

107

110

112

12

12

R2472

V3_DUAL22V3_DUAL32V3_DUAL55V3_DUAL60V3_DUAL

NC#112

Q2404

20170410
change to common part

3D3V_S 5

65

104

120

V3_DUAL77V3_DUAL

V3_DUAL

PECI

Glue Logic

CAP1

VSS1VSS3VSS17VSS35VSS59VSS66VSS82HVSS40AVSS

128

CAP_1

12

C2414
SC4D7U6 D3V3KX -DLGP

R2468
16KR2F -GP

12

C2426
SCD01U5 0V2KX-1 DLGP

C

12

B

C2401

(R_)

SC100P 50V2JN-3 DLGP

E

VBAT2

C2405
SC1U10V 2KX-1DL GP

1 2

3D3V_S B

C2408
SCD1U16 V2KX-3D LGP

3D3V_S 5

1 2

27

21

45

VBAT

V3_S5

HV3_DUAL

BACKFEED_CUT#/GP116

5V_PRSNT/GP047/TXD1

Serial Port 1

Diagnostic

Keyboard/

THERM_THRESH/GP024/PWM3

REMOTE2A+/REMOTE2B-

HWM Interface

REMOTE2A-/REMOTE2B+

PROCHOT_IN#/PROCHOT_OUT#/GP016

VSS83VSS86VSS88VSS90VSS

117

SDAT_1/GP120
SCLK_1/GP122

Miscellaneous

SUS_ACK_EN#/GP127

DCD1#/GP043
DSR1#/GP044

RTS1#/GP046
CTS1#/GP050

DTR1#/GP051

PWR2_PRSNT/GP056

MB_REG_PG/GP057

MEM_REG_PG/GP061

GP063/KBDRST#

TACH1/GP017

Mouse

TACH2/GP020
TACH3/GP021

SCH5553 -NU-GP

18

(071.055 53.000E )

SDAT/GP121
SCLK/GP123

RXD1/GP045

RI1#/GP052

GP064/A20M

GP022/PWM1
GP023/PWM2

GP000/PWM4

REMOTE1+

REMOTE1-

GP105
GP107
GP125

GP126

GP054

KCLK

KDAT
MCLK
MDAT

V_IN

3

20170406
rename for new PSU design
20170418
rename for D9 PSU design
20170419
rename for new PSU and D9 PSU design

12V_CP U

12

R2402
8K2R2F -1-GP

PWR2_ PRSN_1

12

PWR2_ PRSNT

R2408
680R2F -GP

3D3V_S 0

12

R2412
30KR2F -GP

VR_REA DY
MEM_REG_ PG_2
MEM_REG_ PG

SMB_DAT A_RESUME

78

SMB_DAT A_MAIN

79

SMB_CLK _RESUME

80

SMB_CLK _MAIN

81

87
89

PCIAUX_ GATE

92
93

SUS_ACK _EN_N

94
95

SP_DCD _N

96

SP_DSR _N

97

SP_RXD _N

98

SP_RTS _N

99

SP_TXD _SIO

100

SP_CTS _N

101

SP_DTR _N

102

SP_RI_ N

103

106

PWR2_ PRSNT

108

MB_REG_ PG

109

MEM_REG_ PG

111

113

KCLK

114

KDAT

115

MCLK

116

MDAT
KBRST_ N

118
119

A20GAT E

CPU_FAN_ TACH_SI O

37

SYS_FAN_ TACH_SI O

38

SYS_FAN2 _TACH_SI O

39

CPU_FAN_ CTRL_S IO

47

SYS_FAN_ CTRL_S IO

48
49

SIO_GR EEN

2

VIN_DET

46

CPU_THER MDA+

41

CPU_THER MDA-

42

SYS_THER MDA+

43

SYS_THER MDA-

44

PROCHOT #_EC

36

12

12

C2415

C2416

SCD1U16 V2KX-3D LGP

SCD1U16 V2KX-3D LGP

Circuit to Support pre-Post Diagnostic

Q2401

1

6

PWR2_ PRSN_2

2

5

3

4

MMDT3904 -2-GP

20170421
change to 10KR2F to follow vendor's feedback

Q2405

MB_REG_ PG

1

6

MEM_REG_ PG_1

2

5

3

4

1 2

12

C2417

SCD1U16 V2KX-3D LGP

R2458
75R2J-1 -GP

1D2V_S M_S3

SP_TXD _NSP_TX D_SIO

12

C2418

SCD1U16 V2KX-3D LGP

MMDT3904 -2-GP

SUS_ACK _EN_N [38]

20170508
add TXD, RXT @ LPC connector for BIOS debug

SP_RXD _N [68]

SP_TXD _SIO [68]

1 2

R2429 160R2F-G P

3D3V_S 5

12

3D3V_S 0

12

R2413
10KR2F -2-GP

12

R2417
9K1R2F -1-GP

PROCHOT #_CPU_R

12

R2403
30KR2F -GP

3D3V_S 0

12

12

CEC
PCH_SYSPWROK

3D3V_S 5

12

C2420

C2419

SCD1U16 V2KX-3D LGP

SCD1U16 V2KX-3D LGP

3D3V_S 0

12

12

R2414
9K1R2F -1-GP

R2423
7K15R2 F-L-GP

Place these 0.1uF de-coupling caps on pin 22, 32, 45, 55, 60, 65, 77, 104,and 120

2

0D95V_ CPU_VCC IO

R2404
9K1R2F -1-GP

R2409
6K8R2F -2-GP

Q2402

1

C2421

Q2406

1
2
3

MMDT3904 -2-GP

6

2

5

3

4

MMDT3904 -2-GP

6
5
4

U2405

5

VCC

4

TC7SZ3 2FU-2-GP

(R_)

1 2

R9924 0R2J-2-GP

12

C2413
SC100P 50V2JN-3 DLGP

Place 10uF cap on V_3P3_A path

12

C2422

SCD1U16 V2KX-3D LGP

MB_REG_ PG_1 SP_T XD_N_1
SP_TXD _N

1V_PCH_ SB

MB_REG_ PG_3 MB_REG_ PG_2
MB_REG_ PG

3D3V_S B

H_SKTOC C_N[15]

12

SCD1U16 V2KX-3D LGP

3D3V_S 0

MB_REG_ PG

5V_S0

3D3V_S 0

12

R2415
2KR2F-3 -GP

MB_REG_ PG

3D3V_S 0

12

R2424
33KR2F -GP

1

IN_B

PWR2_ PRSN_2

2

IN_A
GND3OUT_Y

20170411
reserve CEC control
20170615
Remove CEC control for PCH_SYSPWROK

1 2

R2439 0R0402-P AD-2-GP

12

R2442
20KR2J -L2-GP

12

C2423

SCD1U16 V2KX-3D LGP

12

R2405
30KR2F -GP

VIN_DET

R2478 10KR2 J-3-GP

1 2

(R_)

12

C2424

(R_)

SC10U6D 3V3MX-DL -GP

20170406
rename the net PLTRST_PCI_N to PLTRST_BUF_PCI_N
rename the net PLTRST_LAN_N to PLTRST_BUF_LAN_N

PCIRST 1#

PCIRST 2#

Divide to 0.55V

12

C2407
SCD01U5 0V2KX-1 DLGP

3D3V_S B

H_SKTOC C_CPU [4]

PCH_SYSP WROKPCH_PW ROK_EC

3D3V_S B

12

R2411
10KR2F -2-GP

12

R2416
2KR2F-3 -GP

PCH_SYSP WROK [20,2 4,99]

R2401 22R2J -2-GP

PLTRST _BUF_PC I_N

1 2

R2406 100KR 2J-1-GP

1 2

PCIEx16, PCIEx1, PCI bridge

(R_)

R2407 22R2J -2-GP

PLTRST _BUF_LA N_N

1 2

R2410 100KR 2J-1-GP

1 2

LAN, WALN, SSD, LPC, TPM

(R_)

20170613
remove R2418

SUS_ACK _EN_N

20170613
R2419 Change to mount

LPC_PME _N

20170406
remove net SIO_SMBCLK1
remove net SIO_SMBDAT1
20170421
add back to follow vendor's feedback

SIO_SMB DAT1

TMIN_SHIF T
SUS_WA RNB

20170613
ADD R2477 for SUS_WARNB signal

PCIAUX_ GATE

SMB_CLK _RESUME
SMB_DAT A_RESUME

MDAT
MCLK
KDAT
KCLK

SP_RTS _N
SP_RXD _N
SP_DSR _N
SP_DCD _N

SP_RI_ N
SP_DTR _N
SP_CTS _N

SMB_CLK _MAIN
SMB_DAT A_MAIN

SYS_FAN2 _TACH_SI O

SYS_FAN_ TACH_SI O

20170421
remove SYS FAN

KBRST_ N

A20GAT E

PWR2_ PRSNT

MB_REG_ PG

MEM_REG_ PG

SP_TXD _N

RSMRST_ SIO_N

PCH_SIO _DPWR OK

1

PLTRST _BUF_PC I_N [40]

PLTRST _BUF_LA N_N [40]

R2419 10KR 2J-3-GP

1 2

R2421 10KR 2J-3-GP

1 2

R2425 10KR 2J-3-GP

1 2

R2427 10KR 2J-3-GP

1 2

R2431 4K7R 2J-2-GP

1 2

R2477 10KR 2J-3-GP

1 2

(R_)

R2432 10KR 2J-3-GP

1 2

RN2404

1

4

2 3

SRN1KJ-7 -GP

RN2403

1

8

2

7

3

6

4 5

SRN8K2J -4-GP
RN2401

1

8

2

7

3

6

4 5

SRN8K2J -4-GP
RN2402

1

8

2

7

3

6

4 5

SRN8K2J -4-GP

RN2405

1

4

2 3

SRN1KJ-7 -GP

R2462 10KR2 J-3-GP

1 2

R2476 10KR2 J-3-GP

1 2

R2463 10KR2 J-3-GP

1 2

R2464 10KR2 J-3-GP

1 2

R2465 30KR2 F-GP

1 2

R2469 30KR2 F-GP

1 2

R2470 30KR2 F-GP

1 2

R2473 30KR2 F-GP

1 2

R2474 47KR2 J-2-GP

1 2

R2475 100KR 2J-1-GP

1 2

5V_S5

3D3V_S B

3D3V_S B

3D3V_S 0

3D3V_S 0

5

4

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, S ec.1, Hsin Tai W u Rd., Hsichih,

21F, 88, S ec.1, Hsin Tai W u Rd., Hsichih,

21F, 88, S ec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 22 1, Taiwan, R.O.C.

Taipei Hsien 22 1, Taiwan, R.O.C.

Title

Title

Title

SMSC 5555/5553

SMSC 5555/5553

SMSC 5555/5553

Size D ocument Numbe r Rev

Size D ocument Numbe r Rev

Size D ocument Numbe r Rev

Gambits MLK SFF

Gambits MLK SFF

Gambits MLK SFF

Date: Sheet of

Date: Sheet of

3

2

Date: Sheet of

1

Taipei Hsien 22 1, Taiwan, R.O.C.

24 1 07Friday, February 02 , 2018

24 1 07Friday, February 02 , 2018

24 1 07Friday, February 02 , 2018

A00D

A00D

A00D

5

www.teknisi-indonesia.com

20170406
change to single 32MB SPI ROM

D D

SPI_CS_PCH_N0[15]

SPI_SO_PCH[15,23,91]

SPI_WP_PCH[15,23]

C C

4

SPI_CS_PCH_N0
SPI_SO_PCH

SPI_WP_PCH

3D3V_SPI

20170419

12

add for Edison's feedback

R2501
1KR2J-1-GP

(R_)

1
2 3

20170515
add 16 pin SPI ROM colay

RN2501

SRN33J-5-GP-U

3

3D3V_SPI

12

C2501

SPI ROM

U2501

1

SPI_SO_ROM1

4

SPI_WP_ROM1

SPI_CLK_ROM1
SPI_SI_ROM1

CS#

2

SO/SIO1

3

SIO2
GND4SI/SIO0

MX25L25673GM2I-08G-GP

(R_)

SSKT1

1
2
3 6
4

SKT-91960-0084L-GP

(R_62.10089.001)

SPI Socket

U2502

7

CS#

8

SO/SIO1

9

SIO2

10

GND

3

RESET#

MX25L25673GMI-10G-GP

SSKT2

16
15

14
13
12
11
10

9

SKT-SPI16P-7-GP

(X_)

SCLK

8
7

5

SCLK

SI/SIO0

NC#11
NC#12
NC#13
NC#14

1
2

3
4
5
6
7
8

SIO3

SIO3

NC#4
NC#5
NC#6

VCC

VCC

8
7
6
5

2
1
16
15

4
5
6
11
12
13
14

SPI_CS_PCH_N0
SPI_SO_ROM1

SC1U10V2KX-1DLGP

SPI_HOLD_ROM1
SPI_CLK_ROM1
SPI_SI_ROM1

V3P3A_V1P8A_PCH_SPI

1 2

R2503 0R0603-PAD-2-GP-U

3D3V_SB

2

20170419
add for Edison's feedback

R2507
33R2J-2-GP

RN2502

4

SPI_HOLD_PCH
SPI_CLK_PCH

SPI_SI_PCH

1 2
1

2 3

SRN33J-5-GP-U

3D3V_SPI

12

3D3V_SPI

R2502
1KR2J-1-GP

(R_)

SPI_HOLD_PCH [15,23]
SPI_CLK_PCH [15,91]

SPI_SI_PCH [15,23,91,99]

1

B B

12

VCCRTC

TP2501

1

1 2

VBAT1

BAT2501
BATTERY CR2032

(23.21012.001)

A A

5

4

R2506 1KR2J-1-GP

+

12

BT2501
BAT-20-00950-1A01-A-GP-U

20170512
change battery holder for Dell's request
20170522
change to 022.70007.0101 for EMN issue

TP2502

1

K A

VBAT2

VBAT1_L

D2501
RB551V30-GP

R2504 1K5R2F-2-GP

R2505 45K3R2F-L-GP

VBAT1_R

1

2

D2502
BAT54C-12-GP

3P0V_BAT_VREG

3

3

1 2

20170417-2
change back to common part

3D3V_S5

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Title

Title

Flash&RTC

Flash&RTC

Flash&RTC

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Gambits MLK SFF

Gambits MLK SFF

Gambits MLK SFF

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Taipei Hsien 221, Taiwan, R.O.C.

25 107Friday, February 02, 2018

25 107Friday, February 02, 2018

1

25 107Friday, February 02, 2018

A00C

A00C

A00C

CPU FAN CONTROL

www.teknisi-indonesia.com

CPU_FAN_CTRL_SIO[24]

1 2

R2605 100R2F-L1-GP-U

3D3V_S0

12

R2603
2K2R2J-2-GP

20170410
change to common part

Reverse V : 20 V
Forward V : 0.47V at 0.5A
Forward Curr. : 500mA

KA

Source : 83.R5003.T8F

D2601
RB551V30-GP

CPU_FAN_CTRL_CONNCPU_FAN_CTRL_SIO

PWM:21-28KHz

12V_S0

12V_S0

12

R2601
4K7R2J-2-GP

CPU_FAN_TACH_1 CPU_FAN_TACH_SIO

1 2

R2602 20KR2J-L2-GP

FANC1

1
2

3

NP1

4

BAOT-CON4-S5-GP

(021.60293.0104)

12

R2604
8K2R2F-1-GP

CPU_FAN_TACH_SIO [24]

SYS FAN CONTROL

20170421
remove SYS FAN
20170606
Customer suggestion add SYS FAN

SYS_FAN_CTRL_SIO[24]

Thermal sensor G709

20170413
change thermal shut down solution

1 2

R2614 100R2F-L1-GP-U

(R_)

(R_)

20170410
change to common part

Reverse V : 20 V
Forward V : 0.47V at 0.5A
Forward Curr. : 500mA

KA

Source : 83.R5003.T8F

D2602
RB551V30-GP

(R_)

SYS_FAN_CTRL_CONNSYS_FAN_CTRL_SIO

3D3V_S0

12

R2616
2K2R2J-2-GP

PWM:21-28KHz

12V_S0

12

R2615
4K7R2J-2-GP

SYS_FAN_TACH_1 SYS_FAN_TACH_SIO

12V_S0

12

R2611

9K53R2F-GP

(R_)

(R_)

R2618 20KR2J-L2-GP

(R_)

FANS1

1
2

34NP1

FOX-CON4-S19-GP

(R_)

TH_SET

1
2

(R_)

1 2

U2601

SET
GND
OUT#3HYST

G709T1UF-GP

VCC

5
4

12

R2617
8K2R2F-1-GP

(R_)

3D3V_S5

SYS_FAN_TACH_SIO [24]

TS_CRIT#

3D3V_S5

12

R2613
10K5R2F-GP

(R_)

1 2

R2612 0R2J-2-GP

3D3V_S5

U2602

PCH_SIO_DPWROK[24]

1
2

Modify circuit for thermal shutdown issue

5

A

VCC

B

4

GND3Y

SNLVC1G08DCKRG4-GP

(R_)

20170622
Add R2619 for PCH_DPWROK

PCH_DPWROK [20]

R2619 100KR2J-1-GP

1 2

(R_)

HS2601
GEN330R190-8-F-C-GP

2

3

4

5

1
8

6

7

20170523
H2601 change footpoint to ZZ.00PAD.DV1
H2604 change footpoint to ZZ.AFEN8.190
Remove H2607 & H2608

HS2602
GEN315R158-8-F-C-S-GP-U

2

3

4

5

6

7

1
8

HS2603
GEN315R158-8-F-C-S-GP-U

4

5

6
7

3
2

1

8

HS2604
GEN330R190-8-F-C-GP

2

3

4

5

6

7

PCB2601
MAIN PCB

348.09Z01.001B

1
8

HS2605
GEN315R158-8-F-C-S-GP-U

2

3

4

5

1
8

6

7

HS2606
GEN315R158-8-F-C-S-GP-U

2

3

4

5

6

M2601

Mylar

(340.08501.0001)

M2605

washer

(340.03A0A.0001)

1
8

7

(334.03A02.0001)

M2604

washer

(340.03A0A.0001)

M2602

CARD1

M2603

GASKET

(347.03801.0001)

M2606

washer

(340.03A0A.0001)

M2607

washer

(340.03A0A.0001)

LBL2601
LABEL

(40.3EQ13.011)

LAN ID :
F80F4105EB9A

M2608

Spacer

(342.06701.0001)

LBL2602
LABEL

(45.3E702.001)

LAN ID :
F80F4105EB9A

FW part

FW P/N Location

BIOS1

BIOS FW P/N

(353.09Z02.0001)

LAN1

LAN FW P/N for Eagle SFF

(353.09Z01.0001)

LAN2

LAN FW P/N for Gambit MLK SFF

(GAM_353.06H01.B001)

U2502

U3101

U3101

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Thermal&FAN

Thermal&FAN

Thermal&FAN

Gambits MLK SFF

Gambits MLK SFF

Gambits MLK SFF

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

26 107Friday, February 02, 2018

26 107Friday, February 02, 2018

26 107Friday, February 02, 2018

A00C

A00C

A00C

SC2D2U10V3KX-1DLGP-U

www.teknisi-indonesia.com

12

C2702

AGND

CBP

36

U2701

CBP

37

HPVDD

38

CPVREF

39

HP2-OUT-R_PORT-I-R

40

HP2-OUT-L_PORT-I-L

41

FRONT-JD/CLFE-JD

42

LINE2-JD/SURR-JD

43

LINE1-JD/HP1-OUT-JD

44

MIC1-JD/HP2-OUT-JD

45

EAPD/GPIO2

46

SPDIF-OUT

47

DLDO-CAP

48

DVDD

DVSS1BCLK2SDATA-OUT3SDATA-IN4DVDD-IO5SYNC6RESET#7PCBEEP8MIC1-VREFO-L9MIC1-VREFO-R/LINE1-VREFO10MIC2-VREFO11LINE2-VREFO

C2715

SC22P50V2JN-4DLGP

HDA_SDIN0_CODEC

3D3V_AUD_S0

12

R2706
100KR2F-L1-GP

12

R2710

100KR2F-L1-GP

200KR2F-L-GP

Layout: Near Codec

E

B

Q2703
LMBT3906LT1G-1-GP

(R_)

C

Q83_B

AGND

SCD1U16V2KX-3DLGP

D2701

1 2

AZ5125-01H-R7G-GP

(083.PJSD5.00A0)

L2701

1 2

MHC1608S800QBP-GP

12

C2709
SC10U25V5KX-DL-GP

L2702

1 2

MHC1608S800QBP-GP

L2703

1 2

MHC1608S800QBP-GP

20170419
add power option for vendor's feedback

(R_)

12

R2701
10KR2J-3-GP

5V_AUD_S5

12

C2708
SCD1U16V2KX-3DLGP

AGND AGND

20170419
remove Audio CEC circuit

3D3V_S0 3D3V_AUD_S0

3D3V_SB

20170419
remove Audio CEC circuit

For EMC

5V_S0 5V_S0

C9908

12

12

C9907
SCD1U16V2KX-3DLGP

12

C9909
SCD1U16V2KX-3DLGP

5V_S5

20170419
remove Audio CEC circuit

20170412
remove internal speaker amp
20170418
add net EAPD back to control de-pop circuit

12

C2713
SC10U6D3V3MX-DL-GP

12

C9910
SCD1U16V2KX-3DLGP

12

C9911
SCD1U16V2KX-3DLGP

20170418
HDA LINK core power is 3.3V
do not need leve shieft

3D3V_AUD_S0

12

C2706
SC10U6D3V3MX-DL-GP

AGND

12

C2714
SCD1U16V2KX-3DLGP

HDA_SDOUT_CODEC[20]

Analog

Digital

12

C2711
SC10U25V5KX-DL-GP

HDA_BITCLK_CODEC[20]

HDA_SDIN0_PCH[20]

HDA_RST#_CODEC

SC2D2U10V3KX-1DLGP-U

12

C2707
SCD1U16V2KX-3DLGP

AUDOUT_R[30]
AUDOUT_L[30]

MIC1_JD/FRONT_JD LINE1_JD/LINE2_JD

MIC1_JD[30]

FRONT_JD[30]

EAPD

AGND

LINE1_JD/LINE2_JD
MIC1_JD/FRONT_JD
EAPD

DLDO_CAP

12

C2712
SCD1U16V2KX-3DLGP

HDA_BITCLK_CODEC

HDA_SDOUT_CODEC

1 2

R2703 33R2J-2-GP

12

R2709

100KR2F-L1-GP

MIC1_JD
FRONT_JD

1 2

R2718 1KR2J-1-GP

(R_)

Q82_B

1 2

R2719 1KR2J-1-GP

(R_)

35

12

C2701

AVSS2

R2711

AGND

CBN

34

CBN

12

12

CPVEE

32

33

CPVEE

HP1-OUT-R_PORT-H-R

12

C2718
SCD1U16V2KX-3DLGP

3D3V_S03D3V_S0

12

R2707
100KR2F-L1-GP

12

R2712
200KR2F-L-GP

3D3V_S0

B

29

30

31

LFE_PORT-G-R

CENTER_PORT-G-L

HP1-OUT-L_PORT-H-L

LINE2_JD
LINE1_JD

12

R2717
10KR2J-3-GP

(R_)

Q84_B

E

Q2704
LMBT3906LT1G-1-GP

(R_)

C

AGND

25

26

27

28

AVSS1

LINE1-L_PORT-C-L

LINE1-R_PORT-C-R

12

AUD_BEEP
HDA_RST#_CODEC
HDA_SYNC_CODEC

LINE2_JD [29]
LINE1_JD [30]

R2715 0R2J-2-GP

E

B

Q2702
LMBT3906LT1G-1-GP

(R_)

C

HP_OUT_R
HP_OUT_L
AUD_LINE1_L
AUD_LINE1_R

AUD_VREF

12

C2703
SC10U25V5KX-DL-GP

AGND

VREF

AVDD

ALDO-CAP

FRONT-L_PORT-D-L

FRONT-R_PORT-D-R

MIC2-R_PORT-F-R

MIC2-L_PORT-F-L

SURR-R_PORT-A-R

SURR-L_PORT-A-L
MIC1-R_PORT-B-R

MIC1-L_PORT-B-L

LINE2-R_PORT-E-R

LINE2-L_PORT-E-L

ALC3820-CG-GP

LINE2_VREFO
MIC2_VREFO
MIC1_VREFO_RR
MIC1_VREFO_LL

1 2

C2716 SCD1U16V2KX-3DLGP

HDA_RST#_CODEC [20]
HDA_SYNC_CODEC [20]

Layout: separately place round AGND

1 2

(R_)

HP_OUT_R [29]
HP_OUT_L [29]
AUD_LINE1_L [30]
AUD_LINE1_R [30]

12

C2704
SCD1U16V2KX-3DLGP

24
23
22
21
20
19
18
17
16
15
14
13

20170418
due to remove the AMP function
remove Q13, R270 change back to Gambit design
net name DE_POP change to MIC1_VREFO_RR

LINE2_VREFO [29]
MIC2_VREFO [29]
MIC1_VREFO_RR [30]
MIC1_VREFO_LL [30]

R2705 0R0603-PAD-2-GP-U

R2708 0R0603-PAD-2-GP-U

12

SC22U6D3V5MX-2DLGP

C2710
SC10U25V5KX-DL-GP

ALDO_CAP

1 2

20170412
remove internal speaker amp

AUD_MIC2_R
AUD_MIC2_L

AUD_MIC1_R
AUD_MIC1_L
AUD_LINE2_R
AUD_LINE2_L

C2722

(R_)

AUD_MIC2_R [29]
AUD_MIC2_L [29]

AUD_MIC1_R [30]
AUD_MIC1_L [30]
AUD_LINE2_R [29]
AUD_LINE2_L [29]

12

C2717
SCD1U16V2KX-3DLGP

1 2

1 2

R9929

1 2

0R2J-2-GP
(R_)

R9930

1 2

0R2J-2-GP
(R_)

1 2

R2716 10KR2J-3-GP

(R_)

Q84_E2Q84_E

5V_AUD_S5

12

C2705
SC10U25V5KX-DL-GP

AGND

AGND

1 2

R2702 47KR2J-2-GP

12

R2704
4K7R2J-2-GP

AUD_BEEP_R

AGND

AGND

AGND

AGND

1 2

R2714 220KR2F-GP

(R_)

Q85_B

Digital

Analog

Digital

SPKR [20,23]

20170413
remove internal speaker amp
remove off-page arrow

1 2

C2719 SCD1U50V3KX-DL-GP

(R_)

AGND

1 2

C2720 SCD1U50V3KX-DL-GP

(R_)

AGND

3D3V_S5

12

C2721
SCD1U16V2KX-3DLGP

(R_)

E

B

Q2701
LMBT3906LT1G-1-GP

(R_)

C

MUTE [29,30]

Analog

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Title

Title

Audio Codec_(ALC3820)

Audio Codec_(ALC3820)

Audio Codec_(ALC3820)

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

C

C

C

Gambits MLK SFF

Gambits MLK SFF

Gambits MLK SFF

Date: Sheet of

Date: Sheet of

Date: Sheet of

Taipei Hsien 221, Taiwan, R.O.C.

27 107Friday, February 02, 2018

27 107Friday, February 02, 2018

27 107Friday, February 02, 2018

A00

A00

A00

20170412

www.teknisi-indonesia.com

remove internal speaker amp

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Title

Title

AMP (ALC1003)

AMP (ALC1003)

AMP (ALC1003)

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Gambits MLK SFF

Gambits MLK SFF

Gambits MLK SFF

Date: Sheet of

Date: Sheet of

Date: Sheet of

Taipei Hsien 221, Taiwan, R.O.C.

28 107Friday, February 02, 2018

28 107Friday, February 02, 2018

28 107Friday, February 02, 2018

A00C

A00C

A00C

20170410

www.teknisi-indonesia.com

change to common part

AUD_LINE2_L[27]

AUD_LINE2_R[27]

MIC2_VREFO[27]

AUD_MIC2_R[27]
AUD_MIC2_L[27]

1 2

R2901 2K2R2J-2-GP

1 2

R2902 1KR2J-1-GP

1 2

R2905 10R2F-L-GP

1 2

R2906 10R2F-L-GP

Q2901

6
5
4

MMDT3904-2-GP

(R_)

AGND

FP_OUT_RR

FP_OUT_LL

R2907

22KR2J-GP

PF_MIC2_LL

FL2901 MCB1005S121FBP-GP

FL2902 MCB1005S121FBP-GP

FL2903 MCB1005S121FBP-GP

12

12

R2909
22KR2J-GP

1 2

SC100P50V2JN-3DLGP

1 2

1 2

12

C2903

AGND

C2907

SC100P50V2JN-3DLGP

12

AGNDAGND

AGND

LINE2_VREFO[27]

AUD_MIC2_L_C

1
2
3

AUD_LINE2_L

AUD_LINE2_R

1

AUD_MIC2_R
AUD_MIC2_L

HP_OUT_R[27]

HP_OUT_L[27]

HP_OUT_R

HP_OUT_L

MUTE[27,30]

R2908 1KR2J-1-GP

(R_)

R2910 1KR2J-1-GP

(R_)

C2901 SC10U25V5KX-DL-GP

1 2

C2902 SC10U25V5KX-L-GP

1 2

(R_)

D2901

LINEIN_R

3

LINEIN_L

2

LBAT54ALT1G-1-GP

1 2

C2904 SC4D7U25V5KX-DL-GP

1 2

C2905 SC4D7U25V5KX-DL-GP

1 2

20170410

1 2

change to common part

1 2

R2903
4K7R2J-2-GP

1 2

R2904
4K7R2J-2-GP

MUTE_FP_OUT_LL

MUTE_FP_OUTR_RR

Front Audio Port

FP_MIC2_L
FP_OUT_R

FP_OUT_L

LINE2_JD

LINE2_JD[27]

12

C2906

SC100P50V2JN-3DLGP

AGND

4
3
2
1

5
6
7

8
NP1
NP2

HPMIC1

AUDIO-JK521-GP

(022.10002.0731)

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Title

Title

Audio IO_(Front)

Audio IO_(Front)

Audio IO_(Front)

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

C

C

C

Gambits MLK SFF

Gambits MLK SFF

Gambits MLK SFF

Date: Sheet of

Date: Sheet of

Date: Sheet of

Taipei Hsien 221, Taiwan, R.O.C.

29 107Friday, February 02, 2018

29 107Friday, February 02, 2018

29 107Friday, February 02, 2018

A00

A00

A00

5

www.teknisi-indonesia.com

D D

20170410
change to common part

1 2

1 2

MIC1_VREFO_LL[27]

MIC1_VREFO_RR[27]

C3007 SC10U25V5KX-DL-GP

1 2

C3008 SC10U25V5KX-DL-GP

1 2

C3001 SC10U25V5KX-DL-GP

1 2

C3002 SC10U25V5KX-DL-GP

1 2

1 2

R3005 75R2F-2-GP

1 2

R3006 75R2F-2-GP

MUTE_AUDOUT_RR

20170410
change to common part

MUTE_AUDOUT_LL

MIC1_VREFO_LL

MIC1_VREFO_RR

AGND

LINE1_LL_C

LINE1_RR_C

MIC1_LL_C
MIC1_RR_C

AUDOUT_L[27]

AUDOUT_R[27]

MUTE[27,29]

AUD_LINE1_L

AUD_LINE1_R

AUDOUT_L

AUDOUT_R

R3008 1KR2J-1-GP

(R_)

R3010 1KR2J-1-GP

(R_)

AUD_MIC1_L
AUD_MIC1_R

20170410
change to common part

AUD_LINE1_L[27]

C C

B B

AUD_LINE1_R[27]

20170418
due to remove the AMP function
remove D8 change back to Gambit design by vendor feedback

AUD_MIC1_L[27]
AUD_MIC1_R[27]

4

1 2

R3001 75R2F-2-GP

1 2

R3002 75R2F-2-GP

AUDOUT_LL

AUDOUT_RR

Q3001

1

6

2

5

3

4

MMDT3904-2-GP

(R_)

1 2

R3011 2K2R2J-2-GP

1 2

R3012 2K2R2J-2-GP

1 2

R3013 75R2F-2-GP

1 2

R3014 75R2F-2-GP

AGND

R3004

22KR2J-GP

22KR2J-GP

MIC1_LL

22KR2J-GP

LINE1_LL

LINE1_RR

12

12

R3009

12

R3015

1 2

L3001 MCB1005S121FBP-GP

1 2

L3002 MCB1005S121FBP-GP

12

R3003

SC100P50V2JN-3DLGP

22KR2J-GP

AGND

1 2

L3003 MCB1005S121FBP-GP

1 2

L3004 MCB1005S121FBP-GP

12

R3007

SC100P50V2JN-3DLGP

22KR2J-GP

AGND

1 2

L3005 MCB1005S121FBP-GP

1 2

L3006 MCB1005S121FBP-GP

12

R3016

SC100P50V2JN-3DLGP

22KR2J-GP

C3003

C3005

C3009

3

RP_LINE1_L

12

12

12

RP_LINE1_R

12

C3004
SC100P50V2JN-3DLGP

AGND

RP_AUDOUT_L

RP_AUDOUT_R

12

C3006
SC100P50V2JN-3DLGP

AGND

RP_MIC1_L
RP_MIC1_RMIC1_RR

12

C3010
SC100P50V2JN-3DLGP

LINE1_JD[27]

FRONT_JD[27]

MIC1_JD[27]

2

Rear Audio Port

AUD1

32
33
34
35

22
23
24
25

2
3
4
5
1

G1
G2
G3
G4

NP1

AUDIO-JK187-GP

(22.10088.J41)

AGND

RP_LINE1_L
LINE1_JD

RP_LINE1_R
RP_AUDOUT_L

FRONT_JD
RP_AUDOUT_R

RP_MIC1_L
MIC1_JD

RP_MIC1_R

BLUE

LIME

PINK

1

Line in
Line Out
Mic in

AGNDAGND

A A

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

30 107Friday, February 02, 2018

30 107Friday, February 02, 2018

1

30 107Friday, February 02, 2018

A00C

A00C

A00C

5

4

3

Title

Title

Title

Audio IO_(Rear)

Audio IO_(Rear)

Audio IO_(Rear)

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Gambits MLK SFF

Gambits MLK SFF

Gambits MLK SFF

Date: Sheet of

Date: Sheet of

2

Date: Sheet of