5
4
3
2
1
BOM Configuration
(R):Unmount
(G):GPU
PCB Number: 14058-2
ECO# number : 776481
D D
C C
B B
A A
PAGE
58
5
TITLE
01
Cover Page
02
Block Diagram
03 CPU_DDRA_DDRB
CPU_CFG/CLOCK
04
CPU_PCIE
05
06
CPU_ (VSS)
CPU_(VCC_CORE/TP)
07
08
CPU_(DDI/EDP)
09
CPU_(POWER CAP1)
CPU_(POWER CAP2)
10
11
Reserved
12
DDR3_SODIMM1
13
DDR3_SODIMM2
14 Reserved
15
PCH(SPI/SMBUS/Audio/JTAG)
16
PCH_(Clock)
17
PCH (PCIE/SATA/USB)
PCH (USB3.0/GPIO/HPD)
18
19
PCH (GPIO)
20
PCH_(Stap Pin)
21
PCH_(Power)
PCH_(Vss/TP)
22
PCH_(Reserved)
23
24
SIO_ITE8739
25
Flash ROM/RTC
26
FAN CIRCUITS/HOLE
27
AUDIO ALC3661
28
AMP TPA3131
29
MIC/SPEAKER/AUDIO JACK
30
Reserved
31
LAN_RTL8111HSD
32
RJ45+TRANSFORMER
33
READER CONN
34
USB2.0 CONN
35
USB3.0 CONN
36
Reserved
37
Reserved
38
WEBCAM
39
Reserved
40
Power enable & sequence
41
DCIN
42
Run PWR/USB/ DSWPWR
43
CHARGER
44
VCORE & V_GT(NCP81203)
45
VCORE OUTPUT (NCP81151)
46
V_GT OUTPUT(NCP81151)
47
VCCSA(RT8237)
48
VCCIO(RT8237)
49
5V & 3.3V(RT8243A)
50
DDR_PWR (RT8207M)
51
PCH_1D0V(RT8237)
1D8V(RT9025)
52
12V(RT8289)
53
54
Reserved
Scalar
55
HDMI OUT
56
HDMI IN
57
PANEL CONTROL
Quantity
4
(U):UMA
(X):Debug used
(T):Touch
TITLEPAGE Quantity
59
OZ554A LED Converter
60
HDD/ODD
61
NGFF CONN
62
TOUCH
63
Reserved
64
LED BOARD/POWER BUTTON
65
Reserved
66
Reserved
67
FFS
68
DEBUG CONNECTOR
69
Reserved
70
Reserved
71
Reserved
72
Reserved
73
Reserved
74
Reserved
75
Reserved
76
GPU(1/5) PEG
77
GPU(2/5)DIGITALOUT
78
GPU(3/5):VRAM I/F
79
GPU(4/5):GPIO/STRAP
80
080_GPU(5/5):PWR/GND
81
VRAM 1,2(1/2)
82
VRAM 3,4(2/2)
83
VRAM5,6(3/4)
84
VRAM7,8(4/4)
Reserved85
86
PWR_GPU_LDO
Reserved
87
88
PWR_GPU_CORE
Reserved
89
Reserved
90
91
Reserved
92
Reserved
Reserved
93
Reserved
94
Reserved
95
Reserved
96
Reserved
97
98 Reserved
CPU_XDP
99
100
Reserved
Reserved
101
102 POWER Sequence
103
POWER BLOCK DIAGRAM
104 POWER GOOD & RESET DIAGRAM
105 CLOCK DIAGRAM
3
<Variant Name>
<Variant Name>
<Variant Name>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
001_Cover Page
001_Cover Page
001_Cover Page
Size Document Number Rev
C
Size Document Number Rev
C
Size Document Number Rev
C
COLORADO MLK SKYLAKE-S
COLORADO MLK SKYLAKE-S
COLORADO MLK SKYLAKE-S
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
Taipei Hsien 221, Taiwan, R.O.C.
1 107
1 107
1
1 107
-2
-2
-2
5
Project code:3PD025010001
ECO# Number: 776481
PCB Number: 14058
Revision:A01
D D
COLORADO MLK Skylake-S Block Diagram
4
3
2
1
CHARGER
BQ24727RGRR-1-GP
INPUTS
SYSTEM DC/DC
RT8243AZQW-GP
INPUTS
DCBATOUT
AD+
BT+
OUTPUTS
DCBATOUT
OUTPUTS
V_3P3_A
V_5P0_A
43
49
CPU Core Power
DDR3L
NVIDIA 25W N16S-GMR-S-A2
76-88
HDMI Input
Panel
55
HDMI
LVDS
LVDS Out 55
LVDS Conn 58
Scaler RTD2586
55
GPIO
OSD Button
C C
55
HDD
ODD
PEG X4
eDP
HDMI Output
60
60
56
HDMI
SATA(Gen3) x 1
SATA port 2
SATA(Gen2) x 1
SATA port 3
Intel CPU
Skylake-S 35W
LGA-1151
DMI X4
Skylake
SPI ROM
8MB
B B
Line Out (Rear)
Universal Jack (Side)
3.5W SPK*2
AMP TPA3131
HPO L/R
LINEOUT L/R
28
Webcam/Mic
25
Audio Codec
ALC3661
38
DMIC
SPI
27
USB2.0 X1
USB port 9
PCH-H110
HDA
DDR3L 1866MHz Daul-Channel A/B
IMVP8 SVID
PCI-E X1
PCI-E port 5
PCI-E X1
PCI-E port 6
LAN
RTL8111H
Card Reader
RTS5249S
PCI-E X1
PCI-E port 8
USB2.0 X1
WLAN + BT
(NGFF)
USB port 10
USB2.0 X1
USB port 9
USB2.0 X1
USB port 8
USB2.0 X1
USB port 3-6
USB3.0 X1
Webcam
Touch
USB2.0*4
USB3.0*2
USB port 1-2
LPC
EC SIO
ITE8739
For 35W 1MVP8:
Core 2 Phases 2H2L
Gfx 2 Phase 1H2L
31
33
61
38
62
34
35
24
RJ-45 Fast Giga LAN
FAN
1600
SODIMM A
12, 13
44
32
SD Card 4.0
NCP81203MNTXG-SI2-GP
INPUTS
DCBATOUT
GFX Core Power
NCP81172MNTXG-GP-U
INPUTS
DCBATOUT
DDR3L SUS
TPS51716RUKR-GP
INPUTS OUTPUTS
DCBATOUT
CPU GT POWER
NCP81203MNTXG-SI2-GP
DCBATOUT
CPU 1.05V
NCP5230MNTWG
DCBATOUT
CPU 0.95V
RT8237CZQW-2-GP
DCBATOUT V_CPU_IO
PCH 1.0V
S-1339D15-M5001-GP
DCBATOUT
FAN 12V
RT8289GSP-GP
DCBATOUT
GPU 1.35V
APW8713QBI-GP
DCBATOUT86+V_1P35_VGA
System switchs
INPUTS OUTPUTS
V_5P0_A SB5V
V_5P0_A VCC
V_3P3_A VCC3
V_SM
PCB LAYER
L1:Top
L2:GND
L3:Signal
L4:Signal
L5:GND
L6:Bottom
44,45
OUTPUTS
V_CPU_CORE
88
33
OUTPUTS
+V_GPU_CORE
50
V_SM
V_SM_VTT
44,46
OUTPUTSINPUTS
V_CPU_GT
47
OUTPUTSINPUTS
V_CPU_SA
48
OUTPUTSINPUTS
51
OUTPUTSINPUTS
V1P0_PCH_S5
53
OUTPUTSINPUTS
12V_S0
OUTPUTSINPUTS
SB3VV_3P3_A
+V_1P05_VGA
SPI
A A
Flash ROM
5
4
1MB
3
2
<Variant Name>
<Variant Name>
<Variant Name>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
002_Block Diagram
002_Block Diagram
002_Block Diagram
Size Document Nu mber Rev
Size Document Nu mber Rev
Size Document Nu mber Rev
COLORADO MLK SKYLA KE-S -2Custom
COLORADO MLK SKYLA KE-S -2Custom
COLORADO MLK SKYLA KE-S -2Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
Taipei Hsien 221, Taiwan, R.O.C.
1
2 107
2 107
2 107
5
DDR DATA
M_DATA_ A[0..63]12
M_DATA_ B[0..63]13
M_DQS_A _DP[0..7]12
M_DQS_A _DN[0..7]12
M_DQS_B _DP[0..7]13
M_DQS_B _DN[0..7]13
DDR CMD/ADD
D D
C C
M_MAA_A[0..1 5]12
M_MAA_B[0..1 5]13
M_SBS_A 012
M_SBS_A 112
M_SBS_A 212
M_SBS_B 013
M_SBS_B 113
M_SBS_B 213
DDR CTRL
M_SCS_A _N012
M_SCS_A _N112
M_SCKE_ A012
M_SCKE_ A112
M_ODT_A 012
M_ODT_A 112
M_SCS_B _N013
M_SCS_B _N113
M_SCKE_ B013
M_SCKE_ B113
M_ODT_B 013
M_ODT_B 113
DDR CLOCK
CK_M_DD R0_A_D P12
CK_M_DD R0_A_D N12
CK_M_DD R1_A_D P12
CK_M_DD R1_A_D N12
CK_M_DD R0_B_D P13
CK_M_DD R0_B_D N13
CK_M_DD R1_B_D P13
CK_M_DD R1_B_D N13
DDR OTHERS
DIMM_DQ_ CPU_VREF _A12
DIMM_DQ_ CPU_VREF _B13
DIMM_CA_ VREF_A12
DIMM_CA_ VREF_B13
M_WE_A _N12
M_CAS_A _N12
M_RAS_A _N12
M_WE_B _N13
M_CAS_B _N13
M_RAS_B _N13
Can be left as no connects
if no support ECC.
06/24 Allen modify
M_DATA_ A5
M_DATA_ A1
M_DATA_ A2
M_DATA_ A3
M_DATA_ A4
M_DATA_ A0
M_DATA_ A6
M_DATA_ A7
M_DATA_ A13
M_DATA_ A9
M_DATA_ A10
M_DATA_ A11
M_DATA_ A8
M_DATA_ A12
M_DATA_ A14
M_DATA_ A15
M_DATA_ A21
M_DATA_ A16
M_DATA_ A18
M_DATA_ A19
M_DATA_ A20
M_DATA_ A17
M_DATA_ A22
M_DATA_ A23
M_DATA_ A25
M_DATA_ A28
M_DATA_ A27
M_DATA_ A31
M_DATA_ A29
M_DATA_ A24
M_DATA_ A30
M_DATA_ A26
M_DATA_ A32
M_DATA_ A36
M_DATA_ A34
M_DATA_ A35
M_DATA_ A33
M_DATA_ A37
M_DATA_ A39
M_DATA_ A38
M_DATA_ A44
M_DATA_ A40
M_DATA_ A47
M_DATA_ A43
M_DATA_ A41
M_DATA_ A45
M_DATA_ A46
M_DATA_ A42
M_DATA_ A49
M_DATA_ A54
M_DATA_ A53
M_DATA_ A50
M_DATA_ A52
M_DATA_ A51
M_DATA_ A48
M_DATA_ A55
M_DATA_ A61
M_DATA_ A63
M_DATA_ A60
M_DATA_ A59
M_DATA_ A62
M_DATA_ A57
M_DATA_ A58
M_DATA_ A56
CPU1A
AE38
DDR0_DQ0
AE37
DDR0_DQ1
AG38
DDR0_DQ2
AG37
DDR0_DQ3
AE39
DDR0_DQ4
AE40
DDR0_DQ5
AG39
DDR0_DQ6
AG40
DDR0_DQ7
AJ38
DDR0_DQ8
AJ37
DDR0_DQ9
AL38
DDR0_DQ10
AL37
DDR0_DQ11
AJ40
DDR0_DQ12
AJ39
DDR0_DQ13
AL39
DDR0_DQ14
AL40
DDR0_DQ15
AN38
DDR0_DQ16/DDR0_DQ32
AN40
DDR0_DQ17/DDR0_DQ33
AR38
DDR0_DQ18/DDR0_DQ34
AR37
DDR0_DQ19/DDR0_DQ35
AN39
DDR0_DQ20/DDR0_DQ36
AN37
DDR0_DQ21/DDR0_DQ37
AR39
DDR0_DQ22/DDR0_DQ38
AR40
DDR0_DQ23/DDR0_DQ39
AW37
DDR0_DQ24/DDR0_DQ40
AU38
DDR0_DQ25/DDR0_DQ41
AV35
DDR0_DQ26/DDR0_DQ42
AW35
DDR0_DQ27/DDR0_DQ43
AU37
DDR0_DQ28/DDR0_DQ44
AV37
DDR0_DQ29/DDR0_DQ45
AT35
DDR0_DQ30/DDR0_DQ46
AU35
DDR0_DQ31/DDR0_DQ47
AY8
DDR0_DQ32/DDR1_DQ0
AW8
DDR0_DQ33/DDR1_DQ1
AV6
DDR0_DQ34/DDR1_DQ2
AU6
DDR0_DQ35/DDR1_DQ3
AU8
DDR0_DQ36/DDR1_DQ4
AV8
DDR0_DQ37/DDR1_DQ5
AW6
DDR0_DQ38/DDR1_DQ6
AY6
DDR0_DQ39/DDR1_DQ7
AY4
DDR0_DQ40/DDR1_DQ8
AV4
DDR0_DQ41/DDR1_DQ9
AT1
DDR0_DQ42/DDR1_DQ10
AT2
DDR0_DQ43/DDR1_DQ11
AV3
DDR0_DQ44/DDR1_DQ12
AW4
DDR0_DQ45/DDR1_DQ13
AT4
DDR0_DQ46/DDR1_DQ14
AT3
DDR0_DQ47/DDR1_DQ15
AP2
DDR0_DQ48/DDR1_DQ32
AM4
DDR0_DQ49/DDR1_DQ33
AP3
DDR0_DQ50/DDR1_DQ34
AM3
DDR0_DQ51/DDR1_DQ35
AP4
DDR0_DQ52/DDR1_DQ36
AM2
DDR0_DQ53/DDR1_DQ37
AP1
DDR0_DQ54/DDR1_DQ38
AM1
DDR0_DQ55/DDR1_DQ39
AK3
DDR0_DQ56/DDR1_DQ40
AH1
DDR0_DQ57/DDR1_DQ41
AK4
DDR0_DQ58/DDR1_DQ42
AH2
DDR0_DQ59/DDR1_DQ43
AH4
DDR0_DQ60/DDR1_DQ44
AK2
DDR0_DQ61/DDR1_DQ45
AH3
DDR0_DQ62/DDR1_DQ46
AK1
DDR0_DQ63/DDR1_DQ47
AU33
DDR0_ECC0
AT33
DDR0_ECC1
AW33
DDR0_ECC2
AV31
DDR0_ECC3
AU31
DDR0_ECC4
AV33
DDR0_ECC5
AW31
DDR0_ECC6
AY31
DDR0_ECC7
SKYLAKE -1
DDR CHANNEL A
SKYLAKE
LGA1151
DDR0_BA0/DDR0_CAB4/DDR0_BA0
DDR0_BA1/DDR0_CAB6/DDR0_BA1
DDR0_BA2/DDR0_CAA5/DDR0_BG0
DDR0_RAS#/DDR0_CAB3/DDR0_MA16
DDR0_WE#/DDR0_CAB2/DDR0_MA14
DDR0_CAS#/DDR0_CAB1/DDR0_MA15
DDR0_MA0/DDR0_CAB9/DDR0_MA0
DDR0_MA1/DDR0_CAB8/DDR0_MA1
DDR0_MA2/DDR0_CAB5/DDR0_MA2
DDR0_MA5/DDR0_CAA0/DDR0_MA5
DDR0_MA6/DDR0_CAA2/DDR0_MA6
DDR0_MA7/DDR0_CAA4/DDR0_MA7
DDR0_MA8/DDR0_CAA3/DDR0_MA8
DDR0_MA9/DDR0_CAA1/DDR0_MA9
DDR0_MA10/DDR0_CAB7/DDR0_MA10
DDR0_MA11/DDR0_CAA7/DDR0_MA11
DDR0_MA12/DDR0_CAA6/DDR0_MA12
DDR0_MA13/DDR0_CAB0/DDR0_MA13
DDR0_MA14/DDR0_CAA9/DDR0_BG1
DDR0_MA15/DDR0_CAA8/DDR0_ACT#
All types of DIMMs are DDR3L
DDR0_CKP0
DDR0_CKN0
DDR0_CKP1
DDR0_CKN1
DDR0_CKP2
DDR0_CKN2
DDR0_CKP3
DDR0_CKN3
DDR0_CKE0
DDR0_CKE1
DDR0_CKE2
DDR0_CKE3
DDR0_CS#0
DDR0_CS#1
DDR0_CS#2
DDR0_CS#3
DDR0_ODT0
DDR0_ODT1
DDR0_ODT2
DDR0_ODT3
DDR0_MA3
DDR0_MA4
DDR0_PAR
DDR0_ALERT#
DDR0_DQSN0
DDR0_DQSN1
DDR0_DQSN2/DDR0_DQSN4
DDR0_DQSN3/DDR0_DQSN5
DDR0_DQSN4/DDR1_DQSN0
DDR0_DQSN5/DDR1_DQSN1
DDR0_DQSN6/DDR1_DQSN4
DDR0_DQSN7/DDR1_DQSN5
DDR0_DQSP0
DDR0_DQSP1
DDR0_DQSP2/DDR0_DQSP4
DDR0_DQSP3/DDR0_DQSP5
DDR0_DQSP4/DDR1_DQSP0
DDR0_DQSP5/DDR1_DQSP1
DDR0_DQSP6/DDR1_DQSP4
DDR0_DQSP7/DDR1_DQSP5
DDR0_DQSP8
DDR0_DQSN8
1 OF 12
4
AW18
AV18
AW17
AY17
AW16
AV16
AT16
AU16
AY24
AW24
AV24
AV25
AW12
AU11
AV13
AV10
AW11
AU14
AU12
AY10
AY13
AV15
AW23
AW13
AV14
AY11
AW15
AU18
AU17
AV19
AT19
AU20
AV20
AU21
AT20
AT22
AY14
AU22
AV22
AV12
AV23
AU24
AY15
AT23
AF39
AK39
AP39
AU36
AW7
AU3
AN3
AJ3
AF38
AK38
AP38
AV36
AV7
AU2
AN2
AJ2
AV32
AU32
CK_M_DD R0_A_D P
CK_M_DD R0_A_D N
CK_M_DD R1_A_D P
CK_M_DD R1_A_D N
M_SCKE_ A0
M_SCKE_ A1
M_SCS_A _N0
M_SCS_A _N1
M_ODT_A 0
M_ODT_A 1
M_SBS_A 0
M_SBS_A 1
M_SBS_A 2
M_RAS_A _N
M_WE_A _N
M_CAS_A _N
M_MAA_A0
M_MAA_A1
M_MAA_A2
M_MAA_A3
M_MAA_A4
M_MAA_A5
M_MAA_A6
M_MAA_A7
M_MAA_A8
M_MAA_A9
M_MAA_A1 0
M_MAA_A1 1
M_MAA_A1 2
M_MAA_A1 3
M_MAA_A1 4
M_MAA_A1 5
TP_DDR 0_PAR
DDR0_A LERT#
M_DQS_A _DN0
M_DQS_A _DN1
M_DQS_A _DN2
M_DQS_A _DN3
M_DQS_A _DN4
M_DQS_A _DN5
M_DQS_A _DN6
M_DQS_A _DN7
M_DQS_A _DP0
M_DQS_A _DP1
M_DQS_A _DP2
M_DQS_A _DP3
M_DQS_A _DP4
M_DQS_A _DP5
M_DQS_A _DP6
M_DQS_A _DP7
TP_DDR 0_DQSP 8
TP_DDR 0_DQSN8
NOTE CMD SIGNALS FOR DIFFERENT MEMORY TECHINOLOGIES:
LEFT TO RIGHT: DDR3L/LPDDR3/DDR4
1
1 2
R1 0R040 2-PAD
06/24 Allen modify
1
TP3 TPAD28
1
TP4 TPAD28
TP1 TPAD28
THIS IS FOR RVP10 ONLY
Short PAD ,if Layout placement inpact
3
06/24 Allen modify
M_DATA_ B4
M_DATA_ B5
M_DATA_ B7
M_DATA_ B3
M_DATA_ B1
M_DATA_ B0
M_DATA_ B6
M_DATA_ B2
M_DATA_ B13
M_DATA_ B9
M_DATA_ B14
M_DATA_ B15
M_DATA_ B12
M_DATA_ B8
M_DATA_ B10
M_DATA_ B11
M_DATA_ B16
M_DATA_ B20
M_DATA_ B22
M_DATA_ B23
M_DATA_ B17
M_DATA_ B21
M_DATA_ B18
M_DATA_ B19
M_DATA_ B28
M_DATA_ B24
M_DATA_ B30
M_DATA_ B26
M_DATA_ B25
M_DATA_ B29
M_DATA_ B27
M_DATA_ B31
M_DATA_ B32
M_DATA_ B33
M_DATA_ B38
M_DATA_ B34
M_DATA_ B36
M_DATA_ B37
M_DATA_ B39
M_DATA_ B35
M_DATA_ B44
M_DATA_ B45
M_DATA_ B46
M_DATA_ B42
M_DATA_ B41
M_DATA_ B40
M_DATA_ B47
M_DATA_ B43
M_DATA_ B52
M_DATA_ B53
M_DATA_ B55
M_DATA_ B51
M_DATA_ B48
M_DATA_ B49
M_DATA_ B54
M_DATA_ B50
M_DATA_ B61
M_DATA_ B56
M_DATA_ B63
M_DATA_ B58
M_DATA_ B60
M_DATA_ B57
M_DATA_ B59
M_DATA_ B62
Can be left as no connects
if no support ECC.
CPU1B
AD34
DDR1_DQ0/DDR0_DQ16
AD35
DDR1_DQ1/DDR0_DQ17
AG35
DDR1_DQ2/DDR0_DQ18
AH35
DDR1_DQ3/DDR0_DQ19
AE35
DDR1_DQ4/DDR0_DQ20
AE34
DDR1_DQ5/DDR0_DQ21
AG34
DDR1_DQ6/DDR0_DQ22
AH34
DDR1_DQ7/DDR0_DQ23
AK35
DDR1_DQ8/DDR0_DQ24
AL35
DDR1_DQ9/DDR0_DQ25
AK32
DDR1_DQ10/DDR0_DQ26
AL32
DDR1_DQ11/DDR0_DQ27
AK34
DDR1_DQ12/DDR0_DQ28
AL34
DDR1_DQ13/DDR0_DQ29
AK31
DDR1_DQ14/DDR0_DQ30
AL31
DDR1_DQ15/DDR0_DQ31
AP35
DDR1_DQ16/DDR0_DQ48
AN35
DDR1_DQ17/DDR0_DQ49
AN32
DDR1_DQ18/DDR0_DQ50
AP32
DDR1_DQ19/DDR0_DQ51
AN34
DDR1_DQ20/DDR0_DQ52
AP34
DDR1_DQ21/DDR0_DQ53
AN31
DDR1_DQ22/DDR0_DQ54
AP31
DDR1_DQ23/DDR0_DQ55
AL29
DDR1_DQ24/DDR0_DQ56
AM29
DDR1_DQ25/DDR0_DQ57
AP29
DDR1_DQ26/DDR0_DQ58
AR29
DDR1_DQ27/DDR0_DQ59
AM28
DDR1_DQ28/DDR0_DQ60
AL28
DDR1_DQ29/DDR0_DQ61
AR28
DDR1_DQ30/DDR0_DQ62
AP28
DDR1_DQ31/DDR0_DQ63
AR12
DDR1_DQ32/DDR1_DQ16
AP12
DDR1_DQ33/DDR1_DQ17
AM13
DDR1_DQ34/DDR1_DQ18
AL13
DDR1_DQ35/DDR1_DQ19
AR13
DDR1_DQ36/DDR1_DQ20
AP13
DDR1_DQ37/DDR1_DQ21
AM12
DDR1_DQ38/DDR1_DQ22
AL12
DDR1_DQ39/DDR1_DQ23
AP10
DDR1_DQ40/DDR1_DQ24
AR10
DDR1_DQ41/DDR1_DQ25
AR7
DDR1_DQ42/DDR1_DQ26
AP7
DDR1_DQ43/DDR1_DQ27
AR9
DDR1_DQ44/DDR1_DQ28
AP9
DDR1_DQ45/DDR1_DQ29
AR6
DDR1_DQ46/DDR1_DQ30
AP6
DDR1_DQ47/DDR1_DQ31
AM10
DDR1_DQ48
AL10
DDR1_DQ49
AM7
DDR1_DQ50
AL7
DDR1_DQ51
AM9
DDR1_DQ52
AL9
DDR1_DQ53
AM6
DDR1_DQ54
AL6
DDR1_DQ55
AJ6
DDR1_DQ56
AJ7
DDR1_DQ57
AE6
DDR1_DQ58
AF7
DDR1_DQ59
AH7
DDR1_DQ60
AH6
DDR1_DQ61
AE7
DDR1_DQ62
AF6
DDR1_DQ63
AR25
DDR1_ECC0
AR26
DDR1_ECC1
AM26
DDR1_ECC2
AM25
DDR1_ECC3
AP26
DDR1_ECC4
AP25
DDR1_ECC5
AL25
DDR1_ECC6
AL26
DDR1_ECC7
SKYLAKE -1
DDR CHANNEL B
SKYLAKE
LGA1151
DDR1_RAS#/DDR1_CAB3/DDR1_MA16
DDR1_WE#/DDR1_CAB2/DDR1_MA14
DDR1_CAS#/DDR1_CAB1/DDR1_MA15
DDR1_BA0/DDR1_CAB4/DDR1_BA0
DDR1_BA1/DDR1_CAB6/DDR1_BA1
DDR1_BA2/DDR1_CAA5/DDR1_BG0
DDR1_MA0/DDR1_CAB9/DDR1_MA0
DDR1_MA1/DDR1_CAB8/DDR1_MA1
DDR1_MA2/DDR1_CAB5/DDR1_MA2
DDR1_MA5/DDR1_CAA0/DDR1_MA5
DDR1_MA6/DDR1_CAA2/DDR1_MA6
DDR1_MA7/DDR1_CAA4/DDR1_MA7
DDR1_MA8/DDR1_CAA3/DDR1_MA8
DDR1_MA9/DDR1_CAA1/DDR1_MA9
DDR1_MA10/DDR1_CAB7/DDR1_MA10
DDR1_MA11/DDR1_CAA7/DDR1_MA11
DDR1_MA12/DDR1_CAA6/DDR1_MA12
DDR1_MA13/DDR1_CAB0/DDR1_MA13
DDR1_MA14/DDR1_CAA9/DDR1_BG1
DDR1_MA15/DDR1_CAA8/DDR1_ACT#
DDR1_DQSN0/DDR0_DQSN2
DDR1_DQSN1/DDR0_DQSN3
DDR1_DQSN2/DDR0_DQSN6
DDR1_DQSN3/DDR0_DQSN7
DDR1_DQSN4/DDR1_DQSN2
DDR1_DQSN5/DDR1_DQSN3
DDR1_DQSP0/DDR0_DQSP2
DDR1_DQSP1/DDR0_DQSP3
DDR1_DQSP2/DDR0_DQSP6
DDR1_DQSP3/DDR0_DQSP7
DDR1_DQSP4/DDR1_DQSP2
DDR1_DQSP5/DDR1_DQSP3
DDR1_CKP0
DDR1_CKN0
DDR1_CKP1
DDR1_CKN1
DDR1_CKP2
DDR1_CKN2
DDR1_CKP3
DDR1_CKN3
DDR1_CKE0
DDR1_CKE1
DDR1_CKE2
DDR1_CKE3
DDR1_CS#0
DDR1_CS#1
DDR1_CS#2
DDR1_CS#3
DDR1_ODT0
DDR1_ODT1
DDR1_ODT2
DDR1_ODT3
DDR1_MA3
DDR1_MA4
DDR1_PAR
DDR1_ALERT#
DDR1_DQSN6
DDR1_DQSN7
DDR1_DQSP6
DDR1_DQSP7
DDR1_DQSP8
DDR1_DQSN8
DDR_VREF_CA
DDR0_VREF_DQ
DDR1_VREF_DQ
2
2 OF 12
CK_M_DD R0_B_D P
AM20
CK_M_DD R0_B_D N
AM21
CK_M_DD R1_B_D P
AP22
CK_M_DD R1_B_D N
AP21
AN20
AN21
AP19
AP20
M_SCKE_ B0
AY29
M_SCKE_ B1
AV29
AW29
AU29
M_SCS_B _N0
AP17
M_SCS_B _N1
AN15
AN17
AM15
M_ODT_B 0
AM16
M_ODT_B 1
AL16
AP15
AL15
M_RAS_B _N
AN18
M_WE_B _N
AL17
M_CAS_B _N
AP16
M_SBS_B 0
AL18
M_SBS_B 1
AM18
M_SBS_B 2
AW28
M_MAA_B0
AL19
M_MAA_B1
AL22
M_MAA_B2
AM22
M_MAA_B3
AM23
AP23
AL23
AW26
AY26
AU26
AW27
AP18
AU27
AV27
AR15
AY28
AU28
AL20
AY25
AF34
AK33
AN33
AN29
AN13
AR8
AM8
AG6
AF35
AL33
AP33
AN28
AN12
AP8
AL8
AG7
AN25
AN26
AB40
AC40
AC39
M_MAA_B4
M_MAA_B5
M_MAA_B6
M_MAA_B7
M_MAA_B8
M_MAA_B9
M_MAA_B1 0
M_MAA_B1 1
M_MAA_B1 2
M_MAA_B1 3
M_MAA_B1 4
M_MAA_B1 5
TP_DDR 1_PAR
DDR1_A LERT#
R2 0R04 02-PAD
M_DQS_B _DN0
M_DQS_B _DN1
M_DQS_B _DN2
M_DQS_B _DN3
M_DQS_B _DN4
M_DQS_B _DN5
M_DQS_B _DN6
M_DQS_B _DN7
M_DQS_B _DP0
M_DQS_B _DP1
M_DQS_B _DP2
M_DQS_B _DP3
M_DQS_B _DP4
M_DQS_B _DP5
M_DQS_B _DP6
M_DQS_B _DP7
TP_DDR 1_DQSP 8
TP_DDR 1_DQSN8
DIMM_CA_ CPU_VREF _A
DIMM_DQ_ CPU_VREF _A
DIMM_DQ_ CPU_VREF _B
C2
SCD1U16 V2KX-3D LGP
NOTE CMD SIGNALS FOR DIFFERENT MEMORY TECHINOLOGIES:
LEFT TO RIGHT: DDR3L/LPDDR3/DDR4
1
TP2 TPAD28
1 2
THIS IS FOR RVP10 ONLY
Short PAD ,if Layout placement inpact
06/24 Allen modify
1
TP5 TPAD2 8
1
TP6 TPAD2 8
12
12
C1
SCD1U16 V2KX-3D LGP
1
DIMM_CA_ CPU_VREF _A
B B
A A
5
4
3
C3
SCD022 U16V2KX -3DLGP
2 1
DIMM_CA_ CPU_VREF _RC
12
R5
24D9R2 F-L-GP
1 2
R3 2R 2F-GP
1 2
R4 2R 2F-GP
DIMM_CA_ VREF_A
DIMM_CA_ VREF_B
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, S ec.1, Hsin Tai W u Rd., Hsichih,
21F, 88, S ec.1, Hsin Tai W u Rd., Hsichih,
21F, 88, S ec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 22 1, Taiwan, R.O.C.
Taipei Hsien 22 1, Taiwan, R.O.C.
Title
Title
Title
003_CP U_DDRA_ DDRB
003_CP U_DDRA_ DDRB
003_CP U_DDRA_ DDRB
Size Document Numb er Rev
Size Document Numb er Rev
Size Document Numb er Rev
COLORADO MLK SKYLAKE-S
COLORADO MLK SKYLAKE-S
COLORADO MLK SKYLAKE-S
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
1
Taipei Hsien 22 1, Taiwan, R.O.C.
3 1 07
3 1 07
3 1 07
-2D
-2D
-2D
V_CPU_S T_PLL
SB3V
V_CPU_I O
5
V_CPU_S T_PLL 7,44,99
SB3V 15 ,17,18,20 ,21,24,25 ,31,35,38,4 0,42,47,4 8,51,53,5 5,56,57,5 8,59,61,6 4,86
V_CPU_I O 5 ,7,8,9,48,9 9
4
VIDSCK
VIDSOUT
VIDALERT#
Need to add Pull UP on both C PU and VR side.
3
2
1
Double Check
12
12
1-003 05/28 Allen modify
PCH_JTA G_TDO
PCH_JTA G_TDI
PCH_JTA G_TMS
V_CPU_S T_PLL
12
12
12
12
12
12
SB3V
V_CPU_I O
07/17 Allen del
To CPU XDP
1A020 04/20 Allen modify
H_TDI
1A020 04/20 Allen modify
H_TMS
1A020 04/20 Allen modify
PCH_THER MTRIP_N
H_PREQ_ N
H_PROCHO T_N
H_TDO
If the SKTOCC no use, del this sche
H_SKTOC C_N
SKL_CNL _N
H_TCK
H_PROCHO T_N
07/14 Allen add
H_TDO
R40 0R0402-P AD-2-GP
H_TDI
R43 0R0402-P AD-2-GP
H_TMS
R44 0R0402-P AD-2-GP
R80242 51R2F-2-G P
R80241 51R2F-2-G P
PR1 1 KR2J-1-G P
R8 51R2F -2-GP
(R_)
R12 51R2F-2-G P
R14 51R2F-2-G P
(R_)
R20 10KR2J-3 -GP
R24 10KR2J-3 -GP
(R_)
This RES Value unconfirm.
1 2
R32 51R2F-2 -GP
1 2
C12125
SC47P5 0V2JN-5D LGP
SC011 11/14 BOM cost1A015 04/14 Allen modify
1 2
1 2
1 2
LGA1151
CFG10
CFG11
CFG12
CFG13
CFG14
CFG15
CFG16
CFG17
CFG18
CFG19
BPM#0
BPM#1
BPM#2
BPM#3
PROC_TDO
PROC_TDI
PROC_TMS
PROC_TCK
PROC_TRST#
PROC_PREQ#
PROC_PRDY#
CFG_RCOMP
5 OF 12
SKL_PC UDEBUG_0
H15
CFG0
SKL_PC UDEBUG_1
F15
CFG1
SKL_PC UDEBUG_2
F16
CFG2
SKL_PC UDEBUG_3
H16
CFG3
SKL_PC UDEBUG_4
F19
CFG4
SKL_PC UDEBUG_5
H18
CFG5
SKL_PC UDEBUG_6
G21
CFG6
SKL_PC UDEBUG_7
H20
CFG7
SKL_PC UDEBUG_8
G16
CFG8
SKL_PC UDEBUG_9
E16
CFG9
SKL_PC UDEBUG_10
F17
SKL_PC UDEBUG_11
H17
SKL_PC UDEBUG_12
G20
SKL_PC UDEBUG_13
F20
SKL_PC UDEBUG_14
F21
SKL_PC UDEBUG_15
H19
SKL_PC USTB_0_ DN
E14
SKL_PC USTB_0_ DP
F14
SKL_PC USTB_1_ DN
G18
SKL_PC USTB_1_ DP
F18
SKL_XD P_MBP_0
D16
SKL_XD P_MBP_1
D17
TP_CPU_ G38
G14
TP_CPU_ H37
H14
H_TDO
H13
H_TDI
G12
H_TMS
F13
H_TCK
F11
H_TRST_ N
F12
H_PREQ_ N
B9
B10
M11
H_PRDY_N
TPEV_C FG_RCO MP
R39 0R0402-P AD-2-GP
1 2
R10
1KR2J-1 -GP
1
1
1 2
12
R45
49D9R2 F-GP
XDP_PC UDERBUG_3
To CPU XDP
Differential pairs
To CPU XDP
TP9 TP AD28
TP10 TPAD28
To PCH XDP
H_TRST_ N_R
AC36
AC38
AC37
AB35
AB36
W5
W4
W1
W2
K9
J9
E39
E38
E40
C39
U2
F8
E7
E8
D8
G7
D11
D13
CPU1E
BCLKP
BCLKN
PCI_BCLKP
PCI_BCLKN
CLK24P
CLK24N
VIDALERT#
VIDSCK
VIDSOUT
PROCHOT#
DDR_VTT_CNTL
ZVM#
RSVD_AC37
VCCST_PWRGD
PROCPWRGD
RESET#
PM_SYNC
PM_DOWN
PECI
THERMTRIP#
SKTOCC#
PROC_SELECT#
CATERR#
SKYLAKE -1
SKYLAKE
Only left one 0 ohm on it
PCH_CPU_ BCLK_DP
PCH_CPU_ BCLK_DN
PCH_CPU_ PCIBCLK _DP
D D
C C
B B
CLOCK
PCH_CPU_ BCLK_DP16
PCH_CPU_ BCLK_DN16
PCH_CPU_ PCIBCLK _DP1 6
PCH_CPU_ PCIBCLK _DN16
PCH_CPU_ NSSC_CLK _DP16
PCH_CPU_ NSSC_CLK _DN16
CPU_VCORE
VIDALE RT#44
VIDSCK44
VIDSOUT44
VCCST_ PWRGD4 0,99
XDP
XDP_PC UDERBUG_399
SKL_PC UDEBUG_099
SKL_PC UDEBUG_199
SKL_PC UDEBUG_299
SKL_PC UDEBUG_399
SKL_PC UDEBUG_499
SKL_PC UDEBUG_599
SKL_PC UDEBUG_699
SKL_PC UDEBUG_799
SKL_PC UDEBUG_899
SKL_PC UDEBUG_999
SKL_PC UDEBUG_1099
SKL_PC UDEBUG_1199
SKL_PC UDEBUG_1299
SKL_PC UDEBUG_1399
SKL_PC UDEBUG_1499
SKL_PC UDEBUG_1599
SKL_PC USTB_0_ DP99
SKL_PC USTB_0_ DN99
SKL_PC USTB_1_ DP99
SKL_PC USTB_1_ DN99
SKL_XD P_MBP_099
SKL_XD P_MBP_199
OTHER
H_TRST_ N_R22
H_PM_SYNC17
H_PWRG D15,99
H_SKTOC C_N18
H_PM_DOW N17
PCH_PEC I17
EC_PEC I24
PLTRST _CPU_N1 7,99
H_PROCHO T_N24,43,44
PCH_THER MTRIP_N17,79
VTT_EN50
PCH_JTA G_TDI15
PCH_JTA G_TDO15
PCH_JTA G_TMS15
CPU sideVR side
VIDALE RT#
VIDSCK
VIDSOUT
1 2
R22 0R0402-P AD
1 2
R27 0R0402-P AD
1 2
R30 0R0402-P AD
H_VIDAL ERT_N
H_VIDSC K
H_VIDSO UT
08/18 Allen modify
DDR_VT T_CNTL_ GATE
H_PECIEC_PEC I
12
R1734
10KR2F -2-GP
(R_)
To SIO
H_TDO99
H_TDI99
H_TCK15,99
H_TMS99
H_TRST_ N99
H_PRDY_N99
H_PREQ_ N99
To PCH
06/24 Allen modify
PCH_PEC I
PWR_V TT_EN
VTT_EN
R37 0R0402-P AD
(R_)
12
(R_)
R1735
100KR2 J-1-GP
6
12
R410R2J-2-GP
SB3V
Q1228
2N7002K DW-GP
(75.2700 2.F7C)
2345
1
1 2
PLACE NEAR CPU
from CPU VR
IN CRB Using SLP_S3_N to contr ol VDDQ
CRB using VR_READY in sequence
SEQUENCE need to check
To PCH GPIO to detect CPU in SKT
For future platforms
MCP TERMINATION
SKL_PC UDEBUG_0
SKL_PC UDEBUG_1
SKL_PC UDEBUG_2
SKL_PC UDEBUG_3
SKL_PC UDEBUG_4
SKL_PC UDEBUG_5
SKL_PC UDEBUG_6
SKL_PC UDEBUG_7
SKL_PC UDEBUG_8
SKL_PC UDEBUG_9
SKL_PC UDEBUG_10
SKL_PC UDEBUG_11
SKL_PC UDEBUG_12
SKL_PC UDEBUG_13
SKL_PC UDEBUG_14
SKL_PC UDEBUG_15
1 2
R46 1KR2J-1-G P(R_)
1 2
R47 1KR2J-1-G P(R_)
1 2
R48 1KR2J-1-G P
1 2
R49 1KR2J-1-G P(R_)
1 2
R50 1KR2J-1-G P
1 2
R51 1KR2J-1-G P(R_)
1 2
R52 1KR2J-1-G P(R_)
1 2
R53 1KR2J-1-G P(R_)
1 2
R54 1KR2J-1-G P(R_)
1 2
R56 1KR2J-1-G P(R_)
1 2
R57 1KR2J-1-G P
(R_)
1 2
R58 1KR2J-1-G P(R_)
1 2
R59 1KR2J-1-G P(R_)
1 2
R60 1KR2J-1-G P(R_)
1 2
R61 1KR2J-1-G P(R_)
1 2
R62 1KR2J-1-G P(R_)
from PCH
V_CPU_S T_PLL
1 2
R16 56D2R2F -GP
1 2
R17 45D3R2F -L-GP(R _)
1 2
R18 100R2F-L 1-GP-U
06/24 Allen modify
OPC VR need the pin
To PCH& TO XDP, SEQUENCE need to check
To PCH
PECI to SIO
To PCH
06/24 Allen modify
V_CPU_I O
12
R551KR2J-1-GP (R_)
PCH_CPU_ PCIBCLK _DN
PCH_CPU_ NSSC_CLK _DP
PCH_CPU_ NSSC_CLK _DN
H_VIDAL ERT_N
H_VIDSC K
H_VIDSO UT
H_PROCHO T_N
PWR_V TT_EN
VCCST_ PWRGD VCCST_ PWRGD _CPU
07/14 Allen modify
H_PM_DOW N
PCH_THER MTRIP_N
CFG[2]:PCIE reversed
CFG[4]:EDP Enable
UNSTUFF R56 FOR SPT-H
06/24 Allen modify
Need to check intel. DT and AI O define difference.
UNSTUFF R59 AND R60 FOR SPT-H
1 2
1 2
R6 0R040 2-PAD
R7 0R040 2-PAD
1 2
1 2
R9 0R040 2-PAD
R11 0R0402-P AD
1 2
R13 0R0402-P AD
1 2
R15 0R0402-P AD
R23
220R2F -GP
12
1 2
R25 0R2J-2-GP
1 2
R28 0R2J-2-GP
1 2
R1821 100R2F -L1-GP-U
1 2
R31 0R2J-2-GP
(R_)
1 2
R33 6K04R2F -GP
1 2
R35 2K8R2F-G P
1 2
R79774 20R2J-3-G P
1 2
R38 0R0402-P AD
Debug Pin
SB024 10/06 Allen modify
TP7TPAD2 8
TP8TPAD2 8
TP11TPAD28
PCH_CPU_ BCLK_R_ DP
PCH_CPU_ BCLK_R_ DN
PCH_CPU_ PCIBCLK _R_DP
PCH_CPU_ PCIBCLK _R_DN
CPU_24MHZ_ R_DP
CPU_24MHZ_ R_DN
CPU_VAI DALERT _N
CPU_VID SCK_N
CPU_VID SOUT_N
H_PROCHO T_R_N
DDR_VT T_CNTL
TP_FM_O PC_ZVM_N
1
TP_AC3 7
1
H_PWRG D
PLTRST _CPU_N
H_PM_SYNC
H_PM_DOW N_R
H_PECI
CPU_THER MTRIP_N
H_SKTOC C_N
SKL_CNL _N
TP_H_CA TERR_N
1
A A
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, S ec.1, Hsin Tai W u Rd., Hsichih,
21F, 88, S ec.1, Hsin Tai W u Rd., Hsichih,
21F, 88, S ec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 22 1, Taiwan, R.O.C.
Taipei Hsien 22 1, Taiwan, R.O.C.
Title
Title
Title
004_CP U_CFG/CL OCK
004_CP U_CFG/CL OCK
004_CP U_CFG/CL OCK
Size Document Numb er Rev
Size Document Numb er Rev
Size Document Numb er Rev
COLORADO MLK SKYLAKE-S
COLORADO MLK SKYLAKE-S
COLORADO MLK SKYLAKE-S
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
1
Taipei Hsien 22 1, Taiwan, R.O.C.
4 1 07
4 1 07
4 1 07
-2D
-2D
-2D
V_CPU_IO
5
V_CPU_IO 4,7,8,9,48,99
4
3
2
1
Already SWAP
3 OF 12
PEG_TXP0
PEG_TXN0
PEG_TXP1
PEG_TXN1
PEG_TXP2
PEG_TXN2
PEG_TXP3
PEG_TXN3
PEG_TXP4
PEG_TXN4
PEG_TXP5
PEG_TXN5
PEG_TXP6
PEG_TXN6
PEG_TXP7
PEG_TXN7
PEG_TXP8
PEG_TXN8
PEG_TXP9
PEG_TXN9
PEG_TXP10
PEG_TXN10
PEG_TXP11
PEG_TXN11
PEG_TXP12
PEG_TXN12
PEG_TXP13
PEG_TXN13
PEG_TXP14
PEG_TXN14
PEG_TXP15
PEG_TXN15
DMI_TXP0
DMI_TXN0
DMI_TXP1
DMI_TXN1
DMI_TXP2
DMI_TXN2
DMI_TXP3
DMI_TXN3
A5
A6
B4
B5
C3
C4
D2
D3
E1
E2
F2
F3
G1
G2
H2
H3
J1
J2
K2
K3
L1
L2
M2
M3
N1
N2
P2
P3
R2
R1
T2
T3
AC2
AC1
AD3
AD2
AE2
AE1
AF2
AF3
PEG_C_TXP7
PEG_C_TXN7
PEG_C_TXP6
PEG_C_TXN6
PEG_C_TXP5
PEG_C_TXN5
PEG_C_TXP4
PEG_C_TXN4
PEG_C_TXP3
PEG_C_TXN3
PEG_C_TXP2
PEG_C_TXN2
PEG_C_TXP1
PEG_C_TXN1
PEG_C_TXP0
PEG_C_TXN0
DMI_MT_IR_DP0
DMI_MT_IR_DN0
DMI_MT_IR_DP1
DMI_MT_IR_DN1
DMI_MT_IR_DP2
DMI_MT_IR_DN2
DMI_MT_IR_DP3
DMI_MT_IR_DN3
06/24 Allen add
PEG_C_TXN7
PEG_C_TXN6
PEG_C_TXN5
PEG_C_TXN4
PEG_C_TXN3
PEG_C_TXN2
PEG_C_TXN1
PEG_C_TXN0
PEG_C_TXP7
PEG_C_TXP6
PEG_C_TXP5
PEG_C_TXP4
PEG_C_TXP3
PEG_C_TXP2
PEG_C_TXP1
PEG_C_TXP0
NOTE.
If PEG is not implemented, the RX&TX pairs can be left as No Connect
1 2
C11898 SCD22U10V2KX-2-GP(G_)
1 2
C11895 SCD22U10V2KX-2-GP(G_)
1 2
C11900 SCD22U10V2KX-2-GP(G_)
1 2
C11902 SCD22U10V2KX-2-GP(G_)
1 2
C11904 SCD22U10V2KX-2-GP(G_)
1 2
C11905 SCD22U10V2KX-2-GP(G_)
1 2
C11907 SCD22U10V2KX-2-GP(G_)
1 2
C11908 SCD22U10V2KX-2-GP(G_)
1 2
C12138 SCD22U10V2KX-2-GP(G_)
1 2
C12139 SCD22U10V2KX-2-GP(G_)
1 2
C12140 SCD22U10V2KX-2-GP(G_)
1 2
C12141 SCD22U10V2KX-2-GP(G_)
1 2
C12142 SCD22U10V2KX-2-GP(G_)
1 2
C12143 SCD22U10V2KX-2-GP(G_)
1 2
C12144 SCD22U10V2KX-2-GP(G_)
1 2
C12145 SCD22U10V2KX-2-GP(G_)
PEG_TXN7
PEG_TXN6
PEG_TXN5
PEG_TXN4
PEG_TXN3
PEG_TXN2
PEG_TXN1
PEG_TXN0
PEG_TXP7
PEG_TXP6
PEG_TXP5
PEG_TXP4
PEG_TXP3
PEG_TXP2
PEG_TXP1
PEG_TXP0
PEG_TXN[7..0] 76
PEG_TXP[7..0] 76
B8
B7
C7
C6
D6
D5
E5
E4
F6
F5
G5
G4
H6
H5
J5
J4
K6
K5
L5
L4
M6
M5
N5
N4
P6
P5
R5
R4
T6
T5
U5
U4
L7
Y3
Y4
AA4
AA5
AB4
AB3
AC4
AC5
CPU1C
PEG_RXP0
PEG_RXN0
PEG_RXP1
PEG_RXN1
PEG_RXP2
PEG_RXN2
PEG_RXP3
PEG_RXN3
PEG_RXP4
PEG_RXN4
PEG_RXP5
PEG_RXN5
PEG_RXP6
PEG_RXN6
PEG_RXP7
PEG_RXN7
PEG_RXP8
PEG_RXN8
PEG_RXP9
PEG_RXN9
PEG_RXP10
PEG_RXN10
PEG_RXP11
PEG_RXN11
PEG_RXP12
PEG_RXN12
PEG_RXP13
PEG_RXN13
PEG_RXP14
PEG_RXN14
PEG_RXP15
PEG_RXN15
PEG_RCOMP
DMI_RXP0
DMI_RXN0
DMI_RXP1
DMI_RXN1
DMI_RXP2
DMI_RXN2
DMI_RXP3
DMI_RXN3
SKYLAKE
LGA1151
DMI
D D
C C
DMI_IT_MR_DP[0..3]17
DMI_IT_MR_DN[0..3]17
DMI_MT_IR_DP[0..3]17
DMI_MT_IR_DN[0..3]17
CHECK PCIEX8 swap ?????
PEG_RXN[7..0]76
PEG_RXN7
PEG_RXN6
PEG_RXN5
PEG_RXN4
PEG_RXN3
PEG_RXN2
PEG_RXN1
PEG_RXN0
PEG_RXP[7..0]76
PEG_RXP7
PEG_RXP6
PEG_RXP5
PEG_RXP4
PEG_RXP3
PEG_RXP2
PEG_RXP1
PEG_RXP0
V_CPU_IO
12
R63
24D9R2F-L-GP
PEG_RXP7
PEG_RXN7
PEG_RXP6
PEG_RXN6
PEG_RXP5
PEG_RXN5
PEG_RXP4
PEG_RXN4
PEG_RXP3
PEG_RXN3
PEG_RXP2
PEG_RXN2
PEG_RXP1
PEG_RXN1
PEG_RXP0
PEG_RXN0
PEG_COMP
DMI_IT_MR_DP0
DMI_IT_MR_DN0
DMI_IT_MR_DP1
DMI_IT_MR_DN1
DMI_IT_MR_DP2
DMI_IT_MR_DN2
DMI_IT_MR_DP3
DMI_IT_MR_DN3
B B
SKYLAKE-1
Sandy Bridge Socket
SKT1
A A
5
4
Load Plate
(22.78003.021)
SKT2
Back Plate
(22.78006.031)
SKT3
CPU Cover
(42.3EQ28.011)
3
<Variant Name>
<Variant Name>
<Variant Name>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
005_CPU_PCIE
005_CPU_PCIE
005_CPU_PCIE
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
COLORADO MLK SKYLAKE-S
C
COLORADO MLK SKYLAKE-S
C
COLORADO MLK SKYLAKE-S
C
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
Taipei Hsien 221, Taiwan, R.O.C.
5 107
5 107
1
5 107
-2
-2
-2
5
4
3
2
1
M10
M12
M15
M17
M19
M21
M23
M25
M27
M29
M35
M37
M39
N33
R33
U33
W33
D40
K39
L13
L32
P35
P37
P39
T35
T37
T39
V35
V37
V39
W3
W6
Y35
Y37
B38
K4
K7
L3
L6
L9
M1
M4
M7
N3
N6
N8
P1
P4
R3
R6
R8
T1
T4
U3
U6
V1
V8
Y5
A4
C2
CPU1L
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
SKYLAKE-1
SKYLAKE
LGA1151
12 OF 12
6 OF 12
CPU1F
A11
VSS
AA33
AB39
AC33
AC34
AC35
AD33
AD36
AD37
AD38
AD39
AD40
AE33
AE36
AF33
AF36
AF37
AF40
AG33
AG36
AH33
AH36
AH37
AH38
AH39
AH40
AJ31
AJ32
AJ33
AJ34
AJ35
AJ36
AK10
AK12
AK13
AK15
AK16
AK17
AK18
AK19
AK20
AK23
AK25
AK26
AK28
AA3
AA8
AB5
AC3
AC6
AD1
AD4
AD6
AD7
AD8
AE3
AE5
AE8
AF1
AF5
AF8
AG1
AG2
AG3
AG4
AG5
AG8
AH5
AH8
A13
A15
A17
A24
A7
AJ1
AJ4
AJ5
AJ8
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
SKYLAKE-1
D D
C C
B B
SKYLAKE
LGA1151
AK29
VSS
AK30
VSS
AK36
VSS
AK37
VSS
AK40
VSS
AK5
VSS
AK6
VSS
AK7
VSS
AK8
VSS
AK9
VSS
AL1
VSS
AL11
VSS
AL14
VSS
AL2
VSS
AL21
VSS
AL24
VSS
AL27
VSS
AL3
VSS
AL30
VSS
AL36
VSS
AL4
VSS
AL5
VSS
AM11
VSS
AM14
VSS
AM17
VSS
AM19
VSS
AM24
VSS
AM27
VSS
AM30
VSS
AM31
VSS
AM32
VSS
AM33
VSS
AM34
VSS
AM35
VSS
AM36
VSS
AM37
VSS
AM38
VSS
AM39
VSS
AM40
VSS
AM5
VSS
AN1
VSS
AN10
VSS
AN11
VSS
AN14
VSS
AN16
VSS
AN19
VSS
AN22
VSS
AN23
VSS
AN24
VSS
AN27
VSS
AN30
VSS
AN36
VSS
AN4
VSS
AN5
VSS
AN6
VSS
AN7
VSS
AN8
VSS
AN9
VSS
AP11
VSS
AP14
VSS
AP24
VSS
AP27
VSS
AP30
VSS
AP36
VSS
AP37
VSS
AP40
VSS
AP5
VSS
AR1
VSS
AR11
VSS
AR14
VSS
AR16
VSS
AR17
VSS
AR18
VSS
AR19
VSS
AR2
VSS
AR20
VSS
AR21
VSS
AR24
AR27
AR30
AR31
AR32
AR33
AR34
AR35
AR36
AT10
AT11
AT12
AT13
AT14
AT17
AT24
AT25
AT26
AT27
AT28
AT29
AT30
AT31
AT32
AT34
AT36
AT37
AT38
AT39
AT40
AU25
AU30
AU34
AV26
AV28
AV30
AV34
AV38
AW3
AW30
AW32
AW34
AW36
AW5
AW9
AY27
AY30
AR3
AR4
AR5
AT5
AT6
AT7
AT8
AT9
AU1
AU4
AU5
AU7
AV2
AV5
AV9
AY5
AY7
AY9
B24
B26
B28
B30
B6
C12
C14
C16
C18
C20
C22
C24
C31
C33
C35
CPU1K
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
SKYLAKE-1
SKYLAKE
LGA1151
11 OF 12
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
C37
C5
C8
C10
D24
D26
D28
D30
D37
D39
D4
D7
E11
E13
E15
E17
E19
E21
E23
E3
E31
E33
E35
E37
E6
E9
F1
F10
F22
F26
F28
F30
F4
F40
F7
G11
G13
G15
G17
G19
G22
G3
G31
G33
G6
H1
H21
H24
H26
H28
H30
H35
H37
H39
H4
H7
H9
J10
J12
L11
J16
J18
J20
J3
J32
J34
J6
K1
K14
K15
K17
K19
K22
K24
K26
K28
K30
K33
K35
K37
A A
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
6 107
6 107
1
6 107
-2C
-2C
-2C
5
4
Title
Title
Title
006_CPU_ (VSS)
006_CPU_ (VSS)
006_CPU_ (VSS)
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
COLORADO MLK SKYLAKE-S
COLORADO MLK SKYLAKE-S
COLORADO MLK SKYLAKE-S
Date: Sheet of
Date: Sheet of
3
2
Date: Sheet of
V_CPU_C ORE
V_CPU_G T
V1P0_P CH_S5
V_CPU_S T_PLL
V_CPU_S A
V_CPU_I O
V_SM
DCBATO UT
V_CPU_CORE:VR12.5
D D
VCCSA_ SENSE47
VCCIO_ SENSE48
VSS_SA _IO_SE NSE47,48
VCORE_ VCC_SE N44
VCORE_ VSS_SE N44
VCCGT_ VCC_SE N44
VCCGT_ VSS_SE N44
PCH_2_C PU_TRIGG ER22
CPU_2_P CH_TRIGG ER22
C C
SLP_S4 _N
5
V_CPU_C ORE 9,24,44 ,45
V_CPU_G T 9,44 ,46
V1P0_P CH_S5 15,21,51,9 9
V_CPU_S T_PLL 4,44,99
V_CPU_S A 9,4 7,48
V_CPU_I O 4,5 ,8,9,48,99
V_SM 9,12 ,13,15,50 ,86
DCBATO UT 24,2 6,28,42,4 3,45,46,4 7,48,49,50 ,51,53,55 ,58,59,86 ,88
V_CPU_C ORE
CPU1G
SKYLAKE
A25
VCC_A25
A26
VCC_A26
A27
VCC_A27
A28
VCC_A28
A29
VCC_A29
A30
VCC_A30
B25
VCC_B25
B27
VCC_B27
B29
VCC_B29
B31
VCC_B31
B32
VCC_B32
B33
VCC_B33
B34
VCC_B34
B35
VCC_B35
B36
VCC_B36
B37
VCC_B37
LGA1151
C25
VCC_C25
C26
VCC_C26
C27
VCC_C27
C28
VCC_C28
C29
VCC_C29
C30
VCC_C30
C32
VCC_C32
C34
VCC_C34
C36
VCC_C36
D25
VCC_D25
D27
VCC_D27
D29
VCC_D29
D31
VCC_D31
D32
VCC_D32
D33
VCC_D33
D34
VCC_D34
D35
VCC_D35
D36
VCC_D36
E24
VCC_E24
E25
VCC_E25
E26
VCC_E26
E27
VCC_E27
E28
VCC_E28
E29
VCC_E29
E30
VCC_E30
E32
VCC_E32
E34
VCC_E34
E36
VCC_E36
F23
VCC_F23
F24
VCC_F24
F25
VCC_F25
F27
VCC_F27
F29
VCC_F29
F31
VCC_F31
G30
VCC_G30
G32
VCC_G32
H22
VCC_H22
H23
VCC_H23
H25
VCC_H25
H27
VCC_H27
H29
VCC_H29
H31
VCC_H31
AJ11
VCC_AJ11
AJ13
VCC_AJ13
AJ15
VCC_AJ15
AJ17
VCC_AJ17
AJ19
VCC_AJ19
AJ21
VCC_AJ21
VCC_SENSE
VSS_SENSE
SKYLAKE -1
1 2
(R_)
R79788 49D9R2F
IF power not support 4 4e
+VCCGTX
Wait for SPEC
V_CPU_C ORE
7 OF 12
H32
VCC_H32
J21
VCC_J21
F32
VCC_F32
F33
VCC_F33
F34
VCC_F34
G23
VCC_G23
G24
VCC_G24
G25
VCC_G25
G26
VCC_G26
G27
VCC_G27
G28
VCC_G28
G29
VCC_G29
J22
VCC_J22
J23
VCC_J23
J24
VCC_J24
J25
VCC_J25
J26
VCC_J26
J27
VCC_J27
J28
VCC_J28
J29
VCC_J29
J30
VCC_J30
J31
VCC_J31
K16
VCC_K16
K18
VCC_K18
K20
VCC_K20
K21
VCC_K21
K23
VCC_K23
K25
VCC_K25
K27
VCC_K27
K29
VCC_K29
K31
VCC_K31
L14
VCC_L14
L15
VCC_L15
L16
VCC_L16
L17
VCC_L17
L18
VCC_L18
L19
VCC_L19
L20
VCC_L20
L21
VCC_L21
L22
VCC_L22
L23
VCC_L23
L24
VCC_L24
L25
VCC_L25
L26
VCC_L26
L27
VCC_L27
L28
VCC_L28
L29
VCC_L29
L30
VCC_L30
M13
VCC_M13
M14
VCC_M14
M16
VCC_M16
M18
VCC_M18
M20
VCC_M20
M22
VCC_M22
M24
VCC_M24
M26
VCC_M26
M28
VCC_M28
M30
VCC_M30
AJ12
VCC_AJ12
AJ14
VCC_AJ14
AJ16
VCC_AJ16
AJ18
VCC_AJ18
AJ20
VCC_AJ20
AJ22
VCC_AJ22
VCORE_ VCC_SE N
C38
VCORE_ VSS_SE N
D38
VCORE_ VSS_SE NVCORE_ VCC_SE N
To VR Controller
+VCORE POWER SENSE
V_CPU_G T
07/17 Allen modify
B B
4
SKYLAKE
LGA1151
VCCGT_SENSE
VSSGT_SENSE
VCCGTX_SENSE
VSSGTX_SENSE
VCCGTX_F35
VCCGTX_G34
VCCGTX_G35
VCCGTX_H33
VCCGTX_H34
VCCGTX_J33
VCCGTX_J35
VCCGTX_K32
VCCGTX_K34
VCCGTX_L31
VCCGTX_L33
VCCGTX_M32
8 OF 12
CPU1H
AA34
VCCGT
AA35
VCCGT
AA36
VCCGT
AA37
VCCGT
AA38
VCCGT
AB33
VCCGT
AB34
VCCGT
G36
VCCGT
G37
VCCGT
G38
VCCGT
G39
VCCGT
G40
VCCGT
H36
VCCGT
H38
VCCGT
H40
VCCGT
J36
VCCGT
J37
VCCGT
J38
VCCGT
J39
VCCGT
J40
VCCGT
K36
VCCGT
K38
VCCGT
K40
VCCGT
L34
VCCGT
L35
VCCGT
L36
VCCGT
L37
VCCGT
L38
VCCGT
L39
VCCGT
L40
VCCGT
M33
VCCGT
M34
VCCGT
M36
VCCGT
M38
VCCGT
M40
VCCGT
N34
VCCGT
N35
VCCGT
N36
VCCGT
N37
VCCGT
N38
VCCGT
N39
VCCGT
N40
VCCGT
P33
VCCGT
P34
VCCGT
P36
VCCGT
P38
VCCGT
P40
VCCGT
R34
VCCGT
R35
VCCGT
R36
VCCGT
R37
VCCGT
R38
VCCGT
R39
VCCGT
R40
VCCGT
T33
VCCGT
T34
VCCGT
T36
VCCGT
T38
VCCGT
T40
VCCGT
U34
VCCGT
U35
VCCGT
U36
VCCGT
U37
VCCGT
U38
VCCGT
U39
VCCGT
U40
VCCGT
V33
VCCGT
V34
VCCGT
V36
VCCGT
V38
VCCGT
V40
VCCGT
W34
VCCGT
W35
VCCGT
W36
VCCGT
W37
VCCGT
W38
VCCGT
Y33
VCCGT
Y34
VCCGT
Y36
VCCGT
Y38
VCCGT
SKYLAKE -1
V_CPU_G TX V_SM
F35
G34
08/28 Allen modify
G35
H33
H34
J33
J35
K32
K34
L31
L33
M32
+VCCFUSEPRG HAS NO PWR SOURCE ON CRB
V_CPU_C ORE
R1823
0R2J-2-G P
V_CPU_S T_PLL
R1824 0R040 2-PAD-2-G P
06/24 Allen add
1A015 04/14 Allen modify
VCCGT_ VCC_SE N
F39
VCCGT_ VSS_SE N
F38
VCCGTX _SENSE
F37
VSSGTX _SENSE
F36
1
For 44e
1 2
(R_)
1 2
+VCCFUSE PRG
+VCCFUSE PRG_R
1
1
V_CPU_S A
TP227TPA D28
V_CPU_I O
Jeffrey 0617
V_CPU_S T_PLL
+VCCFUSE PRG
1 2
R1822 0R0603-PAD
SB002 09/29 Allen modify
+VCCGT SENSE PIN
TP228TPAD 28
+VCCGTX SENSE PIN
TP229TPAD 28
CPU1I
AA7
AB6
AB7
AB8
AC7
AC8
N7
P7
R7
T7
U7
Y6
Y7
Y8
W7
V7
AA6
AK11
AK14
AK24
AJ23
M8
P8
T8
U8
W8
V5
V6
V4
SKYLAKE -1
08/28 Allen modify
DCBATO UT
12
R1988
100KR2 J-1-GP
SLP_S4 _N_SFR_ 1
12
R1990
100KR2 J-1-GP
6
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCST_V5
VCCST_V6
VCCPLL
Q1233
2N7002E DW-2-GP
(75.2700 2.F7C)
SKYLAKE
LGA1151
VSSOPC_EOPIO_SENSE
2345
1
3
VDDQ_AT18
VDDQ_AT21
VDDQ_AU13
VDDQ_AU15
VDDQ_AU19
VDDQ_AU23
VDDQ_AV11
VDDQ_AV17
VDDQ_AV21
VDDQ_AW10
VDDQ_AW14
VDDQ_AW25
VDDQ_AY12
VDDQ_AY16
VDDQ_AY18
VDDQ_AY23
VCCPLL_OC
VCCOPC_AJ30
VCCOPC_AJ27
VCCOPC_AJ28
VCCOPC_AJ29
VCCOPC_AK27
VCCEOPIO
VCCEOPIO
VCC_OPC_1P8_AB37
VCC_OPC_1P8_AB38
VCCSA_SENSE
VCCIO_SENSE
VSS_SAIO_SENSE
VCCOPC_SENSE
VCCEOPIO_SENSE
2
9 OF 12
AT18
AT21
AU13
AU15
AU19
AU23
AV11
AV17
AV21
AW10
Note: Place resistors son backside under socket cavity
AW14
AW25
AY12
AY16
AY18
AY23
AJ9
AJ30
AJ27
AJ28
AJ29
AK27
AJ25
AJ26
AB37
AB38
AD5
AF4
AE4
AK21
AJ24
AK22
+VCCPLL _OC_R
R64 0R0402-P AD
OPC_1P 8_AB37
VCCSA_ SENSE
VCCIO_ SENSE
VSS_SA _IO_SE NSE
VCCOPC _SENSE
VCCEOP IO_SENS E
VSS_OP C_EOPI O_SENSE
09/12 Allen modify
For 44e
Have No Pwr Source
1 2
R65
1 2
0R2J-2-G P(R_)
+VCCSA SENSE PIN
+VCCIO SENSE PIN
1
1
1
+VCCPLL _OC
TP250TPA D28
TP249TPA D28
TP248TPA D28
V_SM
1
V_CPU_O PC
1
V_CPU_E OPIO
09/12 Allen modify
08/28 Allen modify
Have No Pwr Source for our
1.2V 1A
For 44e
TP253TPA D28
1
TP251TPA D28
TP226TPAD 28
TO PCH
Have No Pwr Source ON CRB
+OPC_FUS EPRG
1
TP252TPA D28
09/12 Allen modify
08/08 Allen modify
R66 20R2J-3-G P
TP12TPAD28
TP14TPAD28
TP16TPAD28
TP17TPAD28
TP20TPAD28
TP21TPAD28
TP182TPAD28
TP181TPAD28
TP178TPAD28
TP180TPAD28
TP177TPAD28
TP179TPAD28
1 2
TP261TPAD28
TP262TPAD28
SB022 10/06 Allen add
1
1
1
1
1
1
1
1
1
1
1
1
PCH_2_C PU_TRIGG ER
CPU_2_P CH_TRIGG ER_RCPU_2_P CH_TRIGG ER
TP_CPU_ L12
1
TP_CPU_ K12
1
TP_CPU_ J8
TP_CPU_ J7
TP_CPU_ L8
TP_CPU_ K8
TP_CPU_ AV1
TP_CPU_ AW2
TP_CPU_ K10
TP_CPU_ L10
TP_CPU_ J17
TP_CPU_ B39
TP_CPU_ J19
TP_CPU_ C40
J8
J7
L8
K8
AV1
AW2
H8
K10
L10
J17
B39
J19
C40
G8
AY3
D1
B3
L12
K12
CPU1J
RSVD_TP_J8
RSVD_TP_J7
RSVD_TP_L8
RSVD_TP_K8
RSVD_TP_AV1
RSVD_TP_AW2
RSVD_H8
RSVD_K10
RSVD_L10
RSVD_J17
RSVD_B39
RSVD_J19
RSVD_C40
RSVD_G8
RSVD_AY3
PROC_TRIGIN
PROC_TRIGOUT
RSVD_L12
RSVD_K12
SKYLAKE -1
SKYLAKE
LGA1151
1
RSVD_TP_H11
RSVD_TP_H12
RSVD_TP_AW38
RSVD_TP_AV39
RSVD_AU39
RSVD_AU40
VSS_AT15
VSS_AR23
VSS_AR22
RSVD_J15
RSVD_J14
RSVD_AU9
RSVD_AU10
RSVD_J13
RSVD_K13
RSVD_J11
RSVD_D15
RSVD_K11
10 OF 12
TP_CPU_ H11
H11
H12
AW38
AV39
AU39
AU40
AT15
AR23
AR22
J15
J14
AU9
AU10
J13
K13
J11
D15
K11
TP_CPU_ H12
TP_CPU_ AW38
TP_CPU_ AV39
TP_CPU_ AU39
TP_CPU_ AU40
TP_CPU_ J15
TP_CPU_ J14
TP_CPU_ AU9
TP_CPU_ AU10
TP_CPU_ J13
TP_CPU_ K13
TP_CPU_ J11
TP_CPU_ D15
TP_CPU_ K11
12
1
1
1
1
1
1
1
1
1
1
1
1
1
1
(R_)
R1996
560R2J -3-GP
TP13 TPAD28
TP15 TPAD28
TP149 T PAD28
TP19 TPAD28
TP183 T PAD28
TP184 T PAD28
TP185 T PAD28
TP186 T PAD28
TP187 T PAD28
TP188 T PAD28
TP191 T PAD28
TP192 T PAD28
TP189 T PAD28
TP190 T PAD28
09/12 Allen del
V1P0_P CH_S5
DS
Q1234
AO3404 AL-GP
07/07 Allen add
SC032 12/18 Allen modify
12
R152
4K7R2J -2-GP
V1P0_P CH_S5 V_CPU_S T_PLL
1 2
R68 0R3J-L1-G P
(R_)
V_CPU_S T_PLL
12
12
(R_)
(R_)
C12057
C12056
DCBATO UT
12
R1989
47KR2J -2-GP
10KR2J -3-GP
12
R1991
100KR2 J-1-GP
R1992
1 2
SLP_S4 _N_SFR_ GSLP_S4_N_S FR_2
12
C12059
SCD1U50 V3KX-DL -GP
12
(R_)
C12058
SCD1U50 V3KX-DL -GP
G
SLP_S4 _N SLP_S4 _N_SFR
A A
5
4
1 2
R1683 0R040 2-PAD
12
(R_)
C12060
SCD1U50 V3KX-DL -GP
SC10U10V5KX-2DLGP
SCD1U16V2KX-3DLGP
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, S ec.1, Hsin Tai W u Rd., Hsichih,
21F, 88, S ec.1, Hsin Tai W u Rd., Hsichih,
21F, 88, S ec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 22 1, Taiwan, R.O.C.
Taipei Hsien 22 1, Taiwan, R.O.C.
Title
Title
Title
007_CP U_(VCC_C ORE/TP)
007_CP U_(VCC_C ORE/TP)
007_CP U_(VCC_C ORE/TP)
Size Document Numb er Rev
Size Document Numb er Rev
Size Document Numb er Rev
D
D
D
COLORADO MLK SKYLAKE-S
Date: Sheet of
Date: Sheet of
3
2
Date: Sheet of
1
Taipei Hsien 22 1, Taiwan, R.O.C.
7 1 07
7 1 07
7 1 07
-2
-2
-2
5
V_CPU_IO
HDMI PORT B
DDSP_B_TX_DN_056
DDSP_B_TX_DP_056
DDSP_B_TX_DN_156
DDSP_B_TX_DP_156
DDSP_B_TX_DN_256
DDSP_B_TX_DP_256
DDSP_B_TX_DN_356
DDSP_B_TX_DP_356
D D
eDISPLAY PORT E
DPD_LANE0P55
DPD_LANE0N55
DPD_LANE1P55
DPD_LANE1N55
DPD_LANE2P55
DPD_LANE2N55
DPD_LANE3P55
DPD_LANE3N55
DPD_AUXN55
DPD_AUXP55
AUDIO
C C
AUD_AZACPU_SCLK15
AUD_AZACPU_SDO15
AUD_AZACPU_SDI_R15
DISP_UTIL_CPU55
B B
V_CPU_IO 4,5,7,9,48,99
4
PORT B
PORT C
09/10 Allen remove
07/03 Allen remove
In CRB,
DDI1 for DP
DDI2 dor HDMI
DDI3 for DP HDMI combo
DDI4 for eDP
DDSP_B_TX_DP_0
DDSP_B_TX_DN_0
DDSP_B_TX_DP_1
HDMI
DDSP_B_TX_DN_1
DDSP_B_TX_DP_2
DDSP_B_TX_DN_2
DDSP_B_TX_DP_3
DDSP_B_TX_DN_3
C21
D21
D22
E22
B23
A23
C23
D23
B13
C13
B18
A18
D18
E18
C19
D19
D20
E20
A12
B12
B14
A14
C15
B15
B16
A16
C17
B17
B11
C11
3
CPU1D
DDI1_TXP0
DDI1_TXN0
DDI1_TXP1
DDI1_TXN1
DDI1_TXP2
DDI1_TXN2
DDI1_TXP3
DDI1_TXN3
DDI1_AUXP
DDI1_AUXN
DDI2_TXP0
DDI2_TXN0
DDI2_TXP1
DDI2_TXN1
DDI2_TXP2
DDI2_TXN2
DDI2_TXP3
DDI2_TXN3
DDI2_AUXP
DDI2_AUXN
DDI3_TXP0
DDI3_TXN0
DDI3_TXP1
DDI3_TXN1
DDI3_TXP2
DDI3_TXN2
DDI3_TXP3
DDI3_TXN3
DDI3_AUXP
DDI3_AUXN
SKYLAKE-1
SKYLAKE
LGA1151
4 OF 12
EDP_TXP0
EDP_TXN0
EDP_TXP1
EDP_TXN1
EDP_TXN2
EDP_TXP2
EDP_TXN3
EDP_TXP3
EDP_AUXP
EDP_AUXN
EDP_DISP_UTIL
EDP_RCOMP
PROC_AUDIO_CLK
PROC_AUDIO_SDI
PROC_AUDIO_SDO
2
DPD_LANE0P
E10
DPD_LANE0N
D10
DPD_LANE1P
D9
DPD_LANE1N
C9
DPD_LANE2N
H10
DPD_LANE2P
G10
DPD_LANE3N
G9
DPD_LANE3P
F9
D12
E12
D14
M9
DPD_AUXP
DPD_AUXN
Jeffrey 0619
DISP_UTIL_CPU
DP_RCOMP
08/28 Allen modfiy
TO DP LVDS
1 2
R71 24D9R2F-L-GP
Note: Place ra inside cpu cavity
AUD_AZACPU_SCLK
V3
AUD_AZACPU_SDO
V2
AUD_AZACPU_SDI AUD_AZACPU_SDI_R
U1
1 2
R72
20R2F-GP
SB007 09/30 Allen modfiy
eDP
V_CPU_IO
From PCH
TO PCH
1
A A
<Variant Name>
<Variant Name>
<Variant Name>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
8 107
8 107
1
8 107
-2
-2
-2
5
4
Title
Title
Title
008_CPU_(DDI/EDP)
008_CPU_(DDI/EDP)
008_CPU_(DDI/EDP)
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
COLORADO MLK SKYLAKE-S
C
COLORADO MLK SKYLAKE-S
C
COLORADO MLK SKYLAKE-S
C
Date: Sheet of
Date: Sheet of
3
2
Date: Sheet of
V_CPU_C ORE
V_SM
V_CPU_G T
V_CPU_S A
V_CPU_I O
5
V_CPU_C ORE 7,24,44 ,45
V_SM 7,12 ,13,15,50 ,86
V_CPU_G T 7,44 ,46
V_CPU_S A 7,4 7,48
V_CPU_I O 4 ,5,7,8,48,9 9
4
3
2
1
D D
C C
B B
V_CPU_C ORE
PLACE ALL 0805 CAPS ON TOP SIDE OF CPU CAVITY
12
C24
SC22U6D 3V5MX-2DL GP
C16
SC22U6D 3V5MX-2DL GP
12
12
(R_)
C11
SC22U6D 3V5MX-2DL GP
C17
SC22U6D 3V5MX-2DL GP
C12
SC22U6D 3V5MX-2DL GP
12
C18
SC22U6D 3V5MX-2DL GP
PLACE ALL 0805 CAPS ON BOTTOM SIDE NEAR CPU SOCKET
12
12
C28
SC22U6D 3V5MX-2DL GP
C22
SC22U6D 3V5MX-2DL GP
PLACE SIZE 0805 CAPS FOR DIMM
12
12
C41
C42
SC22U6D 3V5MX-2DL GP
SC22U6D 3V5MX-2DL GP
(R_)
(R_)
C48
SC22U6D 3V5MX-2DL GP
PLACE CAPS ON TOP SIDE
SOCKET CAVITY
12
C55
SC22U6D 3V5MX-2DL GP
(R_)
12
C49
SC22U6D 3V5MX-2DL GP
PLACE CAPS ON BACKSIDE
UNDER SOCKET CAVITY
12
C61
SC22U6D 3V5MX-2DL GP
PLACE CAPS AT SOCKET EDGE
6 ON TOP & 6 ON BOTTOM
12
C70
SC22U6D 3V5MX-2DL GP
(R_)
C47
SC22U6D 3V5MX-2DL GP
V_CPU_G T
12
V_CPU_C ORE
12
C27
SC22U6D 3V5MX-2DL GP
V_SM
12
C37
SC22U6D 3V5MX-2DL GP
V_SM
12
12
(R_)
12
12
C23
SC22U6D 3V5MX-2DL GP
12
C43
SC22U6D 3V5MX-2DL GP
12
12
C56
SC22U6D 3V5MX-2DL GP
12
(R_)
12
C13
SC22U6D 3V5MX-2DL GP
(R_)
SC032 12/16 Allen modifySC032 12/16 Allen modifySC032 12/16 Allen modify
12
C19
SC22U6D 3V5MX-2DL GP
(R_)
12
C31
SC22U6D 3V5MX-2DL GP
(R_)
C50
SC22U6D 3V5MX-2DL GP
12
C62
SC22U6D 3V5MX-2DL GP
C71
SC22U6D 3V5MX-2DL GP
12
C14
SC22U6D 3V5MX-2DL GP
12
C20
SC22U6D 3V5MX-2DL GP
12
C44
SC22U6D 3V5MX-2DL GP
(R_)
12
C51
SC22U6D 3V5MX-2DL GP
12
C57
SC22U6D 3V5MX-2DL GP
12
12
C72
SC22U6D 3V5MX-2DL GP
(R_)
(R_)
12
12
C32
SC22U6D 3V5MX-2DL GP
C63
SC22U6D 3V5MX-2DL GP
12
C73
SC22U6D 3V5MX-2DL GP
(R_)
SC032 12/16 Allen modifySC032 12/16 Allen modify
12
C15
SC22U6D 3V5MX-2DL GP
C26
SC22U6D 3V5MX-2DL GP
12
12
C33
SC22U6D 3V5MX-2DL GP
V_SM
PLACE SIZE 0603 CAPS IN SOCKET EDGE TOP
12
12
C38
SC22U6D 3V3MX-1-DL -GP
CRB: 5*22U 0805,4*22U 0603, 5*22U 0805{reserve)
Our: 5*22U 0805,4*22U 0603, 5*22U 0805{reserve)
C58
SC22U6D 3V5MX-2DL GP
12
C64
SC47U6D 3V5MX-1DL -GP
(R_)
12
(R_)
12
C59
SC22U6D 3V5MX-2DL GP
12
C74
SC22U6D 3V5MX-2DL GP
12
PLACE ALL 0603 CAPS ON TOP SIDE OF CPU CAVITY
V_CPU_C ORE
12
12
C4
SC22U6D 3V3MX-1-DL -GP
(R_)
(R_)
V_CPU_C ORE
C5
SC22U6D 3V3MX-1-DL -GP
12
(R_)
PLACE ALL 0805 CAPS AT TOP SOCKET EDGE
(R_)
12
C29
SC22U6D 3V5MX-2DL GP
12
12
C35
C34
SC22U6D 3V5MX-2DL GP
C39
SC22U6D 3V3MX-1-DL -GP
C12444
SC22U6D 3V5MX-2DL GP
12
C75
SC22U6D 3V5MX-2DL GP
(R_)
12
12
(R_)
SC22U6D 3V5MX-2DL GP
C40
SC22U6D 3V3MX-1-DL -GP
C60
SC47U6D 3V5MX-1DL -GP
12
C12445
SC22U6D 3V5MX-2DL GP
12
C76
SC22U6D 3V5MX-2DL GP
(R_)
PLACE CAPS AT SOCKET EDGE
6 ON TOP & 6 ON BOTTOM
C25
SC22U6D 3V5MX-2DL GP
12
C45
SC22U6D 3V3MX-1-DL -GP
PLACE CAPS IN SOCKET EDGE TOP
12
C52
SC47U6D 3V5MX-1DL -GP
(R_)
12
C67
SC47U6D 3V5MX-1DL -GP
(R_)
12
C77
SC22U6D 3V5MX-2DL GP
(R_)
12
C6
SC22U6D 3V3MX-1-DL -GP
(R_)
(R_)
12
C30
SC22U6D 3V5MX-2DL GP
CRB: 27*22U 0805,6*22U 0603
Our:27*22U 0805,6*22U 0603
12
C53
SC47U6D 3V5MX-1DL -GP
(R_)
12
C68
SC47U6D 3V5MX-1DL -GP
(R_)
12
C78
SC22U6D 3V5MX-2DL GP
(R_)
C7
SC22U6D 3V3MX-1-DL -GP
(R_)
12
CRB:1*22U 0603
OUR:1*22U 0603
12
(R_)
12
(R_)
12
(R_)
12
C8
SC22U6D 3V3MX-1-DL -GP
(R_)
C10
SC22U6D 3V5MX-2DL GP
SC032 12/16 Allen modify
C54
SC47U6D 3V5MX-1DL -GP
SC032 12/16 Allen modify
C69
SC47U6D 3V5MX-1DL -GP
C79
SC22U6D 3V5MX-2DL GP
SC032 12/16 Allen modify
12
C9
SC22U6D 3V3MX-1-DL -GP
(R_)
(R_)
C36
SC22U6D 3V5MX-2DL GP
(R_)
12
C21
SC22U6D 3V5MX-2DL GP
12
09/12 Allen del
CRB:18*47U 0805,12*22U 0805
Our:18*47U 0805,12*22U 0805
12
12
C80
C81
SC22U6D 3V5MX-2DL GP
(R_)
SC22U6D 3V5MX-2DL GP
(R_)
SC032 12/16 Allen modify
SC032 12/16 Allen modify
PLACE CAPS AT TOP SOCKET EDGE
A A
V_CPU_G T
2-008
12
C82
SC22U6D 3V5MX-2DL GP
(R_)
CRB:1*22U 0805,1*1U 0402
Our:1*22U 0805,1*1U 0402
5
12
C83
SC1U10V 2KX-1DL GP
12
C84
SC22U6D 3V3MX-1-DL -GP
CRB:2*22U 0603
Our:2*22U 0603
12
C85
SC22U6D 3V3MX-1-DL -GP
4
V_CPU_I OV_CPU_S A
12
C86
SC22U6D 3V5MX-2DL GP
0805 SIZE
12
C87
SC22U6D 3V5MX-2DL GP
12
C88
SC22U6D 3V5MX-2DL GP
12
C89
SC22U6D 3V5MX-2DL GP
3
12
C90
SC22U6D 3V5MX-2DL GP
12
C91
SC22U6D 3V5MX-2DL GP
CRB:1*22U 0805,:5*22U 0603
Our:1*22U 0805,:5*22U 0603
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, S ec.1, Hsin Tai W u Rd., Hsichih,
21F, 88, S ec.1, Hsin Tai W u Rd., Hsichih,
21F, 88, S ec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 22 1, Taiwan, R.O.C.
Taipei Hsien 22 1, Taiwan, R.O.C.
Title
Title
Title
009_CPU_(POWER CAP1)
009_CPU_(POWER CAP1)
009_CPU_(POWER CAP1)
Size Document Numb er Rev
Size Document Numb er Rev
Size Document Numb er Rev
COLORA DO MLK SKYL AKE-S -2
D
COLORA DO MLK SKYL AKE-S -2
D
COLORA DO MLK SKYL AKE-S -2
D
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
1
Taipei Hsien 22 1, Taiwan, R.O.C.
9 1 07
9 1 07
9 1 07
5
For 44e
4
For 44e
3
2
1
For 44e
GTTX
CRB:4*22U 0603,10*47U 0805
D D
C C
V_CPU_OPC
CRB:6*22U 0603
V_CPU_EOPIO
CRB:7*22U 0603
B B
<Variant Name>
<Variant Name>
<Variant Name>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
A A
Title
Title
Title
010_CPU_(POWER CAP2)
010_CPU_(POWER CAP2)
010_CPU_(POWER CAP2)
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A
A
A
COLORADO MLK SKYLAKE-S
COLORADO MLK SKYLAKE-S
COLORADO MLK SKYLAKE-S
Date: Sheet of
Date: Sheet of
5
4
3
Date: Sheet of
2
Taipei Hsien 221, Taiwan, R.O.C.
10 107
10 107
10 107
1
-2
-2
-2
5
D D
C C
4
3
2
1
B B
A A
<Variant Name>
<Variant Name>
<Variant Name>
Title
Title
Title
Size Document Numb er Rev
Size Document Numb er Rev
Size Document Numb er Rev
COLORA DO MLK SKYL AKE-S
D
COLORA DO MLK SKYL AKE-S
D
COLORA DO MLK SKYL AKE-S
D
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
1
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, S ec.1, Hsin Tai W u Rd., Hsichih,
21F, 88, S ec.1, Hsin Tai W u Rd., Hsichih,
21F, 88, S ec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 22 1, Taiwan, R.O.C.
Taipei Hsien 22 1, Taiwan, R.O.C.
Taipei Hsien 22 1, Taiwan, R.O.C.
11 107
11 107
11 107
-2
-2
-2
V_SM
V_SM_VTT
VCC3
DDR DATA
DDR CMD/ADD
D D
DDR CTRL
DDR CLOCK
DDR OTHERS
C C
5
V_SM 7,9,13,15,50,86
V_SM_VTT 13,50
VCC3 13,15,16,17,18,20,21,24,25,26,27,28,31,33,38,41,42,44,47,48,50,53,55,56,58,59,61,62,64,67,68,86,99
M_DATA_A[0..63]3
M_DQS_A_DP[0..7]3
M_DQS_A_DN[0..7]3
M_MAA_A[0..15]3
M_WE_A_N3
M_CAS_A_N3
M_RAS_A_N3
M_SBS_A03
M_SBS_A13
M_SBS_A23
M_SCS_A_N03
M_SCS_A_N13
M_SCKE_A03
M_SCKE_A13
M_ODT_A03
M_ODT_A13
CK_M_DDR0_A_DP3
CK_M_DDR0_A_DN3
CK_M_DDR1_A_DP3
CK_M_DDR1_A_DN3
SMB_DATA_MAIN13,15,55,67,79,99
SMB_CLK_MAIN13,15,55,67,79,99
DDR3_DRAMRST_N13,15
DIMM_DQ_CPU_VREF_A3
DIMM_CA_VREF_A3
Reverse
Connector
H=4mm
DDR3_DRAMRST_N
DIMM1
1
203
CON_SODIMM204_RVS_V1
1 2
0R0402-PAD-2-GP
M_MAA_A0
M_MAA_A1
M_MAA_A2
M_MAA_A3
M_MAA_A4
M_MAA_A5
M_MAA_A6
M_MAA_A7
M_MAA_A8
M_MAA_A9
M_MAA_A10
M_MAA_A11
M_MAA_A12
(R_)
C112
SCD1U10V2KX-5DLGP
2 1
M_MAA_A13
M_MAA_A14
M_MAA_A15
M_SBS_A2
M_SBS_A0
M_SBS_A1
M_DATA_A0
M_DATA_A1
M_DATA_A2
M_DATA_A3
M_DATA_A4
M_DATA_A5
M_DATA_A6
M_DATA_A7
M_DATA_A8
M_DATA_A9
M_DATA_A10
M_DATA_A11
M_DATA_A12
M_DATA_A13
M_DATA_A14
M_DATA_A15
M_DATA_A16
M_DATA_A17
M_DATA_A18
M_DATA_A19
M_DATA_A20
M_DATA_A21
M_DATA_A22
M_DATA_A23
M_DATA_A24
M_DATA_A25
M_DATA_A26
M_DATA_A27
M_DATA_A28
M_DATA_A29
M_DATA_A30
M_DATA_A31
M_DATA_A32
M_DATA_A33
M_DATA_A34
M_DATA_A35
M_DATA_A36
M_DATA_A37
M_DATA_A38
M_DATA_A39
M_DATA_A40
M_DATA_A41
M_DATA_A42
M_DATA_A43
M_DATA_A44
M_DATA_A45
M_DATA_A46
M_DATA_A47
M_DATA_A48
M_DATA_A49
M_DATA_A50
M_DATA_A51
M_DATA_A52
M_DATA_A53
M_DATA_A54
M_DATA_A55
M_DATA_A56
M_DATA_A57
M_DATA_A58
M_DATA_A59
M_DATA_A60
M_DATA_A61
M_DATA_A62
M_DATA_A63
M_DQS_A_DN0
M_DQS_A_DN1
M_DQS_A_DN2
M_DQS_A_DN3
M_DQS_A_DN4
M_DQS_A_DN5
M_DQS_A_DN6
M_DQS_A_DN7
M_DQS_A_DP0
M_DQS_A_DP1
M_DQS_A_DP2
M_DQS_A_DP3
M_DQS_A_DP4
M_DQS_A_DP5
M_DQS_A_DP6
M_DQS_A_DP7
M_ODT_A0
M_ODT_A1
DIMM_CA_VREF_A
DIMM_DQ_R_VREF_A
DDR3_DRAMRST_N_A_1
V_SM_VTT
2
204
R81
DIMM1
98
A0
97
A1
96
A2
95
A3
92
A4
91
A5
90
A6
86
A7
89
A8
85
A9
107
A10/AP
84
A11
83
A12
119
A13
80
A14
78
A15
79
A16/BA2
109
BA0
108
BA1
5
DQ0
7
DQ1
15
DQ2
17
DQ3
4
DQ4
6
DQ5
16
DQ6
18
DQ7
21
DQ8
23
DQ9
33
DQ10
35
DQ11
22
DQ12
24
DQ13
34
DQ14
36
DQ15
39
DQ16
41
DQ17
51
DQ18
53
DQ19
40
DQ20
42
DQ21
50
DQ22
52
DQ23
57
DQ24
59
DQ25
67
DQ26
69
DQ27
56
DQ28
58
DQ29
68
DQ30
70
DQ31
129
DQ32
131
DQ33
141
DQ34
143
DQ35
130
DQ36
132
DQ37
140
DQ38
142
DQ39
147
DQ40
149
DQ41
157
DQ42
159
DQ43
146
DQ44
148
DQ45
158
DQ46
160
DQ47
163
DQ48
165
DQ49
175
DQ50
177
DQ51
164
DQ52
166
DQ53
174
DQ54
176
DQ55
181
DQ56
183
DQ57
191
DQ58
193
DQ59
180
DQ60
182
DQ61
192
DQ62
194
DQ63
10
DQS0#
27
DQS1#
45
DQS2#
62
DQS3#
135
DQS4#
152
DQS5#
169
DQS6#
186
DQS7#
12
DQS0
29
DQS1
47
DQS2
64
DQS3
137
DQS4
154
DQS5
171
DQS6
188
DQS7
116
ODT0
120
ODT1
126
VREF_C A
1
VREF_D Q
30
RESET#
203
VTT1
204
VTT2
DDR3-204P-252-GP-U
(062.10011.00G1)
4
EVENT#
VDDSPD
NC#/TEST
3
NP1
NP1
NP2
NP2
M_RAS_A_N
110
RAS#
M_WE_A_N
113
WE#
M_CAS_A_N
115
CAS#
M_SCS_A_N0
114
CS0#
M_SCS_A_N1
121
CS1#
M_SCKE_A0
73
CKE0
M_SCKE_A1
74
CKE1
CK_M_DDR0_A_DP
101
CK0
CK_M_DDR0_A_DN
103
CK0#
CK_M_DDR1_A_DP
102
CK1
CK_M_DDR1_A_DN
104
CK1#
11
DM0
28
DM1
46
DM2
63
DM3
136
DM4
153
DM5
170
DM6
187
DM7
SMB_DATA_MAIN
200
SDA
SMB_CLK_MAIN
202
SCL
198
199
SA0_DIM0
197
SA0
SA1_DIM0
201
SA1
77
NC#1
122
NC#2
125
75
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VDD10
VDD11
VDD12
VDD13
VDD14
VDD15
VDD16
VDD17
VDD18
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
V_SM
76
81
82
87
88
93
94
99
100
105
106
111
112
117
118
123
124
2
3
8
9
13
14
19
20
25
26
31
32
37
38
43
44
48
49
54
55
60
61
65
66
71
72
127
128
133
134
138
139
144
145
150
151
155
156
161
162
167
168
172
173
178
179
184
185
189
190
195
196
205
206
VCC3
V_SM
12
C92
SCD1U16V2KX-3DLGP
TS#_DIMM0_1 13
SA0_DIM0
SA1_DIM0
V_SM
12
R76
1KR2F-3-GP
DIMM_DQ_R_VREF_A_L
12
R78
1KR2F-3-GP
DIMM_DQ_CPU_VREF_A
DIMM VREF CA A (To DIMM)
V_SM
12
R82
1KR2F-3-GP
12
R84
1KR2F-3-GP
12
12
12
R74
10KR2J-3-GP
C93
SCD1U16V2KX-3DLGP
Thermal EVENT
R73
TS#_DIMM0_1
1 2
10KR2J-3-GP
12
R75
10KR2J-3-GP
C94
SCD1U16V2KX-3DLGP
VCC3
Note:
If SA0 DIM0 = 0, SA1_DIM0 = 0
SO-DIMMA SPD Address is 0xA0
SO-DIMMA TS Address is 0x30
If SA0 DIM0 = 1, SA1_DIM0 = 0
SO-DIMMA SPD Address is 0xA2
SO-DIMMA TS Address is 0x32
DIMM VREF DQ A (To DIMM/CPU)
(R_)
12
C106
SCD1U16V2KX-3DLGP
1 2
R77 0R0402-PAD
R79
1 2
2R2F-GP
C111
SCD022U16V2KX-3DLGP
2 1
DIMM_DQ_CPU_VREF_A_1
12
R80
24D9R2F-L-GP
(R_)
12
C113
SCD1U16V2KX-3DLGP
1 2
R83 0R0402-PAD
12
12
C114
12
12
C96
SCD1U16V2KX-3DLGP
V_SM
12
C100
SCD1U16V2KX-3DLGP
DIMM_DQ_R_VREF_A
C108
SCD1U16V2KX-3DLGP
Joey_SB_0708
12
C97
SC4D7U6D3V3KX-DLGP
12
C101
SC4D7U6D3V3KX-DLGP
V_SM_VTT
VCC3
12
12
C95
SCD1U16V2KX-3DLGP
12
C107
SCD1U16V2KX-3DLGP
DIMM_CA_VREF_ADIMM_CA_VREF_A_L
12
C115
12
C98
SC4D7U6D3V3KX-DLGP
12
(R_)
C104
SCD1U16V2KX-3DLGP
C109
SC4D7U6D3V3KX-DLGP
12
C102
SC4D7U6D3V3KX-DLGP
(R_)
12
C105
SCD1U16V2KX-3DLGP
12
C110
SCD1U16V2KX-3DLGP
C99
SC4D7U6D3V3KX-DLGP
12
C103
SC4D7U6D3V3KX-DLGP
Place Near Power Pin
Net
+VDDQ
+VDDQ
+VDDQ_VTT
2
CAP AMOUNT
1uf 0402 X5R
0.1uf 0402 X5R
0.1uf 0402 X5R 1+VDDQ_VTT
4.7uf 0603 X5R 1
1
4
5
SCD1U16V2KX-3DLGP
B B
A A
5
4
SCD1U16V2KX-3DLGP
<Variant Name>
<Variant Name>
<Variant Name>
Title
Title
Title
012_DDR3_SODIMM1
012_DDR3_SODIMM1
012_DDR3_SODIMM1
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
COLORADO MLK SKYLAKE-S
A1
COLORADO MLK SKYLAKE-S
A1
COLORADO MLK SKYLAKE-S
A1
Date: Sheet of
Date: Sheet of
3
2
Date: Sheet of
1
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
12 107
12 107
12 107
-2
-2
-2
VCC3
V_SM_VTT
V_SM
DDR DATA
D D
DDR CMD/ADD
DDR CTRL
DDR CLOCK
CK_M_DDR0_B_DP3
CK_M_DDR0_B_DN3
CK_M_DDR1_B_DP3
CK_M_DDR1_B_DN3
DDR OTHERS
C C
B B
DDR3_DRAMRST_N12,15
SMB_DATA_MAIN12,15,55,67,79,99
DIMM_DQ_CPU_VREF_B3
5
VCC3 12,15,16,17,18,20,21,24,25,26,27,28,31,33,38,41,42,44,47,48,50,53,55,56,58,59,61,62,64,67,68,86,99
V_SM_VTT 12,50
V_SM 7,9,12,15,50,86
DIMM2
M_DATA_B[0..63]3
M_DQS_B_DP[0..7]3
M_DQS_B_DN[0..7]3
M_MAA_B[0..15]3
M_WE_B_N3
M_CAS_B_N3
M_RAS_B_N3
M_SBS_B03
M_SBS_B13
M_SBS_B23
M_SCS_B_N03
M_SCS_B_N13
M_SCKE_B03
M_SCKE_B13
M_ODT_B03
M_ODT_B13
SMB_CLK_MAIN12,15,55,67,79,99
DIMM_CA_VREF_B3
Reverse
Connector
H=8mm
DDR3_DRAMRST_N
2
1
CON_SODIMM204_RVS_V1
203
204
R92
1 2
0R0402-PAD-2-GP
4
M_MAA_B0
M_MAA_B1
M_MAA_B2
M_MAA_B3
M_MAA_B4
M_MAA_B5
M_MAA_B6
M_MAA_B7
M_MAA_B8
M_MAA_B9
M_MAA_B10
M_MAA_B11
M_MAA_B12
M_MAA_B13 CK_M_DDR0_B_DP
M_MAA_B14
M_MAA_B15
M_SBS_B2
M_SBS_B0
M_SBS_B1
M_DATA_B0
M_DATA_B1
M_DATA_B2
M_DATA_B3
M_DATA_B4
M_DATA_B5
M_DATA_B6
M_DATA_B7
M_DATA_B8
M_DATA_B9
M_DATA_B10
M_DATA_B11
M_DATA_B12
M_DATA_B13
M_DATA_B14
M_DATA_B15
M_DATA_B16
M_DATA_B17
M_DATA_B18
M_DATA_B19
M_DATA_B20
M_DATA_B21
M_DATA_B22
M_DATA_B23
M_DATA_B24
M_DATA_B25
M_DATA_B26
M_DATA_B27
M_DATA_B28
M_DATA_B29
M_DATA_B30
M_DATA_B31
M_DATA_B32
M_DATA_B33
M_DATA_B34
M_DATA_B35
M_DATA_B36
M_DATA_B37
M_DATA_B38
M_DATA_B39
M_DATA_B40
M_DATA_B41
M_DATA_B42
M_DATA_B43
M_DATA_B44
M_DATA_B45
M_DATA_B46
M_DATA_B47
M_DATA_B48
M_DATA_B49
M_DATA_B50
M_DATA_B51
M_DATA_B52
M_DATA_B53
M_DATA_B54
M_DATA_B55
M_DATA_B56
M_DATA_B57
M_DATA_B58
M_DATA_B59
M_DATA_B60
M_DATA_B61
M_DATA_B62
M_DATA_B63
M_DQS_B_DN0
M_DQS_B_DN1
M_DQS_B_DN2
M_DQS_B_DN3
M_DQS_B_DN4
M_DQS_B_DN5
M_DQS_B_DN6
M_DQS_B_DN7
M_DQS_B_DP0
M_DQS_B_DP1
M_DQS_B_DP2
M_DQS_B_DP3
M_DQS_B_DP4
M_DQS_B_DP5
M_DQS_B_DP6
M_DQS_B_DP7
M_ODT_B0
M_ODT_B1
DIMM_CA_VREF_B
DIMM_DQ_R_VREF_B
DDR3_DRAMRST_N_B_1
(R_)
V_SM_VTT
C136
SCD1U10V2KX-5DLGP
2 1
Joey_SA_0415
DIMM2
98
A0
97
A1
96
A2
95
A3
92
A4
91
A5
90
A6
86
A7
89
A8
85
A9
107
A10/AP
84
A11
83
A12
119
A13
80
A14
78
A15
79
A16/BA2
109
BA0
108
BA1
5
DQ0
7
DQ1
15
DQ2
17
DQ3
4
DQ4
6
DQ5
16
DQ6
18
DQ7
21
DQ8
23
DQ9
33
DQ10
35
DQ11
22
DQ12
24
DQ13
34
DQ14
36
DQ15
39
DQ16
41
DQ17
51
DQ18
53
DQ19
40
DQ20
42
DQ21
50
DQ22
52
DQ23
57
DQ24
59
DQ25
67
DQ26
69
DQ27
56
DQ28
58
DQ29
68
DQ30
70
DQ31
129
DQ32
131
DQ33
141
DQ34
143
DQ35
130
DQ36
132
DQ37
140
DQ38
142
DQ39
147
DQ40
149
DQ41
157
DQ42
159
DQ43
146
DQ44
148
DQ45
158
DQ46
160
DQ47
163
DQ48
165
DQ49
175
DQ50
177
DQ51
164
DQ52
166
DQ53
174
DQ54
176
DQ55
181
DQ56
183
DQ57
191
DQ58
193
DQ59
180
DQ60
182
DQ61
192
DQ62
194
DQ63
10
DQS0#
27
DQS1#
45
DQS2#
62
DQS3#
135
DQS4#
152
DQS5#
169
DQS6#
186
DQS7#
12
DQS0
29
DQS1
47
DQS2
64
DQS3
137
DQS4
154
DQS5
171
DQS6
188
DQS7
116
ODT0
120
ODT1
126
VREF_CA
1
VREF_DQ
30
RESET#
203
VTT1
204
VTT2
DDR3-204P-278-GP
(062.10011.00F1)
VDDSPD
NC#/TEST
SKT_DDR 204P SMD
RAS#
WE#
CAS#
CS0#
CS1#
CKE0
CKE1
CK0#
CK1#
DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7
SDA
EVENT#
NC#1
NC#2
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VDD10
VDD11
VDD12
VDD13
VDD14
VDD15
VDD16
VDD17
VDD18
NP1
NP2
CK0
CK1
SCL
SA0
SA1
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
NP1
NP2
110
113
115
114
121
73
74
101
103
102
104
11
28
46
63
136
153
170
187
200
202
198
199
197
201
77
122
125
75
76
81
82
87
88
93
94
99
100
105
106
111
112
117
118
123
124
2
3
8
9
13
14
19
20
25
26
31
32
37
38
43
44
48
49
54
55
60
61
65
66
71
72
127
128
133
134
138
139
144
145
150
151
155
156
161
162
167
168
172
173
178
179
184
185
189
190
195
196
205
206
M_RAS_B_N
M_WE_B_N
M_CAS_B_N
M_SCS_B_N0
M_SCS_B_N1
M_SCKE_B0
M_SCKE_B1
CK_M_DDR0_B_DN
CK_M_DDR1_B_DP
CK_M_DDR1_B_DN
SMB_DATA_MAIN
SMB_CLK_MAIN
SA0_DIM1
SA1_DIM1
VCC3
V_SM
3
V_SM
12
TS#_DIMM0_1 12
DIMM_DQ_CPU_VREF_B
C116
SCD1U16V2KX-3DLGP
12
C117
SCD1U16V2KX-3DLGP
TS#_DIMM0_1(EVENT#)must be connected to EC.(PH)
VCC3
12
R85
10KR2J-3-GP
SA1_DIM1
SA0_DIM1
12
R86
10KR2J-3-GP
Note:
SO-DIMMB SPD Address is 0xA4
SO-DIMMB TS Address is 0x34
DIMM VREF DQ B (To DIMM/CPU)
V_SM
V_SM
12
12
V_SM
R87
1KR2F-3-GP
R89
1KR2F-3-GP
12
(R_)
12
C132
SCD1U16V2KX-3DLGP
DIMM_DQ_VREF_B
1 2
R88 0R0402-PAD
1 2
2R2F-GP
C135
SCD022U16V2KX-3DLGP
2 1
DIMM_DQ_CPU_VREF_B_1
12
R91
24D9R2F-L-GP
DIMM VREF CA B (To DIMM)
R93
1KR2F-3-GP
V_SM
(R_)
12
C12148
SCD1U16V2KX-3DLGP
2
12
R90
12
C118
SCD1U16V2KX-3DLGP
12
C119
12
SCD1U16V2KX-3DLGP
C133
SCD1U16V2KX-3DLGP
C120
DIMM_DQ_R_VREF_B
12
C134
SCD1U16V2KX-3DLGP
12
SCD1U16V2KX-3DLGP
V_SM
12
C124
SCD1U16V2KX-3DLGP
12
C121
SC4D7U6D3V3KX-DLGP
12
C125
SC4D7U6D3V3KX-DLGP
VCC3
(R_)
12
C128
SCD1U16V2KX-3DLGP
V_SM_VTT
12
C130
SC4D7U6D3V3KX-DLGP
C122
SC4D7U6D3V3KX-DLGP
(R_)
12
C129
12
C126
SC4D7U6D3V3KX-DLGP
SCD1U16V2KX-3DLGP
12
C131
SCD1U16V2KX-3DLGP
1
12
C123
SC4D7U6D3V3KX-DLGP
12
C127
SC4D7U6D3V3KX-DLGP
A A
5
4
3
DIMM_CA_VREF_B_L
12
R95
1KR2F-3-GP
1 2
R94 0R0402-PAD
DIMM_CA_VREF_B
12
12
C139
C138
SCD1U16V2KX-3DLGP
2
SCD1U16V2KX-3DLGP
Joey_SB_0708
<Variant Name>
<Variant Name>
<Variant Name>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
013_DDR3_SODIMM2
013_DDR3_SODIMM2
013_DDR3_SODIMM2
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
COLORADO MLK SKYLAKE-S
C
COLORADO MLK SKYLAKE-S
C
COLORADO MLK SKYLAKE-S
C
Date: Sheet of
Date: Sheet of
Date: Sheet of
Taipei Hsien 221, Taiwan, R.O.C.
13 107
13 107
1
13 107
-2
-2
-2
5
D D
C C
4
3
2
1
Blanking
B B
Wistron Corporation
Wistron Corporation
A A
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
COLORADO MLK SKYLAKE-S
COLORADO MLK SKYLAKE-S
COLORADO MLK SKYLAKE-S
Date: Sheet of
Date: Sheet of
5
4
3
Date: Sheet of
2
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
-2A4
-2A4
14 107
14 107
14 107
1
-2A4
For Main SMBus
(84.2N702.J31)
PWRGD_3V
09/10 Allen modify
2N7002H-GP
5
SB5V VCC
12
PWRGD_3V_B
Q3
G
S D
R117
8K2R2J-3-GP
V_5P0_A
12
C
B
E
V_5P0_A 27,42,49,51
Ioslate
R118
8K2R2J-3-GP
DS
Q1
DMN5L06K-7-GP
G
(84.T3904.H11)
G
12
C147
SCD1U25V2KX-1-DL-GP
CLEAN CMOS
V_3P0_BAT_VREG
Debug Only
V_3P0_BAT_VREG
(84.05067.031)
DS
Q4
DMN5L06K-7-GP
(84.05067.031)
1 2
R138 20KR2F-L-GP
1 2
R146 20KR2F-L-GP
PWRGD_3V_C
Q2
MMBT3904-5-GP
ME ENABLE/DISABLE
need default high GPIO
R1836
ME_CNTL
1KR2J-1-GP
AUD_LINK_SDO_R
SB3V
R1837 1KR2J-1-GP
R1838 1KR2J-1-GP
12
06/25 Allen modify
1 2
1 2
SMB_DATA_RESUME
SMB_DATA_MAIN
SMB_CLK_MAIN
12
C12149
SC1U10V2KX-1DLGP
12
C12150
SC1U10V2KX-1DLGP
ME_CNTL1
SMB_CLK_RESUME
B
12
SB3V
R140
0R2J-2-GP
(R_)
12
ME_CNTL2
E
C
MMBT3906-4-GP
Q5
SMB_CLK_RESUME
SMB_DATA_RESUME
VCC3
12
R124
1KR2J-1-GP
VCC3
12
R133
1KR2J-1-GP
R150
0R0402-PAD-2-GP
(84.T3906.E11)
R153
1KR2J-1-GP
07/07 Allen modify
07/07 Allen modify
PCH_RTCRST_PULLUP
PCH_RTCRST_DOWN
12
R141
4K7R2J-2-GP
PCH_SRTCRSTB_PULLUP
12
R147
4K7R2J-2-GP
(R_)
AUD_LINK_SDO_R1
12
SB3V
L
H
SPI ROM
With Jumper
Without Jumper
NORMAL(DEFAULT)
Disable
SB5V
SB3V
VCC
VCC3
V_3P0_BAT_VREG
V_3P3_A
V1P0_PCH_S5
V_SM
SPI ROM
D D
HD LINK
C C
SB5V 24,42,44,47,48,50,64,68
SB3V 4,17,18,20,21,24,25,31,35,38,40,42,47,48,51,53,55,56,57,58,59,61,64,86
VCC 24,26,27,41,42,44,45,46,55,56,57,58,60,64,67,68,86,88
VCC3 12,13,16,17,18,20,21,24,25,26,27,28,31,33,38,41,42,44,47,48,50,53,55,56,58,59,61,62,64,67,68,86,99
V_3P0_BAT_VREG 21,25,29
V_3P3_A 21,24,25,28,29,42,43,49,64,99
V1P0_PCH_S5 7,21,51,99
V_SM 7,9,12,13,50,86
SPI_MISO20,25
SPI_MOSI20,25,99
SPI_CLK25
SPI_CS0_N25
SPI_IO220,25,99
SPI_IO320,25
SIO
PM_PWRBTN_N24
PWRBTN_N24,64,99
FP_RST_N99
PLTRST_N24
ITP_PMODE99
H_PWRGD4,99
RSMRST_N24,99
AUD_LINK_BCLK27
AUD_LINK_RST_N27,29
AUD_LINK_SDIN27
AUD_LINK_SDO20,27
AUD_LINK_SYNC27
AUD_LINK_SDO_R15
PCH strap
SMBALERT#20,61
SML0ALERT#20
AUD_LINK_SDO_R15
TP_GPP_H_1220
PCH_HOT#20
AUD_AZACPU_SDO8
AUD_AZACPU_SDI_R8
AUD_AZACPU_SCLK8
SUS_PWR_ACK24
SUS_WARNB24
PCH_DPWROK24
SLP_SUSB24,42,51
PWRGD_3V24,99
PCH_PWROK40
DDR3_DRAMRST_N12,13
WAKE_N31,61
SLP_S3_N24,35,40,42,48,50,53,55,99
SLP_S4_N7,24,35,42,50,99
SLP_S5_N24
PCH_SLP_A_N99
LPC_PME#24,55
H_TCK4,99
SD_WAKE#_IC33
SCALAR_ACK55
OSD_CONTROL_SEL55
SPKR20,27
SUSCLK_NGFF61
PANEL_OFF55
PCH_SYSPWROK40
LAN_DISABLE_N31
SLP_WLAN_N61
PCH_JTAG_TCK99
PCH_JTAG_TMS4
PCH_JTAG_TDO4
PCH_JTAG_TDI4
SMB_CLK_RESUME61
SMB_DATA_RESUME61
SMB_CLK_MAIN12,13,55,67,79,99
SMB_DATA_MAIN12,13,55,67,79,99
CHAR_EN35
PCH_CHAR_CTL335
ME_CNTL24
To Codec
MEJ1
2
1
JOWLE-CON2-5-GP
(21.62874.102)
To CPU
Debug Use
PIN-CON2-S-GP
BTRST1
2
1
PIN-CON2-S-GP
AUD_LINK_BCLK
AUD_LINK_RST_N
AUD_LINK_SDO
AUD_LINK_SYNC
AUD_AZACPU_SDO
AUD_AZACPU_SCLK
SMB_CLK_RESUME
SMB_DATA_RESUME
Clear CMOS
Normal Mode
2-004
2-009
4
R107 33R2J-2-GP
R108 33R2J-2-GP
R109 33R2J-2-GP
R111 33R2J-2-GP
(X_)
DB1
1
2
2-004
2-009
LPC_PME#
06/24 Allen add
09/03 Allen add
1 2
1 2
TP60 TPAD28
1 2
1 2
TP63 TPAD28
TP64 TPAD28
1 2
R106 33R2J-2-GP
1 2
R113 33R2J-2-GP
(R_)
12
C145
SC1U10V2KX-1DLGP
1 2
R79796 0R2J-2-GP
(R_)
TPAD28
TPAD28
TPAD28
TPAD28
TPAD28
TPAD28
TPAD28
TP52 TPAD28
TP54 TPAD28
TP56 TPAD28
TO XDP
Squence check
Straping
Straping
(R_)
12
C146
To SuperIO
To SuperIO
06/25 Need to check
SC1U10V2KX-1DLGP
1
TP150
1
TP151
1
TP152
1
TP153
1
TP34
1
TP36
1
TP220
Jeffrey 0622
OSD_CONTROL_SEL
SCALAR_ACK
PANEL_OFF
TP_GPP_D_2
1
TP_GPP_D_22
1
TP_GPP_D_21
1
AUD_LINK_BCLK_R
AUD_LINK_RST_R_N
AUD_LINK_SDIN
TP_SDI
1
AUD_LINK_SDO_R
AUD_LINK_SYNC_R
TP_BD1
1
TP_BE2
1
AUD_AZACPU_SDO_R
AUD_AZACPU_SDI_R
AUD_AZACPU_SCLK_R
I2C Interface
CRB to M2 card
DMIC Interface
PCH_RTCRST_PULLUP
PCH_SRTCRSTB_PULLUP
PCH_PWROK
RSMRST_N
PCH_DPWROK
SMBALERT#
SML0ALERT#
SMLINK0_CLK
SMLINK0_DATA
PCH_HOT#
SMLICLK_PCH
SMLIDATA_PCH
07/01 Allen modify
PWRBTN_N
From Power BtM
PME_N
RSVD_AG15
RSVD_AG14
RSVD_AF17
RSVD_AE17
TP_FPC_VREF
TP_FPF_MON
SPI_MOSI
SPI_MISO
SPI_CS0_N
SPI_CLK
SPI_CS1_N
SPI_IO2
SPI_IO3
R139
0R2J-2-GP
2-004
2-009
TO TPM
1 2
BD17
AG15
AG14
AF17
AE17
AR19
AN17
BB29
BE30
BD31
BC31
AW31
BC29
BD30
AT31
AN36
AL39
AN41
AN38
AH43
AG44
U2D
BA9
HDA_BCLK
BD8
HDA_RST#
BE7
HDA_SDI0
BC8
HDA_SDI1
BB7
HDA_SDO
BD9
HDA_SYNC
BD1
RSVD_BD1
BE2
RSVD_BE2
AM1
DISPA_SDO
AN2
DISPA_SDI
AM2
DISPA_BCLK
AL42
GPP_D8/SSP0_SCLK
AN42
GPP_D7/SSP0_RXD
AM43
GPP_D6/SSP0_TXD
AJ33
GPP_D5/SSP0_SFRM
AH44
GPP_D20/DMIC_DATA0
AJ35
GPP_D19/DMIC_CLK0
AJ38
GPP_D18/DMIC_DATA1
AJ42
GPP_D17/DMIC_CLK1
BC10
RTCRST#
BB10
SRTCRST#
AW11
PCH_PWROK
BA11
RSMRST#
AV11
DSW_PWROK
BB41
GPP_C2/SMBALERT#
AW44
GPP_C0/SMBCLK
BB43
GPP_C1/SMBDATA
BA40
GPP_C5/SML0ALERT#
AY44
GPP_C3/SML0CLK
BB39
GPP_C4/SML0DATA
AT27
GPP_B23/SML1ALERT#/PCHHOT#
AW42
GPP_C6/SML1CLK
AW45
GPP_C7/SML1DATA
SUNRISE-1-GP
(HJ1YP)
(R_)
U2A
GPP_A11/PME#
RSVD_AG15
RSVD_AG14
RSVD_AF17
RSVD_AE17
TP5
TP4
SPI0_MOSI
SPI0_MISO
SPI0_CS0#
SPI0_CLK
SPI0_CS1#
SPI0_IO2
SPI0_IO3
SPI0_CS2#
GPP_D1/SPI1_CLK
GPP_D0/SPI1_CS#
GPP_D3/SPI1_MOSI
GPP_D2/SPI1_MISO
GPP_D22/SPI1_IO3
GPP_D21/SPI1_IO2
SUNRISE-1-GP
(HJ1YP)
AUDIO
1 2
R142 0R0402-PAD
1 OF 12
GPP_B13/PLTRST#
SPL PCH-H
GPP_G16/GSXCLK
GPP_G12/GSXDOUT
GPP_G13/GSXSLOAD
GPP_G14/GSXDIN
GPP_G15/GSXSRESET#
GPP_E3/CPU_GP0
GPP_E7/CPU_GP1
GPP_B3/CPU_GP2
GPP_B4/CPU_GP3
GPP_H18/SML4ALERT#
GPP_H17/SML4DATA
GPP_H16/SML4CLK
GPP_H15/SML3ALERT#
GPP_H14/SML3DATA
GPP_H13/SML3CLK
GPP_H12/SML2ALERT#
GPP_H11/SML2DATA
GPP_H10/SML2CLK
INTRUDER#
GPP_A12/BMBUSY#/ISH_GP6/SX_EXIT_HOLDOFF#
SPL PCH-H
GPP_A13/SUSWARN#/SUSPWRDNACK
SMBUS
JTAG
SW_ON_N
1 2
C149
SC1U10V2KX-1DLGP
PM_PWRBTN_N
1 2
C151
SC1U10V2KX-1DLGP
PLTRST_N_CPU
BB27
P43
R39
R36
R42
R41
AF41
AE44
BC23
BD24
BC36
BE34
BD39
BB36
BA35
BC35
BD35
AW35
BD34
BE11
GPP_A8/CLKRUN#
GPD11/LANPHYPC
GPD9/SLP_WLAN#
DRAM_RESET#
GPP_B2/VRALERT#
GPP_G17/ADR_COMPLETE
SYS_PWROK
GPD6/SLP_A#
SLP_LAN#
GPP_B12/SLP_S0#
GPD4/SLP_S3#
GPD5/SLP_S4#
GPD10/SLP_S5#
GPD8/SUSCLK
GPD0/BATLOW#
GPP_A15/SUSACK#
GPD2/LAN_WAKE#
GPD1/ACPRESENT
SLP_SUS#
GPD3/PWRBTN#
SYS_RESET#
GPP_B14/SPKR
PROCPWRGD
ITP_PMODE
JTAG_TMS
JTAG_TDO
JTAG_TDI
JTAG_TCK
(R_)
07/02 Allen add
1 2
R1982 30R2J-1-GP
CHAR_EN
TP_GPP_G_12
TP_GPP_G_13
TP_GPP_G_14
PCH_CHAR_CTL3
GPP_E3
SD_WAKE#
R79862 0R0402-PAD-2-GP
TP_GPP_B4
1A021 04/21 Allen modify
TP_GPP_H_18
TP_GPP_H_17
TP_GPP_H_16
TP_GPP_H_15
TP_GPP_H_14
TP_GPP_H_13
TP_GPP_H_12
TP_GPP_H_11
TP_GPP_H_10
PCH_INTRUDER_N
06/25 Allen modify
4 OF 12
BB17
AW22
AR15
AV13
BC14
BD23
AL27
GPP_B1
AR27
GPP_B0
N44
AN24
GPP_B11
AY1
BC13
WAKE#
BC15
AV15
BC26
AW15
BD15
BA13
AN15
BD13
BB19
BD19
BD11
BB15
BB13
AT13
AW1
BD26
AM3
AT2
AR3
JTAGX
AR2
AP1
AP2
AN3
TO PCH
TO SIO
3
PLTRST_N
1
TP31TPAD28
1
TP32TPAD28
1
TP33TPAD28
SD_WAKE#_IC
1 2
08/05 Allen modify
1
TP41TPAD28
1
TP154TPAD28
1
TP155TPAD28
1
TP44TPAD28
1
TP45TPAD28
1
TP47TPAD28
1
TP49TPAD28
1
TP51TPAD28
1
TP53TPAD28
1
TP55TPAD28
TP_GPP_A_12
1
TP_GPP_A_8
LAN_DISABLE_N
SLP_WLAN_N
DDR3_DRAMRST_N
VRALERTB_PU
TP_GPP_B_1
1
TP_GPP_B_0
1
TP_GPP_G_17
1
TP_GPP_B_11
1
PCH_SYSPWROK
PCH_WAKE_N
R115 0R0402-PAD
PCH_SLP_A_N
1
TP_SLP_LAN_N
1
PCH_SLP_S0_N
1
SLP_S3_N
SLP_S4_N
SLP_S5_N
SUSCLK
BATLOW_N
SUS_PWR_ACK
SUS_WARNB
LANWAKE_SMC_WAKE_SCI_N
SLP_SUSB
SW_ON_N
FP_RST_N
SPKR
H_PWRGD_CPU
R126 0R2J-2-GP(R_)
R127 1KR2J-1-GP(R_)
ACPRESENT
Sequence check needed, SLP_SUS controls the Power stand by, and PCH power
R1981 30R2J-1-GP
ITP_PMODE
PCH_JTAGX
PCH_JTAG_TMS
R131 0R0402-PAD-2-GP
PCH_JTAG_TDO
to PCH XDP
PCH_JTAG_TDI
PCH_JTAG_TCK
06/25 Allen del
Clock Buffer
Need Check Sequence
GPIO TBD
THERMAL MANAGEMENT SIGNAL
GPIO TBD
TP58TPAD28
this Pin for LAN Chip
Control NGFF WLAN Power
1 2
C143
SCD1U16V2KX-3DLGP
TP61TPAD28
TP62TPAD28
TP65TPAD28
TP66TPAD28
WAKE_N
1 2
to APS CONNECTOR
TP67TPAD28
this Pin for control Intel LAN Power
TP68TPAD28
this Pin for Debuging
TP69TPAD28
1 2
1 2
In Tigris,Pass word clear jumper
H_PWRGD
1 2
07/02 Allen add
H_TCK
1 2
1A015 04/14 Allen modify
SUSCLK
To DIMM
PCH_WAKE_N to all wake up device needed
PCIeX16 PCIeX1 M2
this Pin to SIO
to CPU
SC022 12/01 Allen add
1 2
R145 33R2J-2-GP
OSD_CONTROL_SEL
SCALAR_ACK
PANEL_OFF
VRALERTB_PU
SMLINK0_CLK
SMLINK0_DATA
SMLICLK_PCH
SMLIDATA_PCH
PME_N
06/25 Allen add
PCH_INTRUDER_N
PCH_WAKE_N
BATLOW_N
LANWAKE_SMC_WAKE_SCI_N
SW_ON_N
LAN_DISABLE_N
SLP_WLAN_N
ACPRESENT
FP_RST_N
TP_GPP_A_8
GPP_E3
PCH_JTAGX
1A020 04/20 Allen modify
PCH_JTAG_TDO
PCH_JTAG_TDI
PCH_JTAG_TMS
07/01 Allen modify
TP_GPP_G_12
TP_GPP_G_14
PCH_DPWROK
PCH_DPWROK
RSMRST_N
SUSCLK
PCH_JTAG_TCK
1A016 04/14 Allen modify
DDR3_DRAMRST_N
SUSCLK_NGFF
R79939 10KR2J-3-GP
R79940 1KR2J-1-GP
R79941 1KR2J-1-GP
R103 10KR2J-3-GP
R104 499R2F-2-GP
1 2
C140
(R_)
SC100P50V2JN-3DLGP
R105 499R2F-2-GP
1 2
C141
(R_)
SC100P50V2JN-3DLGP
R79740 1KR2J-1-GP
1 2
C142
(R_)
SC100P50V2JN-3DLGP
R79741 1KR2J-1-GP
1 2
C144
(R_)
SC100P50V2JN-3DLGP
R96 10KR2J-3-GP
R79780 1KR2J-1-GP
R116 10KR2J-3-GP
R119 4K7R2J-2-GP
R120 3KR2J-2-GP
R122 10KR2J-3-GP
R123 10KR2J-3-GP
R876 10KR2J-3-GP
R128 2K2R2J-2-GP
R79766 8K2R2J-3-GP
R79767 8K2R2J-3-GP
R79779 1KR2J-1-GP
(R_)
R132 51R2F-2-GP
(R_)
R1841 51R2F-2-GP
(R_)
R1842 51R2F-2-GP
(R_)
R99 1KR2J-1-GP
R100 1KR2J-1-GP
C12052 SCD01U16V2KX-3DLGP
(R_)
R79773 100KR2F-L1-GP
R1994 47KR2J-2-GP
R137 1K5R2J-3-GP
(R_)
R79768 51R2F-2-GP
(R_)
R925 470R2F-GP
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
R1835
1MR2J-1-GP
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
2
VCC3
1
09/03 Allen add
SB3V
07/08 Allen modify
12
V_3P0_BAT_VREG
12
V_3P3_A
07/15 Allen modify
06/25 Allen modify
VCC3
V1P0_PCH_S5
07/14 Allen add
07/07 Allen modify
SB041 10/13 Allen modify
V_SM
CRB HAVE DELAY TIME
Defensive Design
PWRGD_3V PCH_SYSPWROK
R155 0R0402-PAD
B B
1 2
08/18 Allen modfiy
for BOM
1 2
R79943 0R2J-2-GP
(R_)
09/10 Allen modify
VCC3
R154
1KR2J-1-GP
1 2
DEFENSIVE DESIGN
(R_)
12
C156
SCD1U16V2KX-3DLGP
EV FOR FUTURE ENGINEERING
DEBUG ONLY
PCH_PWROK
DB2
1
Debug Use
2
PIN-CON2-S-GP
(X_)
SC030 12/10 Allen add for abnormal shutdown
R80220
5K6R2F-2-GP
1 2
V_5P0_A
R80219
10KR2F-2-GP
1 2
(R_)
12
V_5P0_A
1A015 04/14 Allen modify
RSMRST_N
C
B
Q9635
MMBT3904-4-GP
E
(84.T3904.H11)
R80221
10KR2F-2-GP
1 2
SLP_SUSB_C RSMRST_N_B
1 2
R80222 0R0402-PAD-2-GP
SLP_SUSB_RSLP_SUSB
R80218
1K8R2-GP
C
B
Q9634
MMBT3904-4-GP
E
(84.T3904.H11)
A A
<Variant Name>
<Variant Name>
<Variant Name>
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
1
Wistron Corpor ation
Wistron Corpor ation
Wistron Corpor ation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
015_PCH(SPI/SMBUS/Audio/JTAG)
015_PCH(SPI/SMBUS/Audio/JTAG)
015_PCH(SPI/SMBUS/Audio/JTAG)
COLORADO MLK SKYLAKE-S
E
COLORADO MLK SKYLAKE-S
E
COLORADO MLK SKYLAKE-S
E
15 107
15 107
15 107
-2
-2
-2
+V1P0A_ VCCF24 _1P0
VCC3
5
+V1P0A_ VCCF24 _1P0 2 1
VCC3 12,13,15,1 7,18,20,2 1,24,25,26 ,27,28,31 ,33,38,41 ,42,44,47 ,48,50,53 ,55,56,58 ,59,61,62,6 4,67,68,8 6,99
4
3
2
1
Jeffrey 0619
To SIO
TP_CK_ 48M_SIO
1
PCH_SRC CLKREQ 0_N3 3
PCH_SRC CLKREQ 1_N6 1
PCH_SRC CLKREQ 2_N3 1
D D
Need to check Intel
CLKOUT_ PCIE1N61
CLKOUT_ PCIE1P6 1
CK_GLA N_DN31
CK_GLA N_DP31
CLKOUT_ PCIE4N33
CLKOUT_ PCIE4P3 3
CK_100 M_CPU_XDP _DN99
CK_100 M_CPU_XDP _DP99
PCH_CPU_ PCIBCLK _DN4
PCH_CPU_ PCIBCLK _DP4
PCH_CPU_ NSSC_CLK _DP4
PCH_CPU_ NSSC_CLK _DN4
PCH_CPU_ BCLK_DP4
PCH_CPU_ BCLK_DN4
CK_PE_ 100M_16 PORT_DN76
CK_PE_ 100M_16 PORT_DP76
CARDREADER
NGFF REQ
LAN REQ
NGFF REQ
The 10-kΩ pull-up should be on the rail
that the corresponding
SRCCLKRQ[15:0] pin resides in.
PCI Express devices or add-in cards
that do NOT support clock req uest
should terminate the SRCCLKRQ[ 15:0]# pins
on the PCH
with 10 kΩ ±10% external pull- up
resistor.
TP163 TPAD2 8
FROM CPU
+V1P0A_ VCCF24 _1P0
CRB 2.71K ,PDG 2.7K
PCH_SRC CLKREQ 1_N
PCH_SRC CLKREQ 2_N
PCH_CPU_ NSSC_CLK _DP
PCH_CPU_ NSSC_CLK _DN
1 2
R159
2K7R2F -GP
1 2
1 2
1 2
PCH_CPU_ BCLK_DP
PCH_CPU_ BCLK_DN
XTAL_2 4M_PCH_OUT
XTAL_2 4M_PCH_I N
XCLK_R BIAS
PCH_RTC X1
PCH_RTC X2
PCH_SRC CLKREQ 0PCH_SRC CLKREQ 0_N
R1630R0402 -PAD
PCH_SRC CLKREQ 1
R1640R0402 -PAD
PCH_SRC CLKREQ 2
R1660R0402 -PAD
PCH_SRC CLKREQ 3
PCH_SRC CLKREQ 4
PCH_SRC CLKREQ 5
PCH_SRC CLKREQ 6
PCH_SRC CLKREQ 7
PCH_SRC CLKREQ 8
PCH_SRC CLKREQ 9
PCH_SRC CLKREQ 10
PCH_SRC CLKREQ 11
PCH_SRC CLKREQ 12
PCH_SRC CLKREQ 13
PCH_SRC CLKREQ 14
PCH_SRC CLKREQ 15
AR17
GPP_A16/CLKOUT_48
G1
CLKOUT_CPUNSSC_P
F1
CLKOUT_CPUNSSC#
G2
CLKOUT_CPUBCLK_P
H2
CLKOUT_CPUBCLK#
A5
XTAL24_OUT
A6
XTAL24_IN
E1
XCLK_BIASREF
BC9
RTCX1
BD10
RTCX2
BC24
GPP_B5/SRCCLKREQ0#
AW24
GPP_B6/SRCCLKREQ1#
AT24
GPP_B7/SRCCLKREQ2#
BD25
GPP_B8/SRCCLKREQ3#
BB24
GPP_B9/SRCCLKREQ4#
BE25
GPP_B10/SRCCLKREQ5#
AT33
GPP_H0/SRCCLKREQ6#
AR31
GPP_H1/SRCCLKREQ7#
BD32
GPP_H2/SRCCLKREQ8#
BC32
GPP_H3/SRCCLKREQ9#
BB31
GPP_H4/SRCCLKREQ10#
BC33
GPP_H5/SRCCLKREQ11#
BA33
GPP_H6/SRCCLKREQ12#
AW33
GPP_H7/SRCCLKREQ13#
BB33
GPP_H8/SRCCLKREQ14#
BD33
GPP_H9/SRCCLKREQ15#
R13
CLKOUT_PCIE_N15
R11
CLKOUT_PCIE_P15
P1
CLKOUT_PCIE_N14
R2
CLKOUT_PCIE_P14
W7
CLKOUT_PCIE_N13
Y5
CLKOUT_PCIE_P13
U2
CLKOUT_PCIE_N12
U3
CLKOUT_PCIE_P12
SUNRISE-1 -GP
(HJ1YP)
SPL PCH-H
Astro Team USE X'tal
C C
B B
7 OF 12U2G
CK_100 M_CPU_XDP _DN
L1
CLKOUT_ITPXDP#
CLKOUT_ITPXDP_P
CLKOUT_CPUPCIBCLK#
CLKOUT_CPUPCIBCLK_P
CLKOUT_PCIE_N0
CLKOUT_PCIE_P0
CLKOUT_PCIE_N1
CLKOUT_PCIE_P1
CLKOUT_PCIE_N2
CLKOUT_PCIE_P2
CLKOUT_PCIE_N3
CLKOUT_PCIE_P3
CLKOUT_PCIE_N4
CLKOUT_PCIE_P4
CLKOUT_PCIE_N5
CLKOUT_PCIE_P5
CLKOUT_PCIE_N6
CLKOUT_PCIE_P6
CLKOUT_PCIE_N7
CLKOUT_PCIE_P7
CLKOUT_PCIE_N8
CLKOUT_PCIE_P8
CLKOUT_PCIE_N9
CLKOUT_PCIE_P9
CLKOUT_PCIE_N10
CLKOUT_PCIE_P10
CLKOUT_PCIE_N11
CLKOUT_PCIE_P11
When support FCIM need to stuf f.
WHEN USING 25MHZ EXTERNAL REF ERENCE FROM SINAI CMV:
REMOVE R383, X2, C322
REPLACE C321 WITH 50OHM RES 0 402 PACKAGE
CK_100 M_CPU_XDP _DP
L2
PCH_CPU_ PCIBCLK _DN
J1
PCH_CPU_ PCIBCLK _DP
J2
N7
N8
CLKOUT_ PCIE1N
L7
CLKOUT_ PCIE1P
L5
CK_GLA N_DN
D3
CK_GLA N_DP
F2
E5
G4
CLKOUT_ PCIE4N
D5
CLKOUT_ PCIE4P
E6
D8
D7
R8
R7
U5
U7
CK_PE_ 100M_16 PORT_DN
W10
CK_PE_ 100M_16 PORT_DP
W11
N3
N2
P3
P2
R3
R4
NOTE:The 1Mohm Damping Resistor
Use 0603 and Can't change to 0402!
1 2
R1781MR2J-1-G P
X1
4 1
12
C157
SC33P5 0V2JN-3D LGP
12
C159
SC3P50 V2CN-1-GP
(078.3R0 74.01FD )
23
XTAL-24 MHZ-86-GP
(082.300 06.0021 )
SMT
+- 20ppm CL:15P
ESR 60 ohm
1A015 04/14 Allen modify
1 2
R179 0R 0402-PA D-2-GP
4 1
XTAL-32 D768KHZ -67-GP
X2
R180
12
10MR3F-G P
SMT
+- 30ppm CL:7P
ESR 50 ohm
12
23
TO CPU XDP
TO CPU
CLK OUT TO NGFF_PCIE0
CLK OUT TO PCIEX1 for LAN
09/10 Allen remove
CLK OUT TO Cardreader
06/26 Allen modify
CLK OUT TO X16 Graphic
06/24 Allen modify
XTAL_2 4M_PCH_I N
1-004 06/02 Allen modify
1A015 04/14 Allen modify
XTAL_2 4M_PCH_OUT
C158
SC33P5 0V2JN-3D LGP
XTAL_IN should be pulled to
GND via a 0-Ω resistor by
default.
Intel reliability concerns
PCH_RTC X2RTCX _L
PCH_RTC X1
1A010 03/27 Allen modify1A010 03/27 Allen modify
12
C160
SC3P50 V2CN-1-GP
(078.3R0 74.01FD )
PCH_SRC CLKREQ 0
PCH_SRC CLKREQ 1
PCH_SRC CLKREQ 2
PCH_SRC CLKREQ 3
PCH_SRC CLKREQ 4
PCH_SRC CLKREQ 5
PCH_SRC CLKREQ 6
PCH_SRC CLKREQ 7
PCH_SRC CLKREQ 8
PCH_SRC CLKREQ 9
PCH_SRC CLKREQ 10
PCH_SRC CLKREQ 11
PCH_SRC CLKREQ 12
PCH_SRC CLKREQ 13
PCH_SRC CLKREQ 14
PCH_SRC CLKREQ 15
1 2
R156 10K R2J-3-GP
1 2
R157 10K R2J-3-GP
1 2
R158 10K R2J-3-GP
1 2
R160 10K R2J-3-GP
1 2
R161 10K R2J-3-GP
1 2
R162 10K R2J-3-GP
1 2
R165 10K R2J-3-GP
1 2
R168 10K R2J-3-GP
1 2
R169 10K R2J-3-GP
1 2
R170 10K R2J-3-GP
1 2
R172 10K R2J-3-GP
1 2
R173 10K R2J-3-GP
1 2
R174 10K R2J-3-GP
1 2
R175 10K R2J-3-GP
1 2
R176 10K R2J-3-GP
1 2
R177 10K R2J-3-GP
VCC3
A A
<Variant Name>
<Variant Name>
<Variant Name>
Title
Title
Title
016_PCH_(Clock)
016_PCH_(Clock)
016_PCH_(Clock)
Size Document Numb er Rev
D
Size Document Numb er Rev
D
Size Document Numb er Rev
D
COLORADO MLK SKYLAKE-S
COLORADO MLK SKYLAKE-S
COLORADO MLK SKYLAKE-S
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
1
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, S ec.1, Hsin Tai W u Rd., Hsichih,
21F, 88, S ec.1, Hsin Tai W u Rd., Hsichih,
21F, 88, S ec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 22 1, Taiwan, R.O.C.
Taipei Hsien 22 1, Taiwan, R.O.C.
Taipei Hsien 22 1, Taiwan, R.O.C.
16 107
16 107
16 107
-2
-2
-2
SB3V
VCC3
DMI
PCIE
D D
USB
SB3V 4,1 5,18,20,2 1,24,25,3 1,35,38,40 ,42,47,48 ,51,53,55 ,56,57,58 ,59,61,64 ,86
VCC3 12,13,15 ,16,18,20 ,21,24,25 ,26,27,28,3 1,33,38,4 1,42,44,4 7,48,50,5 3,55,56,5 8,59,61,62 ,64,67,68 ,86,99
DMI_MT_I R_DN[0..3]5
DMI_MT_I R_DP[0..3]5
DMI_IT_ MR_DN[0..3]5
DMI_IT_ MR_DP[0..3]5
HSI_DN633
HSI_DP633
HSO_C_D N633
HSO_C_D P633
HSI_LAN_ DN531
HSI_LAN_ DP531
HSO_C_L AN_DN531
HSO_C_L AN_DP531
HSI_DN861
HSI_DP861
HSO_C_D N861
HSO_C_D P861
USB_PCH_ DN13 5
USB_PCH_ DP135
USB_PCH_ DN23 5
USB_PCH_ DP235
USB_PCH_ DN86 2
USB_PCH_ DP862
USB_PCH_ DN93 8
USB_PCH_ DP938
USB_PCH_ DN1061
USB_PCH_ DP106 1
USB_PCH_ DN33 4
USB_PCH_ DP334
USB_PCH_ DN43 4
USB_PCH_ DP434
USB_PCH_ DN53 4
USB_PCH_ DP534
USB_PCH_ DN63 4
USB_PCH_ DP634
5
06/26 Allen modify
NGFF Support X1
FOR LAN
FOR Cardreader
FOR NGFF
From CPU
PCIE_R COMPN
HSO_C_L AN_DN5
HSO_C_D N6
HSO_C_D P6 HSO_DP6
HSO_C_D N8
HSO_C_D P8
1 2
C165 SCD1U16V2KX-3 DLGP
1 2
C166 SCD1U16V2KX-3 DLGP
1 2
C161 SCD1U16V2KX-3 DLGP
1 2
C162 SCD1U16V2KX-3 DLGP
09/10 Allen remove
1 2
C167 SCD1U16V2KX-3 DLGP
1 2
C168 SCD1U16V2KX-3 DLGP
DMI_MT_I R_DN0
DMI_MT_I R_DP0
DMI_IT_ MR_DN0
DMI_IT_ MR_DP0
DMI_MT_I R_DN1
DMI_MT_I R_DP1
DMI_IT_ MR_DN1
DMI_IT_ MR_DP1
DMI_MT_I R_DN2
DMI_MT_I R_DP2
DMI_IT_ MR_DN2
DMI_IT_ MR_DP2
DMI_MT_I R_DN3
DMI_MT_I R_DP3
DMI_IT_ MR_DN3
DMI_IT_ MR_DP3
1 2
R181 100R2F-L 1-GP-U
HSI_LAN_ DN5
HSI_LAN_ DP5
HSO_DN5
HSO_DP5HSO_C_LAN_DP 5
HSI_DN6
HSI_DP6
HSO_DN6
HSI_DN8
HSI_DP8
HSO_DN8
HSO_DP8
4
PCIE_R COMPP
U2B
L27
DMI_RXN0
N27
DMI_RXP0
C27
DMI_TXN0
B27
DMI_TXP0
E24
DMI_RXN1
G24
DMI_RXP1
B28
DMI_TXN1
A28
DMI_TXP1
G27
DMI_RXN2
E26
DMI_RXP2
B29
DMI_TXN2
C29
DMI_TXP2
L29
DMI_RXN3
K29
DMI_RXP3
B30
DMI_TXN3
A30
DMI_TXP3
B18
PCIE_RCOMPN
C17
PCIE_RCOMPP
H15
PCIE1_RXN/USB3_7_RXN
G15
PCIE1_RXP/USB3_7_RXP
A16
PCIE1_TXN/USB3_7_TXN
B16
PCIE1_TXP/USB3_7_TXP
B19
PCIE2_TXN/USB3_8_TXN
C19
PCIE2_TXP/USB3_8_TXP
E17
PCIE2_RXN/USB3_8_RXN
G17
PCIE2_RXP/USB3_8_RXP
L17
PCIE3_RXN/USB3_9_RXN
K17
PCIE3_RXP/USB3_9_RXP
B20
PCIE3_TXN/USB3_9_TXN
C20
PCIE3_TXP/USB3_9_TXP
E20
PCIE4_RXN/USB3_10_RXN
G19
PCIE4_RXP/USB3_10_RXP
B21
PCIE4_TXN/USB3_10_TXN
A21
PCIE4_TXP/USB3_10_TXP
K19
PCIE5_RXN
L19
PCIE5_RXP
D22
PCIE5_TXN
C22
PCIE5_TXP
G22
PCIE6_RXN
E22
PCIE6_RXP
B22
PCIE6_TXN
A23
PCIE6_TXP
L22
PCIE7_RXN
K22
PCIE7_RXP
C23
PCIE7_TXN
B23
PCIE7_TXP
K24
PCIE8_RXN
L24
PCIE8_RXP
C24
PCIE8_TXN
B24
PCIE8_TXP
SUNRISE-1 -GP
(HJ1YP)
SPL PCH-H
DMI
PCIe/USB 3
USB 2.0
GPP_E9/USB2_OC0#
GPP_E10/USB2_OC1#
GPP_E11/USB2_OC2#
GPP_E12/USB2_OC3#
GPP_F15/USB2_OCB_4
GPP_F16/USB2_OCB_5
GPP_F17/USB2_OCB_6
GPP_F18/USB2_OCB_7
USB2_COMP
USB2_VBUSSENSE
RSVD_AB13
GPD7/RSVD
2 OF 12
USB2N_1
USB2P_1
USB2N_2
USB2P_2
USB2N_3
USB2P_3
USB2N_4
USB2P_4
USB2N_5
USB2P_5
USB2N_6
USB2P_6
USB2N_7
USB2P_7
USB2N_8
USB2P_8
USB2N_9
USB2P_9
USB2N_10
USB2P_10
USB2N_11
USB2P_11
USB2N_12
USB2P_12
USB2N_13
USB2P_13
USB2N_14
USB2P_14
USB2_ID
06/26 Allen modify
USB_PCH_ DN1
AF5
USB_PCH_ DP1
AG7
USB_PCH_ DN2
AD5
USB_PCH_ DP2
AD7
USB_PCH_ DN3
AG8
USB_PCH_ DP3
AG10
USB_PCH_ DN4
AE1
USB_PCH_ DP4
AE2
USB_PCH_ DN5
AC2
USB_PCH_ DP5
AC3
USB_PCH_ DN6
AF2
USB_PCH_ DP6
AF3
AB3
AB2
USB_PCH_ DN8
AL8
USB_PCH_ DP8
AL7
USB_PCH_ DN9
AA1
USB_PCH_ DP9
AA2
USB_PCH_ DN10
AJ8
USB_PCH_ DP10
AJ7
W2
W3
AD3
AD2
V2
V1
AJ11
AJ13
USB_OC0 _R_N
AD43
AD42
AD39
AC44
USB_OC4 _R_N
Y43
USB_OC5 _R_N
Y41
USB_OC6 _R_N
W44
USB_OC7 _R_N
W43
AG3
USB2_VB USSENSE
AD10
TP_PCH_ AB13
AB13
USB2_ID
AG2
06/25 Allen modify
TP_PCH_ BD14
BD14
FOR Side USB 3.0
FOR Side USB 3.0
FOR Rear USB
FOR Rear USB
FOR Rear USB
FOR Rear USB
FOR Touch Panel
FOR Webcam
FOR Wireless
USB2_CO MP
1
TP71
1
TP164
3
SB019 10/06 Allen modify
TPAD28
12
R189
1KR2J-1 -GP
TPAD28
1 2
R188 113 R2F-GP
12
R190
1KR2J-1 -GP
2
SB3V
R1816
R1820
R1812
R1817
R1815
1 2
1 2
1 2
1 2
1 2
10KR2J-3-GP
10KR2J-3-GP
10KR2J-3-GP
10KR2J-3-GP
10KR2J-3-GP
08/05 Allen modify
USBOC01 *
USBOC89 *
USBOC10 11*
USB PWR OC TBD
1
CLINK_C LK_LAN
CLINK_D ATA_LA N
CLINK_R ST_LAN_ N
PW_CL EAR
SKEW2
SKEW3
BOARD1
BOARD2
BOARD3
SKEW1
EDID_R DY
NGFF_DE TECT_P CIE
12
R79932
10KR2J -3-GP
(G_)
12
(U_)
R79933
10KR2J -3-GP
12
R1662
10KR2J -3-GP
(R_)
12
R79931
10KR2J -3-GP
07/14 Allen modify
VCC3VCC3 VCC3
12
R1684
10KR2J -3-GP
SKEW3SKE W1 SKEW2
12
R1685
10KR2J -3-GP
VCC3VCC3 VCC3
12
R1659
10KR2J -3-GP
BOARD3BOARD1 BOA RD2
12
R1660
10KR2J -3-GP
0530Ericc modify
(R_)
(R_)
AV2
CL_CLK
AV3
CL_DATA
CL_RST#
GPP_G8/FAN_PWM_0
GPP_G9/FAN_PWM_1
GPP_G10/FAN_PWM_2
GPP_G11/FAN_PWM_3
GPP_G0/FAN_TACH_0
GPP_G1/FAN_TACH_1
GPP_G2/FAN_TACH_2
GPP_G3/FAN_TACH_3
GPP_G4/FAN_TACH_4
GPP_G5/FAN_TACH_5
GPP_G6/FAN_TACH_6
GPP_G7/FAN_TACH_7
PCIE11_TXP
PCIE11_TXN
PCIE11_RXP
PCIE11_RXN
GPP_F10/SCLOCK
GPP_F11/SLOAD
GPP_F13/SDATAOUT0
GPP_F12/SDATAOUT1
PCIE14_TXN/SATA1B_TXN
PCIE14_TXP/SATA1B_TXP
PCIE14_RXN/SATA1B_RXN
PCIE14_RXP/SATA1B_RXP
PCIE13_TXN/SATA0B_TXN
PCIE13_TXP/SATA0B_TXP
PCIE13_RXN/SATA0B_RXN
PCIE13_RXP/SATA0B_RXP
PCIE12_TXP
PCIE12_TXN
PCIE12_RXP
PCIE12_RXN
PCIE20_TXP
PCIE20_TXN
PCIE20_RXP
PCIE20_RXN
PCIE19_TXP
PCIE19_TXN
PCIE19_RXP
PCIE19_RXN
SUNRISE-1 -GP
(HJ1YP)
UMA
Board1MB Version
CLINK
0
1
0
0SA
0SB
0 1
1
1 1 1
AW2
R44
R43
U39
N42
U43
U42
U41
M44
U36
P44
T45
T44
B33
C33
K31
L31
AB33
AB35
AA44
AA45
B38
C38
D39
E37
C36
B36
G35
E35
A35
B35
H33
G33
J45
K44
N38
N39
H44
H43
L39
L37
Skew ID Settings
MB Version Skew1
VRAM 2G
VRAM 4G
Board ID Settings
SC 0
-1A
-1
-2M-31 1
SPL PCH-H
FAN
Skew2
0 0
1 0
Board2
0
0
1
1
01-2 1
PCIE9_RXN/SATA0A_RXN
PCIE9_RXP/SATA0A_RXP
PCIE9_TXN/SATA0A_TXN
PCIE9_TXP/SATA0A_TXP
PCIE10_RXN/SATA1A_RXN
PCIE10_RXP/SATA1A_RXP
PCIE10_TXN/SATA1A_TXN
PCIE10_TXP/SATA1A_TXP
PCIE15_RXN/SATA2_RXN
PCIE15_RXP/SATA2_RXP
PCIE15_TXN/SATA2_TXN
PCIE15_TXP/SATA2_TXP
PCIe/SATA
PCIE16_RXN/SATA3_RXN
PCIE16_RXP/SATA3_RXP
PCIE16_TXN/SATA3_TXN
PCIE16_TXP/SATA3_TXP
PCIE17_RXN/SATA4_RXN
PCIE17_RXP/SATA4_RXP
PCIE17_TXN/SATA4_TXN
PCIE17_TXP/SATA4_TXP
PCIE18_RXN/SATA5_RXN
PCIE18_RXP/SATA5_RXP
PCIE18_TXN/SATA5_TXN
PCIE18_TXP/SATA5_TXP
GPP_E8/SATALED#
GPP_E0/SATAXPCIE0/SATAGP0
GPP_E1/SATAXPCIE1/SATAGP1
GPP_E2/SATAXPCIE2/SATAGP2
GPP_F0/SATAXPCIE3/SATAGP3
GPP_F1/SATAXPCIE4/SATAGP4
GPP_F2/SATAXPCIE5/SATAGP5
GPP_F3/SATAXPCIE6/SATAGP6
GPP_F4/SATAXPCIE7/SATAGP7
GPP_F21/EDP_BKLTCTL
GPP_F20/EDP_BKLTEN
GPP_F19/EDP_VDDEN
HOST
PLTRST_CPU#
Skew3
01
Board3
0
1
0
00
0
4
3 OF 12U2C
G31
H31
C31
B31
06/26 Allen modify
G29
E29
C32
B32
SATAHDR _RX_DN2
F41
SATAHDR _RX_DP 2
E41
SATAHDR _TX_DN2
B39
SATAHDR _TX_DP 2
A39
SATAHDR _RX_DN3
D43
SATAHDR _RX_DP 3
E42
SATAHDR _TX_DN3
A41
SATAHDR _TX_DP 3
A40
H42
H40
E45
F45
K37
G37
G45
G44
PCH_SAT A_LED_ R_N
AD44
GPP_E0
AG36
GPP_E1
AG35
GPP_E2
AG39
GPP_F0
AD35
GPP_F1
AD31
GPP_F2
AD38
GPP_F3
AC43
GPP_F4
AB44
L_BKLT CTL
W36
TP_L_B KLTEN
W35
TP_L_V DDEN
W42
PCH_THER MTRIP_R_ N
AJ3
THERMTRIP#
PCH_PEC I
AL3
PECI
H_PM_SYNC_0
AJ4
PM_SYNC
PLTRST _CPU_N
AK2
H_PM_DOW N
AH2
PM_DOWN
PASSWORD CLEAR
2-010
2-005
HDD
ODD
1 2
R191 0R 0402-PA D
1
TP203 TPAD28
1
TP193 TPAD28
1
TP194 TPAD28
1
TP202 TPAD28
1
TP201 TPAD28
1
TP200 TPAD28
1
TP199 TPAD28
1
TP204 TPAD28
06/26 Allen modify
1
TP165 TPAD28
1
TP142 TPAD28
1 2
R1804 560R2 J-3-GP
1 2
R79775 30R2J-1-GP
07/11 Allen modify
H
PCH_SAT A_LED_ N
07/14 Allen modify
PW_CL EAR
NORMAL(DEFAULT)L
CLR PASSWORD
PCH_THER MTRIP_N
H_PM_SYNC
GPP_F2
SB3V
07/31 Allen add
EDID_R DY
PWRCN_ DET_N
09/24 Allen add
12
R79770 10KR2J-3-GP
(R_)
08/05 Allen modify
08/28 Allen modify
R151
10KR2J -3-GP
1 2
2
1
07/14 Allen modify
C11892
SC47P5 0V2JN-3G P
(R_)
12
PSWD1
JOWLE -CON2-5-GP
(21.6304 5.102)
3
12
R79772
1KR2J-1 -GP
12
R79839 10KR2J-3 -GP
12
R79951 10KR2J-3 -GP
2-004
2-009
TO CPU, SIO
TO CPU
TO XDP
TO CPU
SB3V
VCC3
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, S ec.1, Hsin Tai W u Rd., Hsichih,
21F, 88, S ec.1, Hsin Tai W u Rd., Hsichih,
21F, 88, S ec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 22 1, Taiwan, R.O.C.
Taipei Hsien 22 1, Taiwan, R.O.C.
Title
Title
Title
017_PC H (PCIE/SAT A/USB)
017_PC H (PCIE/SAT A/USB)
017_PC H (PCIE/SAT A/USB)
Size Document Numb er Rev
Size Document Numb er Rev
Size Document Numb er Rev
COLORADO MLK SKYLAKE-S
COLORADO MLK SKYLAKE-S
COLORADO MLK SKYLAKE-S
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
1
Taipei Hsien 22 1, Taiwan, R.O.C.
17 107
17 107
17 107
-2D
-2D
-2D
SATAHDR _RX_DN360
SATA
SATAHDR _RX_DP 360
PCH_PEC I4
H_PM_SYNC4
PCH_THER MTRIP_N4,79
H_PM_DOW N4
L_BKLT CTL55
PLTRST _CPU_N4,9 9
MINI CARD
CLINK_C LK_LAN61
CLINK_D ATA_LA N61
CLINK_R ST_LAN_ N61
NGFF_DE TECT_P CIE61
PWRCN_ DET_N64
USB Pwr OC
USBOC01 *34
USBOC89 *34
USBOC10 11*35
SATAHDR _TX_DN360
SATAHDR _TX_DP 360
SATAHDR _RX_DN260
SATAHDR _RX_DP 260
SATAHDR _TX_DN260
SATAHDR _TX_DP 260
PCH_SAT A_LED_ N64
EDID_R DY55
To NGFF
08/07 Allen modify
07/31 Allen add
08/08 Allen modify
PWRCN_ DET_N
08/15 Allen modify
C C
B B
0623 Ericc modify
12
R1687
10KR2J -3-GP
(R_)
12
R1688
10KR2J -3-GP
12
R1661
10KR2J -3-GP
A A
12
R1663
10KR2J -3-GP
(R_)
5
5
SB3V
VCC3
D D
USB3_RX 1_DN35
USB3_RX 1_DP35
USB3_TX 1_C_DN35
USB3_TX 1_C_DP35
USB3_RX 2_DN35
USB3_RX 2_DP35
USB3_TX 2_C_DN35
USB3_TX 2_C_DP35
HDMI PORTB
DDPB_C TRL_CL K5 6
DDPB_C TRL_DA TA56
DDSP_B _HPD56
C C
EDP PORT
EDP_4_ HPD55
H_SKTOC C_N4
L_FRAME _N24,68
SER_IR Q_LT_R24
DDPC_C TRL_DA TA20
DDPD_C TRL_DA TA20
NGFF_DE TECT_USB61
FAN_CTR L_POW ER26,53
B B
NGFF_BT _DISAB LE6 1
OS_MODE _SEL55
BIOS_R EQ55
SB3V 4,1 5,17,20,2 1,24,25,3 1,35,38,40 ,42,47,48 ,51,53,55 ,56,57,58 ,59,61,64 ,86
VCC3 12,13,15,1 6,17,20,2 1,24,25,26 ,27,28,31 ,33,38,41 ,42,44,47 ,48,50,53 ,55,56,58 ,59,61,62,6 4,67,68,8 6,99
L_AD024,68
L_AD124,68
L_AD224,68
L_AD324,68
KBRST_ N24
FFS_INT 124,67
FFS_INT 267
CK_24M_ SIO24
LPC_CL K24,68
06/26 Allen modify
USB3_TX 1_C_DN
AW4
AY2
AV4
BA4
BD7
SUNRISE-1 -GP
(HJ1YP)
USB3_TX 1_C_DP
USB3_RX 1_DN
USB3_RX 1_DP
USB3_TX 2_C_DN
USB3_TX 2_C_DP
USB3_RX 2_DN
USB3_RX 2_DP
GPP_I0/DDPB_HPD0
GPP_I1/DDPC_HPD1
GPP_I2/DDPD_HPD2
GPP_I3/DDPE_HPD3
GPP_I4/EDP_HPD
FOR Side USB 3.0
FOR Side USB 3.0
HDMI
DDSP_B _HPD
EDP
EDP_4_ HPD
Unused
SPL PCH-H
4
GPP_I7/DDPC_CTRLCLK
GPP_I8/DDPC_CTRLDATA
GPP_I5/DDPB_CTRLCLK
GPP_I6/DDPB_CTRLDATA
GPP_I9/DDPD_CTRLCLK
GPP_I10/DDPD_CTRLDATA
C11
USB3_1_TXN
B11
USB3_1_TXP
B7
USB3_1_RXN
A7
USB3_1_RXP
B12
USB3_2_TXN/SSIC_1_TXN
A12
USB3_2_TXP/SSIC_1_TXP
C8
USB3_2_RXN/SSIC_1_RXN
B8
USB3_2_RXP/SSIC_1_RXP
B15
USB3_6_TXN
C15
USB3_6_TXP
K15
USB3_6_RXN
K13
USB3_6_RXP
B14
USB3_5_TXN
C14
USB3_5_TXP
G13
USB3_5_RXN
H13
USB3_5_RXP
D13
USB3_3_TXP/SSIC_2_TXP
C13
USB3_3_TXN/SSIC_2_TXN
A9
USB3_3_RXP/SSIC_2_RXP
B10
USB3_3_RXN/SSIC_2_RXN
B13
USB3_4_TXP
A14
USB3_4_TXN
G11
USB3_4_RXP
E11
USB3_4_RXN
SUNRISE-1 -GP
(HJ1YP)
5 OF 12U2E
GPP_F14
GPP_F23
GPP_F22
GPP_G23
GPP_G22
GPP_G21
GPP_G20
GPP_H23
LPC/eSPI
USB
DDPC_C TRL_CL K
BB3
DDPC_C TRL_DA TA
BD6
DDPB_C TRL_CL K
BA5
DDPB_C TRL_DA TA
BC4
DDPD_C TRL_CL K
BE5
DDPD_C TRL_DA TA
BE6
H_SKTOC C_N
Y44
OS_MODE _SEL
V44
BIOS_R EQ
W39
GPP_G2 3
L43
NGFF_BT _DISAB LE
L44
TP_GPP _G21
U35
TP_GPP _G20
R35
LED_DR IVE
BD36
08/08 Allen modify
GPP_A1/LAD0/ESPI_IO0
SPL PCH-H
GPP_A2/LAD1/ESPI_IO1
GPP_A3/LAD2/ESPI_IO2
GPP_A4/LAD3/ESPI_IO3
GPP_A5/LFRAME#/ESPI_CS#
GPP_A6/SERIRQ
GPP_A7/PIRQA#/ESPI_ALERT0#
GPP_A0/RCIN#/ESPI_ALERT1#
GPP_A14/SUS_STAT#/ESPI_RESET#
GPP_A9/CLKOUT_LPC0/ESPI_CLK
GPP_A10/CLKOUT_LPC1
GPP_G19/SMI#
GPP_G18/NMI#
GPP_E6/DEVSLP2
GPP_E5/DEVSLP1
GPP_E4/DEVSLP0
GPP_F9/DEVSLP7
SATA
GPP_F8/DEVSLP6
GPP_F7/DEVSLP5
GPP_F6/DEVSLP4
GPP_F5/DEVSLP3
HDMI no AUX
09/03 Allen modify
1
TP144 TPAD28
1
TP216 TPAD28
1
TP217 TPAD28
6 OF 12U2F
L_AD0
AT22
L_AD1
AV22
L_AD2
AT19
BD16
BE16
BA17
AW17
AT17
BC18
BC17
AV19
M45
N43
7/29 Allen modify
FFS_INT 1
AE45
FFS_INT 2
AG43
GPP_E4
AG42
FAN_CTR L_POW ER
AB39
TP_GPP _F8
AB36
TP_GPP _F7
AB43
TP_GPP _F6
AB42
NGFF_DE TECT_USB
AB41
08/08 Allen modify
1
TP169 TPAD28
1
TP167 TPAD28
TO SIO
L_AD3
L_FRAME _N_R L_FRAME _N
1 2
R198 33 R2J-2-GP
SER_IR Q SER_IR Q_LT_R
1 2
R200 0R 0402-PA D
LPC_PI RQ_PU
KBRST_ N
LPCPD_ N
LPC_0_ ESPI_C LK_EC CK_24M_S IO
PCH_CLK _TO_LP C
PCH_SMI_ N
1
1
1
1
3
06/26 Allen modify
SIO Need both 48MHz and 33MHz for LPC CLK
1 2
R1807 22R2J-2 -GP
1 2
R1983 22R2J-2 -GP
TP195 TPAD28
08/12 Allen modify
TP83 TPAD28
08/05 Allen modify
TP266 TPAD28
TP85 TPAD28
LED_DR IVE
R205 4K 7R2J-2-G P
09/03 Allen modify
OS_MODE _SEL
R79938 10KR2J-3-GP
BIOS_R EQ
R79942 10KR2J-3-GP
TO TPM NEED LEVEL SHIFT
LPC_CL K
1 2
1 2
1 2
TO SIO
06/26 Allen modify
SATA Device Sleep control pin
SB3V
VCC3
KBRST_ N
SER_IR Q
PCH_SMI_ N
PCH_SMI_ N
LPC_PI RQ_PU
LPCPD_ N
2
R1923 10KR2J -3-GP
(R_)
R203 10KR2J-3-GP
R1922 10KR2J-3-GP
12
R196 10KR2J-3 -GP
12
R197 10KR2J-3 -GP
12
R199 10KR2J-3 -GP
12
12
12
1
VCC3
SB3V
A A
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, S ec.1, Hsin Tai W u Rd., Hsichih,
21F, 88, S ec.1, Hsin Tai W u Rd., Hsichih,
21F, 88, S ec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 22 1, Taiwan, R.O.C.
Taipei Hsien 22 1, Taiwan, R.O.C.
Title
Title
Title
018_PC H (USB3.0/GPI O/HPD)
018_PC H (USB3.0/GPI O/HPD)
018_PC H (USB3.0/GPI O/HPD)
Size Document Numb er Rev
Size Document Numb er Rev
Size Document Numb er Rev
COLORADO MLK SKYLAKE-S
COLORADO MLK SKYLAKE-S
COLORADO MLK SKYLAKE-S
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
1
Taipei Hsien 22 1, Taiwan, R.O.C.
18 107
18 107
18 107
-2D
-2D
-2D
5
4
3
2
1
06/25 Allen modify
LPSS_GSPI1_MOSI
TP171
D D
LPSS_GSPI1_MOSI20
LPSS_GSPI0_MOSI20
UART0_TX68
UART0_RX68
TPAD28
TPAD28
TPAD28
TPAD28
TPAD28
1
1
1
1
1
TP172
TP174
TP176
TP175
LPSS_GSPI1_MISO
IO_SMI_N
LPSS_GSPI1_CS_N
LPSS_GSPI0_MOSI
LPSS_GSPI0_MISO
LPSS_GSPI0_CLK
LPSS_GSPI0_CS_N
UART0_TX
UART0_RX
08/04 Allen add
OSD_DN
IO_SMI_N24
C C
B B
OSD_MENU24,55,64
OSD_UP55,64
OSD_DN55,64
OSD_UP
1 2
R79795
1 2
0R0402-PAD
R79794 0R0402-PAD
1 2
R79793 0R0402-PAD
PCH_OSD_DN
PCH_OSD_UP
PCH_OSD_MENUOSD_MENU
AT29
GPP_B22/GSPI1_MOSI
AR29
GPP_B21/GSPI1_MISO
AV29
GPP_B20/GSPI1_CLK
BC27
GPP_B19/GSPI1_CS#
BD28
GPP_B18/GSPI0_MOSI
BD27
GPP_B17/GSPI0_MISO
AW27
GPP_B16/GSPI0_CLK
AR24
GPP_B15/GSPI0_CS#
AV44
GPP_C9/UART0_TXD
BA41
GPP_C8/UART0_RXD
AU44
GPP_C11/UART0_CTS#
AV43
GPP_C10/UART0_RTS#
AU41
GPP_C15/UART1_CTS#/ISH_UART1_CTS#
AT44
GPP_C14/UART1_RTS#/ISH_UART1_RTS#
AT43
GPP_C13/UART1_TXD/ISH_UART1_TXD
AU43
GPP_C12/UART1_RXD/ISH_UART1_RXD
AN43
GPP_C23/UART2_CTS#
AN44
GPP_C22/UART2_RTS#
AR39
GPP_C21/UART2_TXD
AR45
GPP_C20/UART2_RXD
AR41
GPP_C19/I2C1_SCL
AR44
GPP_C18/I2C1_SDA
AR38
GPP_C17/I2C0_SCL
AT42
GPP_C16/I2C0_SDA
AM44
GPP_D4/ISH_I2C2_SDA
AJ44
GPP_D23/ISH_I2C2_SCL
SUNRISE-1-GP
(HJ1YP)
SPL PCH-H
GPP_D16/ISH_UART0_CTS#
GPP_D15/ISH_UART0_RTS#
GPP_D14/ISH_UART0_TXD
GPP_D13/ISH_UART0_RXD
GPP_H20/ISH_I2C0_SCL
GPP_H19/ISH_I2C0_SDA
GPP_H22/ISH_I2C1_SCL
GPP_H21/ISH_I2C1_SDA
11 OF 12U2K
GPP_D9
GPP_D10
GPP_D11
GPP_D12
GPP_A23/ISH_GP5
GPP_A22/ISH_GP4
GPP_A21/ISH_GP3
GPP_A20/ISH_GP2
GPP_A19/ISH_GP1
GPP_A18/ISH_GP0
GPP_A17/ISH_GP7
AL44
AL36
AL35
AJ39
AJ43
AL43
AK44
AK45
BC38
BB38
BD38
BE39
BC22
BD18
BE21
BD22
BD21
BB22
BC19
06/25 Allen remove
09/03 Allen del
A A
Title
Title
Title
019_PCH (GPIO)
019_PCH (GPIO)
019_PCH (GPIO)
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
COLORADO MLK SKYLAKE-S
COLORADO MLK SKYLAKE-S
COLORADO MLK SKYLAKE-S
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
19 107
19 107
19 107
1
-2B
-2B
-2B
SB3V
VCC3
3P3V_S PI
5
SB3V 4,1 5,17,18,2 1,24,25,3 1,35,38,40 ,42,47,48 ,51,53,55 ,56,57,58 ,59,61,64 ,86
VCC3 12,13,15,1 6,17,18,2 1,24,25,26 ,27,28,31 ,33,38,41 ,42,44,47 ,48,50,53 ,55,56,58 ,59,61,62,6 4,67,68,8 6,99
3P3V_S PI 21,25 ,99
4
3
2
1
Check GPIO require to Pull Up or Pull down
(R_)
R221
4K7R2J -2-GP
1 2
1 2
1 2
1 2
1 2
12
12
R2394K7R2J -2-GP (R_ )
R23620KR2J -L2-GP (R_)
12
R18294K7R2J-2 -GP
R179720KR2J-L 2-GP (R_)
12
R17984K7R2J-2 -GP (R_)
SB3V
12
R222
4K7R2J -2-GP
(R_)
SB026 10/06 Allen modify
(R_)
R224
20KR2J -L2-GP
3P3V_S PI
3P3V_S PI
3P3V_S PI
3P3V_S PI
SB038 10/13 Allen modify
12
R223
20KR2J -L2-GP
PCH_HOT#
1 2
1 2
SB3V
R1839150KR2 F-L-GP
R184020KR2J-L 2-GP (R_ )
SML0ALE RT#
SPI_MOS I
SPI_MIS O
SPI_IO 2
SPI_IO 3
07/17 Allen Modify
LPSS_G SPI1_MO SI
08/08 Need to check
AIO pull down, but DT reserve.
SB3V
12
SB020 10/06 Allen modify
R1828 1KR2J-1 -GP
(R_)
R1800 1KR2J -1-GP
(R_)
R1799 1KR2J -1-GP
VCC3
(R_)
R79875
1KR2J-1 -GP
12
(R_)
SPKR
08/05 Allen Modify
SB026 10/06 Allen modify
SB3V
12
R1794
4K7R2J -2-GP
R217
4K7R2J -2-GP
12
12
(R_)
R79861
20KR2J -L2-GP
(R_)
R227
20KR2J -L2-GP
CONSENT STRAP IS ENABLED IF LOW
PCH HAS INTERNAL WEAK PU
PESONALITY STRAP IS ENABLED IF LOW
PCH HAS INTERNAL WEAK PU
SPI_MOS I1 5,25,99
CRB "0"
D D
SPI_MIS O15 ,25
SPI_IO 21 5,25,99
SPI_IO 315,2 5
SPKR15,27
LPSS_G SPI1_MO SI19
LPSS_G SPI0_MO SI19
AUD_LINK _SDO15,27
DDPC_C TRL_DA TA18
DDPD_C TRL_DA TA18
SMBALER T#15,61
SML0ALE RT#15
TP_GPP _H_1215
PCH_HOT#15
CRB "0"
08/08 Allen modify
LPSS_G SPI0_MO SI
CRB "1"
C C
07/17 Allen Modify
VCC3
12
Jeffrey 0619
(R_)
R218
4K7R2J -2-GP
SMBALER T#
12
CRB to Header,but Unmount
CRB "0"
CRB "0"
ME Jumper strap pin
B B
AUD_LINK _SDO
CRB "1"
DDPC_C TRL_DA TA
VCC3
12
(R_)
R226
1KR2J-1 -GP
12
R228
20KR2J -L2-GP
(R_)
09/10 Allen modify
12
R79944
2K2R2J -2-GP
07/17 Allen modify
DDPD_C TRL_DA TA
CRB "1"
A A
5
4
06/25 Allen modify
TP_GPP _H_12
1 2
12
R229
2K2R2J -2-GP
SB3V
12
R18344K7R2J-2-G P (R_)
R183320KR2J-L2 -GP (R_ )
EXI BOOT STALL BYPASS IS ENABLE
IF SAMPLED HIGH PCH HAS INTERNAL WEAK PD
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, S ec.1, Hsin Tai W u Rd., Hsichih,
21F, 88, S ec.1, Hsin Tai W u Rd., Hsichih,
21F, 88, S ec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 22 1, Taiwan, R.O.C.
Taipei Hsien 22 1, Taiwan, R.O.C.
1
Taipei Hsien 22 1, Taiwan, R.O.C.
20 107
20 107
20 107
-2
-2
-2
Title
Title
Title
020_PCH_(Stap Pin)
020_PCH_(Stap Pin)
020_PCH_(Stap Pin)
Size Docume nt Number Rev
Size Docume nt Number Rev
Size Docume nt Number Rev
D
D
D
COLORADO MLK SKYLAKE-S
Date: Sheet of
Date: Sheet of
3
2
Date: Sheet of
5
4
3
2
1
V1P0_P CH_S5
+V1P0A_ VCCF24 _1P0
3P3V_S PI
V_3P3_ A
V_3P0_ BAT_VR EG
SB3V
VCC3
D D
C C
V1P0_P CH_S5 7,15,51,99
+V1P0A_ VCCF24 _1P0 16
3P3V_S PI 20,25 ,99
V_3P3_ A 15,24,2 5,28,29,4 2,43,49,64 ,99
V_3P0_ BAT_VR EG 15,25,2 9
SB3V 4,1 5,17,18,2 0,24,25,3 1,35,38,40 ,42,47,48 ,51,53,55 ,56,57,58 ,59,61,64 ,86
VCC3 12,13,15 ,16,17,18 ,20,24,25 ,26,27,28,3 1,33,38,4 1,42,44,4 7,48,50,5 3,55,56,5 8,59,61,62 ,64,67,68 ,86,99
P1V0_P CH_VCCD SW
+V1P0A_ VCCF24 _1P0
V1P0_P CH_S5
+V1P0A_ VCCAMPHYP LL
V1P0_P CH_S5
Jeffrey 0617
V_3P3_ A
1 2
C11833 SC1U10 V2KX-1D LGP
1 2
(R_)
C11839 SC1U10 V2KX-1D LGP
1 2
C11888 SC22U6 D3V5MX-2 DLGP
1 2
(R_)
C11837 SC1U10 V2KX-1D LGP
1 2
C11834 SC1U10 V2KX-1D LGP
C11835 SC1U10 V2KX-1D LGP
1 2
(R_)
SB3V
R886 0R 0603-PA D
+V1P0A_ VCCAPL L
1 2
08/27 Allen del
V1P0_P CH_S5
V1P0_P CH_S5
+DVDDIO _AUDIO
+DVDDIO _AUDIO
(R_)
12
C12061
SCD1U16 V2KX-3D LGP
AA23
VCCPRIM_1P0_AA23
AA26
VCCPRIM_1P0_AA26
AA28
VCCPRIM_1P0_AA28
AC23
VCCPRIM_1P0_AC23
AC26
VCCPRIM_1P0_AC26
AC28
VCCPRIM_1P0_AC28
AE23
VCCPRIM_1P0_AE23
AE26
VCCPRIM_1P0_AE26
Y23
VCCPRIM_1P0_Y23
Y25
VCCPRIM_1P0_Y25
BA29
DCPDSW_1P0
N17
VCCCLK1
R19
VCCCLK3
U20
VCCCLK4
V17
VCCCLK2
R17
VCCCLK6
K2
VCCCLK5_K2
K3
VCCCLK5_K3
U21
VCCMPHY_1P0_U21
U23
VCCMPHY_1P0_U23
U25
VCCMPHY_1P0_U25
U26
VCCMPHY_1P0_U26
V26
VCCMPHY_1P0_V26
A43
VCCMPHYPLL_1P0_A43
B43
VCCMPHYPLL_1P0_B43
C44
VCCPCIE3PLL_1P0_C44
C45
VCCPCIE3PLL_1P0_C45
V28
VCCAPLLEBB_1P0
AC17
VCCPRIM_1P0_AC17
AJ5
VCCUSB2PLL_1P0_AJ5
AL5
VCCUSB2PLL_1P0_AL5
AN19
VCCHDAPLL_1P0
BA15
VCCHDA
W15
VCCDSW_3P3_W15
SUNRISE-1 -GP
(HJ1YP)
08/27 Allen del
SB3V
1 2
R79833 0R0603-PAD
SPL PCH-H
8 OF 12U2H
VCCPRIM_1P0_AL22
VCCDSW_3P3_BA24
VCCPGPPA
VCCPGPPBH_BC42
VCCPGPPBH_BD40
VCCPGPPEF_AJ41
VCCPGPPEF_AL41
VCCPGPPG
VCCPRIM_3P3_AN5
VCCPRIM_1P0_AD15
VCCATS
VCCRTCPRIM_3P3
VCCRTC
DCPRTC
VCCPRIM_1P0_AJ20
VCCPRIM_1P0_AJ21
VCCPRIM_1P0_AJ23
VCCPRIM_1P0_AJ25
VCCSPI_BE41
VCCSPI_BE43
VCCSPI_BE42
VCCPGPPCD_BC44
VCCPGPPCD_BA45
VCCPGPPCD_BC45
VCCPGPPCD_BB45
VCCPRIM_3P3_BD3
VCCPRIM_3P3_BE3
VCCPRIM_3P3_BE4
+VCCPGP PD
AL22
BA24
BA31
+VCCPGP PA
BC42
BD40
AJ41
AL41
AD41
AN5
AD15
AD13
BA20
BA22
VCC_RT CEXT_C AP
BA26
AJ20
AJ21
AJ23
AJ25
BE41
BE43
BE42
BC44
BA45
BC45
BB45
BD3
+VCCPFUS E_3P3
BE3
BE4
Power rail CAP needed
CORE
VCCGPIO
MPHY
USB
+P1V0_P RIME_PC H_FUSE_2 V8
Jeffrey 0617
V_3P3_ A
V1P0_P CH_S5
SB3V
V_3P0_ BAT_VR EG
V1P0_P CH_S5
3P3V_S PI
+VCCPGP PD
1 2
R892 0R 0603-PA D
1 2
R1730 0R0603-PAD
1 2
(R_)
C11836 SC1U10V 2KX-1DL GP
1 2
C11838 SC1U10 V2KX-1D LGP
1 2
C1935 S CD1U16V 2KX-3DLG P
08/18 Allem modify for BOM
1 2
R1732 0R0603-PAD
V1P0_P CH_S5
SB3V
09/15 Allem del
SB3V
SB3V
VCC3
07/25 Allen add
V1P0_P CH_S5 +V1 P0A_VC CAPLL
1 2
R889 0R0 603-PAD
1 2
R890 0R0 603-PAD
1 2
R891 0R0 603-PAD
+V1P0A_ VCCF24 _1P0
+V1P0A_ VCCAMPHYP LL
B B
A A
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, S ec.1, Hsin Tai W u Rd., Hsichih,
21F, 88, S ec.1, Hsin Tai W u Rd., Hsichih,
21F, 88, S ec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 22 1, Taiwan, R.O.C.
Taipei Hsien 22 1, Taiwan, R.O.C.
Title
Title
Title
021_PC H_(Power)
021_PC H_(Power)
021_PC H_(Power)
Size Document Numb er Rev
D
Size Document Numb er Rev
D
Size Document Numb er Rev
D
COLORADO MLK SKYLAKE-S
COLORADO MLK SKYLAKE-S
COLORADO MLK SKYLAKE-S
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
1
Taipei Hsien 22 1, Taiwan, R.O.C.
21 107
21 107
21 107
-2
-2
-2
5
9 OF 12U2I
SPL PCH-H
AC18
AN4
AN10
BE14
BE18
BE23
BE28
H_TRST_ N_R4
CPU_2_P CH_TRIGG ER7
PCH_2_C PU_TRIGG ER7
PCH_XDP _PRDY_R_ N99
PCH_XDP _PREQ_ R_N99
D D
C C
CPU_VSS _ABS
BE32
BE37
BE40
BE9
C10
C2
C28
C37
J7
K10
K27
K33
K36
K4
K42
K43
L12
L13
L15
L4
L41
L8
M35
M42
N10
N15
N19
N22
N24
N35
N36
N4
N41
N5
P17
P19
P22
P45
R10
R14
R22
R29
R33
R38
R5
T1
T2
T4
Y18
Y20
Y21
Y26
Y28
Y29
A18
A25
A32
A37
AA17
AA18
AA20
AA21
AA25
AA29
AA4
AA42
AB10
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
SUNRISE-1 -GP
(HJ1YP)
AR5
VSS
AR7
VSS
U15
VSS
AL4
VSS
AE29
VSS
AE4
VSS
AE42
VSS
AF18
VSS
AF20
VSS
AF21
VSS
AF23
VSS
AF25
VSS
AF26
VSS
AF28
VSS
AF29
VSS
AG11
VSS
AG13
VSS
AG31
VSS
AG32
VSS
AG33
VSS
AG38
VSS
AG4
VSS
AH1
VSS
AH17
VSS
AH18
VSS
AH20
VSS
AH21
VSS
AH23
VSS
AH25
VSS
AH26
VSS
AH28
VSS
AH29
VSS
AH45
VSS
AJ10
VSS
AJ14
VSS
AJ15
VSS
AJ17
VSS
AJ18
VSS
AJ26
VSS
AJ28
VSS
AJ29
VSS
AJ31
VSS
AJ32
VSS
AJ36
VSS
AK4
VSS
AK42
VSS
AU7
VSS
AV17
VSS
AV24
VSS
AV27
VSS
AV31
VSS
AV33
VSS
AV6
VSS
AW13
VSS
AW19
VSS
AW29
VSS
AW37
VSS
AW9
VSS
AY38
VSS
AY45
VSS
B25
VSS
B3
VSS
B37
VSS
B40
VSS
B6
VSS
BA1
VSS
BB11
VSS
BB16
VSS
BB21
VSS
BB25
VSS
BB30
VSS
BB34
VSS
BC2
VSS
BD43
VSS
C42
D10
D12
D15
D16
D17
D19
D21
D24
D25
D27
D29
D30
D31
D33
D35
D36
E13
E15
E31
E33
F44
G42
G9
H17
H19
H22
H24
H27
H29
H3
H35
J10
J11
J39
T42
U10
U11
U14
U17
U18
U28
U29
U31
U32
U33
U38
U4
U8
V18
V20
V21
V23
V25
V29
V3
V45
W14
W31
W32
W33
W38
W4
W8
Y17
F8
J3
J5
SUNRISE-1 -GP
(HJ1YP)
4
12 OF 12U2L
SPL PCH-H
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
CPU_VSS _AB11
AB11
VSS
AB7
VSS
AB14
VSS
AB31
VSS
AB32
VSS
AB38
VSS
AB4
VSS
AB5
VSS
AC1
VSS
AC20
VSS
AC21
VSS
AC25
VSS
AC29
VSS
AC45
VSS
AB8
VSS
AD11
VSS
AD14
VSS
AB15
VSS
AD32
VSS
AD33
VSS
AD36
VSS
AD4
VSS
AD8
VSS
AE18
VSS
AE20
VSS
AE21
VSS
AE25
VSS
AE28
VSS
AL10
VSS
AL11
VSS
AL13
VSS
AL17
VSS
AL19
VSS
AL24
VSS
AL29
VSS
AL32
VSS
AL33
VSS
AL38
VSS
AM15
VSS
AM17
VSS
AM19
VSS
AM22
VSS
AM24
VSS
AM27
VSS
AM29
VSS
AM45
VSS
AN11
VSS
AN22
VSS
AN27
VSS
AN31
VSS
AN39
VSS
AN7
VSS
AN8
VSS
AP11
VSS
AP4
VSS
AR33
VSS
AR34
VSS
AR42
VSS
AR9
VSS
AT10
VSS
AT15
VSS
AT36
VSS
AT9
VSS
AU1
VSS
AU35
VSS
AU36
VSS
AU39
VSS
AU45
VSS
C4
VSS
TP_PCH_ C1
1
TP263T PAD28
1
TP264T PAD28
SB 10/06 Allen add
reference to CRB, losing
PROC_TRIGIN
PROC_TRIGOUT
BD45
BD44
BE44
BD2
D45
A42
B45
B44
A4
A3
B2
A2
B1
BB1
BC1
A44
C1
D1
3
VSS_BD2
VSS_BD45
VSS_BD44
VSS_BE44
VSS_D45
VSS_A42
VSS_B45
VSS_B44
VSS_A4
VSS_A3
VSS_B2
VSS_A2
VSS_B1
VSS_BB1
VSS_BC1
VSS_A44
RSVD_C1
RSVD_D1
SUNRISE-1 -GP
(HJ1YP)
SPL PCH-H
10 OF 12U2J
RSVD_AR22
RSVD_W13
RSVD_U13
RSVD_P31
RSVD_N31
RSVD_P27
RSVD_R27
RSVD_N29
RSVD_P29
RSVD_AN29
RSVD_R24
RSVD_P24
PREQ#
CPU_TRST#
PCH_TRIGOUT
PCH_TRIGIN
PRDY#
AR22
W13
U13
P31
N31
P27
R27
N29
P29
AN29
R24
P24
AT3
AT4
AY5
AL2
AK1
TP_PCH_ AR22
SB023 10/06 Allen add
PCH_XDP _PREQ_ R_N
PCH_XDP _PRDY_R_ N
H_TRST_ N_R
PCH_2_C PU_TRIGG ER_R
CPU_2_P CH_TRIGG ERTP_PCH_ D1
1
TP265 T PAD28
R1811 30R2J -1-GP
08/08 Allen modify
1 2
PCH_2_C PU_TRIGG ER
2
1
CPU_VSS _ABS
CPU_VSS _AB11
B B
A A
(R_)
1 2
R246 0R2 J-2-GP
(R_)
1 2
R247 0R2 J-2-GP
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, S ec.1, Hsin Tai W u Rd., Hsichih,
21F, 88, S ec.1, Hsin Tai W u Rd., Hsichih,
21F, 88, S ec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 22 1, Taiwan, R.O.C.
Taipei Hsien 22 1, Taiwan, R.O.C.
Title
Title
Title
022_PC H_(Vss/TP )
022_PC H_(Vss/TP )
022_PC H_(Vss/TP )
Size Document Numb er Rev
Size Document Numb er Rev
Size Document Numb er Rev
COLORADO MLK SKYLAKE-S
COLORADO MLK SKYLAKE-S
COLORADO MLK SKYLAKE-S
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
1
Taipei Hsien 22 1, Taiwan, R.O.C.
22 107
22 107
22 107
-2D
-2D
-2D
5
D D
C C
4
3
2
1
Blanking
B B
Wistron Corporation
Wistron Corporation
A A
Title
Title
Title
023_PCH_(Reserved)
023_PCH_(Reserved)
023_PCH_(Reserved)
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
COLORADO MLK SKYLAKE-S
COLORADO MLK SKYLAKE-S
COLORADO MLK SKYLAKE-S
Date: Sheet of
Date: Sheet of
5
4
3
Date: Sheet of
2
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
-2A4
-2A4
23 107
23 107
23 107
1
-2A4
5
4
3
2
1
1 2
VBAT2
L1
1 2
MHC1608S181NBP-GP
12
C187
SC22U6D3V5MX-2DLGP
Note:
Place C398,C399 close
to IT8732
07/01 Allen modify
09/12 Allen modify
09/29 Allen del
08/14 Allen add for iRMT
(R_)
C180
SCD1U10V2MX-3DLGP
2 1
7/11 Allen add
C182
SCD1U10V2MX-3DLGP
(78.10421.2FLDL)
2 1
SC018 11/17 Allen modify
SC040 12/23 Allen modify
V_3P3_A
Case Open Detection
Note:
COPEN# should be connected to GND
when this function is not be used.
07/22 Allen modfiy
SIO_INT#
ME_CNTL
1A021 04/21 Allen modify
SB005 09/29 Allen modify
HDMI IN DET
SIO_GPU_RST
SIO_GPU_EN
A20GATE
L_AD3
L_AD2
L_AD1
L_AD0
PLTRST*_SIO
LPC_PME_N
IO_SMI_N
EC_LAN_DISABLE_N
07/10 Allen modify
MCLK
MDAT
KBCLK
KDAT
RSMRST_N
SIO_MEM_EVENT_L
09/03 Allen modify
DPLVDS_BL_EN
SPKR_DET
SIO_LVDS_BL_ADJ
THERMAL_SHUT#_SIO
SUS_PWR_ACK_SIO
07/29 Vendor suggest
BIST_EN_SIO
BIST_PIN25
PCH_AUD_RST_N
SIO_PCIRSTIN#
SIO_UART1_RX
SIO_UART1_TX
MPCIE_DISABLE_N
NGFF_POWER_CTRL
SW_ON_N_SIO
R277 10KR2J-3-GP
SIO_PSON_N
PCH_SIO_DPWROK
AD_IA_HW1
R79637 10KR2J-3-GP
AD_IA_HW2
R79638 10KR2J-3-GP
SC055 01/08 Allen modify
R80236 10KR2J-3-GP
R80244 4K7R2J-2-GP
JP1
Pin 60
0R0402-PAD-2-GP
SC002 11/10 Allen modify
Connect Low
Normal High
DET_HDMI#
1 2
1 2
R79922 1KR2J-1-GP
R80018 10KR2J-3-GP
1 2
R249 10KR2J-3-GP
1
RN1 SRN10KJ-6-GP
2
3
4 5
1 2
R251 1KR2J-1-GP
R253 2K2R2J-2-GP
R254 2K2R2J-2-GP
1 2
R79925 10KR2J-3-GP
08/14 Allen modify
SMBUS_ISP
LDRQ#
GPU_THERMAL_INT
SER_IRQ_LT_R
PWROK3_2_R
GPA7
RN3
SRN10KJ-6-GP
1
2
3
4 5
1 2
R1993 1KR2J-1-GP
R279 10KR2J-3-GP
1 2
R280 10KR2F-2-GP
(R_)
1 2
R283 10KR2J-3-GP
1 2
R284 1KR2J-1-GP
1 2
R285 1KR2J-1-GP
1 2
R79836 1KR2J-1-GP
1 2
R1826 10KR2J-3-GP
(R_)
1 2
R80240 10KR2J-3-GP
SB013 09/30 Allen modify
PCIRST3#
PCIRST1#
SIO_SMCLK0
SIO_SMDAT0
R314
1 2
10KR2J-3-GP
R316
1 2
10KR2J-3-GP
R317
1 2
10KR2J-3-GP
R79820
1 2
10KR2J-3-GP
RN6
SRN10KJ-5-GP
12
12
R318 4K7R2J-2-GP
12
R1946 4K7R2J-2-GP
1 2
1 2
1 2
1 2
DSW_EUP_SEL
R79945
1 2
SIO_AGND
SB3V
12
(R_)
R7918
10KR2J-3-GP
Q7903
2N7002-7F-GP
VCC3
8
7
6
SB3V
12
12
VCC3
12
R257 10KR2J-3-GP
1 2
R262 10KR2J-3-GP
1 2
R263 10KR2J-3-GP
1 2
R264 10KR2J-3-GP(R_)
1 2
R265 10KR2J-3-GP
1 2
R270 10KR2J-3-GP
SB5V
8
7
6
SB3V
12
SB3V
SC040 12/23 Allen modify
SB3V
1 2
SB029 10/07 Allen modify
R79976 10KR2F-2-GP
1 2
R79977 10KR2F-2-GP
(R_)
RN5
1234
SRN10KJ-5-GP
SB3V V_3P3_A
2012/11/01 David
Pisa leakage issue,
12
change to 3D3V_A
R304
R305
0R3J-0-U-GP
0R0603-PAD
(R_)
1A 0115 Allen modify
1 2
SCALAR_SIO_PU
1234
EUP_DSW_SEL
valueSymbol Description
EUP
1
DSW
0
SB3V
Connect High
12
Normal Low
R7916
100KR2J-1-GP
HDMI_DET_SIO
G
(84.2N702.J31)
S D
HDMI_IN_DET#_R
12
R7917
100KR2J-1-GP
(63.10234.1DL)
1
7/31 Allen modify
07/07 Allen modify
V_3P3_A
07/01 Need to check
IT8732 Power On Strapping Options
12
(R_)
R320
10KR2F-2-GP
12
R321
10KR2F-2-GP
<Variant Name>
<Variant Name>
<Variant Name>
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
024_SIO_ITE8739
024_SIO_ITE8739
024_SIO_ITE8739
COLORADO MLK SKYLAKE-S
COLORADO MLK SKYLAKE-S
COLORADO MLK SKYLAKE-S
E
E
E
Wistron Corpor ation
Wistron Corpor ation
Wistron Corpor ation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
24 107
24 107
24 107
SIO VIN Range: 0~2.8V
Charger IOUT Range: 0~4.5V
SC027 12/08 Allen modify
DCBATOUT
D D
SB3V
SB5V
V_CPU_CORE
V_3P3_A
VBAT2
VCC
VCC3
FAN
C C
CLOCK
LPC
SMBUS
OTHERS
Power Manager
B B
GPIO
Power Botton/Reset
GPU
GPU_DPLUS24,26,79
GPU_DMINUS26,79
Thermal sensor
GPU_DPLUS24,26,79
REMOTE1+26
DIMM_TMPIN2+26
SIO_VREF26
PANEL_SEL1_CABLE55,59
A A
PANEL_SEL2_CABLE55,59
PANEL_SEL3_CABLE55,59
DPLVDS_BL_EN55,59
EC_HDMI_PD_N56
BIST_PIN2558
Battery charger
AC_OK#43
AD_IA43
AD_IA_HW143
AD_IA_HW243
iRMT
GPU_ALLPWR86
SIO_GPU_EN86,88
SIO_GPU_RST76
ADAPTOR_PSID_SIO41
5
DCBATOUT 7,26,28,42,43,45,46,47,48,49,50,51,53,55,58,59,86,88
SB3V 4,15,17,18,20,21,25,31,35,38,40,42,47,48,51,53,55,56,57,58,59,61,64,86
SB5V 15,42,44,47,48,50,64,68
V_CPU_CORE 7,9,44,45
V_3P3_A 15,21,25,28,29,42,43,49,64,99
VBAT2 25
VCC 15,26,27,41,42,44,45,46,55,56,57,58,60,64,67,68,86,88
VCC3 12,13,15,16,17,18,20,21,25,26,27,28,31,33,38,41,42,44,47,48,50,53,55,56,58,59,61,62,64,67,68,86,99
CPU_FAN_TACH_SIO26
CPU_FAN_CTRL_SIO26
CK_24M_SIO18
L_AD018,68
L_AD118,68
L_AD218,68
L_AD318,68
L_FRAME_N18,68
LPC_CLK18,68
SMBUS_ISP55
SIO_SMCLK059
SIO_SMDAT059
CHG_SMB2_CLK43,79
CHG_SMB2_DATA43,79
SER_IRQ_LT_R18
EC_PECI4
SPKR_DET28
KBRST_N18
H_PROCHOT_N4,43,44
LPC_PME#15,55
PCH_DPWROK15
PWRGD_3V15,99
SUS_PWR_ACK15
SUS_WARNB15
SLP_SUSB15,42,51
RSMRST_N15,99
PLTRST_N15
PLTRST_SL_N68,76
PLTRST_CR33
PLTRST_LAN_N31
PCIE_RST#61
SLP_S3_N15,35,40,42,48,50,53,55,99
SLP_S4_N7,15,35,42,50,99
SLP_S5_N15
0523 Ericc modify
IO_SMI_N19
ME_CNTL15
MPCIE_DISABLE_N61
EC_LAN_DISABLE_N31
PCH_AUD_RST_N28
TP_DET62
WEBCAM_DET38
NGFF_POWER_CTRL61
FFS_INT118,67
SCALAR_EN55
LVDS_DET_A*58
LVDS_DET_B*58
BIST_DISABLE55
BIST_ENABLE55
LED
SIO_HDD_LED64
SIO_YELLOW64
SIO_GREEN64
SIO_GREEN_PWM64
PWRBTN_N
PWRBTN_N15,64,99
PM_PWRBTN_N
PM_PWRBTN_N15
PANEL
DET_HDMI#55,57
SIO_UART1_RX55
SIO_UART1_TX55
OSD_MENU19,55,64
BIST_EN_SIO55
HW Monitor
Michael
2011/12/15
V_CPU_CORE
12
G1
COPPER-CLOSE-GP-U
HM_VCCP
12
R260
10KR2F-2-GP
HM_VCCP_R
12
C184
SIO_AGND
SCD1U16V2KX-3DLGP
For AC OFF SEQUENCE
DCBATOUT
SB3V
R287 4K7R2F-GP
12
R288
100KR2J-1-GP
(R_)
12
12
C189
R293
SCD1U16V2ZY-2DLGP
20KR2J-L2-GP
1 2
(63.47234.1DL)
SIO_VIN3
SIO_VIN4
SIO_VIN5
SIO_VIN2
For 5VSB Monitor
12
12
12
12
PWRGD_PS_L1
12
R252
C179
10KR2F-2-GP
SIO_AGND
SCD1U16V2KX-3DLGP
12
R259
C181
10KR2F-2-GP
SIO_AGND
SCD1U16V2KX-3DLGP
12
R272
C183
10KR2F-2-GP
SIO_AGND
SCD1U16V2KX-3DLGP
12
R80238
C12446
10KR2F-2-GP
SIO_AGND
SCD1U16V2KX-3DLGP
0529 Eric modify for BOM
5
6
Q6
2N7002EDW-2-GP
123 4
R250
17K8R2F-GP
1 2
R255
6K49R2F-1-GP
1 2
R266
1 2
5K1R2F-2-GP
R80239
17K8R2F-GP
1 2
(75.27002.F7C)
SB5V
VCC3
SC062 01/09 Allen modify
VCC
1A008 03/23 Allen modify
VCC
SPI Interface
V_3P3_A
R308
R309
R310
10KR2F-2-GP
10KR2F-2-GP
1 2
SIO_CE_N
SIO_SO SIO_HOLD#
1. layout trace is as far as possible short
2. Pull-up resistor 1Kohm nea r SPI Flash
SB013 09/30 Allen modify
PWROK3_1_R
PWROK3_2_R RSMRST*_R
10KR2F-2-GP
1 2
1 2
SIO_WP#
SB028 10/07 change to MXIC 1Mbits ROM
VCC3
12
1KR2J-1-GP
R335
R336
1 2
0R0402-PAD-2-GP
1 2
R340 1KR2J-1-GP
(R_)
U6
1
CS#
2
SO/SIO1
3
WP#
GND4SI/SIO0
MX25L1006EMI-10G-GP
(72.02510.001)
Power Good 3V
SB3V
12
R337
1KR2J-1-GP
(R_)
PWRGD_3V_B_1
5
6
123 4
SC019 11/24 Allen modify
8
VCC
7
HOLD#
6
SCLK
5
Q10
(R_)
2N7002KDW-GP
PWRGD_3V_LL
2012/10/4 David
Add for ITE debug
PWRBTN_N
SW_ON_N_SIO
12
R338
1KR2J-1-GP
(R_)
4
R292
1 2
0R0402-PAD-2-GP
SB 0815 Eric modify BOM for EUPSB 0815 Eric modify BOM for EUP
R311
10KR2F-2-GP
1 2
SIO_CLK_DB
SIO_DAT_DB
PWRBT Signal
R332
1 2
0R0402-PAD-2-GP
0R2J-2-GP
1 2
0R0402-PAD-2-GP
R334
12
C201
SC100P50V2JN-3DLGP
SLP_S4_N_SIO SLP_S4_N
PLTRST_N
WLAN
PCIE_RST#
PLTRST_LAN_N
LAN
PLTRST_SL_N
PLTRST_CR
GPU
VCC3
R290
10KR2F-2-GP
(63.10334.1DL)
1 2
R312
R313
10KR2F-2-GP
10KR2F-2-GP
1 2
1 2
(R_)
12
C197
SCD1U16V2ZY-2DLGP
V_3P3_A
R79687
R79975
10KR2J-3-GP
10KR2J-3-GP
1 2
1 2
PB_IN_N_1
1 2
C199 SCD1U16V2KX-3DLGP
R333
(R_)
Jeffrey 0619
To PCH
1 2
PM_PWRBTN_N
0.8VCC3-> S0_PWR_GOOD
SIO delay:
23h<3:2>
00b 01b 10b
400ms / 15ms / 200ms
12
R339
20KR2J-L2-GP
R1951 0R0402-PAD
R1950 0R2J-2-GP
(R_)
Reset signals
R256 0R0402-PAD
SIO_ATXPGPWRGD_PS_L PWRGD_PS_L2
SIO_SCK
SIO_SI
SB013 09/30 Allen del
PWRGD_3V
1 2
1 2
RN2
1
2
3
4 5
SRN33J-7-GP-U
SLP_S5_N
12
PLTRST*_SIO
8
PCIRST3#
7
6
PCIRST1#
V_3P3_A
12
H_PROCHOT_N
1A023 04/22 Allen modify
SUS_WARNB
SUS_PWR_ACK
1A021 04/20 Allen modify
SIO_SCK
BIST_PIN25
SC040 12/23 Allen modify
BIST_EN_SIO
R296 10KR2J-3-GP(R_)
VCC3
PWROK3_1_R PWROK3_1
12
C193
SCD1U16V2KX-3DLGP
Note:
*Place C405, C406, C407 close to IT8732
12
12
C191
V_3P3_A
SCD1U16V2KX-3DLGP
SIO_YELLOW SIO_YELLOW_IC
07/28 Allen modfiy
(R_)
C12151
SC2D2U6D3V2MX-DL-GP
1 2
R319
100KR2J-1-GP
08/18 Allen modfiy
for BOM
V_3P3_A
C185
SCD1U16V2KX-3DLGP
1A021 04/21 Allen modify
07/22 Allen modify
07/10 Allen modfiy
R80245 0R2J-2-GP
(R_)
1 2
R1948 0R0402-PAD
1 2
R1949 0R0402-PAD
1 2
R1984 0R0402-PAD
07/22 Allen modfiy
12
R294 33R2J-2-GP
12
07/10 Allen modfiy
1 2
R298 33R2J-2-GP
PCIRST1#
1 2
R299 0R0402-PAD-2-GP
1A005 03/16 Allen modify
1A015 04/14 Allen modify
12
C12152
SC1U10V2KX-1DLGP
LDRQ#
SLP_SUSB
CPU_FAN_TACH_SIO
CPU_FAN_CTRL_SIO
ME_CNTL
12
IO_SMI_N
SIO_LVDS_BL_ADJ
SIO_HDD_LED
SUS_WARNB_SIO
SUS_PWR_ACK_SIO
PCH_SIO_DPWROKPCH_DPWROK
SIO_GREEN_PWM
SIO_ATXPG
SIO_UART1_RX
SIO_UART1_TX
PCH_AUD_RST_N
THERMAL_SHUT#_SIO
SIO_SI
SIO_SCK_R
SIO_GREEN
SIO_AMD SVID_EN
SIO_CE_N
GPU_THERMAL_INT
SIO_VCORE
For EC domain,
reset after power up
7/24 Allen del
3
TP103
TP104
TP105
H_PROCHOT_N_SIO
LPC I/F
(R_)
(R_)
R267
R268
1 2
1 2
10KR2J-3-GP
10KR2J-3-GP
1
1
1
SIO_GPU_EN
GPU_ALLPWR
SIO_GPU_RST
08/14 Allen add for iRMT
SIO_PCIRSTIN#
U109
1
3VSB
2
LDRQ#
3
SLP_SUS#/VLDT_EN/GP63
4
GNDD
5
FAN_TAC1
6
FAN_CTL1
7
FAN_TAC2/GP52
8
FAN_CTL2/GP51
9
FAN_TAC3/GP37
10
FAN_CTL3/GP36
11
FAN_TAC4/GP35
12
SUWARN#/GP34
13
SUSACK#/GP33
14
DPWROK/GP32
15
PWMOUT/GP31/USBPWREN2#
16
ATXPG/GP30
17
SIN2/GP27
18
SOUT2/GP26
19
DSR2#/GP25
20
RTS2#/GP24
21
SI/GP23
22
SCK/GP22
23
DCD2#/GP21
24
CTS2#/GP20
25
RI2#/GP17
26
DTR2#
27
CE_N/CIRTX1
28
VCORE_EN/PCH_C1/GP14
29
PWROK1/GP13
30
PCIRST1#/PCH_D1/GP12
31
PCIRST2#/GP11
32
3VSB
(071.08739.0A0G)
1 2
R301
0R0402-PAD-2-GP
SER_IRQ_LT_R
L_FRAME_N
L_AD0
L_AD1
L_AD2
L_AD3
KBRST_N
A20GATE
LPC_CLK
SIO_SO
PLTRST*_SIO
SIO_WRST#
VCC3
R269
1 2
10KR2J-3-GP
Debug USE
(R_)
CLK_24M_SIO_CCK_24M_SIO
VCC3
SIO_DEBUG_TX
SIO_DEBUG_RX
SIO_K8PWR_EN
12
12
126
127
128
125
122
121
120
124
123
RI1#/GPB6
CTS1#/GPB7
DTR1#/GPB4
DCD1#/GPB5
SIN1/D_RX1/GPB3
SOUT1/D_TX1/GPB2
5VSB_CTRL#/CIRRX2/GP16
PCIRSTIN#/CIRTX2/GP15/CPU_PG
VCORE33CLKIN34GNDD
SERIRQ36LFRAME#37LAD038LAD139LAD240LAD341KRST#/GP6242GA2043PCICLK44SO/GP5045LRESET#46WRST#47SMBCLK148SMBDAT149SST/AMDTSI_D50PECI/AMDTSI_C51GPA752GPA653GPA554GPA455GPA356GPA257GPA158GPA059GP86/SMBCLK060IO_SCI#/GP85/SMBDAT0
35
SIO_CLK_DB
SIO_DAT_DB
R324
10KR2J-3-GP
(R_)
L_FRAME_N
R327
2KR2J-1-GP
(R_)
117
116
111
115
110
109
108
113
112
114
119
118
STB#/GP91
RTS1#/GPB0
DSR1#/GPB1
KSI1/GP71/PD1
KSI0/GP70/PD0
KSO5/GP77/PD7
KSO4/GP76/PD6
KSO3/GP75/PD5
KSO1/GP73/PD3
KSO0/GP72/PD2
KSO2/GP74/PD4
FAN_CTL4/GP67
PECI_SIO EC_PECI
07/14 Allen add
SIO_PSON_N
AD_IA
SIO_VIN1
R79873 0R0402-PAD
FFS_INT1_SIO
R79872 0R2J-2-GP(R_)
OSD_MENU_SIO OSD_MENU
R80206 0R2J-2-GP
(R_)
AD_IA_HW2_C
R79860 0R0402-PAD
AD_IA_HW1_C
R79859 0R0402-PAD
PANEL_SEL3_CABLE_EC
PANEL_SEL2_CABLE_EC
R79816 0R0402-PAD
PANEL_SEL1_CABLE_EC
R79815 0R0402-PAD
R79814 0R0402-PAD
SC027 12/08 Allen modify
AC_OK#_C AC_OK#
R79855 0R2J-2-GP(R_)
99
107
106
105
104
103
102
101
100
GP9397GP9498GP95
GP96
PE/GP80
INIT#/GP84
AFD#/GP90
SLCT/GP97
ACK#/GP82
ERR#/GP87
BUSY/GP81
SLIN#/GP83
A3VSB
VIN0/VCORE_0D8V
VIN1/VDIMMSTR_1D2V
VIN2
VIN3
VIN4/VLDT_12
VIN5/5VDUAL
VCC3DET
VREF
TMPIN1
TMPIN2
TMPIN3
TSD-
GNDA
RSMRST#/CIRRX1/GP55
PCIRST3#/GP10
MCLK/GP56
MDAT/GP57
KCLK/GP60
KDAT/GP61
3VSBSW#/GP40/SCL
PWROK2/GP41/SDA
SUSC#/GP53
PSON#/GP42
PANSWH#/GP43
GNDD
PME#/GP54
PWRON#/GP44
SUSB#/GP45
SYS_3VSB
VBAT
COPEN#
SMBDAT2/GP47
3VSB64SMBCLK2/GP46
62
61
63
SIO_SMB2_CLK
R306 0R0402-PAD-2-GP
SIO_SMB2_DATA
R307 0R0402-PAD-2-GP
SIO_SMDAT0
SIO_SMCLK0
SPKR_DET
EC_LAN_DISABLE_N
EUP_DSW_SEL
MPCIE_DISABLE_N
NGFF_POWER_CTRL
DPLVDS_BL_EN
SIO_MEM_EVENT_L
GPA7
1 2
R79739 43D2R2F-GP
1 2
C12126 SC47P50V3JN-DLGP
(R_)
VCC3
R323
330R3J-L-GP
(R_)
1 2
SIO_PSON_D
Q8
2N7002
G
SOT-23
(R_84.2N702.J31)
S D
96
95
94
93
92
91
90
89
88
87
86
85
84
83
ICH_RSMRST_N_R RSMRST_N
82
81
PCIRST3#
80
79
78
77
76
75
74
73
72
71
70
69
68
SYS_3VSB
67
VBAT_SIO
66
SIO_COPEN#
65
1 2
1 2
To eDP to LVDS
07/14 Allen add
12
R80216
10KR2F-2-GP
12
R80215
15KR2F-GP
1 2
1 2
1 2
1 2
1 2
1 2
HM_VCCP_R
SIO_VIN1
SIO_VIN2
SIO_VIN3
SIO_VIN4
SIO_VIN5
SIO_MAIN_VCC3
SIO_VREF
REMOTE1+
DIMM_TMPIN2+
GPU_DPLUS
MCLK
MDAT
KBCLK
KDAT
SLP_S3_N_R3
PWROK3_2
SLP_S4_N_C
SIO_PSON_N
PB_IN_N_1
LPC_PME_N
SW_ON_N_SIO
SLP_S3_N
CHG_SMB2_CLK
CHG_SMB2_DATA
08/08 Allen modify
SCALAR_EN
ADAPTOR_PSID_SIO
TP_DET
LVDS_DET_B*
LVDS_DET_A*
SMBUS_ISP
WEBCAM_DET
BIST_ENABLE
BIST_DISABLE
PB_IN_N_1PB_IN_N_1_C
FFS_INT1
12
12
HDMI_DET_SIO
AD_IA_HW2
AD_IA_HW1
7/22 Allen modify net name
EC_HDMI_PD_N
PANEL_SEL3_CABLE
PANEL_SEL2_CABLE
PANEL_SEL1_CABLE
12
08/04 Allen add
For Power monitor function
SC027 12/08 Allen modify
1
TP107
R286 1KR2J-1-GP
1 2
C188 SC1U10V2KX-1DLGP
1
TP256
R295 0R0402-PAD-2-GP
R297 0R0402-PAD-2-GP
R79837 0R2J-2-GP
(R_)
1 2
R300
100R2F-L1-GP-U
1 2
R303 1KR2J-1-GP
From Battery charger IC
SC004 11/10 Allen modify
1A015 04/14 Allen modify
2
SB0057 10/22 Allen modify
SC041 12/29 Allen modify
1A002 02/24 Allen modify
SC041 12/29 Allen modify
09/03 Allen add for HDMI DET
SIO_INT#
1 2
Note
VREF follow Moussy
SIO_AGND
1 2
R291 0R0402-PAD
1 2
1 2
7/31 Allen add
1 2
1 2
C190 SC1U10V2KX-1DLGP
SB3V
1 2
R302
0R0402-PAD-2-GP
12
12
C194
C195
SC22U6D3V5MX-2DLGP
Note:
*Place C194,C195 close to IT8732
*Recommended net "V_3P3_A" minimum trace width 12mils.
SCD1U16V2KX-3DLGP
SC1U10V2KX-1DLGP
VCC3
SIO_AGND
V_3P3_A
SIO_AVCC3
C186
PWROK3_2_R
SLP_S4_N_SIO
LPC_PME#
-2
-2
-2
3P3V_S PI
SB3V
VCC3
V_3P3_ A
VBAT2
V_3P0_ BAT_VR EG
SPI_CS 0_N15
SPI_MIS O15 ,20
SPI_IO 2
SPI_IO 315,2 0
SPI_CL K15
SPI_MOS I1 5,20,99
D D
5
3P3V_S PI 20,21 ,99
SB3V 4,1 5,17,18,2 0,21,24,3 1,35,38,40 ,42,47,48 ,51,53,55 ,56,57,58 ,59,61,64 ,86
VCC3 12,13,15,1 6,17,18,2 0,21,24,26 ,27,28,31 ,33,38,41 ,42,44,47 ,48,50,53 ,55,56,58 ,59,61,62,6 4,67,68,8 6,99
V_3P3_ A 15,21,24 ,28,29,42 ,43,49,64,9 9
VBAT2 24
V_3P0_ BAT_VR EG 15,21,2 9
SPI ROM
08/15 Allen modify
SPI_CS 0_N
SPI_MIS O
1 2
R347 15 R2J-GP
SPI_IO 2
1 2
R351 15 R2J-GP
07/17 Allen modify
C C
4
3P3V_S PI
12
R343
1KR2J-1 -GP
SPI_MIS O_ROM_1
SPI_W P_N_1
12
(R_)
R1830
1KR2J-1-GP
SPI socket mount in SA stage
SC025 12/03 Allen modify
SOP8 for 16MB
U9622
1
CS#
2
DO/IO1
HOLD#/RESET#/IO3
3
WP#/IO2
4
GND
W25Q1 28FVSI Q-GP
(072.251 28.0R01 )
08/15 Allen modify
SRCON1
1
8
7
3 6
425
(X_62.10 089.121 )
SKT-G61 79-GP-U
62.10076.011
62.10089.001
3
2
1
+V3P3A_V1P8A_PCH_SPI
R341 0R 0402-PA D
SPI_IO 3
SPI_CL KSPI_CL K_1
SPI_MOS I
1 2
1 2
R342 0R2 J-2-GP
(R_)
12
C202
SC1U10V 2KX-1DL GP
SPI ROM
08/15 Allen modify for cost
SB3V
VCC3 3P3V_S PI
12
R345
1KR2J-1 -GP
1 2
R348 15R 2J-GP
1 2
R352 15R 2J-GP
1 2
R355 15R 2J-GP
07/17 Allen modify
3P3V_S PI
8
VCC
SST_HOL DJ_1
7
6
CLK
SPI_MOS I_1
5
DI/IO0
08/15 Allen modify
SPI ROM
16 MB:
72.12873.001 - MXIC SOP8
72.25128.0E1 - Winbond SOP8
R80217 1 K5R2F-2 -GP
V_3P3_ A_B
1 2
R894 45K 3R2F-L-G P
1
D2
BAS40C -2-GP
V_3P0_ BAT_VR EG
BAT1
BATTER Y CR2032
(23.2206 3.001)
12
V_3P3_ A
SC028 12/10 Allen add
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, S ec.1, Hsin Tai W u Rd., Hsichih,
21F, 88, S ec.1, Hsin Tai W u Rd., Hsichih,
21F, 88, S ec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 22 1, Taiwan, R.O.C.
Taipei Hsien 22 1, Taiwan, R.O.C.
Title
Title
Title
025_Flas h ROM/RTC
025_Flas h ROM/RTC
025_Flas h ROM/RTC
Size Docume nt Number Rev
Size Docume nt Number Rev
Size Docume nt Number Rev
COLORADO MLK SKYLAKE-S
COLORADO MLK SKYLAKE-S
COLORADO MLK SKYLAKE-S
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
Taipei Hsien 22 1, Taiwan, R.O.C.
-2D
-2D
-2D
25 107
25 107
1
25 107
Battery Socket
ST: 22.70017.051
TP108
TPAD28
Joey_SC_0905
RB551V 30-GP
1
VBAT1_ R
D3
K A
FLAT: 22.70017.061
Battery (CR2032):
23.22063.001
2
3
VBAT2
3
VCCRTC
B B
BAT-AAA -BAT-034 -K01-GP
A A
5
4
BT1
+
-
(62.7001 0.061)
1
NP1
NP2
2
09/15 Allen remove header and 0 ohm
VBAT1
Joey_SB_0710
R357
1 2
1KR2J-1 -GP
DCBATOUT
VCC
VCC3
12V_S0
SIO FAN CONTROL
CPU_FAN_CTRL_SIO24
CPU_FAN_TACH_SIO24
FAN_CTRL_POWER18,53
DCBATOUT 7,24,28,42,43,45,46,47,48,49,50,51,53,55,58,59,86,88
VCC 15,24,27,41,42,44,45,46,55,56,57,58,60,64,67,68,86,88
VCC3 12,13,15,16,17,18,20,21,24,25,27,28,31,33,38,41,42,44,47,48,50,53,55,56,58,59,61,62,64,67,68,86,99
12V_S0 53
4 PINS FAN CONTROL
CPU FAN
From SIO
CPU_FAN_CTRL_SIO
R360
1 2
100R2F-L1-GP-U
R359
2K2R2J-2-GP
VCC3
12
A K
THERMAL DIODES
D4
1SS355-4-GP
(83.00355.D1F)
12V_FAN
12
SYSTEM_FAN_PWM1_1
C204
SC10U25V5KX-DL-GP
FANC3
1
2
3
4
FOX-CON4-30-GP
(020.60031.0104)
SYS_FAN_TACH1_1
4K7R2J-2-GP
07/29 Allen modify for down size
SB035 10/10 Allen modify for ME
08/27 Allen modify for layout space
12V_FAN
12
R361
R364
1 2
20KR2J-L2-GP
SC065 01/12 Allen del
09/16 Allen modify
SYS_FAN_TACH1_2 CPU_FAN_TACH_SIO
1 2
1 2
R363
0R0402-PAD-2-GP
R362
8K2R2F-1-GP
FAN_CTRL_POWER FAN_OFF_G
1 2
R79913 0R2J-2-GP
(R_)
08/12 Allen add
SC065 01/12 Allen modify
DCBATOUT
12
R79915
47KR2J-2-GP
Q1227
2N7002
SOT-23
(84.2N702.J31)
R79917
1 2
10KR2J-3-GP
12
R79916
100KR2J-1-GP
FAN_OFF_D
G
S D
FAN_OFF_G2
(R_)
12
(R_)
C12324
SCD1U50V3KX-DL-GP
(R_)
R80234
0R5J-5-GP
12
(R_)
C12325
SCD1U50V3KX-DL-GP
G
VCC
12
Q9624
AO3418L-GP
DS
(R_84.03052.031)
12
(R_)
R79914
4K7R2J-2-GP
12V_S
08/18 Allen modify
R79935
0R0805-PAD
12V_S0
12
R80235
0R0805-PAD
1A015 04/14 Allen modify
(R_)
12
F21
POLYSW-2A6V-7-GP
1 2
12
(R_)
C12326
SC10U10V5KX-2DLGP
12V_FAN
12
(R_)
C12327
SCD1U16V2KX-3DLGP
SIO_VREF24
REMOTE1+24
DIMM_TMPIN2+24
GPU_DPLUS24,79
GPU_DMINUS79
SIO_VREF
VRD
REMOTE1+
SCD1U16V2KX-3DLGP
1 2
0R0402-PAD-2-GP
SIO_AGND SIO_AGNDSIO_AGND
09/02 Allen modify for ME
A
4
5
GEN315R178-8-F-A-3-GP
H23
GEN315R138-8-F-A-2-S-GP
4
5
1A013 04/08 Allen modify
12
C12063
R79619
REMOTE1-
SB021 10/06 Allen modify
H22
2
3
6
7
2
3
6
7
1
8
1
8
4
5
GEN8D5X8R5X4D5-8-F-A-GP
4
5
GEN8D5X8R5X4D5-8-F-A-GP
R79623
10KR2F-2-GP
1 2
RT3
NTC-10K-28-GP-U
(69.60013.161)
1 2
Layout Note: place it
near CPU VORE MOS
H14
2
3
1
8
6
7
H24
2
3
1
8
6
7
SIO_VREF
SCD1U16V2KX-3DLGP
2
3
4
5
6
7
GEN8D5X8R5X4D5-8-F-A-GP
2
3
4
5
6
7
GEN315R138-8-F-A-1-GP
DIMM
1 2
R79621
0R0402-PAD-2-GP
H13
1
8
H25
1
8
C12064
12
DIMM_TMPIN2-
R79622
10KR2F-2-GP
1 2
RT1
NTC-10K-28-GP-U
(69.60013.161)
Layout Note: place it
near PCH
1 2
SIO_VREF
GPU
GPU_DPLUSDIMM_TMPIN2+
12
C12065
H19
HOLE315R158-GP
1
SC2200P50V2KX-2DLGP
1 2
R79620
0R0402-PAD-2-GP
H20
HOLE315R158-GP
1
GPU_DMINUS
GPU Heatsink screw hole.
H15
HOLE315R158-GP
1
H16
HOLE315R158-GP
H17
HOLE315R158-GP
1
1
CPU Heatsink screw hole.
R79624
10KR2F-2-GP
1 2
RT2
NTC-10K-28-GP-U
(69.60013.161)
1 2
Layout Note: place it
near GPU
H18
HOLE315R158-GP
1
SB006 09/30 Allen modify
<Variant Name>
<Variant Name>
<Variant Name>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
026_FAN CIRCUITS/HOLE
026_FAN CIRCUITS/HOLE
026_FAN CIRCUITS/HOLE
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
COLORADO MLK SKYLAKE-S
C
COLORADO MLK SKYLAKE-S
C
COLORADO MLK SKYLAKE-S
C
Date: Sheet of
Date: Sheet of
Date: Sheet of
Taipei Hsien 221, Taiwan, R.O.C.
26 107
26 107
26 107
-2
-2
-2
EAPD_D EPOP28
AUD_LINK _RST_N15,29
V_5P0_ A
VCC
VCC3
AUD_LINK _SDIN15
AUD_LINK _SDO15,20
AUD_LINK _BCLK15
AUD_LINK _SYNC15
PORTC_ SPK_R28
PORTC_ SPK_L28
BUZZER_ SPKR_R28
MIC2-L29
MIC2-R2 9
LINEOUT-L2 9
LINEOUT-R29
HPOUT-L29
HPOUT-R29
MIC2-VRE FO-L29
MIC2-VRE FO-R29
LINE2-VR EFO29
HPOUT-JD29
LINEOUT-J D29
SLEEVE29
RING229
SPDIF_ IC55
PC_MONIT OR_SW2 8,55
V_5P0_ A 15,42,49 ,51
VCC 1 5,24,26,4 1,42,44,4 5,46,55,5 6,57,58,60 ,64,67,68 ,86,88
VCC3 12,13,15,1 6,17,18,2 0,21,24,25 ,26,28,31 ,33,38,41 ,42,44,47 ,48,50,53 ,55,56,58 ,59,61,62,6 4,67,68,8 6,99
7/24 Allen add
HD_LINK
AUD_DMIC _CLK38
AUD_DMIC _DATA38
SPKR15,20
To AMP
To Mute AMP
PC_MONITOR_SW
SEL L:A1(PC) H:A2(MONITOR)
PC_MONIT OR_SW PC _MONITOR_ SW_G
1 2
R79830 0 R0402-P AD
R79827
1 2
AGND AGND
100KR2F-L1-GP
V_5_CO DEC
G
12
(R_)
C12127
SC10U10V5KX-2DLGP
To PCH
08/25 Allen modify
SENSEA_ D
1 2
R79936 10KR 2F-2-GP
Q7
2N7002A -7-GP
(84.2N702 .J31)
S D
AGND
AGND
12
12
C211
AGND A GND AG ND AGND AGND
SCD1U16V2KX-3DLGP
1A015 04/14 Allen modify
SPKR
SENSEA
08/28 Allen modify
1 2
C208 SC10U10 V5KX-2D LGP
12
12
C213
C212
C214
SCD1U16V2KX-3DLGP
SC10U10V5KX-2DLGP
SC10U10V5KX-2DLGP
1 2
R370 0R 0402-PA D-2-GP
R371
1 2
R372
07/24 Allen add
R367
AGND
AGND
C206 SC10U1 0V5KX-2 DLGP
VRP
GND_AUD
VREF_1
12
C215
AGND
PORTC_ SPK_L
PORTC_ SPK_R
SC10U10V5KX-2DLGP
MIC2-L
MIC2-R
ANALOG
DIGITAL
AUD_BEE P_RBUZZER_ SPKR_R
47KR2F -GP
47KR2F -GP
12
VCC3
VCC3
R374 0R 0402-PA D
V_1P5_ PCH
PCH PWR have no 1.5v
LINEOUT-J D
HPOUT-JD
SENSEA
20KR2F -L-GP
12
1 2
(R_)
1 2
C218
SCD1U25 V2KX-1-DL -GP
R373
1 2
R375
1 2
(R_)
1 2
R365 10KR 2F-2-GP
R366
1 2
JDREF
MIC-CAP
U9
37
MIC1_R/PORT_B_R
38
VRP
39
LDO_IN
40
LDO_CAP
41
VREF
42
AVSS2
43
FRONT_L/PORT_D_L
44
FRONT_R/PORT_D_R
45
LINE1_L/PORT_C_L
46
LINE1_R/PORT_C_R
47
MIC2_L/PORT_F_L
48
MIC2_R/PORT_F_R
49
GND
MIC2-VRE FO-L
AUD_BEE P_C
10KR2J -3-GP
1 2
(R_)
0R2J-2-G P
PCB trace width of
RING2 & SLEEVE at least 40 mil
5K1R2F -2-GP
35
36
JDREF
MIC1_L/PORT_B_L/MIC_CAP
MIC2_VREFO1PCBEEP2GPIO3/COMBO_JACK23SDATA_OUT4BCLK5RESET#6DVDD_IO7SDATA_IN8SYNC9REGREF10DVDD11GPIO0/DMIC_CLK
12
12
C222
SCD1U16V2KX-3DLGP
34
AUD_GP3
SENSE_B
C223
SC10U6D3V3MX-DL-GP
RING2
SLEEVE
31
32
SENSEB33SENSEA
LINE2_IN_R/PORT_E_R/SLEEVE
(R_)
12
C224
SC22P5 0V2JN-4D LGP
MIC2-VREFO-R
30
MIC1_VREFO
LINE2_IN_L/PORT_E_L/RING2
AUD_DVDD
AUD_LINK_SDIN_1
SC044 01/01 Allen modify
AGND
LINE2-VREFO
28
29
CPVREF
LINE2_VREFO
HPOUT-L
HPOUT-R
26
27
SURR_L/PORT_A_L
SURR_R/PORT_A_R
GPIO2/COMBO_JACK1
AUD_REGREF
12
C221
SC10U6D3V3MX-DL-GP
R376
25
DVDD_IO_CP
CEN/PORT_G_L
LEF/PORT_G_R
SPDIF_OUT
GPIO1/DMIC_DATA
ALC366 1-CG-GP(071.036 61.0003 )
12
12
12
33R2J-2 -GP
CBP
HVDD
AVSS1
CBN
CPVEE
SPDIF_IN
EAPD
12
C219
SCD1U16V2KX-3DLGP
AUD_LINK _SYNC
AUD_LINK _SDIN
AUD_LINK _RST_N
AUD_LINK _SDO_N
AUD_LINK _BCLK
12
C207
24
CBP
23
22
AGND
21
CBN
20
CPVEE
19
LINEOUT-L
18
LINEOUT-R
17
SPDIF_ IC
16
15
EAPD_D EPOP
14
AUD_DMIC _DATA_R AUD_D MIC_DAT A
13
VCC3
C220
SC10U6D3V3MX-DL-GP
+3V_VA
12
C12153
AGNDAGND
SCD1U16V2KX-3DLGP
SC10U6D3V3MX-DL-GP
12
C209
SC1U10V 2KX-1DL GP
08/21 Allen modfiy
for BOM
1 2
C210 SC1U10V 2KX-1DL GP
ANALOG
DIGITAL
7/21 Allen add
1 2
R368 0R0603-PAD
1 2
R369 68R 2F-GP
Joey_1A_1126
AGND
Moat
AUD_DMIC _CLK_R_ 1
1 2
MCB1005 S121FB P-GP
(68.0008 4.B21)
SC220P 50V2KX -3DLGP
Joey_SC_0916
1A015 04/14 Allen modify
1 2
R79821 0 R0402-P AD-2-GP
AGND
1A015 04/14 Allen modify
1 2
R79822 0 R0402-P AD-2-GP
AGND
1A015 04/14 Allen modify
1 2
R79823 0 R0402-P AD-2-GP
AGND
L3
AUD_DMIC _CLKAUD_DMIC _CLK_R
(R_)
12
12
C217
C216
SC100P 50V2JN-3 DLGP
V_5_CO DEC
ANALOG
DIGITAL
ANALOG DIGITAL
(68.0033 5.181)
L4
1 2
HCB1608 KF-800T 30-GP
12
(R_)
C226
SC10U10 V5KX-2D LGP
AGND
Moat
Moat
In order to prevent the built-in LDO damaged from
over-voltage on +5VSYS or Standby power line, we
suggested using this Voltage suppressing device.
KA
D5
AZ2015 -01H-GP
V_5P0_ A
AUD_LINK _SDO
12
C225
SC100P 50V2JN-3 DLGP
VCC
1 2
R378
33KR2J -3-GP
G
AUD_LINK _SDO_1
Digital Power from 3V
VCC3
L5
1 2
MCB1005 S121FB P-GP
12
12
C228
(R_)
(R_)
(68.0008 4.B21)
C227
SCD1U16V2KX-3DLGP
SC10U6D3V3MX-DL-GP
Moat
ANALOG DIGITAL
D
12
S
(R_)
C229
SC10U6D3V3MX-DL-GP
U9618
2N7002K -2-GP
+3V_VA
12
AGNDAGND
12
AUD_LINK _SDO_N
C230
SCD1U16V2KX-3DLGP
(R_)
R377
0R2J-2-G P
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, S ec.1, Hsin Tai W u Rd., Hsichih,
21F, 88, S ec.1, Hsin Tai W u Rd., Hsichih,
21F, 88, S ec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 22 1, Taiwan, R.O.C.
Taipei Hsien 22 1, Taiwan, R.O.C.
Title
Title
Title
027_AUDIO ALC366 1
027_AUDIO ALC366 1
027_AUDIO ALC366 1
Size Document Numb er Rev
Size Document Numb er Rev
Size Document Numb er Rev
COLORA DO MLK SKYL AKE-S
COLORA DO MLK SKYL AKE-S
COLORA DO MLK SKYL AKE-S
D
D
D
Date: Sheet of
Date: Sheet of
Date: Sheet of
Taipei Hsien 22 1, Taiwan, R.O.C.
27 107
27 107
27 107
-2
-2
-2
DCBATO UT
V_3P3_ A
VCC3
SCALAR _OUT_R_ C55
SCALAR _OUT_L_ C55
DCBATO UT 7,24 ,26,42,43 ,45,46,47 ,48,49,50,5 1,53,55,5 8,59,86,8 8
V_3P3_ A 15,21,24 ,25,29,42 ,43,49,64,9 9
VCC3 12,13,15,1 6,17,18,2 0,21,24,25 ,26,27,31 ,33,38,41 ,42,44,47 ,48,50,53 ,55,56,58 ,59,61,62,6 4,67,68,8 6,99
EAPD_D EPOP27
PORTC_ SPK_R27
PORTC_ SPK_L27
BUZZER_ SPKR_R27
PCH_AUD_ RST_N24
SPKR_D ET24
PC_MONIT OR_SW2 7,55
HP_MUTE55
SCALAR _MUTE55
EAPD_D EPOP
DCBATO UT
R393
+19V_AMP _PVCC
L6
1 2
MHC1608S 221NBP-GP
1A015 04/14 Allen modify
1 2
R379 0R 0402-PA D-2-GP
1 2
(R_)
C231 SC1KP 50V2KX -1DLGP
PORTC_ SPK_L
1 2
C12332 SC1U1 0V2KX-1 DLGP
1 2
C12331 SC1U1 0V2KX-1 DLGP
08/14 Allen modify
EAPD_D EPOP_1
1 2
1KR2J-1 -GP
R380
1 2
10R3J-3 -GP
AGND
VCC3
(R_)
+19V_AMP _AVCC
JEFFREY 0617
PORTC_ SPK_R_ 1 AMP_SPK R_RPORTC_ SPK_R
R391
4K7R2J -2-GP
1 2
PCH_AUD_ RST_N
1 2
R384 0R0603-PAD
1 2
R383 0R0603-PAD
R392
1 2
10KR2J -3-GP
R394
1 2
10KR2J -3-GP
10K5R3 F-GP
EAPD_D EPOP_2
AMP_SPK R_LPORT C_SPK_ L_1
12
(R_)
R385
R390
20KR2J -L2-GP
PCH_AUD_ RST_N_1
Jeffrey 0617
2
5
AGNDAGND
V_3P3_ A
12
(R_)
R386
10K5R3 F-GP
12
TPA311 3_SD
6
Q13A
MMBT3904 DW-GP
(75.0390 4.07C)
1
AUD_LINK _RST_N_2
3
Q13B
MMBT3904 DW-GP
(75.0390 4.07C)
4
07/18 Allen add
Line Out Switch?
check SEL pin
PC_MONITOR_SW
SEL L:A1(PC) H:A2(MONITOR)
RESERVED ESD D3004
07/28 Allen add
AMP_SPK R_L
AMP_SPK R_R
Jeffrey 0617
V_3P3_ A
12
R389
20KR2J -L2-GP
TPA311 3_SD1#
Q12
2N7002A -7-GP
G
(84.2N702 .J31)
S D
VCC3
SCALAR _OUT_L_ C
SPEAKE R1_L1
AMP_SPK R_L
PC_MONIT OR_SW
1 2
R79835 0 R0603-P AD
1 2
R79834 0 R0603-P AD
V_3P3_ A
12
R79934
20KR2J -L2-GP
G
S D
(R_)
12
C245
SC1U16V 3KX-2DL GP
1 2
(R_)
R79920 0R2J -2-GP
EAPD_D EPOP_2 _D
1 2
(R_)
R79871 0R2J -2-GP
07/28 Allen add
(R_)
12
C11358
SC1U10V 2KX-1DL GP
U9615
1
V+
2
NO1
3
COM1
4
NC#4
IN15GND
TS5A22 364DGS R-1-GP
(R_)
AMP_SW ITCH_C_ L
AMP_SW ITCH_C_ R
1A025 04/22 Allen modify
TPA313 1_MUTE
Q9626
2N7002A -7-GP
(84.2N702 .J31)
HP_MUTE_LHP_MUT E
6
AMP_SW ITCH_C_ L
AMP_SW ITCH_C_ R
AGND
NO2
COM2
NC#8
IN2
Q9620
2345
1
2N7002K DW-GP
(75.2700 2.F7C)
1 2
R79812 0 R0603-P AD
1 2
R79813 0 R0603-P AD
07/28 Allen modify
P3P3V
(R_)
12
C11359
SCD1U16 V2KX-3D LGP
08/18 Allen modfiy
for BOM
SCALAR _OUT_R_ C
10
SPEAKE R1_R1
9
AMP_SPK R_R
8
7
6
AGND
08/07 Allen modify
12
(R_)
R79919
0R2J-2-G P
HP_MUTE_D
SCALAR _MUTE
SPEAKE R1_L1
SPEAKE R1_R1
1A025 04/22 Allen modify
For AMP MUTE
SCALAR MUTE
Internal Speaker x 2
SPKR_O UT_L+
SPKR_O UT_L-
SPKR_O UT_R+
SPKR_O UT_R-
S0 S5
L H
12
12
(R_)
C251
SCD68U16V3KX-GP-U
(R_)
C257
SCD68U16V3KX-GP-U
07/18 Allen modify net name
07/18 Allen modify net name
SB037 10/13 Allen modify
L7
1 2
HCB2012 KF-601T 20-GP
L8
1 2
12
(R_)
HCB2012 KF-601T 20-GP
C252
SCD68U16V3KX-GP-U
L10
1 2
HCB2012 KF-601T 20-GP
L11
1 2
12
(R_)
HCB2012 KF-601T 20-GP
C258
SCD68U16V3KX-GP-U
SPEAKE R1_R1
AGND
AGND
SPEAKE R1_L1
BUZZER_ SPKR_R
1 2
C234 SCD02 7U50V3K X-DL-GP
TPA313 1_RINN_1 TPA313 1_RINN
1 2
R382 0R0603-PAD
1 2
R387 0R0603-PAD
C236 SCD02 7U50V3K X-DL-GP
C240 SCD02 7U50V3K X-DL-GP
C241 SCD02 7U50V3K X-DL-GP
C243 SC100P 50V2JN-3 DLGP
12
12
C254
C253
SC1000P50V3JN-DLGP
SC1000P50V3JN-DLGP
12
12
C259
C260
SC1000P50V3JN-DLGP
SC1000P50V3JN-DLGP
1 2
1 2
1 2
1 2
12
(R_)
R400
3D3R3F -GP
SPKR_L +_SNB SPKR_ L-_SNB
12
(R_)
C255
SCD01U50V3JX-1GP
12
(R_)
R402
3D3R3F -GP
SPKR_R +_SNB S PKR_R-_ SNB
12
(R_)
C261
SCD01U50V3JX-1GP
TP3131 _GVDD
TPA313 1_MUTE
TPA311 3_SD1#
12
R381
0R0402 -PAD-2-GP
SPKR_I N_R
TPA3131_FAULT#
30
31
32
U10
33
INPR
INNR
GND
TPA313 1_PLIMI T
1
PLIMIT
TP3131 _GVDD
2
GVDD
TPA313 1_GAIN
3
GAIN/SLV
TP3131 _AGND
4
AGND
TPA313 1_LINNTPA313 1_LINN_1
5
INNL
SPKR_I N_L
6
INPL
7
MUTE
12
8
SPKR_L +_C
SPKR_L -_C
SPKR_R +_C
SPKR_R -_C
TP109TPAD28
AGND
(78.1042 4.2BLDL )
AM2
TPA313 1D2RHBR -GP-U
12
R388
100KR2 J-1-GP
+19V_AMP _AVCC +19V_AMP_PV CC
12
(R_)
R401
3D3R3F -GP
12
(R_)
C256
SCD01U50V3JX-1GP
12
(R_)
R403
3D3R3F -GP
12
(R_)
C262
SCD01U50V3JX-1GP
FAULTZ#
AM19AM010SYNC11AVCC12PVCC13PVCC14BSPL15OUTPL
TPA313 1_SYNC
1
C246
SCD1U25V3KX-DLGP
TP3131 _GVDD
12
R396
100KR2 J-1-GP
(R_)
TPA313 1_GAIN
12
R399
5K6R2F -2-GP
AGND
09/16 Allen swap for layout routing
SPKR_D ET
1 2
R1203 0R040 2-PAD-2-G P
SC034 12/22 Allen modify
1A015 04/14 Allen modify
(78.1042 4.2BLDL )
12
12
C232
C233
SC10U25 V5KX-DL -GP
SCD1U25V3KX-DLGP
TPA313 1_BSPR
C235 SCD22U1 6V3KX-2 DLGP
25
26
28
29
SDZ#
BSPR
PVCC27PVCC
OUTPR
24
GND
23
OUTNR
22
BSNR
21
GND
20
GND
19
BSNL
18
OUTNL
17
GND
16
TPA313 1_BSPL
C244 SCD22 U16V3KX -2DLGP
12
12
C247
C248
SC10U25 V5KX-DL -GP
SCD1U25V3KX-DLGP
(78.1042 4.2BLDL )
AGND
AGND
AGND
4W, 4ohm
SPK1
SPKR_L +_C
1
SPKR_L -_C
2
SPKR_R -_C
3
SPKR_R +_C
4
5
SPKR_D ET_C
6
JWT-CO N6-20-GP
(21.D051 2.106)
+19V_AMP _PVCC
1 2
(78.2242 2.2BLDL )
TPA313 1_BSNR
1 2
C239 SCD22 U16V3KX -2DLGP
(78.2242 2.2BLDL )
TPA313 1_BSNL
1 2
C242 SCD22 U16V3KX -2DLGP
(78.2242 2.2BLDL )
1 2
(78.2242 2.2BLDL )
1 2
C250 SC1U25V3KX-1-D LGP
1 2
C249 SC1U25V3KX-1-D LGP
08/18 Allen modfiy
for BOM
7
8
2K2R2J -2-GP
R397
1 2
SPKR_O UT_R+
SPKR_O UT_L+
SPKR_O UT_R-
SPKR_O UT_L-
TP3131 _AGND
R398
TP3131 _GVDD
1 2
10KR2F -2-GP
TPA313 1_PLIMI T
1A015 04/14 Allen modify
1 2
R79824 0 R0402-P AD-2-GP
AGND
1A015 04/14 Allen modify
1 2
R79825 0 R0402-P AD-2-GP
AGND
<Variant Name>
<Variant Name>
<Variant Name>
Title
Title
Title
028_AMP TPA3131
028_AMP TPA3131
028_AMP TPA3131
Size Document Numb er Rev
Size Document Numb er Rev
Size Document Numb er Rev
D
D
D
COLORADO MLK SKYLAKE-S
COLORADO MLK SKYLAKE-S
COLORADO MLK SKYLAKE-S
Date: Sheet of
Date: Sheet of
Date: Sheet of
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, S ec.1, Hsin Tai W u Rd., Hsichih,
21F, 88, S ec.1, Hsin Tai W u Rd., Hsichih,
21F, 88, S ec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 22 1, Taiwan, R.O.C.
Taipei Hsien 22 1, Taiwan, R.O.C.
Taipei Hsien 22 1, Taiwan, R.O.C.
28 107
28 107
28 107
-2
-2
-2
V_3P0_BAT_VREG
V_3P3_A
V_3P0_BAT_VREG 15,21,25
V_3P3_A 15 ,21,24,25,28,4 2,43,49,64,99
Grounding Circuit
for Combo Jack Sleeve pin
**AZ_RST_N is 1.5V Level
on Kabini platform***
R416
AUD_LINK_RST_N
1 2
LINEOUT-L27
LINEOUT-R27
PORTC_SPK_R27,28
PORTC_SPK_L27,28
LINE2-VREFO27
SLEEVE27
RING227
HPOUT-L27
HPOUT-R2 7
MIC2-L2 7,29
MIC2-R27,29
MIC2-VREFO-L27
MIC2-VREFO-R27
HPOUT-JD27
LINEOUT-JD27
AUD_LINK_RST_N15,27
MIC2-L2 7,29
MIC2-R27,29
To AMP
1KR2J-1-GP
To solve the background noise while combo jack connecting to an active
speaker and system entry into S3/S4/S5 without analog power.
AUD_LINK_RST_N_R
(R_)
12
C269
SC1U10V2KX-1DLGP
100KR2F-L1-GP
V_3P3_A
V_3P0_BAT_VREG
12
R407
R408
SLEEVE
1MR3F-GP
(R_)
SLEEVE_G
C
(84.T3904.H11)
Q18
B
MMBT3904-4-GP
E
1 2
DIGITAL
G
Q14
2N7002-11-GP
(84.2N702.J31)
S D
AGND
ANALOG
SLEEVE
RING2
C270 SCD1 U16V2KX-3DLGP
Tied at one point only under
Codec or near the Codec
R417 0R0402-PAD-2 -GP
R423 SCD1U16V2KX-3DLGP
R424 SCD1U16V2KX-3DLGP
1 2
1 2
1 2
(R_)
1 2
2
1 2
R419
0R3J-0-U-GP
(R_)
1
3
AGND
HPOL_CON
HPOR_CON
Q15
AZ5125-02S-R7G-G P
1A015 04/14 Allen modify
AGND
AGND
AGND
AGND
2
1
Q16
AZ5125-02S-R7G-G P
3
(R_)
1 2
R418 0R0402-PAD-2 -GP
1 2
R420 0R0402-PAD-2 -GP
LINEOUT_CON-L
LINEOUT_CON-R
AGND
AGND
2
1
Q17
AZ5125-02S-R7G-G P
3
(R_)
MIC2-L
R404 2K2R2J-2-GP
LINE2-VREFO
R405 2K2R2J-2-GP
SLEEVE
RING2
SC049 01/06 Allen modify
R406
HPOUT-L
R409
HPOUT-R
1 2
C263 SC4D7U6D3V3KX-DLGP
1 2
MIC2-R-1MIC2-R
C265 SC4D7U6D3V3KX-DLGP
MIC2-VREFO-L
R414 2K2R2J-2-GP
MIC2-VREFO-R
R415 2K2R2J-2-GP
HPOUT-JD
LINEOUT-L
LINEOUT-R
MIC2-L-1
1 2
1 2
1 2
1 2
1 2
1 2
1A015 04/14 Allen modify
R80226 0R0603-PAD
1 2
R80227 0R0603-PAD
1 2
10R2F-L-GP
10R2F-L-GP
R410
1 2
1KR2J-1-GP
R411
1 2
1KR2J-1-GP
R421 47R2J-2-GP
1 2
1 2
R422 47R2J-2-GP
SLEEVE_CON
RING2_CON
HPOL_CON
R412
R413
12
12
12
C266
C264
(R_)
SC1KP50V2KX-1DLGP
AGND AGNDAGND
SC049 01/06 Allen modify
(68.00084.B21)
MCB1005S121FBP-GP
MCB1005S121FBP-GP
(68.00084.B21)
12
C267
C268
SC100P50V2JN-3DLGP
SC1KP50V2KX-1DLGP
SC100P50V2JN-3DLGP
LINEOUT_CON-R
LINEOUT-JD
12
12
C272
C271
SC100P50V2JN-3DLGP
SC100P50V2JN-3DLGP
AGND
10KR2J-3-GP
10KR2J-3-GP
12
12
(R_)
LINEOUT_C-L L INEOUT_CON-L
L12
1 2
LINEOUT_C-R
L13
1 2
SINGATRON
2SJ3082-007111F
HPOR_CON
MS1
MS2
NP1
NP2
AGND
LOUT1
5
4
1
P
Q
AUDIO-JK419-GP
(022.10002.01 91)
AGND
3
1
5
6
2
4
Audio(IP/NK comb)
AUDIO-JK500-GP
UHS1
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwa n, R.O.C.
Taipei Hsien 221, Taiwa n, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
Taipei Hsien 221, Taiwa n, R.O.C.
029_MIC/SPEAKER/AUDIO JACK
029_MIC/SPEAKER/AUDIO JACK
029_MIC/SPEAKER/AUDIO JACK
COLORADO MLK SKYLAKE-S
COLORADO MLK SKYLAKE-S
COLORADO MLK SKYLAKE-S
29 107
29 107
29 107
-2
-2
-2
5
D D
C C
4
3
2
1
B B
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
A A
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
5
4
Size Document Number Rev
A
A
A
Date: Sheet of
Date: Sheet of
3
Date: Sheet of
COLORADO MLK SKYLAKE-S
COLORADO MLK SKYLAKE-S
COLORADO MLK SKYLAKE-S
2
Taipei Hsien 221, Taiwan, R.O.C.
30 107
30 107
30 107
1
-2
-2
-2