Dell VOSTRO 1440 Schematics

5

D D

4

3

2

1

DV14 CP UMA+DIS Schematics Document

Arrandale

C C

Intel Ibex Peak-M

2011-03-18

REV : X01

B B

DY : Nopop Component UMA: POP for UMA option

DIS: POP for DIS option 65 BOM : Nopop for 65 BOM option

www.rosefix.com

A A

5

4

www.vinafix.vn

3

2

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A3

Date: Sheet of

DV14 CP UMA+DIS

Taipei Hsien 221, Taiwan, R.O.C.

Cover Page

1

1 100Friday, March 18, 2011

X00

5

39,40

34

45

50

42

44

41

43

DV14 CP Block Diagram

(UMA/DIS Co-layout)

D D

VRAM

1GB (128x16x4)

512MB (64x16x4)

C C

B B

Internal Analog MIC2

A A

MIC IN

gDDR3 900NHz

88,89

CRT

LCD

HDMI

55

54

57

SD/MMC/MS/ MS Pro

58

Audio board

HP1

2CH SPEAKER

AMD

HDMI

4

74

gDDR3 900MHz

Seymou PRO S3

83,84,85,86,87

CRT CRT

LVDS

Level shift

57

CardReader

Realtek RTS5138

32

Azalia CODEC

IDT 92HD87

29

76

58

5

4

Clock Generator

100MHz/

SLG8SP595

Intel CPU

7

2.5Gbps

PCIe x 8

Bandwidth :8GB

FDIx4(UMA)

2.7GT/s

Arrandale

8,9,10,11,12,13,14

DMI

2.5GT/s

Intel

PCH

1.65Gbps

HDMI

USB2.0

www.rosefix.com

AZALIA

24MHz

HDD

4

www.vinafix.vn

14 USB 2.0/1.1 ports

High Definition Audio

SATA ports (6)

PCIE ports (8)

LPC I/F

ACPI 1.1

PCI/PCI BRIDGE

20,21,22,23,24,25,26,27,28

SATA

ODD

SATA

5656

3Gbps

Flash ROM

4MB

SPI

62

3

2

Project code : 91.4IU01.001 PCB P/N : 48.4IU03.0SB Revision : 10272-SB

DDRIII 800/1066 Channel A

DDRIII 800/1066 Channel B

PCIE x 1

PCIE

100MHz

2.5Gbps

USB 2.0

480Mbps

LPC Bus

33MHz

SPI

Flash ROM

256kB

62

3

NUVOTON

NPCE781BA0DX

PS/2 PS/2

Touch PAD

DDRIII 800/1066

10/100 /1000 LOM

Slot 0

Slot 1

Realtek RTL8111E

USB 2.0 x 1

USB 2.0 x 2

18

19

31

KBC

37

Thermal

ENE P2800

Int. KB

68

ENE P2793 Fan

2

PCB LAYER

L1: Top L2: GND L3: Signal L4: Signal L5 VCC L6: Bottom

RJ45 CONN

Mini-Card WLAN+BT3.0

CAMERA

M/B USB x1 (Left)

I/O board USB x2 (Right)

39

25

Title

Size Document Number Rev

A3

60

A3

Date: Sheet of

59

802.11a/b/g

54

76

64

63

Block Diagram

DV14 CP UMA+DIS

1

CPU DC/DC

ISL62882

INPUTS

+PWR_SRC

47,48

OUTPUTS

+VCC_CORE

SYSTEM DC/DC

RT8237AGQW

INPUTS

+PWR_SRC

OUTPUTS

+1.05V_VTT

SYSTEM DC/DC

TPS51123RGER

INPUTS

+PWR_SRC

OUTPUTS

+5V_ALW2 +3.3V_RTC_LDO +5V_ALW +3.3V_ALW +15V_ALW

SYSTEM DC/DC

RT8207LGQW

INPUTS

+PWR_SRC

OUTPUTS

+1.5V_SUS +0.75V_DDR_VTT +V_DDR_REF

SYSTEM DC/DC

G9731F11U

INPUTS

+1.5V_SUS

OUTPUTS

+1V_GPU_PCIE

VGA

RT8208BGQW

INPUTS

+PWR_SRC

OUTPUTS

+VCC_GFX_CORE

MAXIM CHARGER

BQ24707RGRRG4

INPUTS

+DC_IN +PBATT

26

OUTPUTS

+PWR_SRC

SYSTEM DC/DC

RT9025-25PSP

INPUTS

+3.3V_ALW

OUTPUTS

+1.8V_RUN

SYSTEM DC/DC

RT9025-25PSP

INPUTS

+3.3V_ALW +1.8V_RUN_GPU

OUTPUTS

SYSTEM DC/DC

Switches

INPUTS OUTPUTS

26

+1.5V_SUS +5V_ALW

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

1

2 100Tuesday, March 22, 2011

+1.5V_RUN +5V_RUN +3.3V_RUN+3.3V_ALW

X00

49

46

50

93

92

45

51

93

42

5

4

3

2

1

D D

Adapter

AO4407A

Battery

C C

82mA

+15V_ALW

B B

+3.3V_RTC_LDO

+5V_ALW2

+PWR_SRC RT8207LGQW

TPS51611RHBR

+CPU_GFX_CORE

RT8208BGQW

VGA_CORE_PWR

Charger

BQ24707

+PBATT

ISL62882

48000mA 24800mA 1760mA

+VCC_CORE

RT8237AGQW

+1.05V_VTT

TPS51123RGER

10330mA

+3.3V_ALW

RT9025

1761mA

+1.8V_RUN

UP7534BRA8

+5V_USB1

+5V_ALW

AO4468

+5V_RUN

UP7534BRA8

+5V_USB2

2000mA2000mA 6330mA

SI3456DDV-T1

AO4468

6661mA

+3.3V_RUN

RTS5138

PA102FMG

300mA

+3.3V_LAN

DMP2130L

1000mA

+0.75V_DDR_VTT+V_DDR_REF

RT9025

+1V_GFX_PCIE

RT9025

1761mA

+1.8V_RUN_GPU

16825mA

1956.5mA

PA102FMG

+1.5V_RUN_GPU

+1.5V_SUS

AO4468

3500mA

+1.5V_RUN

2016mA

www.rosefix.com

2000mA 300mA

+LCDVDD

+3.3V_RUN_CARD

+3.3V_RUN_GFX

140mA

Power Shape

Regulator LDO Switch

A A

5

4

www.vinafix.vn

3

2

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Power Block Diagram

Size Document Number Rev

A3

Date: Sheet of

Power Block Diagram

DV14 CP UMA+DIS

Taipei Hsien 221, Taiwan, R.O.C.

3 100Tuesday, March 15, 2011

1

X00

A

B

C

D

E

PCH SMBus Block Diagram

KBC SMBus Block Diagram

+5V_RUN



SRN10KJ-5-GP

TouchPad Conn.

TPDATA

TPCLK

PBAT_SMBCLK1

PBAT_SMBDAT1

+3.3V_RUN_GPU

2N7002KDW-GP

TPDATA

TPCLK

Battery Conn.

CLK_SMB

SMBus address:16

DAT_SMB

BQ24707

SCL

SDA

SMBus address:12

+3.3V_RUN_GPU



SRN4K7J-8-GP

GPIO_VGA_04_CLK



GPIO_VGA_03_DATA



PCH

SML1DATA/GPIO75

SML1CLK/GPIO58

23

KBC

PSDAT1

SCL1

SDA1

GPIO61/SCL2

GPIO62/SDA2

TPDATA

TPCLKPSCLK1

BAT_SCL

BAT_SDA

KBC_SCL1

KBC_SDA1

+KBC_PWR



+3.3V_ALW



SRN4K7J-8-GP

SRN100J-3-GP

GPU ROBSON

GPIO_4_SMBCLK

GPIO_3_SMBDATA

+3.3V_RUN



+3.3V_RUN



SRN2K2J-1-GP

PCH_SMBCLK

PCH_SMBDATA

PCH_SMBCLK

PCH_SMBDATA

PCH_SMBCLK

PCH_SMBDATA

PCH_SMBCLK

PCH_SMBDATA

DIMM 1

SCL

SDA

SMBus Address:A0

DIMM 2

SCL

SDA

SMBus Address:A4

Clock Generator

SCLK

SDATA

SMBus address:D2

Minicard WLAN

SMB_CLK

SMB_DATA

18

19

7

NPCE781BA0DX

76

+3.3V_ALW



SRN2K2J-1-GP

SMBCLK

1 1

23

SMBDATA

SML0CLK

SML0DATA

PCH_SMB_CLK

PCH_SMB_DATA

SML0_CLK

SML0_DATA



DMN66D0LDW-7-GP

+3.3V_ALW



SRN4K7J-12-GP

Removed XDP 09/01

2 2

+3.3V_RUN



SRN2K2J-1-GP

L_DDC_DATA

PCH

SDVO_CTRLDATA

3 3

LDDC_DATA_PCH

PCH_HDMI_CLK

PCH_HDMI_DATA

+3.3V_RUN



SRN2K2J-GP



+3.3V_DELAY

LDDC_CLK_PCH

L_DDC_CLK



SRN2K2J-1-GP

CRT_DDC_CLK PCH_CRT_DDCCLK

CRT_DDC_DATA

PCH_CRT_DDCDATA



Level Shift

SCLSDVO_CTRLCLK

SDA

+3.3V_DELAY

DMN66D0LDW-7-GP

LCD CONN

SCL_SINK

SDA_SINK



+5V_RUN



SRN2K2J-GP

DDC_CLK_HDMI



5V_CRT_S0

DDC_DATA_HDMI

HDMI CONN



SRN2K2J-1-GP

CRT_DDCCLK_CON

CRT_DDCDATA_CON

CRT CONN

www.rosefix.com

CRT_GFX_DDCCLK

DDC1CLK

CRT_GFX_DDCDAT

4 4

GPU Seymour

DDC1DATA

A

SRNOJ-6-GP

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A2

DV14 CP UMA+DIS

Date: Sheet of

B

C

D

Date: Sheet of

Taipei Hsien 221, Taiwan, R.O.C.

SMBUS Block Diagram

4 100Wednesday, March 09, 2011

E

4 100Wednesday, March 09, 2011

X00

www.vinafix.vn

A

B

C

D

E

Thermal Block Diagram Audio Block Diagram

1 1

SC2200P50V2KX-2GP

GPU Seymour

2 2

PAGE39

DXP

SC2200P50V2KX-2GP

DXN

UMA Thermal

P2800

GPIO92

PAGE37

KBC NPCE781

3 3

GPIO91

SYS_THRM/VGA_THRM

CPU_THRM_T8

TDR

TDL

Put under CPU(T8 HW shutdown)

MMBT3904-3-GP

T8

OTZ

DMINUS

DPLUS

P2800_DXP

P2800_DXN

THERM_SYS_SHDN#

2N7002

S

P2800_VGA_DXP

SRN0J-6-GP

P2800_VGA_DXN

DY

PURE_HW_SHUTDOWN#

D

IMVP_PWRGD

G

SRN0J-6-GP

PGOD

VR

MMBT3904-3-GP

3V/5V

EN

PORT_D_L+ PORT_D_L-

PORT_D_R+ PORT_D_R-

Codec IDT

92HD87

HP1_PORT_B_L

HP1_PORT_B_R

HP0_PORT_A_L

HP0_PORT_A_R

VREFOUT_A

SPEAKER

HP

OUT

MIC IN

www.rosefix.com

GPIO56

TACH

VIN

VOUT

GPIO4

FAN_TACH1

FAN

A

PORT_C_L

PORT_C_R

VREFOUT_C

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Thermal/Audio Block Diagram

Size Document Number Rev

Custom

Date: Sheet of

B

www.vinafix.vn

C

D

Date: Sheet of

DV14 CP UMA+DIS

Taipei Hsien 221, Taiwan, R.O.C.

Analog MIC

E

X00

5 100Thursday, January 06, 2011

X00

GPIO33

FAN1_PWM

5V

4 4

VSET

VIN

FAN CONTROL

P2793

PAGE39

A

B

C

D

E

Calpella Schematic Checklist Rev.0_7

Name Schematics Notes

SPKR

4 4

INIT3_3V# Weak internal pull-down. Do not pull high.

GNT3#/ GPIO55

INTVRMEN

GNT0#, GNT1#/GPIO51

GNT2#/ GPIO53

3 3

2 2

GPIO33

SPI_MOSI

NV_ALE

NC_CLE Weak internal pull-up. Do not pull low.

HAD_DOCK_EN# /GPIO[33]

HDA_SDO Weak internal pull-down. Do not pull high.

HDA_SYNC

GPIO15

GPIO8

GPIO27

Reboot option at power-up

Internal weak Pull-down.

Default Mode:

Connect to Vcc3_3 with

No Reboot Mode with TCO Disabled:

8.2-k



- 10-k weak pull-up resistor.



Internal pull-up.

Default Mode:

(Connect to ground with 4.7-k

Low (0) = Top Block Swap Mode

weak pull-down resistor).

High (1) = Integrated VRM is enabled Low (0) = Integrated VRM is disabled

Left both GNT0# and GNT1# floating. No pull up

Default (SPI):

required.

Connect GNT1# to ground with 1-k

Boot from PCI:

pull-down resistor. Leave GNT0# Floating.

Connect both GNT0# and GNT1# to ground with

Boot from LPC:

1-k



pull-down resistor.

Default - Internal pull-up.

= Configures DMI for ESI compatible operation (for servers

Low (0)

only. Not for mobile/desktops).

Do not pull low.

Default:

Connect to ground with 1-k

Disable ME in Manufacturing Mode:

pull-down resistor.

Connect to Vcc3_3 with 8.2-k weak pull-up

Enable iTPM:

resistor.

Disable iTPM:

Left floating, no pull-down required. Connect to Vcc3_3 with 8.2-k weak pull-up

Enable Danbury:

resistor. Connect to ground with 4.7-k weak pull-down

Disable Danbury:

resistor.

Flash Descriptor Security will be overridden.

Low (0):

Flash Descriptor Security will be in effect.

High (1) :

Weak internal pull-down. Do not pull high.

Weak internal pull-up. Do not pull low.

Default = Do not connect (floating)

High(1) = Enables the internal VccVRM to have a clean supply for analog rails. No need to use on-board filter circuit. Low (0) = Disables the VccVRM. Need to use on-board filter circuits for analog rails.



Pin Name

CFG[4] Disabled - No Physical Display Port attached to

CFG[3]

CFG[0]

CFG[7]

Strap Description Configuration (Default value for each bit is

DisplayPort Presence

PCI-Express Static Lane Reversal

PCI-Express Configuration Select

Reserved Temporarily used for early Clarksfield samples.

1 unless specified otherwise)

1:Embedded

Embedded DisplayPort.

Enabled - An external Display Port device is

0:

connected to the Embedded Display Port.

Normal Operation.

1:

Lane Numbers Reversed 15 -> 0, 14 -> 1, ...

0:

Single PCI-Express Graphics

1:

Bifurcation enabled

0:

-

Clarksfield (only for early samples pre-ES1)

Connect to GND with 3.01K Ohm/5% resistor

Only temporary for early CFD samples

Note:

(rPGA/BGA) [For details please refer to the WW33 MoW and sighting report]. For a common motherboard design (for AUB and CFD), the pull-down resistor should be used. Does not impact AUB functionality.

Calpella Schematic Checklist Rev.0_7

Default Value

1

0

Processor StrappingPCH Strapping

www.rosefix.com

USB TablePCIE Routing

USB

Pair

LANE2 MiniCard WLAN

LANE3 LAN

0

1

2

3

4

5

6

1 1

7

8

9

10

11

12

13

A

B

Device

X

USB1

USB2

USB3

X

WLAN for BLUETOOTH

CARD READER

CAMERA

X

www.vinafix.vn

C

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A3

Date: Sheet of

D

Date: Sheet of

DV14 CP UMA+DIS

Taipei Hsien 221, Taiwan, R.O.C.

Table of Content

6 100Friday, January 14, 2011

E

X00

5

SSID = CLOCK

4

3

2

1

+3.3V_RUN

D D

12

C701

DY

+3.3V_RUN

C C

SC1U6D3V2KX-GP

1 2

2K2R2J-2-GP

0R0603-PAD

R701

X01

R708

12

DY

CPU_STOP#

12

C702

SC10U10V5ZY-1GP

C703

12

C704

SCD1U16V2ZY-2GP

X00 0106 Remove C705 C707 C708

SCD1U16V2ZY-2GP

X00 09/23

R710 0R2J-2-GPR710 0R2J-2-GP

DREFCLK#23

DREFCLK23

CLKIN_DMI#23

CLKIN_DMI23

CLK_PCIE_SATA#23

CLK_PCIE_SATA23

CLK_CPU_BCLK#23

CLK_CPU_BCLK23

B B

1 2

R711 0R2J-2-GPR711 0R2J-2-GP

1 2

R712 0R2J-2-GPR712 0R2J-2-GP

1 2

R713 0R2J-2-GPR713 0R2J-2-GP

1 2

R714 0R2J-2-GPR714 0R2J-2-GP

1 2

R715 0R2J-2-GPR715 0R2J-2-GP

1 2

R716 0R2J-2-GPR716 0R2J-2-GP

1 2

R717 0R2J-2-GPR717 0R2J-2-GP

1 2

DREFCLK#_R DREFCLK_R

CLKIN_DMI#_R CLKIN_DMI_R

CLK_PCIE_SATA#_R CLK_PCIE_SATA_R

CLK_CPU_BCLK#_R CLK_CPU_BCLK_R

+3.3V_RUN_SL585

+1.5V_RUN_SL585 +3.3V_RUN_SL585

U701

4

DOT_96#

3

DOT_96

14

SRC_2#

13

SRC_2

11

SRC_1/SATA#

10

SRC_1/SATA

22

CPU_0#

23

CPU_0

19

CPU_1#

20

CPU_1

SLG8LV595VTR-GP

71.08595.003

www.rosefix.com

2nd = 71.93197.B03

1 2

0R3J-0-U-GP

17

24

VDD_CPU

GND

26

33

R719

DY

+1.05V_RUN_SL585_IO

1

5

29

VDD_SRC

VSS_REF

21

15

VDD_27

VDD_REF

VDD_DOT

VSS_DOT

VSS_SRC

VSS_CPU

2

12

X00-1126

+1.5V_RUN +1.5V_RUN_SL585

R718

12

0R0603-PAD

12

C706

SC1U10V2KX-1GP

DY

Note: 595 stuff R718, 585 stuff R719

18

VDD_SRC_IO

VDD_CPU_IO

CKPWRGD/PD#

REF_0/CPU_SEL

VSS_278VSS_SATA

9

27MHZ

27MHZ_SS

CPU_STOP#

XTAL_IN

XTAL_OUT

SDA SCL

CLK_VGA_27M_R CLK_VGA_27M

6 7

16 25 30

28 27

31 32

CPU_STOP# CK_PWRGD FSC

CLK_XTAL_IN CLK_XTAL_OUT

PCH_SMBDATA

PCH_SMBCLK

1st Silego :71.08595.003

DY

12

C713

12

C717

12

C718

SCD1U16V2ZY-2GP

+1.05V_VTT

12

C709

SC1U6D3V2KX-GP

DY

X01

R709

0R0603-PAD

BOM merge 10/04BOM merge 10/05

12

C711

12

C712

SCD1U16V2ZY-2GP

C710

SC10U6D3V5KX-1GP

+1.05V_RUN_SL585_IO

C716

SC10U10V5ZY-1GP

C716

SCD1U16V2ZY-2GP

BOM merge 10/05

X00 9/27

R706

12

33R2J-2-GP

12

R703

R703 33R2J-2-GP

33R2J-2-GP

SC4D7P50V2CN-1GP

EC701

DY

PCH_SMBDATA 18,19,23,64 PCH_SMBCLK 18,19,23,64

12

EC702

SC4D7P50V2CN-1GP

CLK_PCH_14M 23

EC702

DY

12

CLK_VGA_27M 85

X01 0316 if U701 is 71.08595.003,R706 install 33ohm (63.33034.1DL); if U701 is 2nd=71.93197.B03,R706 install 22ohm(63.22034.1DL).

2nd IDT :71.93197.B03

82.30005.901

2nd = 82.30005.A51

3rd = 82.30005.B81

X701

1 2

X-14D31818M-37GP

5

12

C714

C714 SC12P50V2JN-3GP

SC12P50V2JN-3GP

X01 0315

A A

CLK_XTAL_OUTCLK_XTAL_IN

12

C715

C715 SC12P50V2JN-3GP

SC12P50V2JN-3GP

+1.05V_VTT

DY

1 2

4

R704

R704 4K7R2J-2-GP

4K7R2J-2-GP

R707

R707 10KR2J-3-GP

10KR2J-3-GP

www.vinafix.vn

FSC 0 1

SPEED

FSC

(Default)

133MHz

100MHz

+3.3V_RUN_SL585

X01 0310

R705

10KR2J-3-GP

CK_PWRGD

2nd = 84.03904.P11

3

Q701

1 2

312

84.03904.L06

PMBS3904-1-GP

VR_CLKEN# 47

2

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Clock Generator SLG8SP585

Size Document Number Rev

A3

Date: Sheet of

DV14 CP UMA+DIS

Taipei Hsien 221, Taiwan, R.O.C.

7 100Wednesday, March 23, 2011

1

X00

5

SSID = CPU

4

3

2

1

D D

1 OF 9

CPU1A

DMI_PTX_CRXN022 DMI_PTX_CRXN122 DMI_PTX_CRXN222 DMI_PTX_CRXN322

DMI_PTX_CRXP022 DMI_PTX_CRXP122 DMI_PTX_CRXP222 DMI_PTX_CRXP322

DMI_CTX_PRXN022 DMI_CTX_PRXN122 DMI_CTX_PRXN222 DMI_CTX_PRXN322

DMI_CTX_PRXP022 DMI_CTX_PRXP122 DMI_CTX_PRXP222 DMI_CTX_PRXP322

C C

FDI_TXN022 FDI_TXN122 FDI_TXN222 FDI_TXN322 FDI_TXN422 FDI_TXN522 FDI_TXN622 FDI_TXN722

FDI_TXP022 FDI_TXP122 FDI_TXP222 FDI_TXP322 FDI_TXP422 FDI_TXP522 FDI_TXP622 FDI_TXP722

FDI_FSYNC022 FDI_FSYNC122

FDI_INT22

FDI_LSYNC022

B B

FDI_LSYNC122

A24 C23 B22 A21

B24 D23 B23 A22

D24 G24 F23 H23

D25 F24 E23 G23

E22 D21 D19 D18 G21 E19 F21 G18

D22 C21 D20 C18 G22 E20 F20 G19

F17 E17

C17

F18 D17

DMI_RX0# DMI_RX1# DMI_RX2# DMI_RX3#

DMI_RX0 DMI_RX1 DMI_RX2 DMI_RX3

DMI_TX0# DMI_TX1# DMI_TX2# DMI_TX3#

DMI_TX0 DMI_TX1 DMI_TX2 DMI_TX3

FDI_TX0# FDI_TX1# FDI_TX2# FDI_TX3# FDI_TX4# FDI_TX5# FDI_TX6# FDI_TX7#

FDI_TX0 FDI_TX1 FDI_TX2 FDI_TX3 FDI_TX4 FDI_TX5 FDI_TX6 FDI_TX7

FDI_FSYNC0 FDI_FSYNC1

FDI_INT

FDI_LSYNC0 FDI_LSYNC1

ARRANDALE

DMI

Intel(R) FDI

www.rosefix.com

1 OF 9

PEG_ICOMPI

PEG_ICOMPO

PEG_RCOMPO

PEG_RBIAS

PEG_RX0# PEG_RX1# PEG_RX2# PEG_RX3# PEG_RX4# PEG_RX5# PEG_RX6# PEG_RX7# PEG_RX8#

PEG_RX9# PEG_RX10# PEG_RX11# PEG_RX12# PEG_RX13# PEG_RX14# PEG_RX15#

PEG_RX0 PEG_RX1 PEG_RX2 PEG_RX3 PEG_RX4 PEG_RX5 PEG_RX6 PEG_RX7 PEG_RX8

PEG_RX9 PEG_RX10 PEG_RX11 PEG_RX12 PEG_RX13 PEG_RX14 PEG_RX15

PEG_TX0# PEG_TX1# PEG_TX2# PEG_TX3# PEG_TX4# PEG_TX5# PEG_TX6# PEG_TX7# PEG_TX8# PEG_TX9#

PEG_TX10# PEG_TX11# PEG_TX12# PEG_TX13# PEG_TX14# PEG_TX15#

PEG_TX0

PEG_TX1

PEG_TX2

PEG_TX3

PEG_TX4

PEG_TX5

PCI EXPRESS -- GRAPHICS

PEG_TX6

PEG_TX7

PEG_TX8

PEG_TX9 PEG_TX10 PEG_TX11 PEG_TX12 PEG_TX13 PEG_TX14 PEG_TX15

B26 A26 B27 A25

K35 J34 J33 G35 G32 F34 F31 D35 E33 C33 D32 B32 C31 B28 B30 A31

J35 H34 H33 F35 G33 E34 F32 D34 F33 B33 D31 A32 C30 A28 B29 A30

L33 M35 M33 M30 L31 K32 M29 J31 K29 H30 H29 F29 E28 D29 D27 C26

L34 M34 M32 L30 M31 K31 M28 H31 K28 G30 G29 F28 E27 D28 C27 C25

PEG_IRCOMP_R

EXP_RBIAS

PEG_C_TXN0 PEG_C_TXN1 PEG_C_TXN2 PEG_C_TXN3 PEG_C_TXN4 PEG_C_TXN5 PEG_C_TXN6 PEG_C_TXN7

PEG_C_TXP0 PEG_C_TXP1 PEG_C_TXP2 PEG_C_TXP3 PEG_C_TXP4 PEG_C_TXP5 PEG_C_TXP6 PEG_C_TXP7

R801 49D9R2F-GPR801 49D9R2F-GP

1 2

R802 750R2F-GPR802 750R2F-GP

1 2

PEG_RXN0 83 PEG_RXN1 83 PEG_RXN2 83 PEG_RXN3 83 PEG_RXN4 83 PEG_RXN5 83 PEG_RXN6 83 PEG_RXN7 83

PEG_RXP0 83 PEG_RXP1 83 PEG_RXP2 83 PEG_RXP3 83 PEG_RXP4 83 PEG_RXP5 83 PEG_RXP6 83

PEG_RXP7 83

C829 SCD1U10V2KX-5GP

1 2

DIS

C827 SCD1U10V2KX-5GP

1 2

DIS

C832 SCD1U10V2KX-5GP

1 2

DIS

C812 SCD1U10V2KX-5GP

1 2

DIS

C803 SCD1U10V2KX-5GP

1 2

DIS

C811 SCD1U10V2KX-5GP

1 2

DIS

C828 SCD1U10V2KX-5GP

1 2

DIS

C810 SCD1U10V2KX-5GP

1 2

DIS

C826 SCD1U10V2KX-5GP

1 2

DIS

C822 SCD1U10V2KX-5GP

1 2

DIS

C818 SCD1U10V2KX-5GP

1 2

DIS

C815 SCD1U10V2KX-5GP

1 2

DIS

C808 SCD1U10V2KX-5GP

1 2

DIS

C802 SCD1U10V2KX-5GP

1 2

DIS

C820 SCD1U10V2KX-5GP

1 2

DIS

C805 SCD1U10V2KX-5GP

1 2

DIS

PEG_TXN0 83 PEG_TXN1 83 PEG_TXN2 83 PEG_TXN3 83 PEG_TXN4 83 PEG_TXN5 83 PEG_TXN6 83 PEG_TXN7 83

PEG_TXP0 83 PEG_TXP1 83 PEG_TXP2 83 PEG_TXP3 83 PEG_TXP4 83 PEG_TXP5 83 PEG_TXP6 83 PEG_TXP7 83

ARRAN

62.10055.321

A A

5

4

www.vinafix.vn

2nd = 62.10040.821

3rd = 62.10055.551

3

2

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

CPU (PCIE/DMI/FDI)

Size Document Number Rev

A3

Date: Sheet of

CPU (PCIE/DMI/FDI)

DV14 CP UMA+DIS

Taipei Hsien 221, Taiwan, R.O.C.

8 100Wednesday, March 23, 2011

1

X00

5

+1.05V_VTT

D D

C C

Processor Pullups

R902 49D9R2F-GPR902 49D9R2F-GP

1 2

R933 68R2-GPR933 68R2-GP

1 2

R904 68R2-GP

1 2

DY

H_THERMTRIP#25,42,85

PM_DRAM_PWRGD22

H_CATERR#

H_PROCHOT#

H_CPURST#

H_PECI25

H_PROCHOT#45,47

H_PM_SYNC22

H_PWRGD25,42

H_VTTPWRGD49

PLT_RST#21,31,37,64,70,83

Processor Compensation Signals

1 2

R901 20R2F-GPR901 20R2F-GP

1 2

R903 20R2F-GPR903 20R2F-GP

1 2

R905 49D9R2F-GPR905 49D9R2F-GP

1 2

R906 49D9R2F-GPR906 49D9R2F-GP

H_CPURST#

X00

R908

1 2

0R0402-PAD-2-GP

R912

1 2

0R0402-PAD-2-GP

1 2

R913

1K6R2F-GP

1119

B B

4

H_COMP3

H_COMP2

H_COMP1

H_COMP0

H_CATERR#

VCCPWRGOOD

VDDPWRGOOD_R

X00

PLT_RST#_R

12

R915

R915 750R2F-GP

750R2F-GP

3

SSID = CPU

2 OF 9

CPU1B

AT23

COMP3

AT24

COMP2

G16

COMP1

AT26

COMP0

AH24

SKTOCC#

AK14

CATERR#

AT15

PECI

AN26

PROCHOT#

AK15

THERMTRIP#

AP26

RESET_OBS#

AL15

PM_SYNC

AN14

VCCPWRGOOD_1

AN27

VCCPWRGOOD_0

AK13

SM_DRAMPWROK

AM15

VTTPWRGOOD

AM26

TAPPWRGOOD

AL14

RSTIN#

ARRAN

VTT_PWRGD37,49,50

www.rosefix.com

MISC

ARRANDALE

CLOCKS

THERMAL PWR MANAGEMENT

U927

1

2

3

74LVC1G08GW-1-GP

2nd = 73.7SZ08.DAH

CLOCKS

DDR3

MISC

DDR3

MISC

JTAG & BPM

B

A

GND

73.01G08.L04

VCC

5

4

Y

2 OF 9

BCLK

BCLK#

BCLK_ITP

BCLK_ITP#

PEG_CLK

PEG_CLK#

DPLL_REF_SSCLK

DPLL_REF_SSCLK#

SM_DRAMRST#

SM_RCOMP0 SM_RCOMP1 SM_RCOMP2

PM_EXT_TS0#

PM_EXT_TS1#

PRDY# PREQ#

TCK TMS

TRST#

TDO

TDI_M

TDO_M

DBR#

BPM0# BPM1# BPM2# BPM3# BPM4# BPM5# BPM6# BPM7#

+3.3V_RUN

VTT_PWRGD_R3

TDI

R977 1K6R2F-GPR977 1K6R2F-GP

A16 B16

AR30 AT30

E16 D16

A18 A17

F6

AL1 AM1 AN1

AN15 AP15

AT28 AP27

AN28 AP28 AT27

AT29 AR27 AR29 AP29

AN25

AJ22 AK22 AK24 AJ24 AJ25 AH22 AK23 AH23

BCLK_CPU_P_R BCLK_CPU_N_R

PEG_CLK_R PEG_CLK#_R

SM_DRAMRST#

SM_RCOMP_0 SM_RCOMP_1 SM_RCOMP_2

PM_EXTTS#0_C PM_EXTTS#1_C

XDP_TRST#

XDP_TDO_R XDP_TDI_M XDP_TDO_M

H_DBR#_R

VDDPWRGOOD_R

12

X01

0R0402-PAD-2-GP

R916

1 2

R917

0R0402-PAD-2-GP

R918

1 2 1 2

R920

0R0402-PAD-2-GP

X01

R914

1 2

0R0402-PAD-2-GP

R909

1 2

0R2J-2-GP

2

BOM merge Change 09/09

PM_EXTTS#0_C 53

SRN10KJ-5-GP

4

RN905

2 3 1

DY

RN906

SRN0J-6-GP

X00

XDP_DBRESET#

+1.5V_RUN

12

R919

R919 1K27R2F-L-GP

1K27R2F-L-GP

DY

12

R937

R937 750R2F-GP

750R2F-GP

BCLK_CPU_P 25 BCLK_CPU_N 25

Modified 10/7

CLK_EXP_P 23 CLK_EXP_N 23

+1.05V_VTT

23 1

PM_EXTTS#0 18

4

PM_EXTTS#1 19

XDP_DBRESET# 22

Q901

G

S

2N7002K-2-GP

84.2N702.J31

2nd = 84.2N702.031

1 2

R935 0R2J-2-GP

SM_RCOMP_0

SM_RCOMP_1

SM_RCOMP_2

+1.05V_VTT

XDP_TRST#

1

DDR_RST_GATE 25

12

C915

+1.5V_SUS

12

R934

R934 1KR2J-1-GP

1KR2J-1-GP

12

C903

C903 SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SM_DRAMRST#

DDR3_DRAMRST# 18,19

+1.5V_RUN

12

DY

12

DY

SCD047U25V2KX-GP

D

DDR3 Compensation Signals

R907 100R2F-L1-GP-UR907 100R2F-L1-GP-U

1 2

R910 24D9R2F-L-GPR910 24D9R2F-L-GP

1 2

R911 130R2F-1-GPR911 130R2F-1-GP

1 2

RN902

1 2 3

SRN51J-GP

XDP_TDO_R

4

R936

R936 1KR2J-1-GP

1KR2J-1-GP

R988

R988 100KR2J-1-GP

100KR2J-1-GP

S3 circuit

Normal

DY

1.27k 3k

R937R919

0.75k

R977

1.6k

DY

Remove XDP 8/22

A A

5

4

www.vinafix.vn

3

2

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

CPU (THERMAL/CLOCK/PM )

Size Document Number Rev

A3

Date: Sheet of

DV14 CP UMA+DIS

Taipei Hsien 221, Taiwan, R.O.C.

9 100Wednesday, March 23, 2011

1

X00

5

SSID = CPU

CPU1C

4

3 OF 9

3

CPU1D

2

4 OF 9

1

W8

AA6

SA_CK0

AA7

M_A_DQ[63..0]18

D D

C C

B B

M_A_DQ[63..0]

M_A_BS018 M_A_BS118 M_A_BS218

M_A_CAS#18 M_A_RAS#18 M_A_WE#18

M_A_DQ0 M_A_DQ1 M_A_DQ2 M_A_DQ3 M_A_DQ4 M_A_DQ5 M_A_DQ6 M_A_DQ7 M_A_DQ8 M_A_DQ9 M_A_DQ10 M_A_DQ11 M_A_DQ12 M_A_DQ13 M_A_DQ14 M_A_DQ15 M_A_DQ16 M_A_DQ17 M_A_DQ18 M_A_DQ19 M_A_DQ20 M_A_DQ21 M_A_DQ22 M_A_DQ23 M_A_DQ24 M_A_DQ25 M_A_DQ26 M_A_DQ27 M_A_DQ28 M_A_DQ29 M_A_DQ30 M_A_DQ31 M_A_DQ32 M_A_DQ33 M_A_DQ34 M_A_DQ35 M_A_DQ36 M_A_DQ37 M_A_DQ38 M_A_DQ39 M_A_DQ40 M_A_DQ41 M_A_DQ42 M_A_DQ43 M_A_DQ44 M_A_DQ45 M_A_DQ46 M_A_DQ47 M_A_DQ48 M_A_DQ49 M_A_DQ50 M_A_DQ51 M_A_DQ52 M_A_DQ53 M_A_DQ54 M_A_DQ55 M_A_DQ56 M_A_DQ57 M_A_DQ58 M_A_DQ59 M_A_DQ60 M_A_DQ61 M_A_DQ62 M_A_DQ63

C10

D10

H10

G10

AH5 AF5 AK6 AK7 AF6 AG5

AJ10

AL10

AK12

AK8

AK11

AN8 AM10 AR11

AL11

AM9

AN9

AT11 AP12 AM12 AN12 AM13

AT14

AT12

AL13 AR14 AP14

AC3 AB2

AE1 AB3 AE9

A10

B10

E10

F10

J10

AJ7 AJ6

AJ9

AL7

AL8

M6 M8

N8

C7 A7

A8 D8

E6 F7 E9 B7 E7 C6

G8 K7

J8

G7

J7

L7

L9 L6 K8

P9

U7

SA_DQ0 SA_DQ1 SA_DQ2 SA_DQ3 SA_DQ4 SA_DQ5 SA_DQ6 SA_DQ7 SA_DQ8 SA_DQ9 SA_DQ10 SA_DQ11 SA_DQ12 SA_DQ13 SA_DQ14 SA_DQ15 SA_DQ16 SA_DQ17 SA_DQ18 SA_DQ19 SA_DQ20 SA_DQ21 SA_DQ22 SA_DQ23 SA_DQ24 SA_DQ25 SA_DQ26 SA_DQ27 SA_DQ28 SA_DQ29 SA_DQ30 SA_DQ31 SA_DQ32 SA_DQ33 SA_DQ34 SA_DQ35 SA_DQ36 SA_DQ37 SA_DQ38 SA_DQ39 SA_DQ40 SA_DQ41 SA_DQ42 SA_DQ43 SA_DQ44 SA_DQ45 SA_DQ46 SA_DQ47 SA_DQ48 SA_DQ49 SA_DQ50 SA_DQ51 SA_DQ52 SA_DQ53 SA_DQ54 SA_DQ55 SA_DQ56 SA_DQ57 SA_DQ58 SA_DQ59 SA_DQ60 SA_DQ61 SA_DQ62 SA_DQ63

SA_BS0 SA_BS1 SA_BS2

SA_CAS# SA_RAS# SA_WE#

ARRANDALE

SA_CK0#

P7

SA_CKE0

Y6

SA_CK1

Y5

SA_CK1#

P6

SA_CKE1

AE2

SA_CS0#

AE8

SA_CS1#

AD8

SA_ODT0

AF9

SA_ODT1

M_A_DM0

B9

SA_DM0 SA_DM1 SA_DM2 SA_DM3 SA_DM4 SA_DM5 SA_DM6 SA_DM7

SA_DQS0# SA_DQS1# SA_DQS2# SA_DQS3# SA_DQS4# SA_DQS5# SA_DQS6# SA_DQS7#

SA_DQS0 SA_DQS1 SA_DQS2 SA_DQS3 SA_DQS4 SA_DQS5 SA_DQS6 SA_DQS7

SA_MA0

DDR SYSTEM MEMORY A

SA_MA1 SA_MA2 SA_MA3 SA_MA4 SA_MA5

www.rosefix.com

SA_MA6 SA_MA7 SA_MA8

SA_MA9 SA_MA10 SA_MA11 SA_MA12 SA_MA13 SA_MA14 SA_MA15

D7 H7 M7 AG6 AM7 AN10 AN13

C9 F8 J9 N9 AH7 AK9 AP11 AT13

C8 F9 H9 M9 AH8 AK10 AN11 AR13

Y3 W1 AA8 AA3 V1 AA9 V8 T1 Y9 U6 AD4 T2 U3 AG8 T3 V9

M_A_DM1 M_A_DM2 M_A_DM3 M_A_DM4 M_A_DM5 M_A_DM6 M_A_DM7

M_A_DQS#0 M_A_DQS#1 M_A_DQS#2 M_A_DQS#3 M_A_DQS#4 M_A_DQS#5 M_A_DQS#6 M_A_DQS#7

M_A_DQS0 M_A_DQS1 M_A_DQS2 M_A_DQS3 M_A_DQS4 M_A_DQS5 M_A_DQS6 M_A_DQS7

M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14 M_A_A15

M_CLK_DDR0 18 M_CLK_DDR#0 18 M_CKE0 18

M_CLK_DDR1 18 M_CLK_DDR#1 18 M_CKE1 18

M_CS#0 18 M_CS#1 18

M_ODT0 18 M_ODT1 18

M_B_DQ[63..0]19

M_A_DM[7..0] 18

M_A_DQS#[7..0] 18

M_A_DQS[7..0] 18

M_A_A[15..0] 18

M_B_DQ[63..0]

M_B_BS019 M_B_BS119 M_B_BS219

M_B_CAS#19 M_B_RAS#19 M_B_WE#19

M_B_DQ0 M_B_DQ1 M_B_DQ2 M_B_DQ3 M_B_DQ4 M_B_DQ5 M_B_DQ6 M_B_DQ7 M_B_DQ8 M_B_DQ9 M_B_DQ10 M_B_DQ11 M_B_DQ12 M_B_DQ13 M_B_DQ14 M_B_DQ15 M_B_DQ16 M_B_DQ17 M_B_DQ18 M_B_DQ19 M_B_DQ20 M_B_DQ21 M_B_DQ22 M_B_DQ23 M_B_DQ24 M_B_DQ25 M_B_DQ26 M_B_DQ27 M_B_DQ28 M_B_DQ29 M_B_DQ30 M_B_DQ31 M_B_DQ32 M_B_DQ33 M_B_DQ34 M_B_DQ35 M_B_DQ36 M_B_DQ37 M_B_DQ38 M_B_DQ39 M_B_DQ40 M_B_DQ41 M_B_DQ42 M_B_DQ43 M_B_DQ44 M_B_DQ45 M_B_DQ46 M_B_DQ47 M_B_DQ48 M_B_DQ49 M_B_DQ50 M_B_DQ51 M_B_DQ52 M_B_DQ53 M_B_DQ54 M_B_DQ55 M_B_DQ56 M_B_DQ57 M_B_DQ58 M_B_DQ59 M_B_DQ60 M_B_DQ61 M_B_DQ62 M_B_DQ63

AF3

AG1

AK1 AG4 AG3

AH4

AK3

AK4 AM6

AN2

AK5

AK2 AM4 AM3

AP3

AN5

AT4

AN6

AN4

AN3

AT5

AT6

AN7

AP6

AP8

AT9

AT7

AP9

AR10

AT10

AB1

AC5

AC6

B5

SB_DQ0

A5

SB_DQ1

C3

SB_DQ2

B3

SB_DQ3

E4

SB_DQ4

A6

SB_DQ5

A4

SB_DQ6

C4

SB_DQ7

D1

SB_DQ8

D2

SB_DQ9

F2

SB_DQ10

F1

SB_DQ11

C2

SB_DQ12

F5

SB_DQ13

F3

SB_DQ14

G4

SB_DQ15

H6

SB_DQ16

G2

SB_DQ17

J6

SB_DQ18

J3

SB_DQ19

G1

SB_DQ20

G5

SB_DQ21

J2

SB_DQ22

J1

SB_DQ23

J5

SB_DQ24

K2

SB_DQ25

L3

SB_DQ26

M1

SB_DQ27

K5

SB_DQ28

K4

SB_DQ29

M4

SB_DQ30

N5

SB_DQ31 SB_DQ32 SB_DQ33

AJ3

SB_DQ34 SB_DQ35 SB_DQ36 SB_DQ37

AJ4

SB_DQ38 SB_DQ39 SB_DQ40 SB_DQ41 SB_DQ42 SB_DQ43 SB_DQ44 SB_DQ45 SB_DQ46 SB_DQ47 SB_DQ48 SB_DQ49 SB_DQ50 SB_DQ51 SB_DQ52 SB_DQ53 SB_DQ54 SB_DQ55 SB_DQ56 SB_DQ57 SB_DQ58 SB_DQ59 SB_DQ60 SB_DQ61 SB_DQ62 SB_DQ63

SB_BS0

W5

SB_BS1

R7

SB_BS2

SB_CAS#

Y7

SB_RAS# SB_WE#

ARRANDALE

DDR SYSTEM MEMORY - B

SB_CK0 SB_CK0# SB_CKE0

SB_CK1 SB_CK1# SB_CKE1

SB_CS0# SB_CS1#

SB_ODT0 SB_ODT1

SB_DM0

SB_DM1

SB_DM2

SB_DM3

SB_DM4

SB_DM5

SB_DM6

SB_DM7

SB_DQS0# SB_DQS1# SB_DQS2# SB_DQS3# SB_DQS4# SB_DQS5# SB_DQS6# SB_DQS7#

SB_DQS0 SB_DQS1 SB_DQS2 SB_DQS3 SB_DQS4 SB_DQS5 SB_DQS6 SB_DQS7

SB_MA0

SB_MA1

SB_MA2

SB_MA3

SB_MA4

SB_MA5

SB_MA6

SB_MA7

SB_MA8

SB_MA9 SB_MA10 SB_MA11 SB_MA12 SB_MA13 SB_MA14 SB_MA15

W9 M3

V7 V6 M2

AB8 AD6

AC7 AD1

D4 E1 H3 K1 AH1 AL2 AR4 AT8

D5 F4 J4 L4 AH2 AL4 AR5 AR8

C5 E3 H4 M5 AG2 AL5 AP5 AR7

U5 V2 T5 V3 R1 T8 R2 R6 R4 R5 AB5 P3 R3 AF7 P5 N1

M_B_DM0 M_B_DM1 M_B_DM2 M_B_DM3 M_B_DM4 M_B_DM5 M_B_DM6 M_B_DM7

M_B_DQS#0 M_B_DQS#1 M_B_DQS#2 M_B_DQS#3 M_B_DQS#4 M_B_DQS#5 M_B_DQS#6 M_B_DQS#7

M_B_DQS0 M_B_DQS1 M_B_DQS2 M_B_DQS3 M_B_DQS4 M_B_DQS5 M_B_DQS6 M_B_DQS7

M_B_A0 M_B_A1 M_B_A2 M_B_A3 M_B_A4 M_B_A5 M_B_A6 M_B_A7 M_B_A8 M_B_A9 M_B_A10 M_B_A11 M_B_A12 M_B_A13 M_B_A14 M_B_A15

M_CLK_DDR2 19 M_CLK_DDR#2 19 M_CKE2 19

M_CLK_DDR3 19 M_CLK_DDR#3 19 M_CKE3 19

M_CS#2 19 M_CS#3 19

M_ODT2 19 M_ODT3 19

M_B_DM[7..0] 19

M_B_DQS#[7..0] 19

M_B_DQS[7..0] 19

M_B_A[15..0] 19

ARRAN

A A

5

4

www.vinafix.vn

3

ARRAN

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A3

Date: Sheet of

2

Date: Sheet of

DV14 CP UMA+DIS

Taipei Hsien 221, Taiwan, R.O.C.

CPU (DDR)

1

X00

10 100Wednesday, March 23, 2011

X00

5

4

3

2

1

SSID = CPU

5 OF 9

CPU1E

AP25 AL25 AL24 AL22

AJ33

AG9 M27

H17 G25 G17 E31 E30

L28 J17

CPU1E

RSVD#AP25 RSVD#AL25 RSVD#AL24 RSVD#AL22 RSVD#AJ33 RSVD#AG9 RSVD#M27 RSVD#L28 SA_DIMM_VREF# SB_DIMM_VREF# RSVD#G25 RSVD#G17 RSVD#E31 RSVD#E30

ARRANDALE

D D

CFG0

DY

12

R1101

R1101 3KR2F-GP

3KR2F-GP

PCI-Express Configuration Select

CFG0

1:Single PEG 0:Bifurcation enabled

5 OF 9

RSVD#AJ13 RSVD#AJ12

RSVD#AH25 RSVD#AK26

RSVD#AL26

RSVD_NCTF#AR2

RSVD#AJ26 RSVD#AJ27

AJ13 AJ12

AH25 AK26

AL26 AR2

AJ26 AJ27

KEY

VSS

AL28 AL29 AP30 AP32 AL27 AT31 AT32 AP33 AR33

AR32

E15 F15 A2 D15 C15 AJ15 AH15

AA5 AA4 R8 AD3 AD2 AA2 AA1 R9 AG7 AE3

V4 V5 N2 AD5 AD7 W3 W2 N3 AE5 AD9

AP34

VSS (AP34) can be left NC is CRB implementation; EDS/DG recommendation to GND.

CFG0

AM30

CFG0

AM28

CFG1

AP31

C C

CFG3

DY

12

R1102

R1102 3KR2J-2-GP

3KR2J-2-GP

CFG3 - PCI-Express Static Lane Reversal

CFG3

1 :Normal Operation 0 :Lane Numbers Reversed 15 -> 0, 14 -> 1, ...

CFG3 CFG4

CFG7

Change to Normal operation 20100202

CFG4

B B

DY

12

R1103

R1103 3KR2F-GP

3KR2F-GP

CFG4 - Display Port Presence

CFG4

1:Disabled; No Physical Display Port attached to Embedded Display Port 0:Enabled; An external Display Port device is connected to the Embedded Display Port

AL32

AL30 AM31 AN29 AM32

AK32

AK31

AK28

AJ28 AN30 AN32

AJ32

AJ29

AJ30

AK30

H16

B19 A19

A20 B20

AC9 AB9

U9 T9

CFG2 CFG3 CFG4 CFG5 CFG6 CFG7 CFG8 CFG9 CFG10 CFG11 CFG12 CFG13 CFG14 CFG15 CFG16 CFG17 RSVD_TP#H16

RSVD#B19 RSVD#A19

RSVD#A20 RSVD#B20

RSVD#U9 RSVD#T9

RSVD#AC9 RSVD#AB9

www.rosefix.com

CFG7

DY

12

R1104

R1104 3KR2F-GP

3KR2F-GP

CFG7(Reserved) - Temporarily used for early Clarksfield samples.

CFG7 Clarksfield (only for early samples pre-ES1) -

Connect to GND with 3.01K Ohm/5% resistor.

Note: Only temporary for early CFD sample (rPGA/BGA) [For details please refer to the WW33 MoW and sighting report]. For a common M/B design (for AUB and CFD), the pull-down resistor shouble be used. Does not impact AUB functionality.

J29 J28

RSVD#J29 RSVD#J28

ARRAN

RSVD#AL28

RSVD#AL29 RSVD#AP30 RSVD#AP32

RSVD#AL27 RSVD#AT31 RSVD#AT32 RSVD#AP33 RSVD#AR33

RSVD#AR32

RSVD_TP#E15

RSVD_TP#F15

RESERVED

RSVD#D15 RSVD#C15

RSVD#AJ15 RSVD#AH15

RSVD_TP#AA5 RSVD_TP#AA4

RSVD_TP#R8 RSVD_TP#AD3 RSVD_TP#AD2 RSVD_TP#AA2 RSVD_TP#AA1

RSVD_TP#R9 RSVD_TP#AG7 RSVD_TP#AE3

RSVD_TP#V4

RSVD_TP#V5

RSVD_TP#N2 RSVD_TP#AD5 RSVD_TP#AD7

RSVD_TP#W3 RSVD_TP#W2

RSVD_TP#N3 RSVD_TP#AE5 RSVD_TP#AD9

A A

5

4

www.vinafix.vn

3

2

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

CPU (RESERVED)

Size Document Number Rev

A3

Date: Sheet of

CPU (RESERVED)

DV14 CP UMA+DIS

Taipei Hsien 221, Taiwan, R.O.C.

11 100Monday, March 07, 2011

1

X00

SSID = CPU

5

4

CPU1F

3

6 OF 9

2

1

+VCC_CORE

PROCESSOR CORE POWER

+VCC_CORE

D D

C C

C1243

12

B B

X00 0210

12

SC10U6D3V5KX-1GP

C1225

C1206

SC10U6D3V5KX-1GP

X00 0210

C1209

C1208

C1207

12

SC10U6D3V5KX-1GP

DY

SC4D7U6D3V5KX-3GP

C1213

12

SC10U6D3V5KX-1GP

X00 0210

12

C1236

SC22U6D3V5MX-2GP

12

C1227

C1237

SC10U6D3V5KX-1GP

X00 0210

12

C1224

C1224 SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

Merge bom 09/10

C1231

C1230

12

SC10U6D3V5KX-1GP

12

Delete 14 pcs 10U caps 9/9

SC10U6D3V5KX-1GP

X00 0210

C1240

SC4D7U6D3V5KX-3GP

SC10U6D3V5KX-1GP

X00 0210

C1232

12

DY

48A

SC10U6D3V5KX-1GP

AG35

VCC

AG34

VCC

AG33

VCC

AG32

VCC

AG31

VCC

AG30

VCC

AG29

VCC

AG28

VCC

AG27

VCC

AG26

VCC

AF35

VCC

AF34

VCC

AF33

VCC

AF32

VCC

AF31

VCC

AF30

VCC

AF29

VCC

AF28

VCC

AF27

VCC

AF26

VCC

AD35

VCC

AD34

VCC

AD33

VCC

AD32

VCC

AD31

VCC

AD30

VCC

AD29

VCC

AD28

VCC

AD27

VCC

AD26

VCC

AC35

VCC

AC34

VCC

AC33

VCC

AC32

VCC

AC31

VCC

AC30

VCC

AC29

VCC

AC28

VCC

AC27

VCC

AC26

VCC

AA35

VCC

AA34

VCC

AA33

VCC

AA32

VCC

AA31

VCC

AA30

VCC

AA29

VCC

AA28

VCC

AA27

VCC

AA26

VCC

Y35

VCC

Y34

VCC

Y33

VCC

Y32

VCC

Y31

VCC

Y30

VCC

Y29

VCC

Y28

VCC

Y27

VCC

Y26

VCC

V35

VCC

V34

VCC

V33

VCC

V32

VCC

V31

VCC

V30

VCC

V29

VCC

V28

VCC

V27

VCC

V26

VCC

U35

VCC

U34

VCC

U33

VCC

U32

VCC

U31

VCC

U30

VCC

U29

VCC

U28

www.rosefix.com

VCC

U27

VCC

U26

VCC

R35

VCC

R34

VCC

R33

VCC

R32

VCC

R31

VCC

R30

VCC

R29

VCC

R28

VCC

R27

VCC

R26

VCC

P35

VCC

P34

VCC

P33

VCC

P32

VCC

P31

VCC

P30

VCC

P29

VCC

P28

VCC

P27

VCC

P26

VCC

ARRANDALE

CPU CORE SUPPLY

CPU VIDS

POWER

SENSE LINES

1.1V RAIL POWER

PROC_DPRSLPVR

VTT_SELECT

VSS_SENSE_VTT

VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0

VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0

PSI#

VID0 VID1 VID2 VID3 VID4 VID5 VID6

ISENSE

VCC_SENSE VSS_SENSE

VTT_SENSE

AH14 AH12 AH11 AH10 J14 J13 H14 H12 G14 G13 G12 G11 F14 F13 F12 F11 E14 E12 D14 D13 D12 D11 C14 C13 C12 C11 B14 B12 A14 A13 A12 A11

AF10 AE10 AC10 AB10 Y10 W10 U10 T10 J12 J11 J16 J15

AN33

H_VID0

AK35

H_VID1

AK33

H_VID2

AK34

H_VID3

AL35

H_VID4

AL33

H_VID5

AM33

H_VID6

AM35 AM34

G15

AN35

AJ34 AJ35

B15

TP_VSS_SENSE_VTT

A15

C1216

SC10U6D3V5KX-1GP

DY

H_VTTVID1

H_VTTVID1 = Low, 1.1V H_VTTVID1 = High, 1.05V

12

C1201

1

Simulation 10/07

12

C1202

SC10U6D3V5KX-1GP

Simulation 10/07

X00 0210

12

SC4D7U6D3V5KX-3GP

C1233

PSI# 47

H_VID[6..0] 47

PM_DPRSLPVR 47

TP1201TPAD14-GPTP1201TPAD14-GP

IMVP_IMON 47

VTT_SENSE 49

TP1202TPAD14-GPTP1202TPAD14-GP

DY

C1211

DY

Modified 09/09

X00 0210

C1218

C1217

12

C1221

12

SC4D7U6D3V5KX-3GP

C1234

12

SC10U6D3V5MX-3GP

SC10U6D3V5KX-1GP

X00 0210

12

+VCC_CORE

12

R1201

R1201 100R2F-L1-GP-U

100R2F-L1-GP-U

12

R1204

R1204 100R2F-L1-GP-U

100R2F-L1-GP-U

12

SC4D7U6D3V5KX-3GP

SC10U6D3V5KX-1GP

C1203

SC10U6D3V5KX-1GP

12

DY

+1.05V_VTT

DY

C1222

12

SC10U6D3V5MX-3GP

X00 0210

C1219

12

SC4D7U6D3V5KX-3GP

+1.05V_VTT

12

C1205

C1204

SC10U6D3V5KX-1GP

DY

The decoupling capacitors, filter recommendations and sense resistors on the CPU/PCH Rails are specific to the CRB Implementation. Customers need to follow the recommendations in the Calpella Platform Design Guide.

Please note that the VTT Rail Values are Auburndale VTT=1.05V; Clarksfield VTT=1.1V

VCC_SENSE 47 VSS_SENSE 47

A A

ARRAN

5

4

3

2

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Custom

Date: Sheet of

CPU (VCC_CORE)

DV14 CP UMA+DIS

Taipei Hsien 221, Taiwan, R.O.C.

12 100Wednesday, March 23, 2011

1

X00

www.vinafix.vn

5

SSID = CPU

+CPU_GFX_CORE

12

SC10U6D3V5MX-3GP

DY

18A

22A

X00 0210

C1326

SC4D7U6D3V5KX-3GP

12

X00 0210

D D

C1327

C1325

12

SC10U6D3V5KX-1GP

SC10U6D3V5MX-3GP

DY

C1328

C1323

12

SC10U6D3V5MX-3GP

DY

Please note that the VTT Rail Values are: Auburndale VTT=1.05V

Clarksfield VTT=1.1V

C C

+1.05V_VTT

B B

C1324

12

SC22U6D3V5MX-2GP

C1313

4

CPU1G

X00 0210

C1309

X00 0210

12

SC10U6D3V5KX-1GP

12

DY

SC4D7U6D3V5KX-3GP

C1308

12

SC10U6D3V5KX-1GP

C1314

C1312

12

SC10U6D3V5MX-3GP

12

DY

C1315

SC10U6D3V5KX-1GP

www.rosefix.com

SC10U10V5KX-2GP

AT21 AT19 AT18

AT16 AR21 AR19 AR18 AR16 AP21 AP19 AP18 AP16 AN21 AN19 AN18 AN16 AM21 AM19 AM18 AM16

AL21

AL19

AL18

AL16 AK21 AK19 AK18 AK16

AJ21

AJ19

AJ18

AJ16 AH21 AH19 AH18 AH16

H25

K26

H27 G28 G27 G26 F26 E26 E25

CPU1G

VAXG1 VAXG2 VAXG3 VAXG4 VAXG5 VAXG6 VAXG7 VAXG8 VAXG9 VAXG10 VAXG11 VAXG12 VAXG13 VAXG14 VAXG15 VAXG16 VAXG17 VAXG18 VAXG19 VAXG20 VAXG21 VAXG22 VAXG23 VAXG24 VAXG25 VAXG26 VAXG27 VAXG28 VAXG29 VAXG30 VAXG31 VAXG32 VAXG33 VAXG34 VAXG35 VAXG36

J24

VTT1

J23

VTT1 VTT1

VTT1

J27

VTT1

J26

VTT1

J25

VTT1 VTT1 VTT1 VTT1 VTT1 VTT1 VTT1 VTT1

ARRAN

GRAPHICS

FDI PEG & DMI

3

7 OF 9

GFX_VID0 GFX_VID1 GFX_VID2 GFX_VID3 GFX_VID4 GFX_VID5 GFX_VID6

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

VTT1 VTT1 VTT1 VTT1

VTT1 VTT1 VTT1 VTT1 VTT1 VTT1

VTT1 VTT1 VTT1

AR22 AT22

AM22 AP22 AN22 AP23 AM23 AP24 AN24

R1305 4K7R2J-2-GPR1305 4K7R2J-2-GP

AR25 AT25

GFX_IMON_C

AM24

AJ1 AF1 AE7 AE4 AC1 AB7 AB4 Y1 W7 W4 U1 T7 T4 P1 N7 N4 L1 H1

P10 N10 L10 K10

J22 J20 J18 H21 H20 H19

L26 L27 M26

12

C1301

1 2

R1304 0R2J-2-GP

SC1U6D3V2KX-GP

X00 0210

SC4D7U6D3V5KX-3GP

C1318

VAXG_SENSE

VSSAXG_SENSE

SENSE

LINES

SENSE

LINES

ARRANDALE

GFX_VR_EN

GFX_DPRSLPVR

GFX_IMON

GRAPHICS VIDs

POWER

DDR3 - 1.5V RAILS

1.1V1.8V

2

+1.5V_RUN

12

DY

+1.5V_SUS

VCC_AXG_SENSE 53 VSS_AXG_SENSE 53

12

DY

12

C1302

C1303

SC1U6D3V2KX-GP

X00 0210

12

C1310

X00 0210

12

C1316

DY

12

C1319

SC1U6D3V2KX-GP

C1376

C1376 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

GFX_VID0 53 GFX_VID1 53 GFX_VID2 53 GFX_VID3 53 GFX_VID4 53 GFX_VID5 53 GFX_VID6 53

Simulation 10/07

X00 0210

12

C1304

SC1U6D3V2KX-GP

C1311

SC4D7U6D3V5KX-3GP

C1317

C1317 SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

12

C1320

SC4D7U6D3V5KX-3GP

1

+1.5V_RUN

12

DY

+1.5V_SUS

C1377

C1377 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

+1.5V_RUN

12

DY

+1.5V_SUS

C1378

C1378 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

+1.5V_RUN

+1.5V_SUS

425302_425302_Calpella_S3PowerReduction_WhitePape

GFX_VR_EN 53 GFX_DPRSLPVR 53 GFX_IMON 53

+1.5V_RUN

SC10U6D3V5KX-1GP

12

3A

X00 0210

C1307

SC4D7U6D3V5KX-3GP

Delete 330U cap 09/09

+1.8V_RUN

C1305

12

C1321

SC1U6D3V2KX-GP

+1.05V_VTT

X00 0210

12

C1306

SC22U6D3V5MX-2GP

1.35A

12

C1322

12

DY

C1379

C1379 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

Revision 0.7

SC2D2U6D3V3KX-GP

BOM merge Change 09/09

A A

5

4

www.vinafix.vn

3

2

SC2D2U6D3V3KX-GP

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

CPU (VCC_GFXCORE)

Size Document Number Rev

A3

Date: Sheet of

CPU (VCC_GFXCORE)

DV14 CP UMA+DIS

Taipei Hsien 221, Taiwan, R.O.C.

13 100Wednesday, March 23, 2011

1

X00

5

4

3

2

1

SSID = CPU

8 OF 9

CPU1H

AT20

VSS

AT17

VSS

AR31

VSS

AR28

VSS

AR26

VSS

AR24

VSS

D D

C C

B B

AR23 AR20 AR17 AR15 AR12

AR9 AR6

AR3 AP20 AP17 AP13 AP10

AP7

AP4

AP2

AN34 AN31 AN23 AN20 AN17 AM29 AM27 AM25 AM20 AM17 AM14 AM11

AM8 AM5

AM2 AL34 AL31 AL23 AL20 AL17 AL12

AL9 AL6

AL3 AK29 AK27 AK25 AK20 AK17 AJ31 AJ23 AJ20 AJ17 AJ14 AJ11

AJ8

AJ5

AJ2

AH35 AH34 AH33 AH32 AH31 AH30 AH29 AH28 AH27 AH26 AH20 AH17 AH13

AH9 AH6 AH3

AG10

AF8 AF4 AF2

AE35

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

VSS

ARRANDALE

8 OF 9

AE34

VSS

AE33

VSS

AE32

VSS

AE31

VSS

AE30

VSS

AE29

VSS

AE28

VSS

AE27

VSS

AE26

VSS

AE6

VSS

AD10

VSS

AC8

VSS

AC4

VSS

AC2

VSS

AB35

VSS

AB34

VSS

AB33

VSS

AB32

VSS

AB31

VSS

AB30

VSS

AB29

VSS

AB28

VSS

AB27

VSS

AB26

VSS

AB6

VSS

AA10

VSS

Y8

VSS

Y4

VSS

Y2

VSS

W35

VSS

W34

VSS

W33

VSS

W32

VSS

W31

VSS

W30

VSS

W29

VSS

W28

VSS

W27

VSS

W26

VSS

W6

VSS

V10

VSS

U8

VSS

U4

VSS

U2

VSS

T35

VSS

T34

VSS

T33

VSS

T32

VSS

T31

VSS

T30

VSS

T29

VSS

T28

VSS

T27

VSS

T26

VSS

T6

VSS

R10

VSS

P8

VSS

P4

VSS

P2

VSS

N35

VSS

N34

VSS

N33

VSS

N32

VSS

N31

VSS

N30

VSS

N29

VSS

N28

VSS

N27

VSS

N26

VSS

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VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

N6 M10 L35 L32 L29 L8 L5 L2 K34 K33 K30

K27

H35 H32 H28 H26 H24 H22 H18 H15 H13 H11

G34 G31 G20

F30 F27 F25 F22 F19 F16 E35 E32 E29 E24 E21 E18 E13 E11

D33 D30 D26

C34 C32 C29 C28 C24 C22 C20 C19 C16 B31 B25 B21 B18 B17 B13 B11

A29 A27 A23

CPU1I

VSS

K9

VSS

K6

VSS

K3

VSS

J32

VSS

J30

VSS

J21

VSS

J19

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

H8

VSS

H5

VSS

H2

VSS VSS VSS VSS

G9

VSS

G6

VSS

G3

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

E8

VSS

E5

VSS

E2

VSS VSS VSS VSS

D9

VSS

D6

VSS

D3

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

B8

VSS

B6

VSS

B4

VSS VSS VSS VSS

A9

VSS

NCTF TEST PIN:

A35,AT1,AT35,B1,A3,A33,A34,AP1,AP35,

AR1,AR35,AT2,AT3,AT33,AT34,B35,C1,C35

NCTF TEST PIN:

A35,AT1,AT35,B1,A3,A33,A34,AP1,AP35,

AR1,AR35,AT2,AT3,AT33,AT34,B35,C1,C35

ARRANDALE

9 OF 9

VSS_NCTF#AR34

VSS_NCTF#B34

VSS_NCTF#B2

VSS_NCTF#B1

VSS_NCTF#A35

VSS_NCTF#AT1

VSS_NCTF#AT35 RSVD_NCTF#AT33 RSVD_NCTF#AT34 RSVD_NCTF#AP35 RSVD_NCTF#AR35

RSVD_NCTF#AT3

RSVD_NCTF#AR1

RSVD_NCTF#AP1

RSVD_NCTF#AT2

RSVD_NCTF#C1

RSVD_NCTF#A3 RSVD_NCTF#C35 RSVD_NCTF#B35 RSVD_NCTF#A34 RSVD_NCTF#A33

AR34 B34 B2

B1 A35 AT1 AT35 AT33 AT34 AP35 AR35 AT3 AR1 AP1 AT2 C1 A3 C35 B35 A34 A33

TP_MCP_VSS_NCTF1 TP_MCP_VSS_NCTF2 TP_MCP_VSS_NCTF3 TP_MCP_VSS_NCTF4

TP1401TP1401

1

TP1402TP1402

1

TP1406TP1406

1

TP1405TP1405

1

ARRAN

A A

5

4

www.vinafix.vn

3

ARRAN

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A3

Date: Sheet of

2

Date: Sheet of

DV14 CP UMA+DIS

Taipei Hsien 221, Taiwan, R.O.C.

CPU (VSS)

1

X00

14 100Monday, March 07, 2011

X00

5

D D

C C

4

3

2

1

(Blanking)

B B

www.rosefix.com

A A

5

4

www.vinafix.vn

3

2

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A3

Date: Sheet of

DV14 CP UMA+DIS

Taipei Hsien 221, Taiwan, R.O.C.

Reserved

1

15 100Thursday, January 06, 2011

X00

5

D D

C C

4

3

2

1

(Blanking)

B B

www.rosefix.com

A A

5

4

www.vinafix.vn

3

2

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A3

Date: Sheet of

DV14 CP UMA+DIS

Taipei Hsien 221, Taiwan, R.O.C.

Reserved

1

16 100Thursday, January 06, 2011

X00

5

D D

C C

4

3

2

1

(Blanking)

B B

www.rosefix.com

A A

5

4

www.vinafix.vn

3

2

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A3

Date: Sheet of

DV14 CP UMA+DIS

Taipei Hsien 221, Taiwan, R.O.C.

Reserved

1

17 100Thursday, January 06, 2011

X00

5

SSID = MEMORY

D D

M_A_BS210

M_A_BS010 M_A_BS110

M_A_DQ[63..0]10

C C

+V_DDR_REF

12

C1818

12

DY

C1822

DY

SC1U6D3V2KX-GP

C1818 SC2D2U10V3KX-1GP

SC2D2U10V3KX-1GP

12

C1823

SC1U6D3V2KX-GP

C1817

SCD1U10V2KX-5GP

B B

12

C1820

SC1U6D3V2KX-GP

Place these caps close to VTT1 and VTT2.

12

C1821

DY

SC1U6D3V2KX-GP

5

+0.75V_DDR_VTT

A A

12

C1826

C1826 SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

DDR3_DRAMRST#9,19

M_ODT010 M_ODT110

+0.75V_DDR_VTT

+V_DDR_REF

4

3

M_A_DM[7..0] 10

M_A_DQS#[7..0] 10

+1.5V_SUS

M_A_DQS[7..0] 10

M_A_A[15..0] 10

3

DM1

M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14 M_A_A15

M_A_DQ0 M_A_DQ1 M_A_DQ2 M_A_DQ3 M_A_DQ4 M_A_DQ5 M_A_DQ6 M_A_DQ7 M_A_DQ8 M_A_DQ9 M_A_DQ10 M_A_DQ11 M_A_DQ12 M_A_DQ13 M_A_DQ14 M_A_DQ15 M_A_DQ16 M_A_DQ17 M_A_DQ18 M_A_DQ19 M_A_DQ20 M_A_DQ21 M_A_DQ22 M_A_DQ23 M_A_DQ24 M_A_DQ25 M_A_DQ26 M_A_DQ27 M_A_DQ28 M_A_DQ29 M_A_DQ30 M_A_DQ31 M_A_DQ32 M_A_DQ33 M_A_DQ34 M_A_DQ35 M_A_DQ36 M_A_DQ37 M_A_DQ38 M_A_DQ39 M_A_DQ40 M_A_DQ41 M_A_DQ42 M_A_DQ43 M_A_DQ44 M_A_DQ45 M_A_DQ46 M_A_DQ47 M_A_DQ48 M_A_DQ49 M_A_DQ50 M_A_DQ51 M_A_DQ52 M_A_DQ53 M_A_DQ54 M_A_DQ55 M_A_DQ56 M_A_DQ57 M_A_DQ58 M_A_DQ59 M_A_DQ60 M_A_DQ61 M_A_DQ62 M_A_DQ63

M_A_DQS#0 M_A_DQS#1 M_A_DQS#2 M_A_DQS#3 M_A_DQS#4 M_A_DQS#5 M_A_DQS#6 M_A_DQS#7

M_A_DQS0 M_A_DQS1 M_A_DQS2 M_A_DQS3 M_A_DQS4 M_A_DQS5 M_A_DQS6 M_A_DQS7

DM1

98

A0

97

A1

96

A2

95

A3

92

A4

91

A5

90

A6

86

A7

89

A8

85

A9

107

A10/AP

84

A11

83

A12

119

A13

80

A14

78

A15

79

A16/BA2

109

BA0

108

BA1

5

DQ0

7

DQ1

15

DQ2

17

DQ3

4

DQ4

6

DQ5

16

DQ6

18

DQ7

21

DQ8

23

DQ9

33

DQ10

35

DQ11

22

DQ12

24

DQ13

34

DQ14

36

DQ15

39

DQ16

41

DQ17

51

DQ18

53

DQ19

40

DQ20

42

DQ21

50

DQ22

52

DQ23

57

DQ24

59

DQ25

67

DQ26

69

DQ27

56

DQ28

58

DQ29

68

DQ30

70

DQ31

129

DQ32

131

DQ33

141

DQ34

143

DQ35

130

DQ36

132

DQ37

140

DQ38

142

DQ39

147

DQ40

149

DQ41

157

DQ42

159

DQ43

146

DQ44

148

DQ45

158

DQ46

160

DQ47

163

DQ48

165

DQ49

175

DQ50

177

DQ51

164

DQ52

166

DQ53

174

DQ54

176

DQ55

181

DQ56

183

DQ57

191

DQ58

193

DQ59

180

DQ60

182

DQ61

192

DQ62

194

DQ63

10

DQS0#

27

DQS1#

45

DQS2#

62

www.rosefix.com

DQS3#

135

DQS4#

152

DQS5#

169

DQS6#

186

DQS7#

12

DQS0

29

DQS1

47

DQS2

64

DQS3

137

DQS4

154

DQS5

171

DQS6

188

DQS7

116

ODT0

120

ODT1

126

VREF_CA

1

VREF_DQ

30

RESET#

203

VTT1

204

VTT2

DDR3-204P-128-GP

62.10024.D51

2nd = 62.10024.D91

3rd = 62.10017.Q41

RAS#

CAS#

CS0# CS1#

CKE0 CKE1

CK0#

CK1#

EVENT#

VDDSPD

NC#1 NC#2

NC#/TEST

VDD1 VDD2 VDD3 VDD4 VDD5 VDD6 VDD7 VDD8

VDD9 VDD10 VDD11 VDD12 VDD13 VDD14 VDD15 VDD16 VDD17 VDD18

NP1

NP2

110 113

WE#

115

114 121

73 74

101

CK0

103

102

CK1

104

M_A_DM0

11

DM0

M_A_DM1

28

DM1

M_A_DM2

46

DM2

M_A_DM3

63

DM3

M_A_DM4

136

DM4

M_A_DM5

153

DM5

M_A_DM6

170

DM6

M_A_DM7

187

DM7

200

SDA

202

SCL

198

199

SA0_DIM0

197

SA0

SA1_DIM0

201

SA1

77 122 125

75 76 81 82 87 88 93 94 99 100 105 106 111 112 117 118 123 124

2

VSS

3

VSS

8

VSS

9

VSS

13

VSS

14

VSS

19

VSS

20

VSS

25

VSS

26

VSS

31

VSS

32

VSS

37

VSS

38

VSS

43

VSS

44

VSS

48

VSS

49

VSS

54

VSS

55

VSS

60

VSS

61

VSS

65

VSS

66

VSS

71

VSS

72

VSS

127

VSS

128

VSS

133

VSS

134

VSS

138

VSS

139

VSS

144

VSS

145

VSS

150

VSS

151

VSS

155

VSS

156

VSS

161

VSS

162

VSS

167

VSS

168

VSS

172

VSS

173

VSS

178

VSS

179

VSS

184

VSS

185

VSS

189

VSS

190

VSS

195

VSS

196

VSS

205

VSS

206

VSS

www.vinafix.vn

M_A_RAS# 10 M_A_WE# 10 M_A_CAS# 10

M_CS#0 10 M_CS#1 10

M_CKE0 10 M_CKE1 10

M_CLK_DDR0 10 M_CLK_DDR#0 10

M_CLK_DDR1 10 M_CLK_DDR#1 10

PCH_SMBDATA 7,19,23,64 PCH_SMBCLK 7,19,23,64

PM_EXTTS#0 9

C1801

SCD1U10V2KX-5GP

12

C1802

DY

SC2D2U10V3KX-1GP

+1.5V_SUS

+3.3V_RUN

Layout Note: Place these Caps near SO-DIMMA.

2

SA0_DIM0

SA1_DIM0

SODIMM A DECOUPLING

C1804

TC1801

X00 0210

2

C1804

C1803

SE330U2D5VDM-2GP

SC10U10V5ZY-1GP

12

DY

Simulation 10/07

12

C1813

X01 0312

SC1U6D3V2KX-GP

S3 Power Reduction

Modified 10/7

PS_S3CNTRL42,50

2

RN1801

SRN10KJ-5-GP

Simulation 10/07

C1805

SC10U6D3V5KX-1GP

SC10U10V5ZY-1GP

12

DY

12

C1815

C1814

SCD1U10V2KX-5GP

+0.75V_DDR_VTT

1

Note: If SA0 DIM0 = 0, SA1_DIM0 = 0 SO-DIMMA SPD Address is 0xA0

4

1

2 3

X00 0210

C1807

C1808

C1806

G

C1808

SC10U10V5ZY-1GP

12

SC10U6D3V5KX-1GP

DY

SC4D7U6D3V5KX-3GP

C1816

SCD1U10V2KX-5GP

12

R1806

R1806 22R2J-2-GP

22R2J-2-GP

DISCHARGE_0D75V

D

Q1801

Q1801 2N7002K-2-GP

2N7002K-2-GP

S

84.2N702.J31

2nd = 84.2N702.031

Title

Size Document Number Rev

C

Date: Sheet of

SO-DIMMA TS Address is 0x30

If SA0 DIM0 = 1, SA1_DIM0 = 0 SO-DIMMA SPD Address is 0xA2 SO-DIMMA TS Address is 0x32

X00 0210

C1810

C1809

SC10U6D3V5KX-1GP

12

DY

DDR3-SODIMM1

DV14 CP UMA+DIS

DY

12

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

1

X00

18 100Wednesday, March 23, 2011

X00

5

SSID = MEMORY

D D

C C

B B

+0.75V_DDR_VTT

Place these caps close to VTT1 and VTT2.

A A

5

12

C1920

C1919

DY

SC1U6D3V2KX-GP

12

C1921

DY

SC1U6D3V2KX-GP

M_B_BS210

M_B_BS010 M_B_BS110

M_B_DQ[63..0]10

M_ODT210 M_ODT310

DDR3_DRAMRST#9,18

C1922

SC1U6D3V2KX-GP

4

M_B_A0 M_B_A1 M_B_A2 M_B_A3 M_B_A4 M_B_A5 M_B_A6 M_B_A7 M_B_A8 M_B_A9 M_B_A10 M_B_A11 M_B_A12 M_B_A13 M_B_A14 M_B_A15

M_B_DQ0 M_B_DQ1 M_B_DQ2 M_B_DQ3 M_B_DQ4 M_B_DQ5 M_B_DQ6 M_B_DQ7 M_B_DQ8 M_B_DQ9 M_B_DQ10 M_B_DQ11 M_B_DQ12 M_B_DQ13 M_B_DQ14 M_B_DQ15 M_B_DQ16 M_B_DQ17 M_B_DQ18 M_B_DQ19 M_B_DQ20 M_B_DQ21 M_B_DQ22 M_B_DQ23 M_B_DQ24 M_B_DQ25 M_B_DQ26 M_B_DQ27 M_B_DQ28 M_B_DQ29 M_B_DQ30 M_B_DQ31 M_B_DQ32 M_B_DQ33 M_B_DQ34 M_B_DQ35 M_B_DQ36 M_B_DQ37 M_B_DQ38 M_B_DQ39 M_B_DQ40 M_B_DQ41 M_B_DQ42 M_B_DQ43 M_B_DQ44 M_B_DQ45 M_B_DQ46 M_B_DQ47 M_B_DQ48 M_B_DQ49 M_B_DQ50 M_B_DQ51 M_B_DQ52 M_B_DQ53 M_B_DQ54 M_B_DQ55 M_B_DQ56 M_B_DQ57 M_B_DQ58 M_B_DQ59 M_B_DQ60 M_B_DQ61 M_B_DQ62 M_B_DQ63

M_B_DQS#0 M_B_DQS#1 M_B_DQS#2 M_B_DQS#3 M_B_DQS#4 M_B_DQS#5 M_B_DQS#6 M_B_DQS#7

M_B_DQS0 M_B_DQS1 M_B_DQS2 M_B_DQS3 M_B_DQS4 M_B_DQS5 M_B_DQS6 M_B_DQS7

+V_DDR_REF

Note: SO-DIMMB SPD Address is 0xA4 SO-DIMMB TS Address is 0x34

4

107

119

109 108

129 131 141 143 130 132 140 142 147 149 157 159 146 148 158 160 163 165 175 177 164 166 174 176 181 183 191 193 180 182 192 194

135 152 169 186

www.rosefix.com

137 154 171 188

116 120

126

203 204

www.vinafix.vn

DM2

98

A0

97

A1

96

A2

95

A3

92

A4

91

A5

90

A6

86

A7

89

A8

85

A9 A10/AP

84

A11

83

A12 A13

80

A14

78

A15

79

A16/BA2

BA0 BA1

5

DQ0

7

DQ1

15

DQ2

17

DQ3

4

DQ4

6

DQ5

16

DQ6

18

DQ7

21

DQ8

23

DQ9

33

DQ10

35

DQ11

22

DQ12

24

DQ13

34

DQ14

36

DQ15

39

DQ16

41

DQ17

51

DQ18

53

DQ19

40

DQ20

42

DQ21

50

DQ22

52

DQ23

57

DQ24

59

DQ25

67

DQ26

69

DQ27

56

DQ28

58

DQ29

68

DQ30

70

DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63

10

DQS0#

27

DQS1#

45

DQS2#

62

DQS3# DQS4# DQS5# DQS6# DQS7#

12

DQS0

29

DQS1

47

DQS2

64

DQS3 DQS4 DQS5 DQS6 DQS7

ODT0 ODT1

VREF_CA

1

VREF_DQ

30

RESET#

VTT1 VTT2

DDR3-204P-135-GP

62.10024.E21

2nd = 62.10017.Z81

3rd = 62.10017.P61

3

NP1

NP2

110

RAS#

113

WE#

115

CAS#

114

CS0#

121

CS1#

73

CKE0

74

CKE1

101

CK0

103

CK0#

102

CK1

104

CK1#

EVENT#

VDDSPD

NC#1 NC#2

NC#/TEST

VDD1 VDD2 VDD3 VDD4 VDD5 VDD6 VDD7 VDD8

VDD9 VDD10 VDD11 VDD12 VDD13 VDD14 VDD15 VDD16 VDD17 VDD18

SO-DIMMB is placed farther from the Processor than SO-DIMMA

M_B_DM0

11

DM0

M_B_DM1

28

DM1

M_B_DM2

46

DM2

M_B_DM3

63

DM3

M_B_DM4

136

DM4

M_B_DM5

153

DM5

M_B_DM6

170

DM6

M_B_DM7

187

DM7

200

SDA

202

SCL

198

199

SA0_DIM1

197

SA0

SA1_DIM1

201

SA1

77 122 125

75 76 81 82 87 88 93 94 99 100 105 106 111 112 117 118 123 124

2

VSS

3

VSS

8

VSS

9

VSS

13

VSS

14

VSS

19

VSS

20

VSS

25

VSS

26

VSS

31

VSS

32

VSS

37

VSS

38

VSS

43

VSS

44

VSS

48

VSS

49

VSS

54

VSS

55

VSS

60

VSS

61

VSS

65

VSS

66

VSS

71

VSS

72

VSS

127

VSS

128

VSS

133

VSS

134

VSS

138

VSS

139

VSS

144

VSS

145

VSS

150

VSS

151

VSS

155

VSS

156

VSS

161

VSS

162

VSS

167

VSS

168

VSS

172

VSS

173

VSS

178

VSS

179

VSS

184

VSS

185

VSS

189

VSS

190

VSS

195

VSS

196

VSS

205

VSS

206

VSS

+1.5V_SUS

3

M_B_RAS# 10 M_B_WE# 10 M_B_CAS# 10

M_CS#2 10 M_CS#3 10

M_CKE2 10 M_CKE3 10

M_CLK_DDR2 10 M_CLK_DDR#2 10

M_CLK_DDR3 10 M_CLK_DDR#3 10

PCH_SMBDATA 7,18,23,64 PCH_SMBCLK 7,18,23,64

PM_EXTTS#1 9

SCD1U10V2KX-5GP

+V_DDR_REF

SCD1U10V2KX-5GP

C1901

C1923

12

C1902

DY

SC2D2U10V3KX-1GP

12

DY

M_B_DM[7..0] 10

M_B_DQS#[7..0] 10

M_B_DQS[7..0] 10

M_B_A[15..0] 10

+3.3V_RUN

C1924

C1924 SC2D2U10V3KX-1GP

SC2D2U10V3KX-1GP

2

12

C1925

C1925 SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

2

SA1_DIM1

+1.5V_SUS

Layout Note: Place these Caps near SO-DIMMB.

1

Note: If SA0 DIM0 = 0, SA1_DIM0 = 0 SO-DIMMA SPD Address is 0xA0 SO-DIMMA TS Address is 0x30

If SA0 DIM1 = 0, SA1_DIM1 = 1 SO-DIMMA SPD Address is 0xA4

+3.3V_RUN

SO-DIMMA TS Address is 0x34

SA0_DIM1

4

RN1901

RN1901 SRN10KJ-5-GP

SRN10KJ-5-GP

1

2 3

X00 09/23

SODIMM B DECOUPLING

X00 0210

C1906

C1905

SC10U6D3V5KX-1GP

SC10U10V5ZY-1GP

C1907

12

DY

X00 0210

C1915

12

C1916

SCD1U10V2KX-5GP

SC1U6D3V2KX-GP

SCD1U10V2KX-5GP

Title

Size Document Number Rev

Date: Sheet of

DDR3-SODIMM2

DV14 CP UMA+DIS

C1909

C1908

SC10U6D3V5KX-1GP

12

SC4D7U6D3V5KX-3GP

12

C1917

12

X00 0210

Simulation 10/07

C1918

C1918 SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

1

C1910

C1911

SC10U6D3V5KX-1GP

12

DY

19 100Wednesday, March 23, 2011

C1912

SC10U6D3V5KX-1GP

12

DY

X00

5

4

3

2

1

SSID = PCH

D D

4 OF 10

PCH1D

LIBG

T48

L_BKLTEN

T47

L_VDD_EN

Y48

L_BKLTCTL

AB48

L_DDC_CLK

Y45

L_DDC_DATA

AB46

L_CTRL_CLK

V48

L_CTRL_DATA

AP39

LVD_IBG

AP41

LVD_VBG

AT43

LVD_VREFH

AT42

LVD_VREFL

AV53

LVDSA_CLK#

AV51

LVDSA_CLK

BB47

LVDSA_DATA#0

BA52

LVDSA_DATA#1

AY48

LVDSA_DATA#2

AV47

LVDSA_DATA#3

BB48

LVDSA_DATA0

BA50

LVDSA_DATA1

AY49

LVDSA_DATA2

AV48

LVDSA_DATA3

AP48

LVDSB_CLK#

AP47

LVDSB_CLK

AY53

LVDSB_DATA#0

AT49

LVDSB_DATA#1

AU52

LVDSB_DATA#2

AT53

LVDSB_DATA#3

AY51

LVDSB_DATA0

AT48

LVDSB_DATA1

AU50

LVDSB_DATA2

AT51

LVDSB_DATA3

AA52

CRT_BLUE

AB53

CRT_GREEN

AD53

CRT_RED

V51

CRT_DDC_CLK

V53

CRT_DDC_DATA

Y53

CRT_HSYNC

Y51

CRT_VSYNC

AD48

DAC_IREF

AB51

CRT_IRTN

IBEXPEAK-M-GP-NF

LVDS

Digital Display Interface

CRT

PCH_VGA_BLEN37

PCH_LCDVDD_EN54

PCH_LBKLT_CTL54

LDDC_CLK_PCH54 LDDC_DATA_PCH54

Place near PCH

R2003

PCH_LCDVDD_EN

12

DY

100KR2J-1-GP

C C

+3.3V_RUN

123

45

RN2002

RN2002 SRN2K2J-4-GP

SRN2K2J-4-GP

678

LCTRL_DATA

LCTRL_CLK LDDC_CLK_PCH LDDC_DATA_PCH

R2002

1 2

2K37R2F-GP

PCH_TXACLK-54 PCH_TXACLK+54

PCH_TXAOUT0-54 PCH_TXAOUT1-54 PCH_TXAOUT2-54

PCH_TXAOUT0+54 PCH_TXAOUT1+54 PCH_TXAOUT2+54

TP2001 TPAD14-GPTP2001 TPAD14-GP

LDDC_CLK_PCH LDDC_DATA_PCH

LCTRL_CLK LCTRL_DATA

LVDS_VBG

1

PCH_TXACLKPCH_TXACLK+

PCH_TXAOUT0PCH_TXAOUT1PCH_TXAOUT2-

PCH_TXAOUT0+ PCH_TXAOUT1+ PCH_TXAOUT2+

Close to ball <600mil

PCH_CRT_BLUE55

PCH_CRT_GREEN55

B B

PCH_CRT_RED55

RN2005

SRN150F-1-GP

678

123

4 5

PCH_CRT_DDCCLK55 PCH_CRT_DDCDATA55

www.rosefix.com

PCH_CRT_HSYNC55 PCH_CRT_VSYNC55

1 2

R2001 1KR2J-1-GPR2001 1KR2J-1-GP

CRT_IREF

4 OF 10

SDVO_TVCLKINN SDVO_TVCLKINP

SDVO_STALLN SDVO_STALLP

SDVO_INTN SDVO_INTP

SDVO_CTRLCLK

SDVO_CTRLDATA

DDPB_AUXN DDPB_AUXP

DDPB_HPD

DDPB_0N DDPB_0P DDPB_1N DDPB_1P DDPB_2N DDPB_2P DDPB_3N DDPB_3P

DDPC_CTRLCLK

DDPC_CTRLDATA

DDPC_AUXN DDPC_AUXP

DDPC_HPD

DDPC_0N DDPC_0P DDPC_1N DDPC_1P DDPC_2N DDPC_2P DDPC_3N DDPC_3P

DDPD_CTRLCLK

DDPD_CTRLDATA

DDPD_AUXN DDPD_AUXP

DDPD_HPD

DDPD_0N DDPD_0P DDPD_1N DDPD_1P DDPD_2N DDPD_2P DDPD_3N DDPD_3P

BJ46 BG46

BJ48 BG48

BF45 BH45

T51 T53

BG44 BJ44 AU38

BD42 BC42 BJ42 BG42 BB40 BA40 AW38 BA38

Y49 AB49

BE44 BD44 AV40

BE40 BD40 BF41 BH41 BD38 BC38 BB36 BA36

U50 U52

BC46 BD46 AT38

BJ40 BG40 BJ38 BG38 BF37 BH37 BE36 BD36

HDMI_DATA2#_C HDMI_DATA2_C HDMI_DATA1#_C HDMI_DATA1_C HDMI_DATA0#_C HDMI_DATA0_C HDMI_CLK#_C HDMI_CLK_C

Close to VGA

Impedance:100 ohm

C2001 SCD1U10V2KX-5GPC2001 SCD1U10V2KX-5GP

1 2

C2002 SCD1U10V2KX-5GPC2002 SCD1U10V2KX-5GP

1 2

C2003 SCD1U10V2KX-5GPC2003 SCD1U10V2KX-5GP

1 2

C2004 SCD1U10V2KX-5GPC2004 SCD1U10V2KX-5GP

1 2

C2005 SCD1U10V2KX-5GPC2005 SCD1U10V2KX-5GP

1 2

C2006 SCD1U10V2KX-5GPC2006 SCD1U10V2KX-5GP

1 2

C2007 SCD1U10V2KX-5GPC2007 SCD1U10V2KX-5GP

1 2

C2008 SCD1U10V2KX-5GPC2008 SCD1U10V2KX-5GP

1 2

PCH_HDMI_CLK 57 PCH_HDMI_DATA 57

+3.3V_RUN

45

678

X00 0112

123

RN2004

RN2004 SRN2K2J-4-GP

SRN2K2J-4-GP

HDMI_PCH_DET 57

HDMI_PCH_DATA2# 57 HDMI_PCH_DATA2 57 HDMI_PCH_DATA1# 57 HDMI_PCH_DATA1 57 HDMI_PCH_DATA0# 57 HDMI_PCH_DATA0 57 HDMI_PCH_CLK# 57 HDMI_PCH_CLK 57

Impedance:100 ohm

PCH_CRT_DDCCLK

PCH_CRT_DDCDATA

PCH_HDMI_DATA PCH_HDMI_CLK

A A

5

4

www.vinafix.vn

3

2

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A3

Date: Sheet of

PCH (LVDS/CRT/DDI)

DV14 CP UMA+DIS

Taipei Hsien 221, Taiwan, R.O.C.

20 100Wednesday, March 23, 2011

1

X00

5

RN2101

SIO_EXT_SCI#25,37

PCH_GPIO625

+3.3V_RUN

RN2101

1 2 3 4 5 6

SRN8K2J-2-GP-U

RN2102

1 2 3 4 5 6

SRN8K2J-2-GP-U

SIO_EXT_SCI# PCH_GPIO6 SIO_EXT_WAKE#

10 9 8 7

PCI_REQ2# INT_PIRQD# PCI_SERR# PCI_IRDY#

INT_PIRQH# PCI_TRDY# PCI_REQ1# PCI_FRAME#

+3.3V_RUN

RN2103

1 2 3 4 5 6

SRN10KJ-L3-GP

10

INT_PIRQA#

9

PCI_DEVSEL#

8

PCI_PLOCK#

7

PCI_PERR#

PLT_RST#9,31,37,64,70,83

INT_PIRQG# INT_PIRQC# INT_PIRQE#

+3.3V_RUN

D D

+3.3V_RUN

C C

PCI_STOP#

PCI_REQ0# INT_PIRQB# INT_PIRQF# PCI_REQ3#

SIO_EXT_WAKE#25,37

BOOT BIOS Strap

PCI_GNT#1 BOOT BIOS LocationPCI_GNT#0

0 0 LPC

0 1 Reserved

B B

01

11

A16 swap override Strap/Top-Block Swap Override jumper

PCI_GNT#3 Low = A16 swap

override/Top-Block Swap Override enabled High = Default

PCI

SPI(Default)

PCLK_FWH70

DY

CLK_PCI_FB23

12

4

+3.3V_RUN

DY

+3.3V_RUN

www.rosefix.com

R2110 22R2J-2-GP

DY

EC2102

EC2102 SC10P50V2JN-4GP

SC10P50V2JN-4GP

DY

SSID = PCH

U2101

5

VCC

4

Y

74LVC1G08GW-1-GP

0R0402-PAD-2-GP

12

C2101

C2101 SC220P50V2KX-3GP

SC220P50V2KX-3GP

12

R2108 22R2J-2-GPR2108 22R2J-2-GP

PCLK_KBC37

12

EC2103

EC2103 SC10P50V2JN-4GP

SC10P50V2JN-4GP

DY

GND

R2104

1 2

1

B

2

A

3

12

DY

73.01G08.L04

2nd = 73.7SZ08.DAH

PCI_PLTRST#

X01

TP2116TPAD14-GP TP2116TPAD14-GP

1

TP2117TPAD14-GP TP2117TPAD14-GP

1

TP2103TPAD14-GP TP2103TPAD14-GP

1

TP2108TPAD14-GP TP2108TPAD14-GP

1

TP2115TPAD14-GP TP2115TPAD14-GP

1

R2111 22R2J-2-GPR2111 22R2J-2-GP

12

EC2104

EC2104 SC10P50V2JN-4GP

SC10P50V2JN-4GP

12

3

INT_PIRQA# INT_PIRQB# INT_PIRQC# INT_PIRQD#

PCI_REQ0# PCI_REQ1# PCI_REQ2# PCI_REQ3#

PCI_GNT0# PCI_GNT1# PCI_GNT2# PCI_GNT3#

INT_PIRQE# INT_PIRQF# INT_PIRQG# INT_PIRQH#

PCIRST#

PCI_SERR# PCI_PERR#

PCI_IRDY#

PCI_DEVSEL# PCI_FRAME#

PCI_PLOCK#

PCI_STOP# PCI_TRDY#

PCH_PME#

PCI_PLTRST#

PCLK_FWH_R CLK_PCI_FB_R PCLK_KBC_R

PCH1E

H40

AD0

N34

AD1

C44

AD2

A38

AD3

C36

AD4

J34

AD5

A40

AD6

D45

AD7

E36

AD8

H48

AD9

E40

AD10

C40

AD11

M48

AD12

M45

AD13

F53

AD14

M40

AD15

M43

AD16

J36

AD17

K48

AD18

F40

AD19

C42

AD20

K46

AD21

M51

AD22

J52

AD23

K51

AD24

L34

AD25

F42

AD26

J40

AD27

G46

AD28

F44

AD29

M47

AD30

H36

AD31

J50

C/BE0#

G42

C/BE1#

H47

C/BE2#

G34

C/BE3#

G38

PIRQA#

H51

PIRQB#

B37

PIRQC#

A44

PIRQD#

F51

REQ0#

A46

REQ1#/GPIO50

B45

REQ2#/GPIO52

M53

REQ3#/GPIO54

F48

GNT0#

K45

GNT1#/GPIO51

F36

GNT2#/GPIO53

H53

GNT3#/GPIO55

B41

PIRQE#/GPIO2

K53

PIRQF#/GPIO3

A36

PIRQG#/GPIO4

A48

PIRQH#/GPIO5

K6

PCIRST#

E44

SERR#

E50

PERR#

A42

IRDY#

H44

PAR

F46

DEVSEL#

C46

FRAME#

D49

PLOCK#

D41

STOP#

C48

TRDY#

M7

PME#

D5

PLTRST#

N52

CLKOUT_PCI0

P53

CLKOUT_PCI1

P46

CLKOUT_PCI2

P51

CLKOUT_PCI3

P48

CLKOUT_PCI4

IBEXPEAK-M-GP-NF

PCI

NV_CE#0 NV_CE#1 NV_CE#2 NV_CE#3

NV_DQS0 NV_DQS1

NV_DQ0/NV_IO0 NV_DQ1/NV_IO1 NV_DQ2/NV_IO2 NV_DQ3/NV_IO3 NV_DQ4/NV_IO4 NV_DQ5/NV_IO5 NV_DQ6/NV_IO6 NV_DQ7/NV_IO7 NV_DQ8/NV_IO8

NV_DQ9/NV_IO9 NV_DQ10/NV_IO10 NV_DQ11/NV_IO11

NVRAM

NV_DQ12/NV_IO12 NV_DQ13/NV_IO13 NV_DQ14/NV_IO14 NV_DQ15/NV_IO15

NV_RCOMP

NV_WR#0_RE# NV_WR#1_RE#

NV_WE#_CK0 NV_WE#_CK1

USBP0N

USBP1N

USBP2N

USBP3N

USBP4N

USBP5N

USBP6N

USBP7N

USBP8N

USBP9N

USB

USBP10N USBP10P USBP11N USBP11P USBP12N USBP12P USBP13N USBP13P

USBRBIAS#

USBRBIAS

OC0#/GPIO59 OC1#/GPIO40 OC2#/GPIO41 OC3#/GPIO42 OC4#/GPIO43

OC5#/GPIO9 OC6#/GPIO10 OC7#/GPIO14

5 OF 10

NV_ALE NV_CLE

NV_RB#

USBP0P

USBP1P

USBP2P

USBP3P

USBP4P

USBP5P

USBP6P

USBP7P

USBP8P

USBP9P

2

AY9 BD1 AP15 BD8

AV9 BG8

AP7 AP6 AT6 AT9 BB1 AV6 BB3 BA4 BE4 BB6 BD6 BB7 BC8 BJ8 BJ6 BG6

BD3 AY6

AU2

AV7

AY8 AY5

AV11 BF5

H18 J18 A18 C18 N20 P20 J20 L20 F20 G20 A20 C20 M22 N22 B21 D21 H22 J22 E22 F22 A22 C22 G24 H24 L24 M24 A24 C24

B25

D25

N16 J16 F16 L16 E14 G16 F12 T15

NV_ALE NV_CLE

NV_RCOMP

0106 change to port 9 from port5

USB_RBIAS_PN

USB_OC#0_1 USB_OC#2_3 USB_OC#4_5 USB_OC#6_7 USB_OC#8_9 USB_OC#10_11 USB_OC#12_13 SMC_WAKE_SCI#_R

TP2100TP2100 TP2101TP2101

1 1

TP2102TP2102

1

USB_PN1 63 USB_PP1 63 USB_PN2 76 USB_PP2 76 USB_PN3 76 USB_PP3 76

USB_PN9 64 USB_PP9 64 USB_PN10 32 USB_PP10 32 USB_PN11 54 USB_PP11 54

1 2

R2106

R2106 22D6R2F-L1-GP

22D6R2F-L1-GP

Danbury Technology: Disabled when Low. Enable when High.

Pair

0

1

2

3

4

5

6

7

8

9

10

11

12

13

USB_OC#0_1 63 USB_OC#2_3 63 USB_OC#4_5 23

USB_OC#8_9 23

USB_OC#12_13 23

1

USB

Device

X

USB1

USB2

USB3

X

WLAN for BLUETOOTH

CARD READER

CAMERA

X

EMI suggestion 7/27

A00

R2119

1 2

DY

1 2

4K7R2J-2-GP

5

DY

10KR2J-3-GP

R2109

DY

A A

PCI_GNT3#

+3.3V_RUN

RN2104

SMC_WAKE_SCI#_R

USB_OC#0_1

3

PCH_GPIO28

USB_OC#2_3

PCH_GPIO2825

USB_OC#2_363

+3.3V_ALW

4

www.vinafix.vn

RN2104

1 2 3 4 5 6

SRN10KJ-L3-GP

10

USB_OC#10_11

9

TPM_ID1

8

LPD_SPI_INTR#

7

USB_OC#6_7

+3.3V_ALW

TPM_ID1 23

LPD_SPI_INTR# 23

2

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A3

Date: Sheet of

PCH (PCI/USB/NVRAM)

DV14 CP UMA+DIS

Taipei Hsien 221, Taiwan, R.O.C.

21 100Wednesday, March 23, 2011

1

X00

5

4

3

2

1

SSID = PCH

3 OF 10

PCH1C

DMI_CTX_PRXN08 DMI_CTX_PRXN18 DMI_CTX_PRXN28 DMI_CTX_PRXN38

DMI_CTX_PRXP08

D D

+1.05V_VTT

C C

B B

XDP_DBRESET#9

0R0402-PAD-2-GP

PM_PWROK37

PM_DRAM_PWRGD9

PCH_RSMRST#37 PM_SLP_S4# 37,50

SUS_PWR_DN_ACK25,37

PM_PWRBTN#37

AC_PRESENT_EC25,37

1 2

PM_DRAM_PWRGD

0R0402-PAD-2-GP

1 2

PM_BATLOW#_R

PM_RI#

DMI_CTX_PRXP18 DMI_CTX_PRXP28 DMI_CTX_PRXP38

DMI_PTX_CRXN08 DMI_PTX_CRXN18 DMI_PTX_CRXN28 DMI_PTX_CRXN38

DMI_PTX_CRXP08 DMI_PTX_CRXP18 DMI_PTX_CRXP28 DMI_PTX_CRXP38

R2204

1 2

49D9R2F-GP

R2207

0R0402-PAD-2-GP

1 2

0R0402-PAD-2-GP

1 2

R2213

0R0402-PAD-2-GP

1 2

Modified 8/27

PCH_RSMRST# PM_PWROK

DMI_IRCOMP_R

+3.3V_RUN

R2210

R2218

R2216

SRN10KJ-6-GP

12

R2205

R2205 10KR2J-3-GP

10KR2J-3-GP

RN2202

1 2 3 4 5

PM_PWRGD

LAN_RST#1

PM_RSMRST#_R

SUS_PWR_ACK

PM_PWRBTN#_R

AC_PRESENT

8 7 6

BC24

DMI0RXN

BJ22

DMI1RXN

AW20

DMI2RXN

BJ20

DMI3RXN

BD24

DMI0RXP

BG22

DMI1RXP

BA20

DMI2RXP

BG20

DMI3RXP

BE22

DMI0TXN

BF21

DMI1TXN

BD20

DMI2TXN

BE18

DMI3TXN

BD22

DMI0TXP

BH21

DMI1TXP

BC20

DMI2TXP

BD18

DMI3TXP

BH25

DMI_ZCOMP

BF25

DMI_IRCOMP

T6

SYS_RESET#

M6

SYS_PWROK

B17

PWROK

K5

MEPWROK

A10

LAN_RST#

D9

DRAMPWROK

C16

RSMRST#

M1

SUS_PWR_DN_ACK/GPIO30

P5

PWRBTN#

P7

ACPRESENT/GPIO31

A6

BATLOW#/GPIO72

F14

RI#

IBEXPEAK-M-GP-NF

DMI

System Power Management

www.rosefix.com

3 OF 10

FDI_RXN0 FDI_RXN1 FDI_RXN2 FDI_RXN3 FDI_RXN4 FDI_RXN5 FDI_RXN6 FDI_RXN7

FDI_RXP0 FDI_RXP1 FDI_RXP2 FDI_RXP3 FDI_RXP4 FDI_RXP5 FDI_RXP6 FDI_RXP7

FDI_INT

FDI_FSYNC0

FDI

FDI_FSYNC1

FDI_LSYNC0

FDI_LSYNC1

WAKE#

CLKRUN#/GPIO32

SUS_STAT#/GPIO61

SUSCLK/GPIO62

SLP_S5#/GPIO63

SLP_S4#

SLP_S3#

SLP_M#

TP23

PMSYNCH

SLP_LAN#/GPIO29

BA18 BH17 BD16 BJ16 BA16 BE14 BA14 BC12

BB18 BF17 BC16 BG16 AW16 BD14 BB14 BD12

BJ14

BF13

BH13

BJ12

BG14

J12

Y1

P8

F3

E4

H7

P12

K8

N2

BJ10

F6

FDI_TXN0 FDI_TXN1 FDI_TXN2 FDI_TXN3 FDI_TXN4 FDI_TXN5 FDI_TXN6 FDI_TXN7

FDI_TXP0 FDI_TXP1 FDI_TXP2 FDI_TXP3 FDI_TXP4 FDI_TXP5 FDI_TXP6 FDI_TXP7

FDI_FSYNC0

FDI_FSYNC1

FDI_LSYNC0

FDI_LSYNC1

PCH_WAKE#_R

PM_CLKRUN#

PM_SUS_STAT#

PCH_SUSCLK

PCH_SLP_S5#

PM_SLP_S4#_R

PM_SLP_S3#_R

SIO_SLP_M#_R

PM_SLP_DSW#

H_PM_SYNC

PM_SLP_LAN#

FDI_FSYNC0 8

FDI_FSYNC1 8

FDI_LSYNC0 8

FDI_LSYNC1 8

1

FDI_TXN0 8 FDI_TXN1 8 FDI_TXN2 8 FDI_TXN3 8 FDI_TXN4 8 FDI_TXN5 8 FDI_TXN6 8 FDI_TXN7 8

FDI_TXP0 8 FDI_TXP1 8 FDI_TXP2 8 FDI_TXP3 8 FDI_TXP4 8 FDI_TXP5 8 FDI_TXP6 8 FDI_TXP7 8

FDI_INT 8

0R0402-PAD-2-GP

R2203

1 2

R2201

1 2

DY

0R2J-2-GP

TP2201TPAD14-GPTP2201TPAD14-GP

TP2202

0R0402-PAD-2-GP

TPAD14-GP

R2211

1 2

0R0402-PAD-2-GP

0R0402-PAD-2-GP R2212

R2212

1 2

TP2203TPAD14-GPTP2203TPAD14-GP

TP2204TPAD14-GPTP2204TPAD14-GP

TP2205TPAD14-GPTP2205TPAD14-GP

PCH_WAKE#

PCIE_WAKE#

PM_CLKRUN# 25,37

R2220 10R2J-2-GPR2220 10R2J-2-GP

PCH_WAKE# 37

Modify 08/18

PCIE_WAKE# 31,37

12

PM_SLP_S3# 37,42,50,51

H_PM_SYNC 9

PCIE_CLK_LAN_RQ3#23,31

PCH_SUSCLK_KBC 37

PCH_GPIO1123

SIO_EXT_SMI#25,37

Modified 8/27

PM_BATLOW#_R PCH_GPIO11 PM_RI# SIO_EXT_SMI#

X01 0321

PCIE_CLK_LAN_RQ3#LAN_RST#1

PCH_WAKE#

Modified 9/15

RN2201

1 2 3 4 5

SRN10KJ-6-GP

R2208

1 2

DY

R2206

1 2

10KR2J-3-GP

8 7 6

10KR2J-3-GP

X00 0111

+3.3V_ALW

PM_CLKRUN#

12

R2215

A A

Option to " Disable " clkrun. Pulling it down will keep the clks running.

5

R2215

10KR2J-3-GP

DY

4

www.vinafix.vn

3

2

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A3

Date: Sheet of

PCH (DM I/FDI/PM)

DV14 CP UMA+DIS

Taipei Hsien 221, Taiwan, R.O.C.

22 100Wednesday, March 23, 2011

1

X00

5

4

3

2

1

SSID = PCH

2 OF 10

PCH1B

BG30

PERN1

BJ30

PERP1

BF29

PETN1

BH29

PETP1

D D

C C

PCIECLKRQ{0,3,4,5,6,7}# should have a 10K pull-up to +3.3V_ALW. PCIECLKRQ{1,2} should have a 10K pull-up to +3.3_RUN

B B

PCIE_RXN264

PCIE_RXP264 PCIE_TXN264 PCIE_TXP264

PCIE_RXN331

PCIE_RXP331 PCIE_TXN331 PCIE_TXP331

Add serial resistor 8/27

CLK_PCIE_LAN#31 CLK_PCIE_LAN31

C2305 SCD1U10V2KX-5GPC2305 SCD1U10V2KX-5GP C2306 SCD1U10V2KX-5GPC2306 SCD1U10V2KX-5GP

C2303 SCD1U10V2KX-5GPC2303 SCD1U10V2KX-5GP C2304 SCD1U10V2KX-5GPC2304 SCD1U10V2KX-5GP

PCIE_C_TXN2

1 2

PCIE_C_TXP2

1 2

PCIE_C_TXN3

1 2

PCIE_C_TXP3

1 2

PCIE_CLK_RQ0#25

CLK_PCIE_MINI1#64 CLK_PCIE_MINI164

MINI1_CLK_REQ#64

0R2J-2-GP

R2303

1 2

R2304

0R2J-2-GP

1 2

PCIE_CLK_LAN_RQ3#22,31

PCIE_CLK_RQ4#25

PEG_B_CLKRQ#25

PCIE_CLK_RQ0#

PCIE_CLK_RQ1#

MINI1_CLK_REQ#

CLK_PCIE_LAN#_R CLK_PCIE_LAN_R

PCIE_CLK_LAN_RQ3#

PCIE_CLK_RQ4#

PCIE_CLK_RQ5#

PEG_B_CLKRQ#

AW30

PERN2

BA30

PERP2

BC30

PETN2

BD30

PETP2

AU30

PERN3

AT30

PERP3

AU32

PETN3

AV32

PETP3

BA32

PERN4

BB32

PERP4

BD32

PETN4

BE32

PETP4

BF33

PERN5

BH33

PERP5

BG32

PETN5

BJ32

PETP5

BA34

PERN6

AW34

PERP6

BC34

PETN6

BD34

PETP6

AT34

PERN7

AU34

PERP7

AU36

PETN7

AV36

PETP7

BG34

PERN8

BJ34

PERP8

BG36

PETN8

BJ36

PETP8

AK48

CLKOUT_PCIE0N

AK47

CLKOUT_PCIE0P

P9

PCIECLKRQ0#/GPIO73

AM43

CLKOUT_PCIE1N

AM45

CLKOUT_PCIE1P

U4

PCIECLKRQ1#/GPIO18

AM47

CLKOUT_PCIE2N

AM48

CLKOUT_PCIE2P

N4

PCIECLKRQ2#/GPIO20

AH42

CLKOUT_PCIE3N

AH41

CLKOUT_PCIE3P

A8

PCIECLKRQ3#/GPIO25

AM51

CLKOUT_PCIE4N

AM53

CLKOUT_PCIE4P

M9

PCIECLKRQ4#/GPIO26

AJ50

CLKOUT_PCIE5N

AJ52

CLKOUT_PCIE5P

H6

PCIECLKRQ5#/GPIO44

AK53

CLKOUT_PEG_B_N

AK51

CLKOUT_PEG_B_P

P13

PEG_B_CLKRQ#/GPIO56

IBEXPEAK-M-GP-NF

WLAN

LAN

SMBus

PCI-E*

Link

Controller

PEG_A_CLKRQ#/GPIO47

PEG

CLKOUT_DP_N/CLKOUT_BCLK1_N CLKOUT_DP_P/CLKOUT_BCLK1_P

From CLK BUFFER

CLKIN_SATA_N/CKSSCD_N

CLKIN_SATA_P/CKSSCD_P

CLKIN_PCILOOPBACK

www.rosefix.com

CLKOUTFLEX0/GPIO64

CLKOUTFLEX1/GPIO65

CLKOUTFLEX2/GPIO66

Clock Flex

CLKOUTFLEX3/GPIO67

X02 1118

A A

5

+3.3V_RUN

1 2 3

RN2308

SRN10KJ-5-GP

4

PCIE_CLK_RQ1# MINI1_CLK_REQ#

4

www.vinafix.vn

2 OF 10

SMBALERT#/GPIO11

SMBCLK

SMBDATA

SML0ALERT#/GPIO60

SML0CLK

SML0DATA

SML1ALERT#/GPIO74

SML1CLK/GPIO58

SML1DATA/GPIO75

CL_CLK1

CL_DATA1

CL_RST1#

CLKOUT_PEG_A_N CLKOUT_PEG_A_P

CLKOUT_DMI_N CLKOUT_DMI_P

CLKIN_DMI_N CLKIN_DMI_P

CLKIN_BCLK_N CLKIN_BCLK_P

CLKIN_DOT_96N CLKIN_DOT_96P

REFCLK14IN

XTAL25_IN

XTAL25_OUT

XCLK_RCOMP

RTC_BAT_DET#25,62

PCH_GPIO11

B9

PCH_SMB_CLK

H14

PCH_SMB_DATA

C8

TPM_ID1

J14

SML0_CLK

C6

SML0_DATA

G8

LPD_SPI_INTR#

M14

KBC_SCL1

E10

KBC_SDA1

G12

CL_CLK

T13

CL_DATA

T11

CL_RST#

T9

PEG_CLKREQ_C#

H1

CLK_PCIE_R_VGA#

AD43

CLK_PCIE_R_VGA

AD45

CLK_EXP_N

AN4

CLK_EXP_P

AN2

AT1 AT3

CLKIN_DMI#

AW24

CLKIN_DMI

BA24

CLK_CPU_BCLK#

AP3

CLK_CPU_BCLK

AP1

DREFCLK#

F18

DREFCLK

E18

CLK_PCIE_SATA#

AH13

CLK_PCIE_SATA

AH12

CLK_PCH_14M

P41

CLK_PCI_FB

J42

XTAL25_IN

AH51

XTAL25_OUT

AH53

XCLK_RCOMP

AF38

CLK_PCH_GPIO64

T45

P43

T42

CLK48_GPIO

N50

RTC_BAT_DET#

PCIE_CLK_RQ5#

+3.3V_ALW

3

PCH_GPIO11 22

TPM_ID1 21

LPD_SPI_INTR# 21

1

TP2301TPAD14-GPTP2301TPAD14-GP

1

TP2302TPAD14-GPTP2302TPAD14-GP

1

TP2303TPAD14-GPTP2303TPAD14-GP

R2305 0R2J-2-GP

1 2

R2307 33R2J-2-GPR2307 33R2J-2-GP

1 2 3 4 5 6

X00 2011 0105

DY

R2301 0R2J-2-GPR2301 0R2J-2-GP

1 2

R2302 0R2J-2-GPR2302 0R2J-2-GP

1 2

R2306 90D9R2F-1-GPR2306 90D9R2F-1-GP

1 2

TP2304TPAD14-GPTP2304TPAD14-GP

1

12

RN2310

SRN10KJ-L3-GP

KBC_SCL1 37,85

KBC_SDA1 37,85

Add for GPU 8/10

12

EC2301

DY

SC10P50V2JN-4GP

10 9

USB_OC#12_13

8

USB_OC#8_9

7

USB_OC#4_5

PEG_CLKREQ# 85

CLK_PCIE_VGA# 83 CLK_PCIE_VGA 83

CLK_EXP_N 9 CLK_EXP_P 9

CLKIN_DMI# 7 CLKIN_DMI 7

CLK_CPU_BCLK# 7 CLK_CPU_BCLK 7

DREFCLK# 7 DREFCLK 7

CLK_PCIE_SATA# 7 CLK_PCIE_SATA 7

CLK_PCH_14M 7

CLK_PCI_FB 21

+1.05V_VTT

CLK_PCH_48M 32

EMI suggestion 7/27

+3.3V_ALW

USB_OC#12_13 21

USB_OC#8_9 21

USB_OC#4_5 21

2

123

45

RN2301

RN2301 SRN2K2J-4-GP

SRN2K2J-4-GP

678

KBC_SDA1SML0_CLK

KBC_SCL1SML0_DATA

+3.3V_RUN

RN2303

2 3 1

4

SRN2K2J-1-GP

+3.3V_ALW

SRN2K2J-1-GP

Q2301

1

6

2

5

34

2N7002KDW-GP

84.2N702.A3F

2nd = 84.DM601.03F

X01 0228

PCH_SMB_DATA

PCH_SMB_CLK

Modified 1/5

R2309

R2309 10KR2J-3-GP

10KR2J-3-GP

UMA

1 2

PEG_CLKREQ_C#

R2310

R2310 10KR2J-3-GP

10KR2J-3-GP

DIS

1 2

When HDMI parts stuffed, the R2311 need DY.

X00 0112

XTAL25_IN

XTAL25_OUT

Title

Size Document Number Rev

A3

Date: Sheet of

R2311 0R2J-2-GP

DY

X2301

R2308

R2308 1M1R2J-GP

1M1R2J-GP

2 3

1 2

PCH (PCI-E/SMBUS/CLOCK/CL)

XTAL-25MHZ-155-GP

82.30020.D41

2nd = 82.30020.G71

3rd = 82.30020.G61

DV14 CP UMA+DIS

+3.3V_ALW+3.3V_ALW

1

23

RN2302

RN2302 SRN2K2J-1-GP

SRN2K2J-1-GP

4

PCH_SMB_CLK

PCH_SMB_DATA

PCH_SMBDATA 7,18,19,64

PCH_SMBCLK 7,18,19,64

12

41

X01 0315

C2308

1 2

SC15P50V2JN-2-GP

C2307

1 2

SC15P50V2JN-2-GP

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

23 100Wednesday, March 23, 2011

1

X00

5

4

3

2

1

SSID = RTC

+RTC_CELL

D D

R2401

1 2

10MR2J-L-GP

X2401

1 4

12

C2402

SC18P50V2JN-1-GP

32

X-32D768KHZ-67-GP

X01

PCH_AZ_CODEC_BITCLK29

C C

PCH_AZ_CODEC_SYNC29

PCH_SDOUT_CODEC29

+3.3V_RUN

B B

NO REBOOT STRAP

DY

ACZ_SPKR

CLK_SATA_OE#

1 2

R2410 1KR2J-1-GP

1 2

R2411 10KR2J-3-GPR2411 10KR2J-3-GP

PCH_RTCX1

PCH_RTCX2

12

C2403

C2403 SC18P50V2JN-1-GP

SC18P50V2JN-1-GP

PCH_AZ_CODEC_RST#29

EMI suggestion 7/27

No Reboot Strap R23

HDA_SPKR

CLK_SATA_OE# 25

Modify 9/29

R2417

20KR2J-L2-GP

2nd = 82.30001.691

3rd = 82.30001.861

R2417

1 2 1 2

R2416

82.30001.A81

X01

R7310

1 2

12

EC2401

DY

SC22P50V2JN-4GP

R7311

1 2

R7312

1 2

Low = Default High = No Reboot

SRTCRST# PCH_RTCRST#

SC1U10V3KX-3GP

R7309

1 2

ACZ_BIT_CLK

33R2J-2-GP

ACZ_SYNC_R

33R2J-2-GP

ACZ_SDATAOUT_R

33R2J-2-GP

PCH_SPI_CLK62

PCH_SPI_CS0#62

PCH_SPI_DO62

33R2J-2-GP

ME_UNLOCK#37

12

C2401

C2401 SC1U10V3KX-3GP

SC1U10V3KX-3GP

PCH_RTCRST#

21

12

G2401

C2404

ACZ_RST#_R

G2401 GAP-OPEN

GAP-OPEN

+RTC_CELL

PCH_SPI_CLK

PCH_SPI_CS0#

PCH_SPI_DO

www.rosefix.com

PCH_SPI_DI62

INTVRMEN- Integrated SUS

1.1V VRM Enable High - Enable internal VRs

1 2

R2406 1MR2J-1-GPR2406 1MR2J-1-GP

1 2

R2404 330KR2F-L-GPR2404 330KR2F-L-GP

ACZ_SPKR29

PCH_SDIN_CODEC29

TP2404TPAD14-GP TP2404TPAD14-GP

1

TP2405TPAD14-GP TP2405TPAD14-GP

1

TP2406TPAD14-GP TP2406TPAD14-GP

1

TP2407TPAD14-GP TP2407TPAD14-GP

1

TP2408TPAD14-GP TP2408TPAD14-GP

1

0R2J-2-GP

R2413

1 2

R2414 0R2J-2-GPR2414 0R2J-2-GP

1 2

R2415

1 2

R2418

0R0402-PAD-2-GP

1 2

0R0402-PAD-2-GP

PCH_SPI_DI_1

X00 0118

PCH_RTCX1 PCH_RTCX2

SRTCRST#

SM_INTRUDER#

PCH_INTVRMEN

ACZ_BIT_CLK

ACZ_SYNC_R

ACZ_SPKR

ACZ_RST#_R

ACZ_SDATAOUT_R

PCH_JTAG_TCK

PCH_JTAG_TMS

PCH_JTAG_TDI

PCH_JTAG_TDO

PCH_JTAG_RST#

SPI_CLK_R

SPI_CS#0_R

SPI_MOSI_R

G30

BA2

AV3

AY3

AY1

AV1

B13 D13

C14

D17

A16

A14

A30

D29

C30

F30

E32

F32

B29

H32

J30

M3

SSID = PCH

PCH1A

RTCX1 RTCX2

RTCRST#

SRTCRST#

INTRUDER#

INTVRMEN

HDA_BCLK

HDA_SYNC

P1

SPKR

HDA_RST#

HDA_SDIN0

HDA_SDIN1

HDA_SDIN2

HDA_SDIN3

HDA_SDO

HDA_DOCK_EN#/GPIO33

HDA_DOCK_RST#/GPIO13

JTAG_TCK

K3

JTAG_TMS

K1

JTAG_TDI

J2

JTAG_TDO

J4

TRST#

SPI_CLK

SPI_CS0#

SPI_CS1#

SPI_MOSI

SPI_MISO

IBEXPEAK-M-GP-NF

RTCIHDA

SPI JTAG

FWH0/LAD0 FWH1/LAD1 FWH2/LAD2 FWH3/LAD3

FWH4/LFRAME#

LDRQ1#/GPIO23

LPC

SATA0RXN SATA0RXP SATA0TXN SATA0TXP

SATA1RXN SATA1RXP SATA1TXN SATA1TXP

SATA2RXN SATA2RXP SATA2TXN SATA2TXP

SATA3RXN SATA3RXP SATA3TXN SATA3TXP

SATA4RXN SATA4RXP SATA4TXN

SATA

SATA4TXP

SATA5RXN SATA5RXP SATA5TXN SATA5TXP

SATAICOMPO

SATAICOMPI

SATALED#

SATA0GP/GPIO21

SATA1GP/GPIO19

1 OF 10

LDRQ0#

SERIRQ

D33 B33 C32 A32

C34

A34 F34

AB9

AK7 AK6 AK11 AK9

AH6 AH5 AH9 AH8

AF11 AF9 AF7 AF6

AH3 AH1 AF3 AF1

AD9 AD8 AD6 AD5

AD3 AD1 AB3 AB1

AF16

AF15

T3

Y9

V1

LPC_LAD0 LPC_LAD1 LPC_LAD2 LPC_LAD3

SATA_TXN0_C SATA_TXP0_C

SATA_TXN1_C SATA_TXP1_C

SATA_DET#0_R

SATA_DET#1_R

LPC_LAD[0..3]

LPC_LFRAME# 37

INT_SERIRQ 25,37

C2405 SCD01U16V2KX-3GPC2405 SCD01U16V2KX-3GP

1 2

C2406 SCD01U16V2KX-3GPC2406 SCD01U16V2KX-3GP

1 2

C2407 SCD01U16V2KX-3GPC2407 SCD01U16V2KX-3GP

1 2

C2408 SCD01U16V2KX-3GPC2408 SCD01U16V2KX-3GP

1 2

R2412

SATAICOMP

R2412

1 2

37D4R2F-GP

SATA_LED# 66

SATA_DET#0_R 25

SATA_DET#1_R 25

LPC_LAD[0..3] 37

+1.05V_VTT

SATA_RXN0_C 56 SATA_RXP0_C 56 SATA_TXN0 56 SATA_TXP0 56

SATA_RXN1_C 56 SATA_RXP1_C 56 SATA_TXN1 56 SATA_TXP1 56

HDD

ODD

A A

5

4

www.vinafix.vn

3

2

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

PCH (SPI/RTC/LPC/SATA/IHDA)

Size Document Number Rev

A3

Date: Sheet of

DV14 CP UMA+DIS

Taipei Hsien 221, Taiwan, R.O.C.

24 100Wednesday, March 23, 2011

1

X00

5

X01 0309

+3.3V_RUN

1

4

2 3

RN2508

SRN10KJ-5-GP

D D

SIO_EXT_WAKE#21,37

SC47P50V2JN-3GP

PCH_GPIO22

C2501

DY

12

INT_SERIRQ 24,37

SIO_EXT_SMI#22,37

Change NET DGPU_HOLD_RST# to PE_GPIO0 to reset GPU ,09/23

C2502

SC47P50V2JN-3GP

+3.3V_ALW

Remove GPIO12,GPIO24 Pull high 09/10

X01 0309

C C

+3.3V_RUN

UMA

1 2

R2519 1KR2J-1-GPR2519 1KR2J-1-GP

R2508

10KR2J-3-GP

1 2

DGPU_PRSNT#

R2507

10KR2J-3-GP

DIS

1 2

SC47P50V2JN-3GP

HOST_ALTERT#1

+3.3V_RUN

PCH_TEMP_ALERT#37

RN2509

2 3 1

SRN100KJ-6-GP

SSID = PCH

SIO_EXT_SCI#21,37

PCH_GPIO621

DGPU_HOLD_RST#83

DGPU_PWROK92,93

12

DY

DGPU_PWR_EN#37,93

PCH_GPIO39 STP_PCI#

4

DDR_RST_GATE9

R2518

X00

R2518

1 2

0R0402-PAD-2-GP

X00 2011 0105 add R2506

+3.3V_RUN +3.3V_RUN

B B

R2504

10KR2J-3-GP

UMA

1 2

DGPU_HOLD_RST# DGPU_PWR_EN#

R2503

10KR2J-3-GP

DIS

1 2

DY

DIS

R2505

1 2

R2506

1 2

10KR2J-3-GP

Add PE_GPIO0 , PE_GPIO1 09/09 , pull high/low check

4

PCH1F

S_GPIO

SIO_EXT_SCI#

PCH_GPIO6

SIO_EXT_WAKE#

SIO_EXT_SMI#

HOST_ALTERT#1

PCH_GPIO22

TP2507TPAD14-GP TP2507TPAD14-GP

PCH_GPIO2821

CLK_SATA_OE#24

RTC_BAT_DET#23,62

TP2510TPAD14-GP TP2510TPAD14-GP

PCH_GPIO27

1

PCH_GPIO28

STP_PCI#

CLK_SATA_OE#

DGPU_PRSNT#

PCH_GPIO38

PCH_GPIO39

PCH_GPIO45

DDR_RST_GATE

PCH_GPIO48

PCH_TEMP_ALERT#_C

PCH_NCTF_1

1

www.rosefix.com

TP2511TPAD14-GP TP2511TPAD14-GP

TP2512TPAD14-GP TP2512TPAD14-GP

TP2509TPAD14-GP TP2509TPAD14-GP

PCH_NCTF_2

1

PCH_NCTF_3

1

PCH_NCTF_4

1

Y3

BMBUSY#/GPIO0

C38

TACH1/GPIO1

D37

TACH2/GPIO6

J32

TACH3/GPIO7

F10

GPIO8

K9

LAN_PHY_PWR_CTRL/GPIO12

T7

GPIO15

AA2

SATA4GP/GPIO16

F38

TACH0/GPIO17

Y7

SCLOCK/GPIO22

H10

GPIO24

AB12

GPIO27

V13

GPIO28

M11

STP_PCI#/GPIO34

V6

SATACLKREQ#/GPIO35

AB7

SATA2GP/GPIO36

AB13

SATA3GP/GPIO37

V3

SLOAD/GPIO38

P3

SDATAOUT0/GPIO39

H3

PCIECLKRQ6#/GPIO45

F1

PCIECLKRQ7#/GPIO46

AB6

SDATAOUT1/GPIO48

AA4

SATA5GP/GPIO49

F8

GPIO57

A4

VSS_NCTF_1

A49

VSS_NCTF_2

A5

VSS_NCTF_3

A50

VSS_NCTF_4

A52

VSS_NCTF_5

A53

VSS_NCTF_6

B2

VSS_NCTF_7

B4

VSS_NCTF_8

B52

VSS_NCTF_9

B53

VSS_NCTF_10

BE1

VSS_NCTF_11

BE53

VSS_NCTF_12

BF1

VSS_NCTF_13

BF53

VSS_NCTF_14

BH1

VSS_NCTF_15

BH2

VSS_NCTF_16

BH52

VSS_NCTF_17

BH53

VSS_NCTF_18

BJ1

VSS_NCTF_19

BJ2

VSS_NCTF_20

BJ4

VSS_NCTF_21

BJ49

VSS_NCTF_22

BJ5

VSS_NCTF_23

BJ50

VSS_NCTF_24

BJ52

VSS_NCTF_25

BJ53

VSS_NCTF_26

D1

VSS_NCTF_27

D2

VSS_NCTF_28

D53

VSS_NCTF_29

E1

VSS_NCTF_30

E53

VSS_NCTF_31

IBEXPEAK-M-GP-NF

3

MISC

CLKOUT_BCLK0_N/CLKOUT_PCIE8N

CLKOUT_BCLK0_P/CLKOUT_PCIE8P

GPIO

CPU

NCTF

RSVD

6 OF 10

CLKOUT_PCIE6N

CLKOUT_PCIE6P

CLKOUT_PCIE7N

CLKOUT_PCIE7P

A20GATE

PECI

RCIN#

PROCPWRGD

THRMTRIP#

TP1

TP2

TP3

TP4

TP5

TP6

TP7

TP8

TP9

TP10

TP11

TP12

TP13

TP14

TP15

TP16

TP17

TP18

TP19

NC_1

NC_2

NC_3

NC_4

NC_5

INIT3_3V#

TP24

AH45 AH46

AF48 AF47

U2

AM3

AM1

BG10

T1

BE10

BD10

BA22

AW22

BB22

AY45

AY46

AV43

AV45

AF13

M18

N18

AJ24

AK41

AK42

M32

N32

M30

N30

H12

AA23

AB45

AB38

AB42

AB41

T39

P6

C10

INIT3_3V#

2

BCLK_CPU_N 9

BCLK_CPU_P 9

H_PECI 9

SIO_RCIN# 37

+3.3V_ALW

1

H_PWRGD 9,42

12

DY

12

TP2506TPAD14-GPTP2506TPAD14-GP

PCH_THERMTRIP_R

+1.05V_VTT

PCH_THERMTRIP_R

R2516

R2516 10KR2J-3-GP

10KR2J-3-GP

PCH_GPIO45

R2517

R2517 10KR2J-3-GP

10KR2J-3-GP

SIO_A20GATE# 37

SRN56J-4-GP

2 3 1

RN2505

4

Placed Within 2" from PCH

HDMI function detect.

PCH_GPIO45 0 1

HDMI

Function

YES NO

1

H_THERMTRIP# 9,42,85

H/L active ?

RN2507

A A

PM_CLKRUN#22,37

SATA_DET#1_R24 SATA_DET#0_R24

+3.3V_RUN

PM_CLKRUN# PCH_GPIO38 S_GPIO SATA_DET#1_R SATA_DET#0_R

5

RN2507

1 2 3 4 5 6

SRN10KJ-L3-GP

10 9 8

PCH_TEMP_ALERT#_C

7

PCH_GPIO48

4

+3.3V_RUN

PEG_B_CLKRQ#23 PCIE_CLK_RQ0#23 PCIE_CLK_RQ4#23

AC_PRESENT_EC22,37

www.vinafix.vn

PEG_B_CLKRQ# PCIE_CLK_RQ0# PCIE_CLK_RQ4# AC_PRESENT_EC

+3.3V_ALW

RN2506

1 2 3 4 5 6

SRN10KJ-L3-GP

3

10

DDR_RST_GATE

9 8 7

SUS_PWR_DN_ACK

+3.3V_ALW

SUS_PWR_DN_ACK 22,37

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A3

Date: Sheet of

2

Date: Sheet of

PCH (GPIO/CPU)

DV14 CP UMA+DIS

Taipei Hsien 221, Taiwan, R.O.C.

25 100Wednesday, March 23, 2011

1

X00

5

4

3

2

1

SSID = PCH

+1.05V_VTT

C2601

SC10U6D3V5KX-1GP

12

SC10U6D3V5KX-1GP

TP2601TPAD14-GP TP2601TPAD14-GP

1

12

C2609

SC1U10V3KX-3GP

DY

SCD1U10V2KX-5GP

+1.05V_VTT

12

D D

+1.05V_VTT

C C

B B

3.23A

C2608

+1.05V_VTT

C2610

12

SC1U6D3V2KX-GP

DY

C2614

TP2602TPAD14-GP TP2602TPAD14-GP

X00 0210

12

C2602

C2602 SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

+1.05VS_VCCAPLL_EXP

12

C2611

C2612

SC1U10V3KX-3GP

+3.3V_RUN

12

VCCAFDI_VRM

VCCAFDIPLL

1

SC1U6D3V2KX-GP

www.rosefix.com

VCCAFDI_VRM

X00

R2606

1 2

0R0402-PAD-2-GP

+1.8V_RUN

PCH1G

AB24 AB26 AB28 AD26 AD28

AF26 AF28 AF30

AF31 AH26 AH28 AH30 AH31

AJ30

AJ31

AK24

BJ24

AN20 AN22 AN23 AN24 AN26 AN28

BJ26

BJ28

AT26

AT28 AU26 AU28 AV26 AV28

AW26 AW28

BA26 BA28 BB26 BB28 BC26 BC28 BD26 BD28 BE26 BE28 BG26 BG28 BH27

AN30 AN31

AN35

AT22

BJ18

AM23

IBEXPEAK-M-GP-NF

VCCCORE VCCCORE VCCCORE VCCCORE VCCCORE VCCCORE VCCCORE VCCCORE VCCCORE VCCCORE VCCCORE VCCCORE VCCCORE VCCCORE VCCCORE

1.43A

VCCIO

VCCAPLLEXP

VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO

VCCIO VCCIO

VCC3_3

VCCVRM[1]

VCCFDIPLL

VCCIO

POWER

305mA

75mA

CRTLVDS

1.1mA

VCC CORE

66mA

305mA

HVCMOS

156mA

55mA

DMI

5.5mA

PCI E*

31mA

NAND / SPI

FDI

7 OF 10

VCCADAC

VSSA_DAC

VCCALVDS

VSSA_LVDS

VCCTX_LVDS VCCTX_LVDS VCCTX_LVDS VCCTX_LVDS

VCC3_3

VCCVRM

VCCDMI

VCCPNAND VCCPNAND VCCPNAND VCCPNAND VCCPNAND VCCPNAND VCCPNAND VCCPNAND VCCPNAND

VCCME3_3 VCCME3_3 VCCME3_3 VCCME3_3

+VCCA_DAC_1_2

AE50

AE52

AF53

AF51

AH38

AH39

AP43 AP45 AT46 AT45

AB34

AB35

AD35

AT24

AT16

AU16

AM16 AK16 AK20 AK19 AK15 AK13 AM12 AM13 AM15

AM8 AM9 AP11 AP9

12

C2603

SCD01U16V2KX-3GP

+3VS_VCCA_LVD +3.3V_RUN

+1.8VS_VCCTX_LVDS

SCD01U16V2KX-3GP

12

C2618

12

C2607

C2607 SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

+1.8V_RUN

+1.05VS_VCC_DMI

12

C2613

C2613 SC1U10V3KX-3GP

SC1U10V3KX-3GP

12

C2623

C2623 SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

PCH_VCCME3_3

12

C2622

C2622 SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

12

C2605

SCD1U10V2KX-5GP

X01 0310

12

C2606

SC10U6D3V5KX-1GP

DY

1 2

L2603 HCB1608KF-181-GP

1 2

L2602 HCB1608KF-181-GP

68.00214.051

2nd = 68.00206.041

3rd = 68.00335.081

A00

C2616

1 2

SCD1U10V2KX-5GP

SCD01U16V2KX-3GP

12

C2619

+3.3V_RUN

1 2

R2601 0R0402-PADR2601 0R0402-PAD

+3.3V_RUN

12

X01 0310 Add LDO for CRT DAC power

SC1U10V2KX-1GP

R2603 0R0603-PADR2603 0R0603-PAD

DY

12

DY

R2605

R2605 0R0402-PAD

0R0402-PAD

+5V_RUN +3.3V_CRT_LDO

C2621

A00

1 2

R2611 0R0805-PADR2611 0R0805-PAD

C2617

SC10U6D3V5MX-3GP

+1.05V_VTT

+V_NVRAM_VCCQ

U2601

VIN3VOUT

2

GND

1

12

EN

RT9198-33PBG-GP

74.09198.07F

2nd = 74.09091.H3F

12

A00

+1.8V_RUN

NC#5

+3.3V_RUN

+3.3V_CRT_LDO

+1.8V_RUN

12

R2607

R2607 0R0402-PAD

0R0402-PAD

4

5

+3.3V_RUN

12

R2608

DY

0R2J-2-GP

12

C2620

C2620 SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

A A

5

4

www.vinafix.vn

3

2

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A3

Date: Sheet

Date: Sheet of

DV14 CP UMA+DIS

Taipei Hsien 221, Taiwan, R.O.C.

PCH (POWER1)

1

of

26 100Tuesday, March 22, 2011

X00

5

4

3

2

1

10 OF 10

HDA

10 OF 10

VCCIO VCCIO VCCIO VCCIO

VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3

VCCSUS3_3

VCCIO

V5REF_SUS

V5REF

VCC3_3

VCCSATAPLL VCCSATAPLL

VCCIO

VCCVRM

VCCIO

VCCIO VCCIO VCCIO VCCIO

VCCME VCCME VCCME VCCME

VCCSUSHDA

3

V24 V26 Y24 Y26

V28 U28 U26 U24 P28 P26 N28 N26 M28 M26 L28 L26 J28 J26 H28 H26 G28 G26 F28 F26 E28 E26 C28 C26 B27 A28 A26

U23

V23

+5VALW_PCH_VCC5REFSUS

F24

+5VS_PCH_VCC5REF

K49

J38

L38

M36

N36

P36

U35

AD13

AK3 AK1

AH22

AT20

AH19

AD20

AF22

AD19 AF20 AF19 AH20

AB19 AB20 AB22 AD22

AA34 Y34 Y35 AA35

L30

+3VS_+1.5VS_HDA_IO

VCCSATAPLL

1mA

12

C2706

DY

SC1U6D3V2KX-GP

12

C2716

C2716 SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

+1.8V_RUN

12

C2731

C2731 SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

12

C2703

C2703 SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

+3.3V_ALW +3.3V_ALW

12

C2709

C2709 SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

1mA

TP2514 TPAD14-GPTP2514 TPAD14-GP

1

R2707 0R0402-PADR2707 0R0402-PAD

1 2

+1.05V_VTT

+3.3V_RUN

+1.05V_VTT

2

POWER

PCH1J

TP2515TPAD14-GP TP2515TPAD14-GP

D D

+1.05V_VTT

1.2A

C2704

12

C2711

C2711 SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

12

C2714

C2714 SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

C2704

SC10U6D3V5KX-1GP

+1.05V_VTT

IND-10UH-218-GP

C C

IND-10UH-218-GP

2nd = 68.1001E.10N

IND-10UH-218-GP

2nd = 68.1001E.10N

SC10U6D3V5MX-3GP

L2702

1 2

68.10050.10Y

L2703

1 2

68.10050.10Y

SC10U6D3V5MX-3GP

+1.05VS_VCCA_A_DPL

12

C2734

DY

+1.05VS_VCCA_B_DPL

12

C2735

DY

12

C2705

DY

SC10U6D3V5MX-3GP

88mA 88mA

Isolate the power supply for pin AF34,AH34,AF32 these pins can be shorted together . NOT with AH35,AJ35

+1.05V_VTT

SC1U6D3V2KX-GP

12

C2718

X00 09/23

B B

+3.3V_ALW

SCD1U10V2KX-5GP

133mA

C2726

12

+1.05V_VTT

Simulation 10/07

1mA

A A

+RTC_CELL

SCD1U10V2KX-5GP

C2723

C2728

C2719

12

SC1U6D3V2KX-GP

+3.3V_RUN

SC10U6D3V5KX-1GP

12

+VCCSST

SCD1U10V2KX-5GP

6mA

5

VCCACLK

1

SCD1U10V2KX-5GP

Simulation 10/07

C2710

DY

SCD1U10V2KX-5GP

C2713

12

+1.8V_RUN

+1.05VS_VCCA_A_DPL

+1.05VS_VCCA_B_DPL

C2720

+1.05VALW_INT_VCCSUS

C2724

12

SCD1U10V2KX-5GP

C2727

SCD1U10V2KX-5GP

12

C2729

SCD1U10V2KX-5GP

12

C2732

SCD1U10V2KX-5GP

4

SCD1U10V2KX-5GP

AP51

VCCACLK

AP53

VCCACLK

AF23

VCCLAN

AF24

VCCLAN

DCPSUSBYP

C2707

12

SC1U6D3V2KX-GP

12

C2708

12

+VCCRTCEXT

12

www.rosefix.com

12

X00 0210

12

C2730

C2730 SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

12

C2733

Y20

DCPSUSBYP

AD38

VCCME

AD39

VCCME

AD41

VCCME

AF43

VCCME

AF41

VCCME

AF42

VCCME

V39

VCCME

V41

VCCME

V42

VCCME

Y39

VCCME

Y41

VCCME

Y42

VCCME

V9

DCPRTC

AU24

VCCVRM

BB51

VCCADPLLA

BB53

VCCADPLLA

BD51

VCCADPLLB

BD53

VCCADPLLB

AH23

VCCIO

AJ35

VCCIO

AH35

VCCIO

AF34

VCCIO

AH34

VCCIO

AF32

VCCIO

V12

DCPSST

Y22

DCPSUS

P18

VCCSUS3_3

U19

VCCSUS3_3

U20

VCCSUS3_3

U22

VCCSUS3_3

V15

VCC3_3

V16

VCC3_3

Y16

VCC3_3

AT18

V_CPU_IO

AU18

V_CPU_IO

A12

VCCRTC

IBEXPEAK-M-GP-NF

www.vinafix.vn

POWER

USB

Clock and Miscellaneous

PCI/GPIO/LPC

SATA

CPU

RTC PCI/GPIO/LPC

+1.05V_VTT

+3.3V_ALW

83.R0304.A8F

21

2nd = 83.R2004.B8F

D2701

CH751H-40PT-GP

1 2

R2701 100R2F-L1-GP-UR2701 100R2F-L1-GP-U

12

C2712

C2712 SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

12

C2717

SCD1U10V2KX-5GP

12

+3.3V_ALW

+5V_ALW

12

C2715

C2715 SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

+3.3V_RUN

+1.05V_VTT

C2725

C2725 SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

Title

PCH (POWER2)

Size Document Number Rev

A3

Date: Sheet of

PCH (POWER2)

DV14 CP UMA+DIS

SSID = PCH

+3.3V_RUN

83.R0304.A8F

21

2nd = 83.R2004.B8F

D2702

CH751H-40PT-GP

1 2

R2702 100R2F-L1-GP-UR2702 100R2F-L1-GP-U

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

27 100Tuesday, March 22, 2011

1

+5V_RUN

X00

5

4

3

2

1

SSID = PCH

D D

C C

B B

A A

5

PCH1H

AB16

VSS

AA19

VSS

AA20

VSS

AA22

VSS

AM19

VSS

AA24

VSS

AA26

VSS

AA28

VSS

AA30

VSS

AA31

VSS

AA32

VSS

AB11

VSS

AB15

VSS

AB23

VSS

AB30

VSS

AB31

VSS

AB32

VSS

AB39

VSS

AB43

VSS

AB47

VSS

AB5

VSS

AB8

VSS

AC2

VSS

AC52

VSS

AD11

VSS

AD12

VSS

AD16

VSS

AD23

VSS

AD30

VSS

AD31

VSS

AD32

VSS

AD34

VSS

AU22

VSS

AD42

VSS

AD46

VSS

AD49

VSS

AD7

VSS

AE2

VSS

AE4

VSS

AF12

VSS

Y13

VSS

AH49

VSS

AU4

VSS

AF35

VSS

AP13

VSS

AN34

VSS

AF45

VSS

AF46

VSS

AF49

VSS

AF5

VSS

AF8

VSS

AG2

VSS

AG52

VSS

AH11

VSS

AH15

VSS

AH16

VSS

AH24

VSS

AH32

VSS

AV18

VSS

AH43

VSS

AH47

VSS

AH7

VSS

AJ19

VSS

AJ2

VSS

AJ20

VSS

AJ22

VSS

AJ23

VSS

AJ26

VSS

AJ28

VSS

AJ32

VSS

AJ34

VSS

AT5

VSS

AJ4

VSS

AK12

VSS

AM41

VSS

AN19

VSS

AK26

VSS

AK22

VSS

AK23

VSS

AK28

VSS

IBEXPEAK-M-GP-NF

8 OF 10

AK30

VSS

AK31

VSS

AK32

VSS

AK34

VSS

AK35

VSS

AK38

VSS

AK43

VSS

AK46

VSS

AK49

VSS

AK5

VSS

AK8

VSS

AL2

VSS

AL52

VSS

AM11

VSS

BB44

VSS

AD24

VSS

AM20

VSS

AM22

VSS

AM24

VSS

AM26

VSS

AM28

VSS

BA42

VSS

AM30

VSS

AM31

VSS

AM32

VSS

AM34

VSS

AM35

VSS

AM38

VSS

AM39

VSS

AM42

VSS

AU20

VSS

AM46

VSS

AV22

VSS

AM49

VSS

AM7

VSS

AA50

VSS

BB10

VSS

AN32

VSS

AN50

VSS

AN52

VSS

AP12

VSS

AP42

VSS

AP46

VSS

AP49

VSS

AP5

VSS

AP8

VSS

AR2

VSS

AR52

VSS

AT11

VSS

BA12

VSS

AH48

VSS

AT32

VSS

AT36

VSS

AT41

VSS

AT47

VSS

AT7

VSS

AV12

VSS

AV16

VSS

AV20

VSS

www.rosefix.com

AV24

VSS

AV30

VSS

AV34

VSS

AV38

VSS

AV42

VSS

AV46

VSS

AV49

VSS

AV5

VSS

AV8

VSS

AW14

VSS

AW18

VSS

AW2

VSS

BF9

VSS

AW32

VSS

AW36

VSS

AW40

VSS

AW52

VSS

AY11

VSS

AY43

VSS

AY47

VSS

4

www.vinafix.vn

PCH1I

AY7

VSS

B11

VSS

B15

VSS

B19

VSS

B23

VSS

B31

VSS

B35

VSS

B39

VSS

B43

VSS

B47

VSS

B7

VSS

BG12

VSS

BB12

VSS

BB16

VSS

BB20

VSS

BB24

VSS

BB30

VSS

BB34

VSS

BB38

VSS

BB42

VSS

BB49

VSS

BB5

VSS

BC10

VSS

BC14

VSS

BC18

VSS

BC2

VSS

BC22

VSS

BC32

VSS

BC36

VSS

BC40

VSS

BC44

VSS

BC52

VSS

BH9

VSS

BD48

VSS

BD49

VSS

BD5

VSS

BE12

VSS

BE16

VSS

BE20

VSS

BE24

VSS

BE30

VSS

BE34

VSS

BE38

VSS

BE42

VSS

BE46

VSS

BE48

VSS

BE50

VSS

BE6

VSS

BE8

VSS

BF3

VSS

BF49

VSS

BF51

VSS

BG18

VSS

BG24

VSS

BG4

VSS

BG50

VSS

BH11

VSS

BH15

VSS

BH19

VSS

BH23

VSS

BH31

VSS

BH35

VSS

BH39

VSS

BH43

VSS

BH47

VSS

BH7

VSS

C12

VSS

C50

VSS

D51

VSS

E12

VSS

E16

VSS

E20

VSS

E24

VSS

E30

VSS

E34

VSS

E38

VSS

E42

VSS

E46

VSS

E48

VSS

E6

VSS

E8

VSS

F49

VSS

F5

VSS

G10

VSS

G14

VSS

G18

VSS

G2

VSS

G22

VSS

G32

VSS

G36

VSS

G40

VSS

G44

VSS

G52

VSS

AF39

VSS

H16

VSS

H20

VSS

H30

VSS

H34

VSS

H38

VSS

H42

VSS

IBEXPEAK-M-GP-NF

3

9 OF 10

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

H49 H5 J24 K11 K43 K47 K7 L14 L18 L2 L22 L32 L36 L40 L52 M12 M16 M20 N38 M34 M38 M42 M46 M49 M5 M8 N24 P11 AD15 P22 P30 P32 P34 P42 P45 P47 R2 R52 T12 T41 T46 T49 T5 T8 U30 U31 U32 U34 P38 V11 P16 V19 V20 V22 V30 V31 V32 V34 V35 V38 V43 V45 V46 V47 V49 V5 V7 V8 W2 W52 Y11 Y12 Y15 Y19 Y23 Y28 Y30 Y31 Y32 Y38 Y43 Y46 P49 Y5 Y6 Y8 P24 T43 AD51 AT8 AD47 Y47 AT12 AM6 AT13 AM5 AK45 AK39 AV14

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A3

Date: Sheet of

2

Date: Sheet of

DV14 CP UMA+DIS

Taipei Hsien 221, Taiwan, R.O.C.

PCH (VSS)

1

X00

28 100Tuesday, January 25, 2011

X00

5

SSID = AUDIO

D D

0625 Modify: AUD_DMIC_CLK&AUD_DMIC_IN0 connector to LVDS pin define.

+3.3V_RUN

Close to codec

12

C2904

C2903

1 2

SC1U6D3V2KX-GP

SCD1U10V2KX-5GP

C C

+3.3V_RUN

12

R2908

R2908 10KR2J-3-GP

10KR2J-3-GP

AMP_MUTE#

AUD_VREFOUT_B

PCH_AZ_CODEC_BITCLK

12

C2923

SC1U6D3V2KX-GP

B B

12

C2907

DY

SC4D7P50V2CN-1GP

PCH_SDOUT_CODEC24

PCH_AZ_CODEC_BITCLK24

PCH_SDIN_CODEC24

PCH_AZ_CODEC_SYNC24 PCH_AZ_CODEC_RST#24

C2902

SCD1U10V2KX-5GP

AUD_PC_BEEP Trace width>15 mils

4

AMP_MUTE#37

Close to codec

AUD_DVDDCORE

12

C2901

C2901 SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

PCH_SDOUT_CODEC

ER2930 0R2J-2-GPER2930 0R2J-2-GP

R2901

1 2

33R2J-2-GP

0707 Modify: updated U2901 part number from data base.

PCH_AZ_CODEC_BITCLK_R

1 2

PCH_SDIN_CODEC_C0

PCH_AZ_CODEC_SYNC PCH_AZ_CODEC_RST# AUD_PC_BEEP

92HD87B1A5NDGXTBX8-GP

2010/06/30 Change to 92HD87 (71.92H87.A03)

92HD87B1A5NDGXTBX8-GP

0730 Add internal MIC

C2912 SCD1U10V2KX-5GPC2912 SCD1U10V2KX-5GP

C2913 SCD1U10V2KX-5GPC2913 SCD1U10V2KX-5GP

12

www.rosefix.com

AMP_MUTE#

U2901

1

DVDD_LV

2

DMIC_CLK/GPIO_1

3

DMIC_0/GPIO_2

4

SDATA_OUT

5

BITCLK

6

SDATA_IN

7

DVDD

8

SYNC

9

RESET#

10

PCBEEP

+PVDD

38

39

40

41

EAPD

PVDD

THERMAL_PAD

71.92H87.A03

SENSE_A11SENSE_B12PORTF_L13PORTF_R14PORTC_L15PORTC_R16VREFFILT17CAP218VREFOUT_A19VREFOUT_C

AUD_SENSE_B

AUD_SENSE_A

SB_SPKR_RAUD_PC_BEEP

KBC_BEEP_R

3

AUD_SPK_R+ AUD_SPK_RAUD_SPK_LAUD_SPK_L+

+AVDD

AUD_VREG

31

32

33

34

35

36

37

PVSS

PVDD

AVDD2

PORTD_-L

PORTD_-R

PORTD_+L

PORTD_+R

AUD_PC_BEEP

120KR2J-L-GP

R2910 470KR2J-2-GPR2910 470KR2J-2-GP

VREG/+2_5V

20

AUDIO_VREF_C

AUD_CAP2

AUD_VREFFLT

AUD_VREFOUT_B

INT_MIC

SC1U10V3KX-3GP

C2924

R2909

1 2

0809 Vendor recommand

1 2

12

AUD_AGND

CAP+

CAP-

AVSS2

PORTB_R

PORTB_L

AVSS2

PORTA_R

PORTA_L

AVDD1

R2920

2K2R2J-2-GP

From SB

From EC

AUD_SPK_R+ 58

AUD_SPK_R- 58

AUD_SPK_L- 58

AUD_SPK_L+ 58

30 29 28

V-

27 26 25 24 23 22 21

INT_MIC_L_R

INT_MIC_L_R 58,76

ACZ_SPKR 24

KBC_BEEP 37

2

+AVDD

12

C2905

PUMP_CAPP

PUMP_CAPN AUD_V_B

AUD_HP1_JACK_R AUD_HP1_JACK_L

AUD_EXT_MIC_R AUD_EXT_MIC_L

+AVDD

C2905

1 2

C2906

SCD1U10V2KX-5GP

SC1U6D3V2KX-GP

AUD_AGND

CLOSE TO CODEC

C2914

C2914 SC2D2U10V3KX-1GP

SC2D2U10V3KX-1GP

R2906 60D4R2F-GPR2906 60D4R2F-GP

1 2

R2905 60D4R2F-GPR2905 60D4R2F-GP

1 2

C2922 SC1U10V3KX-3GPC2922 SC1U10V3KX-3GP C2921 SC1U10V3KX-3GPC2921 SC1U10V3KX-3GP

12 12

Put C2921 and C2922 close to codec

0707 Modify: Change R2911,R2914,R2917 change to 0ohm 0603 from short pad.

R2911

R2914

R2917

+PVDD

+5V_RUN

R2902

12

0R0603-PAD

AUD_HP1_JACK_R2 76 AUD_HP1_JACK_L2 76

AUD_AGND

MIC_IN_R 76 MIC_IN_L 76

0R3J-0-U-GP

12

0R3J-0-U-GP

12

0R3J-0-U-GP

12

AUD_AGND

0719 Modify: Move RN2901 to closed AUDIO CODEC from speaker connector.

12

C2908

C2909

1 2

AUD_CAP2

AUD_VREFFLT

AUD_V_B

AUD_VREG

C2909

SCD1U10V2KX-5GP

SC1U6D3V2KX-GP

AUD_AGND

12

AUD_AGND AUD_AGND AUD_AGND AUD_AGND

AUD_VREFOUT_B

SRN4K7J-8-GP

1

R2903

0R0603-PAD

12

C2910

SC10U6D3V5KX-1GP

C2917

SC4D7U6D3V3KX-GP

12

R2904

0R0603-PAD

C2918

SC10U6D3V5KX-1GP

12

Close to codec

MIC IN

1

23

RN2901

4

12

C2915

+5V_RUN

12

SC10U6D3V5KX-1GP

C2916

SC1U6D3V2KX-GP

Azalia I/F EMI

PCH_SDOUT_CODEC

12

R2912

R2912 47R2J-2-GP

47R2J-2-GP

DY

PCH_AZ_CODEC_SDOUT1

A A

12

C2920

DY

SCD1U10V2KX-5GP

5

X00 20101230 C2919 change to 0402

+AVDD

12

R2915

R2915 2K49R2F-GP

2K49R2F-GP

AUD_SENSE_A

12

C2919

C2919 SC1KP50V2KX-1GP

SC1KP50V2KX-1GP

AUD_AGND

Close to Pin13

4

www.vinafix.vn

R2913

1 2

20KR2F-L-GP

R2919

39K2R2F-L-GP

+AVDD

AUD_HP1_JD# 76

AUD_SENSE_B

12

EXT_MIC_JD# 76

12

AUD_AGND

R2916

R2916 2K49R2F-GP

2K49R2F-GP

R2918

R2918 20KR2F-L-GP

20KR2F-L-GP

Close to Pin14

3

2

MIC_IN_L76

MIC_IN_R76

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A3

Date: Sheet of

Audio Codec 92HD87B1

Taipei Hsien 221, Taiwan, R.O.C.

DV14 CP UMA+DIS

29 100Wednesday, March 23, 2011

1

X00

5

D D

C C

4

3

2

1

(Blanking)

B B

www.rosefix.com

A A

5

4

www.vinafix.vn

3

2

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A3

Date: Sheet of

Reserved

DV14 CP UMA+DIS

Taipei Hsien 221, Taiwan, R.O.C.

30 100Thursday, January 06, 2011

1

X00

Dell VOSTRO 1440 Schematics

Specifications and Main Features

Frequently Asked Questions

User Manual