Dell Inspiron 75902 Schematics

Vinafix.com

5

D D

4

3

2

1

Jedi 15"/17" Schematics

WhiskyLake - U/2GB VRAM

C C

2019-01-03

REV : A00

B B

DY : None Installed

A A

UMA: UMA only installed
OPS: DISCRTE OPTIMUS installed

5

4

3

2

<Core Design>

<Core Design>

<Core Design>

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev
A3

A3

A3

Tuesday, January 08, 2019

Tuesday, January 08, 2019

Tuesday, January 08, 2019

Date: Sheet of

Date: Sheet of

Date: Sheet of

Cover Page

Cover Page

Cover Page

Jedi15"/17" WHL-U

Jedi15"/17" WHL-U

Jedi15"/17" WHL-U

1

1 106

1 106

1 106

A00

A00

A00

Vinafix.com

5

4

3

Jedi 15"/17" CPU 15W + GPU 25W Block Diagram

2

1

Project code: 4PD0GE010001
PCB P/N: 18718
Revision: X02

GPU

VRAM(GDDR5) *2

2GB

D D

GDDR5

NVIDIA
N17S-G1 25W

76-7778-79

PCIE Lane1~Lane4

PCIE x 4

Intel CPU

HDMI V2.0

57

15.6"
(FHD/UHD)

17.3"
(FHD)

Touch panel

C C

M.2 SSD

55

63

7mm HDD

Free fall
Gsensor

INT2

ST

2-1

LNG2DM

Gyro+G

ST
LSM6DS3

E-compass

ST
LIS2MDL

70

HDMI2.0 LPSCON

HDMI

Parade
PS175

57

SATA/PCIex2(Optane)/PCIEx4

60

SATA

I2C

DDI1

eDP

I2C

SATA LANE0

Whiskey Lake U

15W

WHL PCH-LP

10 USB 2.0/1.1 ports

6 USB 3.0 ports

High Definition Audio

3 SATA ports
6 PCIE ports
LPC I/F
ACPI 5.0

Channel A

Channel B

DP 1.2

USB3.1 Gen1

USB3.0 LANE4

USB2.0

USB2.0 LANE4

USB2.0

USB2.0 LANE6

USB2.0

USB2.0 LANE9

USB3.1 Gen1

USB2.0

USB3.0 LANE2

USB2.0 LANE2

SS MUX

TI
TUSB546A

I2C

TPS65982DC

CardReader
SD 3.0

Realtak
RTS5100

Finger Print

USB 3.1 Gen1
Re-driver

TI
TUSB522

DP1.2/USB 3.1 Gen1

71

USB 2.0

USB3.1 Gen1

DDR4

SODIMM A

12

DDR4

SODIMM B

13

USB3.1 Gen1 TypeC
Port1

CC1

Micro SD Card Slot

USB3.1 Gen1 Port2

7372

IO Board

B B

24

I2C

PCIe

USB2.0

CNVi

eSPI BUS

TPM

NUVOTON & ST
NPCT750 & ST33HT

SPI

91

Flash ROM

16MB
Quad Read

I2C

4

USB2.0 x 1

USB2.0 LANE5

Camera (HD)

2526

NGFF WLAN

Jefferson's peak (CNVi)

eSPI debug port

Thermal

NUVOTON
NCT7718W

A A

Fan Control

PWM

SMBUS

26

FAN

5

PCIE LANE6

USB2.0 LANE7

68

KBC

MICROCHIP

MEC1416

Int.
KB

Image sensor

Touch PAD

USB3.1 Gen1

USB2.0

USB2.0 LANE1

HDA

USB3.0 LANE1

3

USB 3.1 Gen1
Re-driver

TI
TUSB522

HDA
CODEC

Realtek
ALC3254-VA3

27

USB3.1 Gen1

MIC_IN/GND

HP_R/L

D-MIC

2CH SPEAKER
(2CH 2W/4ohm)

USB3.1 Gen1 Port1

55

2

Universal Jack

<Core Design>

<Core Design>

<Core Design>

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

C

C

C

Jedi15"/17" WHL-U

Jedi15"/17" WHL-U

Date: Sheet

Date: Sheet

Date: Sheet

Jedi15"/17" WHL-U

Taipei Hsien 221, Taiwan, R.O.C.

Block Diagram

Block Diagram

Block Diagram

1

of

2 106Tuesday, January 08, 2019

of

2 106Tuesday, January 08, 2019

of

2 106Tuesday, January 08, 2019

A00

A00

A00

Vinafix.com

5

Main Func = CPU

PECI_CPU24
PROCHOT #_CPU24,44,46
TOUCH_PAN EL_INTR#55

D D

C C

TP_WAKE_K BC#24,65
TOUCH_PAN EL_PD#55
H_CPUPW RGD17

4

[PECI] and [PROCHOT#]
Impedance control: 50 ohm

3D3V_S5_PCH

R303

1 2

100KR2J-1-GP

R319

TP_WAKE_K BC#

1 2

0R0402-PAD

3

+VCCSTG = 1.05 V

1V_VCCSTG

12

R301
1KR2J-1-GP

Rb

CATERR#_C PU

TP301

TP307
TP308
TP302
TP303

TP304

R30449D9R2F-L1-G P
R30549D9R2F-L1-G P

1

PECI_CPU
PROCHOT #_CPU_RPROCHOT #_CPU
THERMTRIP#_C PU

BPM_CPU_N0

1

BPM_CPU_N1

1

BPM_CPU_N2

1

BPM_CPU_N3

1

GPP_E3/CPU_GP 0

1

TOUCH_PAN EL_INTR#
TOUCH_PAD _INTR#
TOUCH_PAN EL_PD#

CPU_POPIRCO MP

12

PCH_POPIRCO MP

12

TPAD14-OP-G P

1 2

R302499R2F-2-GP

Ra

TPAD14-OP-G P
TPAD14-OP-G P
TPAD14-OP-G P
TPAD14-OP-G P

TPAD14-OP-G P

DY

CC35

BW25

CB34

BP27

AA4
AR1

Y4

BJ1

U1
U2
U3
U4

CE9

CN3

CATERR#
PECI
PROCHOT#
THRMTRIP#

BPM#0
BPM#1
BPM#2
BPM#3

GPP_E3/CPU_GP0
GPP_E7/CPU_GP1
GPP_B3/CPU_GP2
GPP_B4/CPU_GP3

PROC_POPIRCOMP
PCH_OPIRCOMP

WHISKEY-LAKE- GP

ZZ.00CPU.271

4 OF 20CPU1D

PROC_TCK

PROC_TDI
PROC_TDO
PROC_TMS

PROC_TRST#

PCH_TCK

PCH_TDI
PCH_TDO
PCH_TMS

PCH_TRST#
PCH_JTAGX

PROC_PREQ#
PROC_PRDY#

T6
U6
Y5
T5
AB6

W6
U5
W5
P5
Y6
P6

W2
W1

XDP_TCLK
XDP_TDI
XDP_TDO_C PU
XDP_TMS
XDP_TRST#

XDP_PREQ#
XDP_PRDY#

1
1

SB 0323

1

TP310

1

TP311

1

TP312

1

TP313

1

TP314

PCH_JTAG_T CK

1

TP315

1

TP316

1

TP317

TP305
TP306

2

TPAD14-OP-G P
TPAD14-OP-G P
TPAD14-OP-G P
TPAD14-OP-G P
TPAD14-OP-G P

1

TPAD14-OP-G P
TPAD14-OP-G P
TPAD14-OP-G P

TPAD14-OP-G P
TPAD14-OP-G P

TP309

TPAD14-OP-G P

THERMTRIP#_C PU

H_CPUPW RGD

1V_VCCST_C PU

2

DY

3

12

1

#544669 CRB Rev0.52

R308
1KR2J-1-GP

ED301

AZ5125-02S-R7G -GP

75.05125.07D

2nd = 075.52215.007D

RO13_20171001

SB 0323

XDP_TDO_C PU

XDP_TCLK

1

+VCCSTG = 1.05 V

1 2

R313 51R2J-2-GP

1 2

R317 51R2J-2-GP

1V_VCCSTG

B B

A A

<Core Desig n>

<Core Desig n>

<Core Desig n>

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin T ai Wu Rd ., Hsichih,

21F, 88, Sec.1, Hsin T ai Wu Rd ., Hsichih,

21F, 88, Sec.1, Hsin T ai Wu Rd ., Hsichih,
Taipei Hsie n 221, Taiwan, R.O .C.

Taipei Hsie n 221, Taiwan, R.O .C.

Title

Title

Title

(Reserved)

(Reserved)

(Reserved)

Size Document Num ber Rev

Size Document Num ber Rev

Size Document Num ber Rev

A2

A2

A2

Date: Sheet of

Date: Sheet of

5

4

3

2

Date: Sheet of

Taipei Hsie n 221, Taiwan, R.O .C.

Jedi15"/17" WHL-U

Jedi15"/17" WHL-U

Jedi15"/17" WHL-U

1

A00

A00

3 106Tuesday, January 08, 2019

3 106Tuesday, January 08, 2019

3 106Tuesday, January 08, 2019

A00

Vinafix.com

5

Main Func = CPU

DP to HDMI2.0

HDMI_DDI_TX_N057
HDMI_DDI_TX_P057
HDMI_DDI_TX_N157
HDMI_DDI_TX_P157
HDMI_DDI_TX_N257
HDMI_DDI_TX_P257
HDMI_DDI_TX_N357
HDMI_DDI_TX_P357
DP1_AUX_CPU _N57
DP1_AUX_CPU _P57

D D

C C

B B

HDMI_HPD_CP U57

DP for Type-C Mux

DP2_DDI_TX_N071
DP2_DDI_TX_P071
DP2_DDI_TX_N171
DP2_DDI_TX_P171
DP2_DDI_TX_N271
DP2_DDI_TX_P271
DP2_DDI_TX_N371
DP2_DDI_TX_P371
DP2_AUX_CPU _P71
DP2_AUX_CPU _N71

eDP_TX_CPU _N055
eDP_TX_CPU _P055
eDP_TX_CPU _N155
eDP_TX_CPU _P155
eDP_TX_CPU _N255
eDP_TX_CPU _P255
eDP_TX_CPU _N355

eDP_TX_CPU _P355
eDP_AUX_CPU _N55
eDP_AUX_CPU _P55

eDP_HPD_CP U55

DP1_HPD_CP U71,72

L_BKLT_EN24
L_BKLT_CTRL55
EDP_VDD_EN55

GPP_H17_STRA P15

GC6_THM_DIS#24

(#543016) eDP_RCOMP Guideline

Signal Trace

eDP_RCOMP 5 mils 25 mils 24.9 Ω ±1%

(#543016) DDI Disabling and Termination Guidelines

Port Strap Enable Port Disable Port

Port 1

Port 2

3D3V_S0

3D3V_S0

Width

DDPB_CTRLDATA

DDPC_CTRLDATA

4

RN401

1

4

2 3

SRN2K2J-5-G P

SRN2K2J-5-G P

2 3
1

4

RN402

Isolation
Spacing

PU to 3.3 V with 2.2-k
±5% resistor

PU to 3.3 V with 2.2-k
±5% resistor

Strap pin:

Port B /
Port C Detected

DDPB_CTRLDATA

DDPC_CTRLDATA

Sampled at rising edge of PCH_PWROK

*

*

These two signals have weak internal pull-down.

CPU_DP1_CT RL_DATA
CPU_DP1_CT RL_CLK

CPU_DP2_CT RL_DATA
CPU_DP2_CT RL_CLK

Resistor
Value

Length

Max = 600 mils

NC

NC

0 = Port B is not detected.
1 = Port B is detected.

0 = Port C is not detected.
1 = Port C is detected.

3

Port B

Port C

RO13_20170626

CHECK WHL design guide: DISP_RCOMP

Add RTC Gen 9 reset circuit_20170814
leakage issue

3D3V_S5_PCH 3D3V_S5_PCH

RTC_RST

DP to HDMI2.0

DP for Type-C Mux

RCOMP SHOULD BE VSS REFERNCE AND SHIELDED

1V_VCCIO

1 2

R401

24D9R2F-L-G P

10KR2J-3-GP

RO13_20171011

Q401

Note:ZZ.27002.F7C01

1
2
3 4

common part

2N7002KDW -1-GP

75.27002.F7C

TP402TPAD14-OP-G P

1 2

R402

RTC_RST

6
5

RTC_RST

12

R406
10KR2J-3-GP

CPU_DP_HP D_P

SA 0105 strap reserve

SIO_EXT_SMI#

2nd = 075.27002.0E7C

HDMI_DDI_TX_N0
HDMI_DDI_TX_P0
HDMI_DDI_TX_N1
HDMI_DDI_TX_P1
HDMI_DDI_TX_N2
HDMI_DDI_TX_P2
HDMI_DDI_TX_N3
HDMI_DDI_TX_P3

DP2_DDI_TX_N0
DP2_DDI_TX_P0
DP2_DDI_TX_N1
DP2_DDI_TX_P1
DP2_DDI_TX_N2
DP2_DDI_TX_P2
DP2_DDI_TX_N3
DP2_DDI_TX_P3

eDP_RCOMP_C PU

CPU_DP1_CT RL_CLK
CPU_DP1_CT RL_DATA

CPU_DP2_CT RL_CLK
CPU_DP2_CT RL_DATA

1

GC6_THM_DIS#

GPP_H17_STRA P

3D3V_S0

12

R405
10KR2J-3-GP

DP1_HPD_CP U_R
DP1_HPD_CP U

DY

GPP_E23

1 2

2

R407
100KR2J-1-GP

SB 0403

AL5

DDI1_TXN0

AL6

DDI1_TXP0

AJ5

DDI1_TXN1

AJ6

DDI1_TXP1

AF6

DDI1_TXN2

AF5

DDI1_TXP2

AE5

DDI1_TXN3

AE6

DDI1_TXP3

AC4

DDI2_TXN0

AC3

DDI2_TXP0

AC1

DDI2_TXN1

AC2

DDI2_TXP1

AE4

DDI2_TXN2

AE3

DDI2_TXP2

AE1

DDI2_TXN3

AE2

DDI2_TXP3

GPP_E13/DDPB_HPD0/DISP_MISC0
GPP_E14/DDPC_HPD1/DISP_MISC1
GPP_E15/DPPD_HPD2/DISP_MISC2
GPP_E16/DPPE_HPD3/DISP_MISC3

GPP_E17/EDP_HPD/DISP_MISC4

AM6

DISP_RCOMP

CC8

GPP_E18/DPPB_CTRLCLK/CNV_BT_HOST_WAKE#

CC9

GPP_E19/DPPB_CTRLDATA

CH4

GPP_E20/DPPC_CTRLCLK

CH3

GPP_E21/DPPC_CTRLDATA

CP4

GPP_E22/DPPD_CTRLCLK

CN4

GPP_E23/DPPD_CTRLDATA

CR26

GPP_H16/DDPF_CTRLCLK

CP26

GPP_H17/DDPF_CTRLDATA

WHISKEY-LAKE- GP

ZZ.00CPU.271

1 OF 20CPU1A

EDP_TXN0
EDP_TXP0
EDP_TXN1
EDP_TXP1
EDP_TXN2
EDP_TXP2
EDP_TXN3
EDP_TXP3

EDP_AUX_N
EDP_AUX_P

DISP_UTILS

DDI1_AUX_N
DDI1_AUX_P
DDI2_AUX_N
DDI2_AUX_P
DDI3_AUX_N
DDI3_AUX_P

EDP_BKLTEN

EDP_VDDEN

EDP_BKLTCTL

DP1_HPD_CP U_R

1

eDP_TX_CPU _N0

AG4

eDP_TX_CPU _P0

AG3

eDP_TX_CPU _N1

AG2

eDP_TX_CPU _P1

AG1

eDP_TX_CPU _N2

AJ4

eDP_TX_CPU _P2

AJ3

eDP_TX_CPU _N3

AJ2

eDP_TX_CPU _P3

AJ1

eDP_AUX_CPU _N

AH4

eDP_AUX_CPU _P

AH3
AM7

DP1_AUX_CPU _N

AC7

DP1_AUX_CPU _P

AC6

DP2_AUX_CPU _N

AD4

DP2_AUX_CPU _P

AD3
AG7
AG6

HDMI_HPD_CP U

CN6

DP1_HPD_CP U_R

CM6

SIO_EXT_SMI#

CP7
CP6

eDP_HPD_CP U

CM7

L_BKLT_EN

CK11

EDP_VDD_EN

CG11

L_BKLT_CTRL

CH11

Layout Placement Request

RTC Gen 9 reset circuit_20170814

R403
100KR2J-1-GP

1 2

SA 0131

for HDMI2.0

DP for Type-C Mux

A A

Jedi UMA/DIS 2IN1

Jedi UMA/DIS 2IN1

Jedi UMA/DIS 2IN1

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin T ai Wu Rd ., Hsichih,

21F, 88, Sec.1, Hsin T ai Wu Rd ., Hsichih,

21F, 88, Sec.1, Hsin T ai Wu Rd ., Hsichih,
Taipei Hsie n 221, Taiwan, R.O .C.

Taipei Hsie n 221, Taiwan, R.O .C.

Title

Title

Title

CPU (DDI/EDP)

CPU (DDI/EDP)

CPU (DDI/EDP)

Size Document Num ber Rev

Size Document Num ber Rev

Size Document Num ber Rev

A2

A2

A2

Jedi15"/17" WHL-U

Jedi15"/17" WHL-U

Jedi15"/17" WHL-U

Date: Sheet of

Date: Sheet of

5

4

3

2

Date: Sheet of

Taipei Hsie n 221, Taiwan, R.O .C.

1

A00

A00

4 106Tuesday, Januar y 08, 2019

4 106Tuesday, Januar y 08, 2019

4 106Tuesday, Januar y 08, 2019

A00

Vinafix.com

Main Func = CPU

M_B_DQ0 13
M_B_DQ1 13
M_B_DQ2 13
M_B_DQ3 13
M_B_DQ4 13
M_B_DQ5 13
M_B_DQ6 13
M_B_DQ7 13
M_B_DQ8 13

M_B_DQ9 13
M_B_DQ10 13
M_B_DQ11 13
M_B_DQ12 13
M_B_DQ13 13

D D

C C

B B

A A

M_B_DQ14 13
M_B_DQ15 13
M_B_DQ32 13
M_B_DQ33 13
M_B_DQ34 13
M_B_DQ35 13
M_B_DQ36 13
M_B_DQ37 13
M_B_DQ38 13
M_B_DQ39 13
M_B_DQ40 13
M_B_DQ41 13
M_B_DQ42 13
M_B_DQ43 13
M_B_DQ44 13
M_B_DQ45 13
M_B_DQ46 13
M_B_DQ47 13
M_B_DQ16 13
M_B_DQ17 13
M_B_DQ18 13
M_B_DQ19 13
M_B_DQ20 13
M_B_DQ21 13
M_B_DQ22 13
M_B_DQ23 13
M_B_DQ24 13
M_B_DQ25 13
M_B_DQ26 13
M_B_DQ27 13
M_B_DQ28 13
M_B_DQ29 13
M_B_DQ30 13
M_B_DQ31 13
M_B_DQ48 13
M_B_DQ49 13
M_B_DQ50 13
M_B_DQ51 13
M_B_DQ52 13
M_B_DQ53 13
M_B_DQ54 13
M_B_DQ55 13
M_B_DQ56 13
M_B_DQ57 13
M_B_DQ58 13
M_B_DQ59 13
M_B_DQ60 13
M_B_DQ61 13
M_B_DQ62 13
M_B_DQ63 13

M_B_CLK#0 13
M_B_CLK#1 13
M_B_CLK0 13
M_B_CLK1 13

M_B_CKE0 13
M_B_CKE1 13

M_B_CS#0 13
M_B_CS#1 13
M_B_DIMB_ODT0 13
M_B_DIMB_ODT1 13

M_B_A5 13
M_B_A9 13
M_B_A6 13
M_B_A8 13
M_B_A7 13

M_B_BG0 13

M_B_A12 13

M_B_A11 13
M_B_ACT_N 13
M_B_BG1 13

M_B_A13 13

M_B_A15 13

M_B_A14 13

M_B_A16 13
M_B_BA0 13

M_B_A2 13

M_B_BA1 13

M_B_A10 13

M_B_A1 13
M_B_A0 13
M_B_A3 13
M_B_A4 13

M_B_ALERT_N 5,13
M_B_PARITY 5,13
DDR4_DRAMRST# 12,13

SM_PGCNTL_R 51

M_A_DQS_DN0
M_A_DQS_DN1
M_A_DQS_DN2
M_A_DQS_DN3
M_A_DQS_DN4
M_A_DQS_DN5
M_A_DQS_DN6
M_A_DQS_DN7

M_A_DQS_DP0
M_A_DQS_DP1
M_A_DQS_DP2
M_A_DQS_DP3
M_A_DQS_DP4
M_A_DQS_DP5
M_A_DQS_DP6
M_A_DQS_DP7

M_B_DQS_DN0
M_B_DQS_DN1
M_B_DQS_DN2
M_B_DQS_DN3
M_B_DQS_DN4
M_B_DQS_DN5
M_B_DQS_DN6
M_B_DQS_DN7

M_B_DQS_DP0
M_B_DQS_DP1
M_B_DQS_DP2
M_B_DQS_DP3
M_B_DQS_DP4
M_B_DQS_DP5
M_B_DQS_DP6
M_B_DQS_DP7

5

M_B_ALERT_N 5,13
M_B_PARITY 5,13

M_A_CLK#0 12
M_A_CLK0 12
M_A_CLK#1 12
M_A_CLK1 12

M_A_CKE0 12
M_A_CKE1 12

M_A_CS#0 12
M_A_CS#1 12
M_A_DIMA_ODT0 12
M_A_DIMA_ODT1 12

M_A_A5 12
M_A_A9 12
M_A_A6 12
M_A_A8 12
M_A_A7 12

M_A_BG0 12

M_A_A12 12

M_A_A11 12
M_A_ACT_N 12
M_A_BG1 12

M_A_A13 12

M_A_A15 12

M_A_A14 12

M_A_A16 12
M_A_BA0 12

M_A_A2 12

M_A_BA1 12

M_A_A10 12

M_A_A1 12
M_A_A0 12

M_A_A3 12
M_A_A4 12

M_A_ALERT_N 12

M_A_PARITY 12

V_SM_VREF_CNTA 12

V_SM_VREF_CNTB 13

M_A_DQS_DN[7:0] 12

M_A_DQS_DP[7:0] 12

M_B_DQS_DN[7:0] 13

M_B_DQS_DP[7:0] 13

5

M_A_DQ0 12
M_A_DQ1 12
M_A_DQ2 12
M_A_DQ3 12
M_A_DQ4 12
M_A_DQ5 12
M_A_DQ6 12
M_A_DQ7 12
M_A_DQ8 12
M_A_DQ9 12
M_A_DQ10 12
M_A_DQ11 12
M_A_DQ12 12
M_A_DQ13 12
M_A_DQ14 12
M_A_DQ15 12
M_A_DQ32 12
M_A_DQ33 12
M_A_DQ34 12
M_A_DQ35 12
M_A_DQ36 12
M_A_DQ37 12
M_A_DQ38 12
M_A_DQ39 12
M_A_DQ40 12
M_A_DQ41 12
M_A_DQ42 12
M_A_DQ43 12
M_A_DQ44 12
M_A_DQ45 12
M_A_DQ46 12
M_A_DQ47 12
M_A_DQ16 12
M_A_DQ17 12
M_A_DQ18 12
M_A_DQ19 12
M_A_DQ20 12
M_A_DQ21 12
M_A_DQ22 12
M_A_DQ23 12
M_A_DQ24 12
M_A_DQ25 12
M_A_DQ26 12
M_A_DQ27 12
M_A_DQ28 12
M_A_DQ29 12
M_A_DQ30 12
M_A_DQ31 12
M_A_DQ48 12
M_A_DQ49 12
M_A_DQ50 12
M_A_DQ51 12
M_A_DQ52 12
M_A_DQ53 12
M_A_DQ54 12
M_A_DQ55 12
M_A_DQ56 12
M_A_DQ57 12
M_A_DQ58 12
M_A_DQ59 12
M_A_DQ60 12
M_A_DQ61 12
M_A_DQ62 12
M_A_DQ63 12

M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3

M_A_DQ[0:7]

M_A_DQ[8:15]

M_A_DQ[32:39]

M_A_DQ[40:47]

M_B_DQ[0:7]

M_B_DQ[8:15]

M_B_DQ[32:39]

M_B_DQ[40:47]

DQ Bit Swapping is allowed within the same byte, and Byte Swapping is allowed within the same channel.
Clock (CLK and CLK#) and Strobe (DQS and DQS#) differential signal swapping within a pair is not allowed. Also differential
clock pair to clock pair swapping within a channel is not allowed.

M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46

M_A_DQ47
M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47

PDG: DDR/ODT

A26

DDR0_DQ0/DDR 0_DQ0

D26

DDR0_DQ1/DDR 0_DQ1

D28

DDR0_DQ2/DDR 0_DQ2

C28

DDR0_DQ3/DDR 0_DQ3

B26

DDR0_DQ4/DDR 0_DQ4

C26

DDR0_DQ5/DDR 0_DQ5

B28

DDR0_DQ6/DDR 0_DQ6

A28

DDR0_DQ7/DDR 0_DQ7

B30

DDR0_DQ8/DDR 0_DQ8

D30

DDR0_DQ9/DDR 0_DQ9

B33

DDR0_DQ10/DD R0_DQ10

D32

DDR0_DQ11/DD R0_DQ11

A30

DDR0_DQ12/DD R0_DQ12

C30

DDR0_DQ13/DD R0_DQ13

B32

DDR0_DQ14/DD R0_DQ14

C32

DDR0_DQ15/DD R0_DQ15

H37

DDR0_DQ16/DD R0_DQ32

H34

DDR0_DQ17/DD R0_DQ33

K34

DDR0_DQ18/DD R0_DQ34

K35

DDR0_DQ19/DD R0_DQ35

H36

DDR0_DQ20/DD R0_DQ36

H35

DDR0_DQ21/DD R0_DQ37

K36

DDR0_DQ22/DD R0_DQ38

K37

DDR0_DQ23/DD R0_DQ39

N36

DDR0_DQ24/DD R0_DQ40

N34

DDR0_DQ25/DD R0_DQ41

R37

DDR0_DQ26/DD R0_DQ42

R34

DDR0_DQ27/DD R0_DQ43

N37

DDR0_DQ28/DD R0_DQ44

N35

DDR0_DQ29/DD R0_DQ45

R36

DDR0_DQ30/DD R0_DQ46

R35

DDR0_DQ31/DD R0_DQ47

AN35

DDR0_DQ32/DD R1_DQ0

AN34

DDR0_DQ33/DD R1_DQ1

AR35

DDR0_DQ34/DD R1_DQ2

AR34

DDR0_DQ35/DD R1_DQ3

AN37

DDR0_DQ36/DD R1_DQ4

AN36

DDR0_DQ37/DD R1_DQ5

AR36

DDR0_DQ38/DD R1_DQ6

AR37

DDR0_DQ39/DD R1_DQ7

AU35

DDR0_DQ40/DD R1_DQ8

AU34

DDR0_DQ41/DD R1_DQ9

AW35

DDR0_DQ42/DD R1_DQ10

AW34

DDR0_DQ43/DD R1_DQ11

AU37

DDR0_DQ44/DD R1_DQ12

AU36

DDR0_DQ45/DD R1_DQ13

AW36

DDR0_DQ46/DD R1_DQ14

AW37

DDR0_DQ47/DD R1_DQ15

BA35

DDR0_DQ48/DD R1_DQ32

BA34

DDR0_DQ49/DD R1_DQ33

BC35

DDR0_DQ50/DD R1_DQ34

BC34

DDR0_DQ51/DD R1_DQ35

BA37

DDR0_DQ52/DD R1_DQ36

BA36

DDR0_DQ53/DD R1_DQ37

BC36

DDR0_DQ54/DD R1_DQ38

BC37

DDR0_DQ55/DD R1_DQ39

BE35

DDR0_DQ56/DD R1_DQ40

BE34

DDR0_DQ57/DD R1_DQ41

BG35

DDR0_DQ58/DD R1_DQ42

BG34

DDR0_DQ59/DD R1_DQ43

BE37

DDR0_DQ60/DD R1_DQ44

BE36

DDR0_DQ61/DD R1_DQ45

BG36

DDR0_DQ62/DD R1_DQ46

BG37

DDR0_DQ63/DD R1_DQ47

WHISKEY-LAKE-GP

ZZ.00CPU.271

4

4

DDR0_CKN0/DDR 0_CKN0
DDR0_CKP0/DDR0 _CKP0
DDR0_CKN1/DDR 0_CKN1
DDR0_CKP1/DDR0 _CKP1

DDR0_CKE0/DDR0 _CKE0
DDR0_CKE1/DDR0 _CKE1

DDR0_CKE2/NC
DDR0_CKE3/NC

DDR0_CS#0/DDR 0_CS#0
DDR0_CS#1/DDR 0_CS#1

DDR0_ODT0/DDR 0_ODT0

NC/DDR0_ODT1

DDR0_CAB9/DDR0 _MA0

DDR0_DQ[16]

DDR0_CAB8/DDR0 _MA1

DDR0_DQ[17]

DDR0_CAB5/DDR0 _MA2

DDR0_DQ[18]
DDR0_DQ[19]

DDR0_DQ[20]

DDR0_CAA0/DDR0 _MA5

DDR0_DQ[21]

DDR0_CAA2/DDR0 _MA6

DDR0_DQ[22]

DDR0_CAA4/DDR0 _MA7

DDR0_DQ[23]

DDR0_CAA3/DDR0 _MA8

DDR0_CAA1/DDR0 _MA9
DDR0_CAB7/DDR0 _MA10
DDR0_CAA7/DDR0 _MA11
DDR0_CAA6/DDR0 _MA12
DDR0_CAB0/DDR0 _MA13

DDR0_CAB2/DDR0 _MA14

DDR0_CAB1/DDR0 _MA15

DDR0_CAB3/DDR0 _MA16

DDR0_CAB4/DDR0 _BA0

DDR0_CAB6/DDR0 _BA1

DDR0_CAA5/DDR0 _BG0
DDR0_CAA8/DDR0 _ACT#

DDR0_CAA9/DDR0 _BG1

DDR0_DQSN0/DD R0_DQSN0
DDR0_DQSP0/DDR 0_DQSP0
DDR0_DQSN1/DD R0_DQSN1
DDR0_DQSP1/DDR 0_DQSP1
DDR0_DQSN2/DD R0_DQSN4
DDR0_DQSP2/DDR 0_DQSP4
DDR0_DQSN3/DD R0_DQSN5
DDR0_DQSP3/DDR 0_DQSP5
DDR0_DQSN4/DD R1_DQSN0
DDR0_DQSP4/DDR 1_DQSP0
DDR0_DQSN5/DD R1_DQSN1
DDR0_DQSP5/DDR 1_DQSP1
DDR0_DQSN6/DD R1_DQSN4
DDR0_DQSP6/DDR 1_DQSP4
DDR0_DQSN7/DD R1_DQSN5
DDR0_DQSP7/DDR 1_DQSP5

NC/DDR0_ALERT#

DDR_VREF_CA
DDR0_VREF_DQ0
DDR0_VREF_DQ1

DDR1_VREF_DQ

3

DDR4 ball type: NON-Interleaved Type

2 OF 20CPU1B

NC/DDR0_MA3
NC/DDR0_MA4

NC/DDR0_PAR

DDR_VTT_CTL

V32
V31
T32
T31

U36
U37
U34
U35

AE32
AF32
AE31
AF31

AC37
AC36
AC34
AC35
AA35
AB35
AA37
AA36
AB34
W36
Y31
W34
AA34
AC32

AC31
AB32
Y32

W32
AB31
V34

V35
W35

C27
D27
D31
C31
J35
J34
P34
P35
AP35
AP34
AV34
AV35
BB35
BB34
BF34
BF35

W37
W31
F36
D35
D37
E36
C35

M_A_CLK#0
M_A_CLK0
M_A_CLK#1
M_A_CLK1

M_A_CKE0
M_A_CKE1

M_A_CS#0
M_A_CS#1
M_A_DIMA_ODT0
M_A_DIMA_ODT1

M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13

M_A_A14
M_A_A15
M_A_A16

M_A_BA0
M_A_BA1
M_A_BG0

M_A_ACT_N
M_A_BG1

M_A_DQS_DN0
M_A_DQS_DP0
M_A_DQS_DN1
M_A_DQS_DP1
M_A_DQS_DN4
M_A_DQS_DP4
M_A_DQS_DN5
M_A_DQS_DP5

M_B_DQS_DN0
M_B_DQS_DP0
M_B_DQS_DN1
M_B_DQS_DP1
M_B_DQS_DN4
M_B_DQS_DP4
M_B_DQS_DN5
M_B_DQS_DP5

M_A_ALERT_N
M_A_PARITY
V_SM_VREF_CNTA

V_SM_VREF_CNTB

SM_PGCNTL

M_A_DQ[16:23]

M_A_DQ[24:31]

M_A_DQ[48:55]

M_A_DQ[56:63]

M_B_DQ[16:23]

M_B_DQ[24:31]

M_B_DQ[48:55]

M_B_DQ[56:63]

3

SM_PGCNTL

M_A_DQ16

J22

M_A_DQ17

H25

M_A_DQ18

G22

M_A_DQ19

H22

M_A_DQ20

F25

M_A_DQ21

J25

M_A_DQ22

G25

M_A_DQ23

F22

M_A_DQ24

D22

M_A_DQ25

C22

M_A_DQ26

C24

M_A_DQ27

D24

M_A_DQ28

A22

M_A_DQ29

B22

M_A_DQ30

A24

M_A_DQ31

B24

M_A_DQ48

G31

M_A_DQ49

G32

M_A_DQ50

H29

M_A_DQ51

H28

M_A_DQ52

G28

M_A_DQ53

G29

M_A_DQ54

H31

M_A_DQ55

H32

M_A_DQ56

L31

M_A_DQ57

L32

M_A_DQ58

N29

M_A_DQ59

N28

M_A_DQ60

L28

M_A_DQ61

L29

M_A_DQ62

N31

M_A_DQ63

N32

M_B_DQ16

AJ29

M_B_DQ17

AJ30

M_B_DQ18

AM32

M_B_DQ19

AM31

M_B_DQ20

AM30

M_B_DQ21

AM29

M_B_DQ22

AJ31

M_B_DQ23

AJ32

M_B_DQ24

AR31

M_B_DQ25

AR32

M_B_DQ26

AV30

M_B_DQ27

AV29

M_B_DQ28

AR30

M_B_DQ29

AR29

M_B_DQ30

AV32

M_B_DQ31

AV31

M_B_DQ48

BA32

M_B_DQ49

BA31

M_B_DQ50

BD31

M_B_DQ51

BD32

M_B_DQ52

BA30

M_B_DQ53

BA29

M_B_DQ54

BD29

M_B_DQ55

BD30

M_B_DQ56

BG31

M_B_DQ57

BG32

M_B_DQ58

BK32

M_B_DQ59

BK31

M_B_DQ60

BG29

M_B_DQ61

BG30

M_B_DQ62

BK30

M_B_DQ63

BK29

Q501

G

D

S

PJA138KA-GP

084.00138.0A31

2nd = 084.00138.0C31

2

DDR1_DQ0/DDR 0_DQ16
DDR1_DQ1/DDR 0_DQ17
DDR1_DQ2/DDR 0_DQ18
DDR1_DQ3/DDR 0_DQ19
DDR1_DQ4/DDR 0_DQ20
DDR1_DQ5/DDR 0_DQ21
DDR1_DQ6/DDR 0_DQ22
DDR1_DQ7/DDR 0_DQ23
DDR1_DQ8/DDR 0_DQ24
DDR1_DQ9/DDR 0_DQ25
DDR1_DQ10/DD R0_DQ26
DDR1_DQ11/DD R0_DQ27
DDR1_DQ12/DD R0_DQ28
DDR1_DQ13/DD R0_DQ29
DDR1_DQ14/DD R0_DQ30
DDR1_DQ15/DD R0_DQ31
DDR1_DQ16/DD R0_DQ48
DDR1_DQ17/DD R0_DQ49
DDR1_DQ18/DD R0_DQ50
DDR1_DQ19/DD R0_DQ51
DDR1_DQ20/DD R0_DQ52
DDR1_DQ21/DD R0_DQ53
DDR1_DQ22/DD R0_DQ54
DDR1_DQ23/DD R0_DQ55
DDR1_DQ24/DD R0_DQ56
DDR1_DQ25/DD R0_DQ57
DDR1_DQ26/DD R0_DQ58
DDR1_DQ27/DD R0_DQ59
DDR1_DQ28/DD R0_DQ60
DDR1_DQ29/DD R0_DQ61
DDR1_DQ30/DD R0_DQ62
DDR1_DQ31/DD R0_DQ63
DDR1_DQ32/DD R1_DQ16
DDR1_DQ33/DD R1_DQ17
DDR1_DQ34/DD R1_DQ18
DDR1_DQ35/DD R1_DQ19
DDR1_DQ36/DD R1_DQ20
DDR1_DQ37/DD R1_DQ21
DDR1_DQ38/DD R1_DQ22
DDR1_DQ39/DD R1_DQ23
DDR1_DQ40/DD R1_DQ24
DDR1_DQ41/DD R1_DQ25
DDR1_DQ42/DD R1_DQ26
DDR1_DQ43/DD R1_DQ27
DDR1_DQ44/DD R1_DQ28
DDR1_DQ45/DD R1_DQ29
DDR1_DQ46/DD R1_DQ30
DDR1_DQ47/DD R1_DQ31
DDR1_DQ48/DD R1_DQ48
DDR1_DQ49/DD R1_DQ49
DDR1_DQ50/DD R1_DQ50
DDR1_DQ51/DD R1_DQ51
DDR1_DQ52/DD R1_DQ52
DDR1_DQ53/DD R1_DQ53
DDR1_DQ54/DD R1_DQ54
DDR1_DQ55/DD R1_DQ55
DDR1_DQ56/DD R1_DQ56
DDR1_DQ57/DD R1_DQ57
DDR1_DQ58/DD R1_DQ58
DDR1_DQ59/DD R1_DQ59
DDR1_DQ60/DD R1_DQ60
DDR1_DQ61/DD R1_DQ61
DDR1_DQ62/DD R1_DQ62
DDR1_DQ63/DD R1_DQ63

WHISKEY-LAKE-GP

Design Guideline:
SM_RCOMP keep routing length less than 500 mils.

3D3V_S5

12

R507
10KR2J-3-GP

Q502_G

3 OF 20CPU1C

DDR1_CKN0/DDR 1_CKN0
DDR1_CKP0/DDR1 _CKP0
DDR1_CKN1/DDR 1_CKN1
DDR1_CKP1/DDR1 _CKP1

DDR1_CKE0/DDR1 _CKE0
DDR1_CKE1/DDR1 _CKE1

DDR1_CKE2/NC
DDR1_CKE3/NC

DDR1_CS#0/DDR 1_CS#0
DDR1_CS#1/DDR 1_CS#1

DDR1_ODT0/DDR 1_ODT0

NC/DDR1_ODT1
DDR1_CAB9/DDR1 _MA0
DDR1_CAB8/DDR1 _MA1
DDR1_CAB5/DDR1 _MA2

NC/DDR1_MA3

NC/DDR1_MA4
DDR1_CAA0/DDR1 _MA5
DDR1_CAA2/DDR1 _MA6
DDR1_CAA4/DDR1 _MA7
DDR1_CAA3/DDR1 _MA8
DDR1_CAA1/DDR1 _MA9

DDR1_CAB7/DDR1 _MA10
DDR1_CAA7/DDR1 _MA11
DDR1_CAA6/DDR1 _MA12
DDR1_CAB0/DDR1 _MA13

DDR1_CAB2/DDR1 _MA14

DDR1_CAB1/DDR1 _MA15

DDR1_CAB3/DDR1 _MA16

DDR1_CAB4/DDR1 _BA0
DDR1_CAB6/DDR1 _BA1
DDR1_CAA5/DDR1 _BG0

DDR1_CAA9/DDR1 _BG1

DDR1_CAA8/DDR1 _ACT#

DDR1_DQSN0/DD R0_DQSN2

DDR1_DQSP0/DDR 0_DQSP2

DDR1_DQSN1/DD R0_DQSN3

DDR1_DQSP1/DDR 0_DQSP3

DDR1_DQSN2/DD R0_DQSN6

DDR1_DQSP2/DDR 0_DQSP6

DDR1_DQSN3/DD R0_DQSN7

DDR1_DQSP3/DDR 0_DQSP7

DDR1_DQSN4/DD R1_DQSN2

DDR1_DQSP4/DDR 1_DQSP2

DDR1_DQSN5/DD R1_DQSN3

DDR1_DQSP5/DDR 1_DQSP3

DDR1_DQSN6/DD R1_DQSN6

DDR1_DQSP6/DDR 1_DQSP6

DDR1_DQSN7/DD R1_DQSN7

DDR1_DQSP7/DDR 1_DQSP7

NC/DDR1_ALERT#

NC/DDR1_PAR

DRAM_RESET#

DDR_RCOMP0

DDR_RCOMP1

DDR_RCOMP2

Q502

G

D

S

2N7002K-2-GP

84.2N702.J31

2nd = 084.27002.0N31

2

M_B_CLK#0

AF28

M_B_CLK0

AF29

M_B_CLK#1

AE28

M_B_CLK1

AE29

M_B_CKE0

T28

M_B_CKE1

T29
V28
V29

M_B_CS#0

AL37

M_B_CS#1

AL35

M_B_DIMB_ODT0

AL36

M_B_DIMB_ODT1

AL34

M_B_A0

AG36

M_B_A1

AG35

M_B_A2

AF34

M_B_A3

AG37

M_B_A4

AE35

M_B_A5

AF35

M_B_A6

AE37

M_B_A7

AC29

M_B_A8

AE36

M_B_A9

AB29

M_B_A10

AG34

M_B_A11

AC28

M_B_A12

AB28

M_B_A13

AK35

M_B_A14

AJ35

M_B_A15

AK34

M_B_A16

AJ34

M_B_BA0

AJ37

M_B_BA1

AJ36

M_B_BG0

W29

M_B_BG1

Y28

M_B_ACT_N

W28

M_A_DQS_DN2

H24

M_A_DQS_DP2

G24

M_A_DQS_DN3

C23

M_A_DQS_DP3

D23

M_A_DQS_DN6

G30

M_A_DQS_DP6

H30

M_A_DQS_DN7

L30

M_A_DQS_DP7

N30

M_B_DQS_DN2

AL31

M_B_DQS_DP2

AL30

M_B_DQS_DN3

AU31

M_B_DQS_DP3

AU30

M_B_DQS_DN6

BC31

M_B_DQS_DP6

BC30

M_B_DQS_DN7

BH31

M_B_DQS_DP7

BH30

M_B_ALERT_N

Y29

M_B_PARITY

AE34

SM_DRAMRST# DDR4_DRAMRST#

BU31

SM_RCOMP_0

BN28

SM_RCOMP_1

BN27

SM_RCOMP_2

BN29

R501 121R2F-GP

1 2
1 2

R502 80D6R2F-L-GP

1 2

R503 100R2F-L1-GP-U

#543016

Layout Note:Layout Note:

SB 0402

3D3V_S0

12

R506
10KR2J-3-GP

SM_PGCNTL_R

1D2V_S3

12

R505
470R2F-GP

1 2

0R0402-PAD

ED502

AZ5125-02S-R7G-GP

2

1

3

SA 1027

75.05125.07D

2ND = 075.52215.007D

close to CPU

Jedi UMA/DIS 2IN1

Jedi UMA/DIS 2IN1

Jedi UMA/DIS 2IN1

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

R504

1

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

CPU (DDR)

CPU (DDR)

CPU (DDR)

Jedi15"/17" WHL-U

Jedi15"/17" WHL-U

Jedi15"/17" WHL-U

1

A00

A00

5 106Tuesday, January 08, 2019

5 106Tuesday, January 08, 2019

5 106Tuesday, January 08, 2019

A00

of

of

of

Vinafix.com

Main Func = CPU

5

4

3

2

1

WHL QS/CFL/WHL_ES1_CNL U

CFG315

D D

C C

CFG415

SB 0323

TP618TPAD14-OP-G P

TP621TPAD14-OP-G P

R601

49D9R2F-L1-G P

1

12

ITP_PMODE

1

CFG3
CFG4

CFG_RCOM P

T4
R4

T3
R3

J4

M4

J3
M3
R2
N2
R1
N1

J2
L2

J1
L1

L3
N3
L4
N4

AB5
W4

CG2
CG1

H4
H3

BV24
BV25

BK36
BK35

W3

AM4
AM3

CFG0
CFG1

CFG2
CFG3
CFG4
CFG5
CFG6
CFG7
CFG8
CFG9
CFG10
CFG11
CFG12
CFG13
CFG14
CFG15

CFG16
CFG18
CFG17
CFG19

CFG_RCOMP
ITP_PMODE
RSVD#CG2

RSVD#CG1

RSVD#H4
RSVD#H3

RSVD#BV24
RSVD#BV25

RSVD#BK36
RSVD#BK35

RSVD#W3
RSVD#AM4

RSVD_TP#AM3

WHISKEY-LAKE- GP

17 OF 20CPU1Q

RSVD_TP#F37
RSVD_TP#F34

IST_TRIG

RSVD_TP#CN36

RSVD_TP#BJ36
RSVD_TP#BJ34

TP#BK34
TP#BR18

RSVD_TP#BT9
RSVD_TP#BT8

RSVD_TP#BP8
RSVD_TP#BP9

RSVD#CR4
RSVD#CP3

RSVD#CR3

RSVD_TP#AT3
RSVD_TP#AU3

RSVD#AN1
RSVD#AN2

RSVD#AN4
RSVD#AN3

IST_TP0
IST_TP1

IST_TRIG0
IST_TRIG1

TP#BP34
TP#BP35

RSVD_TP#CR35

SKTOCC#

F37
F34
CP36
CN36

BJ36
BJ34

BK34
BR18

BT9
BT8

BP8
BP9

CR4
CP3

CR3

AT3
AU3

AN1
AN2

AN4
AN3

AL2
AL1

AL4
AL3

BP34
BP36

VSS

BP35

SB 1003

RSVD_TP#CR 35

CR35

E1

SKTOCC#

1

TP620

1

TPAD14-OP-G P

TP619 TPAD14-OP-G P

B B

SKL(#543016):
Processor strap CFG[4] should be pulled low to enable embedded DisplayPort*

A A

Jedi UMA/DIS 2IN1

Jedi UMA/DIS 2IN1

Jedi UMA/DIS 2IN1

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin T ai Wu Rd ., Hsichih,

21F, 88, Sec.1, Hsin T ai Wu Rd ., Hsichih,

21F, 88, Sec.1, Hsin T ai Wu Rd ., Hsichih,
Taipei Hsie n 221, Taiwan, R.O .C.

Taipei Hsie n 221, Taiwan, R.O .C.

Title

Title

Title

Size Document Num ber Rev

Size Document Num ber Rev

Size Document Num ber Rev

A2

A2

A2

Jedi15"/17" WHL-U

Jedi15"/17" WHL-U

Jedi15"/17" WHL-U

Date: Sheet of

Date: Sheet of

5

4

3

2

Date: Sheet of

Taipei Hsie n 221, Taiwan, R.O .C.

CPU (CFG/IST)

CPU (CFG/IST)

CPU (CFG/IST)

1

A00

A00

6 106Tuesday, January 08, 2019

6 106Tuesday, January 08, 2019

6 106Tuesday, January 08, 2019

A00

Vinafix.com

5

4

3

2

1

Main Func = CPU

VCCCORE _SENSE46
VSSCORE_SEN SE46

VIDSOUT_CPU _R46
VIDSCK_CPU_R46

PWR_VC ORE_ALERT#46

D D

C C

B B

1V_CPU_COR E 1V_CPU_COR E

AN9

VCCCORE

AN10

VCCCORE

AN24

VCCCORE

AN26

VCCCORE

AN27

VCCCORE

AP2

VCCCORE

AP9

VCCCORE

AP24

VCCCORE

AP26

VCCCORE

AR5

VCCCORE

AR6

VCCCORE

AR7

VCCCORE

AR8

VCCCORE

AR10

VCCCORE

AR25

VCCCORE

AR27

VCCCORE

AT9

VCCCORE

AT24

VCCCORE

AT26

VCCCORE

AU5

VCCCORE

AU6

VCCCORE

AU7

VCCCORE

AU8

VCCCORE

AU9

VCCCORE

AU24

VCCCORE

AU25

VCCCORE

AU26

VCCCORE

AU27

VCCCORE

AV2

VCCCORE

AV5

VCCCORE

AV7

VCCCORE

AV10

VCCCORE

AV27

VCCCORE

AW5

VCCCORE

AW6

VCCCORE

AW7

VCCCORE

AW8

VCCCORE

AW9

VCCCORE

AW10

VCCCORE

BB9

RSVD#BB9

BC24

RSVD#BC24

AY9

RSVD#AY9

BB24

RSVD#BB24

WHISKEY-LAKE- GP

Layout Note:
The total Length of Data and Clock (from CPU to each VR) must be equal (±0.1 inch).
Route the Alert signal between the Clock and the Data signals.

12 OF 20CPU1L

VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE

VCC_SENSE

VSS_SENSE

VIDALERT#

VIDSCK
VIDSOUT
RSVD#Y3
VCCSTG

AW24
AW25
AW26
AW27
AY24
AY26
BA5
BA7
BA8
BA25
BA27
BB2
BB26
BC5
BC6
BC7
BC9
BC10
BC26
BC27
BD5
BD8
BD10
BD25
BD27
BE9
BE24
BE25
BE26
BE27
BF2
BF9
BF24
BF26
BG27

AN6
AN5

AA3
AA1
AA2
Y3
BG3

VCCCORE _SENSE
VSSCORE_SEN SE

SVID_ALERT#_CP U_R
SVID_CLK_CPU_R
SVID_DATA_CPU _R

1V_VCCST_C PU

CLOSE TO CPU

SVID DATA

SVID CLOCK

SVID_DATA_CPU _R

SVID_CLK_CPU_R

12

R732

1 2

0R0402-PAD

R726
100R2F-L1-GP- U

R709

1 2

0R0402-PAD

1V_VCCSTG

#544669

1V_VCCST_C PU

DY

1V_VCCST_C PU

12

R723
54D9R2F-L1-G P

12

R727
56R2J-4-GP

1V_CPU_COR E

SVID_543016:

VIDSOUT_CPU _R

VIDSCK_CPU_R

#544669
CLOSE TO CPU

12

R719
100R2F-L1-GP- U

12

R720
100R2F-L1-GP- U

#544669
CLOSE TO VR

VCCCORE _SENSE
VSSCORE_SEN SE

Layout Note:

1. Place close to CPU

2. VCC_SENSE/ VSS_SENSE
impedance=50 ohm

3. Length match<25mil

R728

SVID ALERT

A A

5

4

220R2J-L2-GP

12

PWR_VC ORE_ALERT#SVID_ALERT#_CP U_R

Jedi UMA/DIS 2IN1

Jedi UMA/DIS 2IN1

Jedi UMA/DIS 2IN1

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin T ai Wu Rd ., Hsichih,

21F, 88, Sec.1, Hsin T ai Wu Rd ., Hsichih,

21F, 88, Sec.1, Hsin T ai Wu Rd ., Hsichih,
Taipei Hsie n 221, Taiwan, R.O .C.

Taipei Hsie n 221, Taiwan, R.O .C.

Title

Title

Title

Size Document Num ber Rev

Size Document Num ber Rev

Size Document Num ber Rev
A2

A2

A2

Tuesday, January 08, 2019

Tuesday, January 08, 2019

Tuesday, January 08, 2019

Date: Sheet of

Date: Sheet of

3

2

Date: Sheet of

Taipei Hsie n 221, Taiwan, R.O .C.

CPU (VCORE/VID)

CPU (VCORE/VID)

CPU (VCORE/VID)

Jedi15"/17" WHL-U

Jedi15"/17" WHL-U

Jedi15"/17" WHL-U

1

7 106

7 106

7 106

A00

A00

A00

Vinafix.com

5

4

3

2

1

Main Func = CPU

WHL QS/CFL/WHL_ES1_CNL U

A5

VCCGT

A6

VCCGT

A8

VCCGT

A11

VCCGT

A12

VCCGT

VSSSA_SENSE46
VCCSA_SENSE46

D D

C C

B B

VCCGT_SENSE46
VSSGT_SENSE46

A14

VCCGT

A15

VCCGT

A17

VCCGT

A18

VCCGT

A20

VCCGT

B3

VCCGT

B4

VCCGT

B6

VCCGT

B8

VCCGT

B11

VCCGT

B14

VCCGT

B17

VCCGT

B20

VCCGT

C2

VCCGT

C3

VCCGT

C6

VCCGT

C7

VCCGT

C8

VCCGT

C11

VCCGT

C12

VCCGT

C14

VCCGT

C15

VCCGT

C17

VCCGT

C18

VCCGT

C20

VCCGT

D4

VCCGT

D7

VCCGT

D11

VCCGT

D12

VCCGT

D14

VCCGT

D15

VCCGT

D17

VCCGT

D18

VCCGT

D20

VCCGT

E4

VCCGT

F5

VCCGT

F6

VCCGT

F7

VCCGT

F8

VCCGT

F11

VCCGT

F14

VCCGT

F17

VCCGT

F20

VCCGT

G11

VCCGT

G12

VCCGT

G14

VCCGT

G15

VCCGT

G17

VCCGT

G18

VCCGT

G20

VCCGT

H5

VCCGT

H6

VCCGT

H7

VCCGT

H8

VCCGT

H11

VCCGT

WHISKEY-LAKE-GP

13 OF 20CPU1M

VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT

VCCGT
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE

VCCGT_SENSE
VSSGT_SENSE

H12
H14
H15
H17
H18
H20
J7
J8
J11
J14
J17
J20
K2
K11
L7
L8
L10
M9
N7
N8
N9
N10
P2
P8
R9
T8
T9
T10
U8
U10
V9
W8
W9
AA9
AB2
AB8
AB9
AB10
AC8
AD9
AE8
AE9
AE10
AF2
AF8
AF10
AG8
AG9
AH9
AJ8
AJ10
AK2
AK9
AL8
AL9
AL10
AM8
V2
Y8
Y10
E3
D2

VCCGT_SENSE
VSSGT_SENSE

SA 1227

For WHL ES1/ES2 design

1V_CPU_CORE

SC1U10V2KX-1DLGP

RO13_20171011

1D2V_S31V_VCCGT 1V_VCCGT

DY

SB 0328

1 2

SA 0118

12

C804
SC1U10V2KX-1DLGP

1V_VCCST_CPU

12

C801SC1U25V3KX-1-DLGP

1V_VCCSTG

12

C802SC1U10V2KX-1DLGP

1D2V_VCCSFR_OC

C803

1V_VCCST_CPU

SC1U10V2KX-1DLGP

C805

SCD1U16V2KX-3DLGP

1 2

0.04 A

SA 1229

C806

1 2

1 2

0.12 A

C807

SC22U6D3V3MX-1-DL-GP

AD36

VDDQ

AH32

VDDQ

AH36

VDDQ

AM36

VDDQ

AN32

VDDQ

AW32

VDDQ

AY36

VDDQ

BE32

VDDQ

BH36

VDDQ

R32

VDDQ

Y36

VDDQ

BC28

RSVD#BC28

BP11

VCCST

BP2

VCCST

BG1

VCCSTG

BG2

VCCSTG

BL27

VCCPLL_OC

BM26

VCCPLL_OC

BR11

VCCPLL

BT11

VCCPLL

WHISKEY-LAKE-GP

14 OF 20CPU1N

VCCIO_OUT
VCCIO_OUT
VCCIO_OUT
VCCIO_OUT
VCCIO_OUT
VCCIO_OUT
VCCIO_OUT
VCCIO_OUT
VCCIO_OUT
VCCIO_OUT
VCCIO_OUT
VCCIO_OUT
VCCIO_OUT
VCCIO_OUT
VCCIO_OUT
VCCIO_OUT

VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA

VCCIO_SENSE
VSSIO_SENSE

VSSSA_SENSE
VCCSA_SENSE

AK24
AK26
AL24
AL25
AL26
AL27
AM25
AM27
BH24
BH25
BH26
BH27
BJ24
BJ26
BP16
BP18

BG8
BG10
BH9
BJ8
BJ9
BJ10
BK8
BK25
BK27
BL8
BL9
BL10
BL24
BL26
BM24
BN25

BP28
BP29

BE7
BG7

1V_VCCIO

VSSSA_SENSE
VCCSA_SENSE

+VCCIO(ICCMAX.=2.73A

1V_VCCSA

1V_VCCGT

12

R807
100R2F-L1-GP-U

VCCGT_SENSE

Layout Placement Request

A A

5

4

12

VSSGT_SENSE

R808
100R2F-L1-GP-U

3

VCCSA_SENSE
VSSSA_SENSE

1V_VCCSA

12

12

R810
100R2F-L1-GP-U

R809
100R2F-L1-GP-U

Jedi UMA/DIS 2IN1

Jedi UMA/DIS 2IN1

Jedi UMA/DIS 2IN1

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Title

Title

CPU (VCCGT/VCCIO/VDDQ/VCCSA)

CPU (VCCGT/VCCIO/VDDQ/VCCSA)

CPU (VCCGT/VCCIO/VDDQ/VCCSA)

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

A3

A3

A3

Jedi15"/17" WHL-U

Jedi15"/17" WHL-U

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Jedi15"/17" WHL-U

8 106Tuesday, January 08, 2019

8 106Tuesday, January 08, 2019

8 106Tuesday, January 08, 2019

1

A00

A00

A00

Vinafix.com

5

D D

C C

4

3

2

1

(Blanking)

B B

A A

5

4

3

2

Jedi UMA/DIS 2IN1

Jedi UMA/DIS 2IN1

Jedi UMA/DIS 2IN1

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

A3

A3

A3

CPU (RSVD)

CPU (RSVD)

CPU (RSVD)

Jedi15"/17" WHL-U

Jedi15"/17" WHL-U

Jedi15"/17" WHL-U

9 106Tuesday, January 08, 2019

9 106Tuesday, January 08, 2019

9 106Tuesday, January 08, 2019

1

A00

A00

A00

Vinafix.com

Main Func = CPU

5

1V_CPU_CORE

4

3

2

1

1V_CPU_COR E

D D

C C

DY

PC1002

12

PC1012

12

PC1022

12

SC22U6D3V3MX-1-DL-GP

DY

SC22U6D3V3MX-1-DL-GP

SC22U6D3V3MX-1-DL-GP

PC1003

12

PC1013

12

PC1023

12

PC1005

PC1007

12

PC1017

12

PC1027

12

PC1009

12

PC1019

12

PC1029

12

PC1011

PC1010

SC22U6D3V3MX-1-DL-GP

SC22U6D3V3MX-1-DL-GP

12

PC1020

SC22U6D3V3MX-1-DL-GP

SC22U6D3V3MX-1-DL-GP

12

PC1030

SC22U6D3V3MX-1-DL-GP

SC22U6D3V3MX-1-DL-GP

12

12

12

12

PC1021

PC1031

PC1079

PC1080

12

PC1032

12

PC1081

SC22U6D3V3MX-1-DL-GP

SC22U6D3V3MX-1-DL-GP

SC22U6D3V3MX-1-DL-GP

12

12

DY

PC1036

PC1034

SC22U6D3V3MX-1-DL-GP

SC22U6D3V3MX-1-DL-GP

SC22U6D3V3MX-1-DL-GP

12

12

SC22U6D3V3MX-1-DL-GP

SC22U6D3V3MX-1-DL-GP

SC22U6D3V3MX-1-DL-GP

PC1008

SC22U6D3V3MX-1-DL-GP

SC22U6D3V3MX-1-DL-GP

12

PC1018

SC22U6D3V3MX-1-DL-GP

SC22U6D3V3MX-1-DL-GP

12

PC1028

SC22U6D3V3MX-1-DL-GP

SC22U6D3V3MX-1-DL-GP

12

SC22U6D3V3MX-1-DL-GP

12

DY

PC1014

SC22U6D3V3MX-1-DL-GP

12

PC1024

SC22U6D3V3MX-1-DL-GP

12

SC22U6D3V3MX-1-DL-GP

SC22U6D3V3MX-1-DL-GP

12

12

PC1015

PC1016

SC22U6D3V3MX-1-DL-GP

SC22U6D3V3MX-1-DL-GP

SC22U6D3V3MX-1-DL-GP

12

12

PC1026

PC1025

SC22U6D3V3MX-1-DL-GP

SC22U6D3V3MX-1-DL-GP

SC22U6D3V3MX-1-DL-GP

12

12

PC1006

PC1004

SC22U6D3V3MX-1-DL-GP

12

DY

PC1082

PC1084

PC1083

SC22U6D3V3MX-1-DL-GP

SC22U6D3V3MX-1-DL-GP

SC22U6D3V3MX-1-DL-GP

12

12

DY

DY

VCCGT

22U 0603 x 35 (13 DY)

1V_VCCGT

22U 0603 x 39 (7DY)

PC1037

12

PC1040

12

PC1042

PC1041

12

SC22U6D3V3MX-1-DL-GP

SC22U6D3V3MX-1-DL-GP

PC1044

PC1045

12

12

12

12

SC22U6D3V3MX-1-DL-GP

SC22U6D3V3MX-1-DL-GP

SC22U6D3V3MX-1-DL-GP

PC1039

PC1038

12

12

SC22U6D3V3MX-1-DL-GP

SC22U6D3V3MX-1-DL-GP

SC22U6D3V3MX-1-DL-GP

PC1043

PC1069

PC1046

12

SC22U6D3V3MX-1-DL-GP

PC1070

12

12

SC22U6D3V3MX-1-DL-GP

SC22U6D3V3MX-1-DL-GP

SC22U6D3V3MX-1-DL-GP

DY

DY

PC1048

PC1049

PC1047

SC22U6D3V3MX-1-DL-GP

12

B B

PC1057

SC22U6D3V3MX-1-DL-GP

12

DY

VCCSA

22U 0603 x 8 (3DY)

1V_VCCSA

PC1072

PC1071

12

12

SC22U6D3V3MX-1-DL-GP

A A

SC22U6D3V3MX-1-DL-GP

5

12

PC1058

12

PC1073

12

PC1050

SC22U6D3V3MX-1-DL-GP

SC22U6D3V3MX-1-DL-GP

SC22U6D3V3MX-1-DL-GP

12

12

PC1060

PC1059

SC22U6D3V3MX-1-DL-GP

SC22U6D3V3MX-1-DL-GP

SC22U6D3V3MX-1-DL-GP

12

12

PC1075

PC1074

12

12

SC22U6D3V3MX-1-DL-GP

SC22U6D3V3MX-1-DL-GP

SC22U6D3V3MX-1-DL-GP

DY

PC1051

12

PC1061

12

PC1076

12

PC1053

PC1052

SC22U6D3V3MX-1-DL-GP

SC22U6D3V3MX-1-DL-GP

SC22U6D3V3MX-1-DL-GP

12

12

PC1063

PC1062

SC22U6D3V3MX-1-DL-GP

SC22U6D3V3MX-1-DL-GP

SC22U6D3V3MX-1-DL-GP

12

12

DY

DY

PC1078

PC1077

12

12

SC22U6D3V3MX-1-DL-GP

SC22U6D3V3MX-1-DL-GP

SC22U6D3V3MX-1-DL-GP

DY

DY

PC1054

12

PC1064

12

PC1056

PC1055

SC22U6D3V3MX-1-DL-GP

SC22U6D3V3MX-1-DL-GP

SC22U6D3V3MX-1-DL-GP

12

12

DY

PC1065

PC1066

SC22U6D3V3MX-1-DL-GP

SC22U6D3V3MX-1-DL-GP

SC22U6D3V3MX-1-DL-GP

12

12

DY

DY

PC1067

12

PC1001

PC1068

SC22U6D3V3MX-1-DL-GP

SC22U6D3V3MX-1-DL-GP

SC22U6D3V3MX-1-DL-GP

12

12

DY

<Core Desig n>

<Core Desig n>

<Core Desig n>

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin T ai Wu Rd ., Hsichih,

21F, 88, Sec.1, Hsin T ai Wu Rd ., Hsichih,

21F, 88, Sec.1, Hsin T ai Wu Rd ., Hsichih,
Taipei Hsie n 221, Taiwan, R.O .C.

Taipei Hsie n 221, Taiwan, R.O .C.

Title

Title

Title

Size Document Num ber Rev

Size Document Num ber Rev

Size Document Num ber Rev

A2

A2

A2

Date: Sheet of

Date: Sheet of

4

3

2

Date: Sheet of

Taipei Hsie n 221, Taiwan, R.O .C.

CPU_(Power CAP1)

CPU_(Power CAP1)

CPU_(Power CAP1)

Jedi15"/17" WHL-U

Jedi15"/17" WHL-U

Jedi15"/17" WHL-U

1

A00

A00

10 106Tuesday, January 08, 2019

10 106Tuesday, January 08, 2019

10 106Tuesday, January 08, 2019

A00

Vinafix.com

5

Main Func = CPU

4

3

2

1

PCH DERIVED RAILS

1D0V_S5

D D

UNSLICED GT

1V_VCCGT

12

C1102

DY

SC1U10V2KX-1DLGP

12

C1103

DY

SC1U10V2KX-1DLGP

12

C1104

DY

SC1U10V2KX-1DLGP

SB 0403

12

C1105

SC1U10V2KX-1DLGP

12

C1106

DY

SC1U10V2KX-1DLGP

12

C1107

1U 0402 x 6

SC1U10V2KX-1DLGP

VCCIO

1V_VCCIO

+VCCIO(ICCMAX.=2.73A)

SB 0328

12

12

C1109

C1108

DY

SC1U25V3KX-1-DLGP

SC1U10V2KX-1DLGP

12

C1110

SC1U25V3KX-1-DLGP

12

C1111

SC1U10V2KX-1DLGP

RO13_20171107

12

C1112
SC22U6D3V3MX-1-DL-GP

RO13_20171110
KR EC list

3D3V_S5_PCH 3D3V_VCCPRIM

C C

B B

R1103

1 2

0R0603-PAD

RO13_20171020

Layout Placement Request

1D8V_S5 1D8V_VCCPRIM

R1104

1 2

0R0603-PAD

RO13_20171020

1V_VCCIO

DY

12

+VCCIO(ICCMAX.=2.73A)

C1133

C1134

12

C1135

12

12

SC22U6D3V3MX-1-DL-GP

SC22U6D3V3MX-1-DL-GP

SC22U6D3V3MX-1-DL-GP

DY

C1122

SC22U6D3V3MX-1-DL-GP

RO13_20171107

1D0V_S5

C1129

C1128

SC22U6D3V3MX-1-DL-GP

12

12

+VCCMPHYGTAON_1P0(ICCMAX.=2.12A)

1D0V_S5 1D0V_S51D0V_S51D0V_S5

C1115

SC22U6D3V3MX-1-DL-GP

12

12

C1114

SB 0328

SC22U6D3V3MX-1-DL-GP

DY

SC1U25V3KX-1-DLGP

C1116

12

1D2V_S3

C1136

SC1U10V2KX-1DLGP

12

C1117

SC1U25V3KX-1-DLGP

SB 0328

12

12

12

C1137

C1138

12

12

C1140SCD1U16V2KX-3DLGP

C1139SCD1U16V2KX-3DLGP

RO13_20171110
KR EC list

12

12

C1141SCD1U16V2KX-3DLGP

C1118

SC22U6D3V3MX-1-DL-GP

12

C1142SCD1U16V2KX-3DLGP

RO13_20171030
+VCCMPHYGTAON_1P0_LS_SIP change to 1D0V_S5.

C1121

C1119

SC1U10V2KX-1DLGP

12

SC10U6D3V3MX-DL-GP

C1120

12

DY

SC1U10V2KX-1DLGP

12

Layout Note:

1uF:
C1174 near N15
C1180 near K15
C1173 near AF20
C1172 near N18
C1175 near AB19
22uF :
C1182 C1184 near N15
10uF:
C1176 near N15

Layout Placement Request

SC10U6D3V3MX-DL-GP

SC10U6D3V3MX-DL-GP

SC10U6D3V3MX-DL-GP

C1131

C1132

12

DY

U-line 23e 28W

A A

IccMax current-10ms max = 34 A

RO13_20170717

5

4

C1130

SC22U6D3V3MX-1-DL-GP

SC22U6D3V3MX-1-DL-GP

12

DY

SC22U6D3V3MX-1-DL-GP

12

FC1102

12

SC12P50V2JN-DL-GP

FC1103

RF request 2018/09/28 modify

3

12

SC12P50V2JN-DL-GP

Jedi UMA/DIS 2IN1

Jedi UMA/DIS 2IN1

Jedi UMA/DIS 2IN1

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Title

Title

CPU (Power Cap2)

CPU (Power Cap2)

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

A3

A3

A3

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

CPU (Power Cap2)

Jedi15"/17" WHL-U

Jedi15"/17" WHL-U

Jedi15"/17" WHL-U

11 106Tuesday, January 08, 2019

11 106Tuesday, January 08, 2019

11 106Tuesday, January 08, 2019

1

A00

A00

A00

Vinafix.com

5

Main Func = MEMORY

M_A_BA1 5
M_A_BG1 5

M_A_DQS_DN[7: 0] 5

M_A_DQS_DP[7:0] 5

1D2V_S3

1 2

R1215

DY

12

DDR4_DR AMRST#

1

2

3

Layout note: closed to Dimm

M_A_DIMA_ODT0
M_A_DIMA_ODT1

SA0_CHA_DIM0
SA1_CHA_DIM0
SA2_CHA_DIM0

DDR4_DR AMRST#
M_A_ACT_N
M_A_ALERT_N
TS#_DIMM0_1

240R2F-1-GP

M_VREF_CA_D IMMA

C1229

SCD1U16V2KX-3DLGP

ED1217
PESD5V0U2BT- 215-GP

075.52215.007D

DY

M_A_DQS_DN0
M_A_DQS_DN1
M_A_DQS_DN2
M_A_DQS_DN3
M_A_DQS_DN4
M_A_DQS_DN5
M_A_DQS_DN6
M_A_DQS_DN7

D D

C C

B B

A A

M_A_DQS_DP0
M_A_DQS_DP1
M_A_DQS_DP2
M_A_DQS_DP3
M_A_DQS_DP4
M_A_DQS_DP5
M_A_DQS_DP6
M_A_DQS_DP7

M_A_A0 5
M_A_A1 5
M_A_A2 5
M_A_A3 5
M_A_A4 5
M_A_A5 5
M_A_A6 5
M_A_A7 5
M_A_A8 5
M_A_A9 5
M_A_A10 5
M_A_A11 5
M_A_A12 5
M_A_A13 5
M_A_A14 5
M_A_A15 5
M_A_A16 5

M_A_DQ0 5
M_A_DQ1 5
M_A_DQ2 5
M_A_DQ3 5
M_A_DQ4 5
M_A_DQ5 5
M_A_DQ6 5
M_A_DQ7 5
M_A_DQ8 5
M_A_DQ9 5
M_A_DQ10 5
M_A_DQ11 5
M_A_DQ12 5
M_A_DQ13 5
M_A_DQ14 5
M_A_DQ15 5
M_A_DQ16 5
M_A_DQ17 5
M_A_DQ18 5
M_A_DQ19 5
M_A_DQ20 5
M_A_DQ21 5
M_A_DQ22 5
M_A_DQ23 5
M_A_DQ24 5
M_A_DQ25 5
M_A_DQ26 5
M_A_DQ27 5
M_A_DQ28 5
M_A_DQ29 5
M_A_DQ30 5
M_A_DQ31 5
M_A_DQ32 5
M_A_DQ33 5
M_A_DQ34 5
M_A_DQ35 5
M_A_DQ36 5
M_A_DQ37 5
M_A_DQ38 5
M_A_DQ39 5
M_A_DQ40 5
M_A_DQ41 5
M_A_DQ42 5
M_A_DQ43 5
M_A_DQ44 5
M_A_DQ45 5
M_A_DQ46 5
M_A_DQ47 5
M_A_DQ48 5
M_A_DQ49 5
M_A_DQ50 5
M_A_DQ51 5
M_A_DQ52 5
M_A_DQ53 5
M_A_DQ54 5
M_A_DQ55 5
M_A_DQ56 5
M_A_DQ57 5
M_A_DQ58 5
M_A_DQ59 5
M_A_DQ60 5
M_A_DQ61 5
M_A_DQ62 5
M_A_DQ63 5

M_A_CLK0 5
M_A_CLK#0 5
M_A_CLK1 5
M_A_CLK#1 5

M_A_CKE0 5
M_A_CKE1 5

M_A_CS#0 5
M_A_CS#1 5

M_A_DIMA_ODT0 5
M_A_DIMA_ODT1 5

PCH_SMBDAT A 13,18
PCH_SMBCLK 13,18

DDR4_DR AMRST# 5,13

M_A_ACT_N 5
M_A_ALERT_N 5
M_A_PARITY 5

M_A_BA0 5
M_A_BG0 5

V_SM_VREF_CN TA 5

M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15
M_A_A16

M_A_BA0
M_A_BA1
M_A_BG0
M_A_BG1

M_A_CLK0
M_A_CLK#0
M_A_CLK1
M_A_CLK#1

M_A_CKE0
M_A_CKE1

M_A_CS#0
M_A_CS#1

PCH_SMBDAT A
PCH_SMBCLK

M_A_PARITY

4

DM1A

144

A0

133

A1

132

A2

131

A3

128

A4

126

A5

127

A6

122

A7

125

A8

121

A9

146

A10/AP

120

A11

119

A12

158

A13

151

WE#/A14

156

CAS#/A15

152

RAS#/A16

150

BA0

145

BA1

115

BG0

113

BG1

92

CB0/NC

91

CB1/NC

101

CB2/NC

105

CB3/NC

88

CB4/NC

87

CB5/NC

100

CB6/NC

104

CB7/NC

137

CK0_T

139

CK0_C

138

CK1_T/NF

140

CK1_C/NF

109

CKE0

110

CKE1

149

CS0#

157

CS1#

162

C0/CS2#/NC

165

C1/CS3#/NC

155

ODT0

DDR swap

161

ODT1

256

SA0

260

SA1

166

SA2

254

SDA

253

SCL

108

RESET#

114

ACT#

116

ALERT#

134

EVENT#/NF

143

PARITY

164

VREFCA

DDR4-260P- 78-GP-U

062.10011.M001

2nd = 062.10011.M002

3rd = 062.10011.M003

1D2V_S3

RN1201

1
2 3

SRN1KJ-7-G P

4

1 OF 4

DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63

DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9

8
7
20
21
4
3
16
17
28
29
41
42
24
25
38
37
50
49
62
63
46
45
58
59
70
71
83
84
66
67
79
80
174
173
187
186
170
169
183
182
195
194
207
208
191
190
203
204
216
215
228
229
211
212
224
225
237
236
249
250
232
233
245
246

M_VREF_CA_D IMMA

M_A_DQ28
M_A_DQ24
M_A_DQ26
M_A_DQ27
M_A_DQ29
M_A_DQ25
M_A_DQ30
M_A_DQ31
M_A_DQ5
M_A_DQ1
M_A_DQ3
M_A_DQ2
M_A_DQ0
M_A_DQ4
M_A_DQ7
M_A_DQ6
M_A_DQ8
M_A_DQ12
M_A_DQ14
M_A_DQ11
M_A_DQ9
M_A_DQ13
M_A_DQ15
M_A_DQ10
M_A_DQ23
M_A_DQ18
M_A_DQ20
M_A_DQ21
M_A_DQ19
M_A_DQ16
M_A_DQ22
M_A_DQ17
M_A_DQ50
M_A_DQ51
M_A_DQ55
M_A_DQ49
M_A_DQ53
M_A_DQ52
M_A_DQ48
M_A_DQ54
M_A_DQ61
M_A_DQ57
M_A_DQ62
M_A_DQ59
M_A_DQ60
M_A_DQ56
M_A_DQ63
M_A_DQ58
M_A_DQ36
M_A_DQ37
M_A_DQ35
M_A_DQ34
M_A_DQ32
M_A_DQ33
M_A_DQ38
M_A_DQ39
M_A_DQ45
M_A_DQ41
M_A_DQ46
M_A_DQ43
M_A_DQ40
M_A_DQ44
M_A_DQ47
M_A_DQ42

1 2

2R2F-GP

R1206

SA 1225 SWAP

SA 1225 SWAP

SA 1225 SWAP

SA 1225 SWAP

SA 1225 SWAP

SA 1225 SWAP

SA 1225 SWAP

SA 1225 SWAP

R1205

1 2

0R0402-PAD

R1210

1 2

0R0402-PAD

R1212

1 2

0R0402-PAD

V_SM_VREF_CN TA

C1222
SCD022U16V2KX -3DLGP

2 1

+V_VREF_PATH 1

12

R1209

24D9R2F-L-G P

3

SA0_CHA_DIM0

SA1_CHA_DIM0

SA2_CHA_DIM0

DM1B

DM0#/DBI0#
DM2#/DBI2#

DM3#/DBI3#
DM4#/DBI4#
DM5#/DBI5#
DM6#/DBI6#
DM7#/DBI7#

DM8#/DBI#/NC

12

12

C1208

C1214

SC1U10V2KX-1DLGP

12

SC10U6D3V3MX-DL-GP

12

DDR4-260P- 78-GP-U

DM1C

111
112
117
118
123
124
129
130
135
136
141
142
147
148
153
154
159
160
163

DDR4-260P- 78-GP-U

12

C1209

C1202

SC10U6D3V3MX-DL-GP

C1215

SC1U10V2KX-1DLGP

1D2V_S3

1D2V_S3

Layout Placement Request

DQS0_C
DQS0_T
DQS1_C
DQS1_T
DQS2_C
DQS2_T
DQS3_C
DQS3_T
DQS4_C
DQS4_T
DQS5_C
DQS5_T
DQS6_C
DQS6_T
DQS7_C
DQS7_T
DQS8_C
DQS8_T

DM1#/DBI#

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

SC10U6D3V3MX-DL-GP

12

2 OF 4

C1217

SC1U10V2KX-1DLGP

11
13
32
34
53
55
74
76
177
179
198
200
219
221
240
242
95
97

12
33
54
75
178
199
220
241
96

3 OF 4

VDDSPD

12

C1204

12

C1218

SC1U10V2KX-1DLGP

M_A_DQS_DN3
M_A_DQS_DP3
M_A_DQS_DN0
M_A_DQS_DP0
M_A_DQS_DN1
M_A_DQS_DP1
M_A_DQS_DN2
M_A_DQS_DP2
M_A_DQS_DN6
M_A_DQS_DP6
M_A_DQS_DN7
M_A_DQS_DP7
M_A_DQS_DN4
M_A_DQS_DP4
M_A_DQS_DN5
M_A_DQS_DP5

VPP
VPP

VTT

261
262

NP1
NP2

12

C1205

SC10U6D3V3MX-DL-GP

2

SA 1225 SWAP

255

257
259

258

261
262

NP1
NP2

2D5V_S3

0D6V_S0

Layout Placement Request

SC10U6D3V3MX-DL-GP

12

C1220

SC1U10V2KX-1DLGP

0D6V_S0

EC1202

1

4 OF 4

DM1D

VSS1VSS

2

VSS

5

VSS

6

VSS

9

VSS

10

VSS

14

VSS

15

VSS

18

VSS

19

VSS

22

VSS

23

VSS

26

VSS

27

VSS

30

VSS

31

VSS

35

VSS

36

1D2V_S3

3D3V_S0

12

C1226

SC1U10V2KX-1DLGP

EC1203

12

12

SCD1U25V2KX-GP

DY

SC2D2U6D3V2MX-DL-GP

DY

VSS

39

VSS

40

VSS

43

VSS

44

VSS

47

VSS

48

VSS

51

VSS

52

VSS

56

VSS

57

VSS

60

VSS

61

VSS

64

VSS

65

VSS

68

VSS

69

VSS

72

VSS

73

VSS

77

VSS

78

VSS

81

VSS

82

VSS

85

VSS

86

VSS

89

VSS

90

VSS

93

VSS

94

VSS

98

VSS

DDR4-260P- 78-GP-U

C1223

SC4D7U6D3V3KX-DLGP

2D5V_S3

99
102

VSS

103

VSS

106

VSS

107

VSS

167

VSS

168

VSS

171

VSS

172

VSS

175

VSS

176

VSS

180

VSS

181

VSS

184

VSS

185

VSS

188

VSS

189

VSS

192

VSS

193

VSS

196

VSS

197

VSS

201

VSS

202

VSS

205

VSS

206

VSS

209

VSS

210

VSS

213

VSS

214

VSS

217

VSS

218

VSS

222

VSS

223

VSS

226

VSS

227

VSS

230

VSS

231

VSS

234

VSS

235

VSS

238

VSS

239

VSS

243

VSS

244

VSS

247

VSS

248

VSS

251

VSS

252

VSS

0D6V_S00D6V_S0

12

12

C1231

SC4D7U6D3V3KX-DLGP

COMMON PARTS

12

C1227

SC4D7U6D3V3KX-DLGP

12

12

C1212

C1207

SC4D7U6D3V3KX-GP

SC1U10V2KX-1DLGP

DY

Jedi UMA/DIS 2IN1

Jedi UMA/DIS 2IN1

Jedi UMA/DIS 2IN1

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin T ai Wu Rd ., Hsichih,

21F, 88, Sec.1, Hsin T ai Wu Rd ., Hsichih,

21F, 88, Sec.1, Hsin T ai Wu Rd ., Hsichih,
Taipei Hsie n 221, Taiwan, R.O .C.

Taipei Hsie n 221, Taiwan, R.O .C.

Title

Title

Title

DDR (DDR4-CHA)

DDR (DDR4-CHA)

DDR (DDR4-CHA)

Size Document Num ber Rev

Size Document Num ber Rev

Size Document Num ber Rev
A2

A2

A2

Jedi15"/17" WHL-U

Jedi15"/17" WHL-U

Jedi15"/17" WHL-U

Tuesday, January 08, 2019

Tuesday, January 08, 2019

Tuesday, January 08, 2019

Date: Sheet of

Date: Sheet of

5

4

3

2

Date: Sheet of

Taipei Hsie n 221, Taiwan, R.O .C.

1

12 106

12 106

12 106

A00

A00

A00

Vinafix.com

5

Main Func = MEMORY

M_B_A0 5
M_B_A1 5
M_B_A2 5
M_B_A3 5
M_B_A4 5
M_B_A5 5
M_B_A6 5
M_B_A7 5
M_B_A8 5
M_B_A9 5

D D

C C

B B

M_B_A10 5
M_B_A11 5
M_B_A12 5
M_B_A13 5
M_B_A14 5
M_B_A15 5
M_B_A16 5

M_B_BA0 5

M_B_BA1 5

M_B_BG0 5

M_B_BG1 5
M_B_CLK0 5

M_B_CLK#0 5
M_B_CLK1 5
M_B_CLK#1 5

M_B_CKE0 5
M_B_CKE1 5

M_B_CS#0 5
M_B_CS#1 5

M_B_DIMB_ODT0 5
M_B_DIMB_ODT1 5

PCH_SMBDAT A 12,18
PCH_SMBCLK 12,18

DDR4_DR AMRST# 5,12,13

M_B_ACT_N 5

M_B_ALERT_N 5

M_B_PARITY 5

V_SM_VREF_CN TB 5

M_B_DQ0 5
M_B_DQ1 5
M_B_DQ2 5
M_B_DQ3 5
M_B_DQ4 5
M_B_DQ5 5
M_B_DQ6 5
M_B_DQ7 5
M_B_DQ8 5

M_B_DQ9 5
M_B_DQ15 5
M_B_DQ14 5
M_B_DQ12 5
M_B_DQ13 5
M_B_DQ10 5
M_B_DQ11 5
M_B_DQ22 5
M_B_DQ17 5
M_B_DQ21 5
M_B_DQ19 5
M_B_DQ18 5
M_B_DQ16 5
M_B_DQ20 5
M_B_DQ23 5
M_B_DQ30 5
M_B_DQ27 5
M_B_DQ29 5
M_B_DQ31 5
M_B_DQ25 5
M_B_DQ28 5
M_B_DQ24 5
M_B_DQ26 5
M_B_DQ35 5
M_B_DQ38 5
M_B_DQ36 5
M_B_DQ37 5
M_B_DQ34 5
M_B_DQ39 5
M_B_DQ32 5
M_B_DQ33 5
M_B_DQ40 5
M_B_DQ41 5
M_B_DQ42 5
M_B_DQ47 5
M_B_DQ44 5
M_B_DQ45 5
M_B_DQ43 5
M_B_DQ46 5
M_B_DQ52 5
M_B_DQ51 5
M_B_DQ55 5
M_B_DQ49 5
M_B_DQ54 5
M_B_DQ48 5
M_B_DQ50 5
M_B_DQ53 5
M_B_DQ63 5
M_B_DQ62 5
M_B_DQ57 5
M_B_DQ56 5
M_B_DQ58 5
M_B_DQ59 5
M_B_DQ61 5
M_B_DQ60 5

1D2V_S3

1D2V_S3

RN1301

1
2 3

SRN1KJ-7-G P

1 2

R1312

4

4

240R2F-1-GP

DY

M_VREF_CA_D IMMB

R1305

1 2

2R2F-GP

M_B_CLK0
M_B_CLK#0
M_B_CLK1
M_B_CLK#1

M_B_CKE0
M_B_CKE1

M_B_CS#0
M_B_CS#1

M_B_DIMB_ODT0
M_B_DIMB_ODT1

SA0_CHB_DIM0
SA1_CHB_DIM0
SA2_CHB_DIM0

PCH_SMBDAT A
PCH_SMBCLK

DDR4_DR AMRST#
M_B_ACT_N
M_B_ALERT_N

TS#_DIMM1_1

M_B_PARITY

M_VREF_CA_D IMMB

C1301

12

SCD1U16V2KX-3DLGP

M_B_A0

144

M_B_A1

133

M_B_A2

132

M_B_A3

131

M_B_A4

128

M_B_A5

126

M_B_A6

127

M_B_A7

122

M_B_A8

125

M_B_A9

121

M_B_A10

146

M_B_A11

120

M_B_A12

119

M_B_A13

158

M_B_A14

151

M_B_A15

156

M_B_A16

152

M_B_BA0

150

M_B_BA1

145

M_B_BG0

115

M_B_BG1

113

92

91
101
105

88

87
100
104

137
139
138
140

109
110

149
157
162
165

155
161

256
260
166

254
253

108
114
116
134

143
164

V_SM_VREF_CN TB

C1323
SCD022U16V2KX -3DLGP

2 1

+V_VREF_PATH 2

12

R1309

24D9R2F-L-G P

DM2A

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
A13
WE#/A14
CAS#/A15
RAS#/A16

BA0
BA1
BG0
BG1

CB0/NC
CB1/NC
CB2/NC
CB3/NC
CB4/NC
CB5/NC
CB6/NC
CB7/NC

CK0_T
CK0_C
CK1_T/NF
CK1_C/NF

CKE0
CKE1

CS0#
CS1#
C0/CS2#/NC
C1/CS3#/NC

ODT0
ODT1

SA0
SA1
SA2

SDA
SCL

RESET#
ACT#
ALERT#
EVENT#/NF

PARITY
VREFCA

DDR4-260P- 78-GP-U

062.10011.M001

2nd = 062.10011.M002

3rd = 062.10011.M003

1 OF 4

DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63

M_B_DQ1

8

DQ0

M_B_DQ5

7

DQ1

M_B_DQ7

20

DQ2

M_B_DQ3

21

DQ3

M_B_DQ0

4

DQ4

M_B_DQ4

3

DQ5

M_B_DQ6

16

DQ6

M_B_DQ2

17

DQ7

M_B_DQ12

28

DQ8

M_B_DQ11

29

DQ9

M_B_DQ14

41

M_B_DQ15

42

M_B_DQ13

24

M_B_DQ8

25

M_B_DQ10

38

M_B_DQ9

37

M_B_DQ37

50

M_B_DQ36

49

M_B_DQ38

62

M_B_DQ39

63

M_B_DQ35

46

M_B_DQ32

45

M_B_DQ33

58

M_B_DQ34

59

M_B_DQ41

70

M_B_DQ44

71

M_B_DQ43

83

M_B_DQ42

84

M_B_DQ40

66

M_B_DQ45

67

M_B_DQ46

79

M_B_DQ47

80

M_B_DQ17

174

M_B_DQ22

173

M_B_DQ18

187

M_B_DQ19

186

M_B_DQ16

170

M_B_DQ23

169

M_B_DQ20

183

M_B_DQ21

182

M_B_DQ24

195

M_B_DQ28

194

M_B_DQ26

207

M_B_DQ30

208

M_B_DQ25

191

M_B_DQ29

190

M_B_DQ31

203

M_B_DQ27

204

M_B_DQ49

216

M_B_DQ48

215

M_B_DQ50

228

M_B_DQ55

229

M_B_DQ52

211

M_B_DQ53

212

M_B_DQ51

224

M_B_DQ54

225

M_B_DQ56

237

M_B_DQ61

236

M_B_DQ62

249

M_B_DQ58

250

M_B_DQ60

232

M_B_DQ57

233

M_B_DQ63

245

M_B_DQ59

246

Layout Placement Request

3D3V_S0

Layout Placement Request

3

SA 1225 SWAP

SA 1225 SWAP

SA 1225 SWAP

SA 1225 SWAP

SA 1225 SWAP

R1303

1 2

0R0402-PAD

12

R1306 10KR 2F-2-GP

R1311

1 2

0R0402-PAD

SA0_CHB_DIM0

SA1_CHB_DIM0

SA2_CHB_DIM0

1D2V_S3

DM2B

DDR4-260P- 78-GP-U

1D2V_S3

DM2C

111

VDD

112

VDD

117

VDD

118

VDD

123

VDD

124

VDD

129

VDD

130

VDD

135

VDD

136

VDD

141

VDD

142

VDD

147

VDD

148

VDD

153

VDD

154

VDD

159

VDD

160

VDD

163

VDD

DDR4-260P- 78-GP-U

SA 1027

DM0#/DBI0#

DM1#/DBI#
DM2#/DBI2#
DM3#/DBI3#
DM4#/DBI4#
DM5#/DBI5#
DM6#/DBI6#
DM7#/DBI7#

DM8#/DBI#/NC

3 OF 4

255

VDDSPD

257

VPP

259

VPP

258

VTT

261

261

262

262

NP1

NP1

NP2

NP2

SA 1225 SWAP

2 OF 4

M_B_DQS_DN0

11

DQS0_C

M_B_DQS_DP0

13

DQS0_T

M_B_DQS_DN1

32

DQS1_C

M_B_DQS_DP1

34

DQS1_T

M_B_DQS_DN4

53

DQS2_C

M_B_DQS_DP4

55

DQS2_T

M_B_DQS_DN5

74

DQS3_C

M_B_DQS_DP5

76

DQS3_T

M_B_DQS_DN2

177

DQS4_C

M_B_DQS_DP2

179

DQS4_T

M_B_DQS_DN3

198

DQS5_C

M_B_DQS_DP3

200

DQS5_T

M_B_DQS_DN6

219

DQS6_C

M_B_DQS_DP6

221

DQS6_T

M_B_DQS_DN7

240

DQS7_C

M_B_DQS_DP7

242

DQS7_T

95

DQS8_C

97

DQS8_T

12
33
54
75
178
199
220
241
96

12

12

12

12

C1308

C1307

C1305

C1306

SC10U6D3V3MX-DL-GP

SC10U6D3V3MX-DL-GP

SC10U6D3V3MX-DL-GP

12

C1316

12

C1317

SC1U10V2KX-1DLGP

SC1U10V2KX-1DLGP

12

12

C1320

C1319

SC1U10V2KX-1DLGP

Layout Placement Request

2

2D5V_S3

0D6V_S0

Layout Placement Request

1D2V_S3

SB 0313

12

C1310

SC10U6D3V3MX-DL-GP

SC10U6D3V3MX-DL-GP

12

C1321

SC1U10V2KX-1DLGP

SC1U10V2KX-1DLGP

EC1303

SC2D2U6D3V2MX-DL-GP

1

3D3V_S0

4 OF 4

DM2D

VSS1VSS

2

VSS

5

VSS

6

VSS

9

VSS

10

VSS

14

VSS

15

VSS

18

VSS

19

VSS

22

VSS

23

VSS

26

VSS

27

VSS

30

VSS

31

VSS

35

VSS

36

VSS

39

VSS

40

VSS

43

VSS

44

VSS

47

VSS

48

VSS

51

VSS

52

VSS

56

VSS

57

VSS

60

VSS

61

VSS

64

VSS

65

VSS

68

VSS

69

VSS

72

VSS

73

VSS

77

VSS

78

VSS

81

VSS

82

VSS

85

VSS

86

VSS

89

VSS

90

VSS

93

VSS

94

VSS

98

VSS

DDR4-260P- 78-GP-U

12

12

C1325

C1324

SC4D7U6D3V3KX-DLGP

SC4D7U6D3V3KX-DLGP

12

C1326

SC1U10V2KX-1DLGP

C1311

99
102

VSS

103

VSS

106

VSS

107

VSS

167

VSS

168

VSS

171

VSS

172

VSS

175

VSS

176

VSS

180

VSS

181

VSS

184

VSS

185

VSS

188

VSS

189

VSS

192

VSS

193

VSS

196

VSS

197

VSS

201

VSS

202

VSS

205

VSS

206

VSS

209

VSS

210

VSS

213

VSS

214

VSS

217

VSS

218

VSS

222

VSS

223

VSS

226

VSS

227

VSS

230

VSS

231

VSS

234

VSS

235

VSS

238

VSS

239

VSS

243

VSS

244

VSS

247

VSS

248

VSS

251

VSS

252

VSS

2D5V_S30D6V_S0 0D6V_S0 0D6V_S0

12

SC4D7U6D3V3KX-DLGP

12

C1313

SC1U10V2KX-1DLGP

Layout Placement Request

12

DY

M_B_DQS_DN0
M_B_DQS_DN1
M_B_DQS_DN2
M_B_DQS_DN3
M_B_DQS_DN4
M_B_DQS_DN5
M_B_DQS_DN6
M_B_DQS_DN7

M_B_DQS_DP0
M_B_DQS_DP1

A A

M_B_DQS_DP2
M_B_DQS_DP3
M_B_DQS_DP4
M_B_DQS_DP5
M_B_DQS_DP6
M_B_DQS_DP7

M_B_DQS_DN[7: 0] 5

M_B_DQS_DP[7:0] 5

5

Jedi UMA/DIS 2IN1

Jedi UMA/DIS 2IN1

Jedi UMA/DIS 2IN1

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin T ai Wu Rd ., Hsichih,

21F, 88, Sec.1, Hsin T ai Wu Rd ., Hsichih,

21F, 88, Sec.1, Hsin T ai Wu Rd ., Hsichih,
Taipei Hsie n 221, Taiwan, R.O .C.

Taipei Hsie n 221, Taiwan, R.O .C.

Title

Title

Title

DDR (DDR4-CHB)

DDR (DDR4-CHB)

DDR (DDR4-CHB)

Size Document Num ber Rev

Size Document Num ber Rev

Size Document Num ber Rev
A2

A2

A2

Jedi15"/17" WHL-U

Jedi15"/17" WHL-U

Jedi15"/17" WHL-U

Tuesday, January 08, 2019

Tuesday, January 08, 2019

Tuesday, January 08, 2019

Date: Sheet of

Date: Sheet of

4

3

2

Date: Sheet of

Taipei Hsie n 221, Taiwan, R.O .C.

1

13 106

13 106

13 106

A00

A00

A00

Vinafix.com

5

D D

C C

4

3

2

1

(Blanking)

B B

Jedi UMA/DIS 2IN1

Jedi UMA/DIS 2IN1

Jedi UMA/DIS 2IN1

Wistron Corporation

Wistron Corporation

A A

Title

Title

Title

DDR (RSVD) (DDR4-CHA1)

DDR (RSVD) (DDR4-CHA1)

DDR (RSVD) (DDR4-CHA1)

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

A4

A4

A4

Date: Sheet

Date: Sheet

5

4

3

Date: Sheet

2

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Jedi15"/17" WHL-U

Jedi15"/17" WHL-U

Jedi15"/17" WHL-U

14 106Tuesday, January 08, 2019

14 106Tuesday, January 08, 2019

14 106Tuesday, January 08, 2019

1

A00

A00

A00

of

of

of

Vinafix.com

Main Func = PCH

SPKR19,27

SPI_SI_ROM18,25,91
CPU_SMB_ALER T#18
CPU_SMB_ALER T#_P018

SPI_WP_ROM18,25
SPI_HOLD_R OM18,25
NRB_BIT20

CFG46
CFG36

D D

CNV_RGI_DT_R20,61

HDA_SDOUT_C PU19

GPP_B22_GSP I1_MOSI20

GPP_H2321

INPUT3VSEL17
CPU_SMB_ALER T#_P118
GPP_H2121

GPD721

RTC_DET#

GPP_H17_ST RAP4

5

R1501

1 2

SPKR

DY

20KR2J-L2 -GP

4

3D3V_S5_PC H

12

R1502

DY

1KR2J-1-GP

NRB_BIT CPU_SMB_ALER T#

12

R1503

DY

1KR2J-1-GP

3

3D3V_S5_PC H

SA 0202

12

R1551

DY

4K7R2J-L-GP

12

R1552
20KR2J-L2 -GP

DY

2

GPP_B22_GSP I1_MOSI

SA 0104 STRAP

12

R1553
20KR2J-L2 -GP

DY

1

3D3V_S5_PC H

SA 1227

12

R1504
4K7R2J-L-GP

CPU_SMB_ALER T#_P0

12

R1505
20KR2J-L2 -GP

DY

C C

3D3V_S5_PC H

R1508
100KR2F-L2 -GP

1 2

SPI_WP_ROM

12

R1509
4K7R2J-L-GP

DY

SA 0104 STRAP

B B

100KR2F-L2 -GP

3D3V_S5_PC H

DY

R1506

DY

3D3V_S5_PC H

1 2

12

SA 0109

12

12

R1510
100KR2F-L2 -GP

R1511
4K7R2J-L-GP

SPI_SI_ROM

R1507
4K7R2J-L-GP

SPI_HOLD_R OM

SA 0104 STRAP

Page 4 RN403 2.2K PU 3.3V_S0

3D3V_S5_PC H

12

R1554
20KR2J-L2 -GP

12

DY

RTC_DET#

R1519
10KR2J-3-GP

1D8V_VCCPRIM

12

R1512
4K7R2J-L-GP

DY

HDA_SDOUT_C PU

R1527

1KR2J-1-GP

RO13_CFLU_20180106
reserve for strap (Intel review)

SA 0105

SA 0202

GPP_H17_ST RAP

12

DY

Page 4 RN401 2.2K PU 3.3V_S0

3D3V_S5_PC H

DY

12

12

R1522
4K7R2J-L-GP

R1523
20KR2J-L2 -GP

CPU_SMB_ALER T#_P1

SA 1227

GPP_H21

12

R1555
20KR2J-L2 -GP

DY

1D8V_S5

SA 0202

12

R1515
20KR2J-L2 -GP

CNV_RGI_DT_R

12

SA 0202

R1516

DY

4K7R2J-L-GP

A A

(#543016)

[BDW Only]PHYSICAL_DEBUG_ENABLED (DFX PRIVACY)

CFG[3]

5

0 : ENABLED
SET DFX ENABLED BIT IN DEBUG INTERFACE MSR

1 : DISABLED

PCH strap pin:

CFG3

12

R1517
1KR2J-1-GP

DY

DISPLAY PORT PRESENCE STRAP

CFG[4]

4

12

R1520

DY

4K7R2J-L-GP

INPUT3VSEL

12

R1521
4K7R2J-L-GP

0 : ENABLED
An external Display Port device is connected to the Embedded Display Port.

1 : DISABLED (Default)
No Physical Display Port attached to Embedded DisplayPort*. No connect for disable.

CFG4

12

R1518
1KR2J-1-GP

3

3D3V_VCCDSW

DY

12

12

R1525
100KR2F-L2 -GP

R1524
20KR2J-L2 -GP

SA 0104 STRAP

GPD7

3D3V_S5_PC H3D3V_VCCDSW

12

SA 0104 STRAPSA 0104 STRAP

R1513

DY

4K7R2J-L-GP

GPP_H23

12

R1514

DY

4K7R2J-L-GP

Jedi UMA/DIS 2IN1

Jedi UMA/DIS 2IN1

Jedi UMA/DIS 2IN1

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hs in Tai Wu Rd ., Hsichih,

21F, 88, Sec.1, Hs in Tai Wu Rd ., Hsichih,

21F, 88, Sec.1, Hs in Tai Wu Rd ., Hsichih,
Taipei Hsi en 221, Taiw an, R.O.C.

Taipei Hsi en 221, Taiw an, R.O.C.

Taipei Hsi en 221, Taiw an, R.O.C.

Title

Title

Title

CPU (STRAP)

CPU (STRAP)

CPU (STRAP)

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

A0

A0

A0

Jedi15"/17" WHL-U

Jedi15"/17" WHL-U

Jedi15"/17" WHL-U

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

1

15 106Tuesday, Janua ry 08, 2019

15 106Tuesday, Janua ry 08, 2019

15 106Tuesday, Janua ry 08, 2019

A00

A00

A00

Vinafix.com

Main Func = PCH

D D

C C

5

#543016:
220 nF nominal capacitors are recommended for Gen 3.

GFX_PCIE_RX_N076
GFX_PCIE_RX_P076
GFX_PCIE_TX_N076
GFX_PCIE_TX_P076

GFX_PCIE_RX_N176
GFX_PCIE_RX_P176
GFX_PCIE_TX_N176
GFX_PCIE_TX_P176

GFX_PCIE_RX_N276
GFX_PCIE_RX_P276
GFX_PCIE_TX_N276
GFX_PCIE_TX_P276

GFX_PCIE_RX_P376
GFX_PCIE_RX_N376
GFX_PCIE_TX_N376
GFX_PCIE_TX_P376

WLAN_PCIE_RX_N61
WLAN_PCIE_RX_P61
WLAN_PCIE_TX_C_N61
WLAN_PCIE_TX_C_P61

HDD_SATA_RX_N60

HDD_SATA_RX_P60

HDD_SATA_TX_N60

HDD_SATA_TX_P60

SSD_PCIE_RX_N163
SSD_PCIE_RX_P163
SSD_PCIE_TX_N163
SSD_PCIE_TX_P163

SSD_PCIE_RX_N263
SSD_PCIE_RX_P263
SSD_PCIE_TX_N263
SSD_PCIE_TX_P263

SSD_PCIE_RX_N363
SSD_PCIE_RX_P363
SSD_PCIE_TX_N363
SSD_PCIE_TX_P363

SSD_SATA_RX_N63
SSD_SATA_RX_P63
SSD_SATA_TX_N63
SSD_SATA_TX_P63

USB1_USB30_RX_N66
USB1_USB30_RX_P66
USB1_USB30_TX_N66

USB1_USB30_TX_P66

USB2_USB30_RX_N66
USB2_USB30_RX_P66
USB2_USB30_TX_N66

USB2_USB30_TX_P66

FP1_USB20_N66

FP1_USB20_P66

USB4_USB30_RX_N71
USB4_USB30_RX_P71
USB4_USB30_TX_N71

USB4_USB30_TX_P71

USB1_USB20_N66
USB1_USB20_P66

USB2_USB20_N66
USB2_USB20_P66

USB4_USB20_N72

USB4_USB20_P72
CCD_USB20_N55

CCD_USB20_P55

BT_USB20_N61
BT_USB20_P61

USB_OC1#66

HDD_DEVSLP60

SSD_DEVSLP63

M2_SSD_PEDET63

SATA_LED#64
USB_OC3#72

100 nF nominal capacitors are recommended for Gen 2.

4

3

2

1

(#545659) The xHCI controller supports USB Debug port on a ll USB3.0 capable ports.

8 OF 20CPU1H

USB2N_1
USB2P_1

USB2N_2
USB2P_2

USB2N_3
USB2P_3

USB2N_4
USB2P_4

USB2N_5
USB2P_5

USB2N_6
USB2P_6

USB2N_7
USB2P_7

USB2N_8
USB2P_8

USB2N_9
USB2P_9

USB2N_10
USB2P_1 0

USB2_CO MP

USB_ID

RSVD#A R3

USB1_USB30_RX_N

CB5

USB1_USB30_RX_P

CB6

USB1_USB30_TX_N

CA4

USB1_USB30_TX_P

CA3

USB2_USB30_RX_N

BY8

USB2_USB30_RX_P

BY9

USB2_USB30_TX_N

CA2

USB2_USB30_TX_P

CA1
BY7

BY6
BY4
BY3

USB4_USB30_RX_N

BW6

USB4_USB30_RX_P

BW5

USB4_USB30_TX_N

BW2

USB4_USB30_TX_P

BW1

USB1_USB20_N

CE3

USB1_USB20_P

CE4

USB2_USB20_N

CE1

USB2_USB20_P

CE2
CG3

CG4

USB4_USB20_N

CD3

USB4_USB20_P

CD4

FP1_USB20_N

CG5

FP1_USB20_P

CG6

CCD_USB20_N

CC1

CCD_USB20_P

CC2
CG8

CG9
CB8

CB9
CH5

CH6

BT_USB20_N

CC3

BT_USB20_P

CC4
CC5

USBCOMP
USB2_ID

CE8

USB2_VBUSSENSE

CC6

USB_OC0#

CK6

USB_OC1#

CK5

USB_OC2#

CK8

USB_OC3#

CK9

HDD_DEVSLP

CP8

SIO_EXT_SCI#

CR8

SSD_DEVSLP

CM8

OPT_HDD_PEDET

CN8

GPP_E1/SATAXPCIE1/SATAGP1

CM10

M2_SSD_PEDET

CP10

SATA_LED#

CN7
AR3

IO board USB3.0

IO board USB3.0

TYPE-C MUX

IO board USB3.0

IO board USB3.0

TYPE-C

Finger Print

CAMERA

0627

Touch Panel

WLAN (BT)

1 2

R1603 113R2F-GP

DC resistance < 0.5ohm.

(#543016) When used as DEVSLP , no external pull-up or pull -down
termination required from SAT A Host DEVSLP.

1

TP1603 T PAD14-OP-GP

1

TP1602 T PAD14-OP-GP

PCIE: 1 SATA: 0

R1602

100KR2F-L1-GP

OPT_HDD_PEDET

SB 0329

3D3V_S0

3D3V_S0

SIO_EXT_SCI#

USB_OC3#
USB_OC0#
USB_OC1#
USB_OC2#

USB2_VBUSSENSE
USB2_ID

12

DY

12

R1607
10KR2J-3-GP

DY

(#543611)
The SATALED# signal is open-c ollector and requires a weak external pull-up (8.2 kΩ to 10 kΩ) to Vcc3_3.

R1608 10KR2J-3-GP

SA 0104

RN1601

8
7

SRN10KJ-6-GP

1
2 3

SATA_LED#

RN1602

DY

SRN0J-6-GP

SA 0105

R1606

10KR2J-3-GP

12

3D3V_S5_PCH

1
2
3456

4

12

3D3V_S0

SSD

GFX_PCIE_TX_P0 GFX_PCIE_TX_C_P0

GFX_PCIE_TX_N1 GFX_PCIE_TX_C_N1
GFX_PCIE_TX_P1

GFX_PCIE_TX_N2

GPU

GFX_PCIE_TX_P2

GFX_PCIE_TX_N3
GFX_PCIE_TX_P3

WLAN_PCIE_RX_N
WLAN_PCIE_RX_P

WLAN

HDD_SATA_RX_N
HDD_SATA_RX_P
HDD_SATA_TX_N

HDD1

HDD_SATA_TX_P

1 2

R1604

C1606
C1605

C1608
C1607

C1610
C1609

C1612
C1611

100R2F-L1-GP-U

1 2
1 2

OPS

1 2
1 2

1 2
1 2

1 2
1 2

OPS

OPS
OPS

OPS
OPS

OPS
OPS

SCD22U10V2KX-2-GP
SCD22U10V2KX-2-GP

SCD22U10V2KX-2-GP
SCD22U10V2KX-2-GP

SCD22U10V2KX-2-GP
SCD22U10V2KX-2-GP

SCD22U10V2KX-2-GP
SCD22U10V2KX-2-GP

SSD_PCIE_RX_N1
SSD_PCIE_RX_P1
SSD_PCIE_TX_N1
SSD_PCIE_TX_P1

SSD_PCIE_RX_N2
SSD_PCIE_RX_P2
SSD_PCIE_TX_N2
SSD_PCIE_TX_P2

SSD_PCIE_RX_N3
SSD_PCIE_RX_P3
SSD_PCIE_TX_N3
SSD_PCIE_TX_P3

SSD_SATA_RX_N
SSD_SATA_RX_P
SSD_SATA_TX_N
SSD_SATA_TX_P

GFX_PCIE_RX_N0
GFX_PCIE_RX_P0

GFX_PCIE_TX_C_N0GFX_PCIE_TX_N0

GFX_PCIE_RX_N1
GFX_PCIE_RX_P1

GFX_PCIE_TX_C_P1

GFX_PCIE_RX_N2

GFX_PCIE_RX_P2
GFX_PCIE_TX_C_N2
GFX_PCIE_TX_C_P2

GFX_PCIE_RX_N3

GFX_PCIE_RX_P3
GFX_PCIE_TX_C_N3
GFX_PCIE_TX_C_P3

WLAN_PCIE_TX_C_N
WLAN_PCIE_TX_C_P

PCIE_RCOMPN
PCIE_RCOMPP

BW9

PCIE5_ RXN/USB31 _5_RXN

BW8

PCIE5_ RXP/USB3 1_5_RX P

BW4

PCIE5_ TXN/USB31 _5_TXN

BW3

PCIE5_ TXP/USB3 1_5_TX P

BU6

PCIE6_ RXN/USB31 _6_RXN

BU5

PCIE6_ RXP/USB3 1_6_RX P

BU4

PCIE6_ TXN/USB31 _6_TXN

BU3

PCIE6_ TXP/USB3 1_6_TX P

BT7

PCIE7_ RXN

BT6

PCIE7_ RXP

BU2

PCIE7_ TXN

BU1

PCIE7_ TXP

BU9

PCIE8_ RXN

BU8

PCIE8_ RXP

BT4

PCIE8_ TXN

BT3

PCIE8_ TXP

BP5

PCIE9_ RXN

BP6

PCIE9_ RXP

BR2

PCIE9_ TXN

BR1

PCIE9_ TXP

BN6

PCIE10 _RXN

BN5

PCIE10 _RXP

BR4

PCIE10 _TXN

BR3

PCIE10 _TXP

BN10

PCIE11 _RXN/SAT A0_RXN

BN8

PCIE11 _RXP/SA TA0_RX P

BN4

PCIE11 _TXN/SAT A0_TXN

BN3

PCIE11 _TXP/SA TA0_TX P

BL6

PCIE12 _RXN/SAT A1A_RX N

BL5

PCIE12 _RXP/SA TA1A_R XP

BN2

PCIE12 _TXN/SAT A1A_TX N

BN1

PCIE12 _TXP/SA TA1A_T XP

BK6

PCIE13 _RXN

BK5

PCIE13 _RXP

BM4

PCIE13 _TXN

BM3

PCIE13 _TXP

BJ6

PCIE14 _RXN

BJ5

PCIE14 _RXP

BL2

PCIE14 _TXN

BL1

PCIE14 _TXP

BG5

PCIE15 _RXN/SAT A1B_RX N

BG6

PCIE15 _RXP/SA TA1B_R XP

BL4

PCIE15 _TXN/SAT A1B_TX N

BL3

PCIE15 _TXP/SA TA1B_T XP

BE5

PCIE16 _RXN/SAT A2_RXN

BE6

PCIE16 _RXP/SA TA2_RX P

BJ4

PCIE16 _TXN/SAT A2_TXN

BJ3

PCIE16 _TXP/SA TA2_TX P

CE6

PCIE_R COMP_N

CE5

PCIE_R COMP_P

CR28

GPP_H12 /M2_SKT2 _CFG0

CP28

GPP_H13 /M2_SKT2 _CFG1

CN28

GPP_H14 /M2_SKT2 _CFG2

CM28

GPP_H15 /M2_SKT2 _CFG3

WHISKEY-LAKE-GP

(#543016) Unused SATAGP[2:0]/ GPP_E[2:0] pins must be termi nated to either 3.3 V rail or GND
using 8.2 KΩ to 10 KΩ on the motherboard.
Do not use both pull-up and p ull-down. Either pull-up or p ull-down is acceptable.

PCIE1_ RXN/USB31 _1_RXN
PCIE1_ RXP/USB3 1_1_RX P
PCIE1_ TXN/USB31 _1_TXN
PCIE1_ TXP/USB3 1_1_TX P

PCIE2_ RXN/USB31 _2_RXN/S SIC_1_ RXN
PCIE2_ RXP/USB3 1_2_RX P/SSIC_ 1_RXP

PCIE2_ TXN/USB31 _2_TXN/S SIC_1_ TXN
PCIE2_ TXP/USB3 1_2_TX P/SSIC_ 1_TXP

PCIE3_ RXN/USB31 _3_RXN
PCIE3_ RXP/USB3 1_3_RX P
PCIE3_ TXN/USB31 _3_TXN
PCIE3_ TXP/USB3 1_3_TX P

PCIE4_ RXN/USB31 _4_RXN
PCIE4_ RXP/USB3 1_4_RX P
PCIE4_ TXN/USB31 _4_TXN
PCIE4_ TXP/USB3 1_4_TX P

USB_VBUS SENSE

GPP_E9 /USB2_OC 0#/GP_B SSB_CL K

GPP_E1 0/USB2_O C1#/GP_ BSSB_D I

GPP_E1 1/USB2_O C2#
GPP_E1 2/USB2_O C3#

GPP_E4 /DEVSLP 0
GPP_E5 /DEVSLP 1
GPP_E6 /DEVSLP 2

GPP_E0 /SATAXP CIE0/SA TAGP0
GPP_E1 /SATAXP CIE1/SA TAGP1
GPP_E2 /SATAXP CIE2/SA TAGP2

GPP_E8 /SATALE D#/SPI1 _CS1#

B B

A A

Jedi UMA/DIS 2IN1

Jedi UMA/DIS 2IN1

Jedi UMA/DIS 2IN1

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

A1

A1

A1

Date: Sheet

Date: Sheet

5

4

3

2

Date: Sheet

1

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

CPU (PCIE/SATA/USB)

CPU (PCIE/SATA/USB)

CPU (PCIE/SATA/USB)

Jedi15"/17" WHL-U

Jedi15"/17" WHL-U

Jedi15"/17" WHL-U

A00

A00

A00

of

of

of

16 106Tuesday, January 08, 2019

16 106Tuesday, January 08, 2019

16 106Tuesday, January 08, 2019

Vinafix.com

Main Func = PCH

SYS_PWROK24
RESET_OUT#24,26

VCCST_PWRGD24,40,46
PCH_RSMRST#24
3V_5V_PWRGD25,45
PM_SLP_S0#24,40,91

PM_SLP_S3#27,40,51

PM_SLP_S4#40,51,66

SIO_PWRBTN#24
AC_IN#43,44

D D

C C

B B

PLTRST#_CPU26,61,63,66,76,91
H_CPUPWRGD3

INPUT3VSEL15

PM_RSMRST#90

5

4

3D3V_VCCDSW

RTC_AUX_S5

3D3V_VCCPRIM

3D3V_S5

330KR2J-L1-GP

1 2

SA 0109

1 2

100KR2F-L2-GP

12

R1721
10KR2J-3-GP

1
2 3

SRN10KJ-L-GP

R1730

R1731

EXT_PWR_GATE#

GPD11/LANPHYPC

RN1704

4

#544669 (CRB): 330k.

SM_INTRUDER#

SA 1228 intel

GPD11 pull high by Intel PDG1 .3 request

SC 1101

RN1703

1
2 3

SRN100KJ-6-GP

R1717 10KR2J-3-GP

AOZ Power switch, P/N: 074.01334.0093
Low Rds(on)= 5m Ohm
Turn on rise time = 10us

3D3V_AUX_S5

R1726
10KR2J-3-GP

1 2

4

12

SB 0410

R1727

100KR2J-1-GP

1 2

4 3

3V_5V_POK#

6

075.00138.0A7C

2nd = 075.00138.0F7C

SA 0130

Q1701

S2

G2

D1

PJT138KA-GP

PM_RSMRST#
PM_PCH_PWROK

SYS_PWROK

SA 1228 intel

AC_PRESENT
PCIE_WAKE#_CPU

D2

25

G1

1

S1

#544669 Rev0.52 CRB:
No PL resistor on THERMTRIP#.

H_CPUPWRGD

12

DY

R1714

10KR2J-3-GP

1D8V_VCCPRIM

R1738 10KR2J-3-GP

1KR2J-1-GP
R1702

PM_RSMRST#

1 2

3D3V_VCCDSW

RO13_20171027 PCH_BATLOW#
Software set GPD0 avoid 󱮵󱽰BATLOW# PU󲙌󲹘󵙄

12

SA 0105

R1722
10KR2J-3-GP

PCH_BATLOW#

12

R1723
10KR2J-3-GP

DY

RO13_20171001
move ED1702 TVS to dual TVS ED401

1 2

DY

remove R1724 R1735 C1704 EC1710 and
+VCCMPHYGTAON_1P0_LS_SIP change to 1D0V_S5.

SB 0327

ME_SUS_PWR_ACK_R SUSACK#_R

ME_SUS_PWR_ACK_R

RO13_20171030

PCH_RSMRST#
3V_5V_PWRGD

Layout Placement Request

3

SA 1227

XDP_DBRESET#

1

TP1706TPAD14-OP-GP

RESET_OUT#

1 2

R1706 0R0402-PAD

1 2

R1704 0R0402-PAD

3D3V_VCCDSW

(PDG#543016)
WAKE#: Ensure that WAKE# sign al Trise (Maximum) is <100 ns .

R1708

1 2

DY

0R2J-2-GP

EMC 0627

2ND = 075.52215.007D

EMC 0627

3D3V_VCCPRIM

12

R1701
10KR2J-3-GP

ED1702

AZ5125-02S-R7G-GP

2

75.05125.07D

R1707

1 2

10KR2J-3-GP

VCCST_PWRGD

VCCST_PWRGD_R

1

3

1

TP1707TPAD14-OP-GP

SB 0323

1

TP1705TPAD14-OP-GP

2

1

DY

AZ5125-02S-R7G-GP

75.05125.07D

2ND = 075.52215.007D

3

RO13_20171001

ED1701

AZ5125-02S-R7G-GP

2

3

75.05125.07D

2ND = 075.52215.007D

PCH_PLTRST#
PM_RSMRST#
H_CPUPWRGD

VCCST_PWRGD_R
SYS_PWROK

PM_PCH_PWROK
PCH_DPWROKPM_RSMRST#

ME_SUS_PWR_ACK_R
SUSACK#_R

PCIE_WAKE#_CPU
LAN_WAKE#
GPD11/LANPHYPC

1 2

R1716
100KR2F-L1-GP

ED1704

1

2

2

BJ35

GPP_B1 3/PLTRS T#

CN10

SYS_RES ET#

BR36

RSMRST#

AR2

PROCPW RGD

BJ2

VCCST_ PWRGO OD

CR10

SYS_PW ROK

BP31

PCH_PW ROK

BP30

DSW_P WROK

BV34

GPP_A1 3/SUSWA RN#/SUSPW RDACK

BY32

GPP_A1 5/SUSACK #

BU30

WAKE#

BU32

GPD2/LA N_WAKE #

BU34

GPD11/L ANPHYPC

WHISKEY-LAKE-GP

Dis-wire with XDP_PM_RSMRST_PWRGD_XDP

3D3V_S0

R1718
100KR2F-L1-GP

DY

1 2

VCCST_PWRGD_R

12

R1719
47KR2F-GP

XDP_DBRESET#

SYS_PWROK

PCH_RSMRST#

PLTRST#_CPU

RESET_OUT#

3V_5V_PWRGD

1

ED1703

DY

AZ5125-02S-R7G-GP

75.05125.07D

2ND = 075.52215.007D

3

11 OF 20CPU1K

PM_SLP_S0#

BJ37

GPP_B1 2/SLP_S 0#

GPD10/S LP_S5#

GPD9/SP L_WLA N#

GPD3/PW RBTN#

GPD1/AC PRESENT

GPD0/BA TLOW#

GPP_B1 1/EXT_P WR_GA TE#

GPP_B2 /VRALER T#

GPD4/SL P_S3#
GPD5/SL P_S4#

SLP_SUS #
SLP_LA N#

GPD6/SL P_A#

INTRUDER #

INPUT3VS EL

BU36
BU27
BT29

BU29
BT31
BT30
BU37

BU28
BU35
BV36

BR35
CC37

CC36
BT27

PM_SLP_S3#
PM_SLP_S4#
PM_SLP_S5#

AUX_EN_WOWL
PM_SLP_A#

SIO_PWRBTN#
AC_PRESENT
PCH_BATLOW#

SM_INTRUDER#
EXT_PWR_GATE#

VRALERT#
INPUT3VSEL

R1722 & EC1708 modify to 100k and 0.01uF at DVT1

C1711

12

SCD1U16V2KX-3DLGP

DY

3D3V_AUX_S5

R1737

1 2

100KR2J-1-GP

1

SB 0323SB 0323

1

TP1709 TPAD14-OP-GP

1

TP1710 TPAD14-OP-GP

1

TP1711 TPAD14-OP-GP

1

TP1712 TPAD14-OP-GP

1

TP1715 TPAD14-OP-GP

1

TP1713 TPAD14-OP-GP

1

TP1714 TPAD14-OP-GP

BATLOW#:

1

TP1708 TPAD14-OP-GP

PLTRST#_CPU

100KR2J-1-GP

#543016 Rev0.7

1. VCCST_PWRGD is only 1.0 V tolerant.

2. VCCST_PWRGD must go low du ring Sx pwr states, regardles s of the voltage level of VCCS T

RO13_20171011

Q1702

PM_RSMRST#_M

6

Note:ZZ.27002.F7C01

common part

2N7002KDW-1-GP

75.27002.F7C

2nd = 075.27002.0E7C

2345
1

Pull-up required even if not implemented.

AC_PRESENT

12

EC1707

DY

SCD1U16V2KX-3DLGP

R1713

PCH_PLTRST#

1 2

0R0402-PAD

12

12

C1701

R1715

SC220P50V2KX-3DLGP

DY

DY

SA 0116

D1701

RB520S30-GP

83.R2003.A8M

2ND = 083.52030.008F

KA

RO13_20170921
remove R1720 short pad

AC_IN#

AC_PRESENT
PM_RSMRST#

Reserve by NON DS3 function 20150413

A A

Jedi UMA/DIS 2IN1

Jedi UMA/DIS 2IN1

Jedi UMA/DIS 2IN1

Title

Title

Title

CPU (PMU)

CPU (PMU)

CPU (PMU)

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

A1

A1

A1

Date: Sheet

Date: Sheet

5

4

3

2

Date: Sheet

1

Jedi15"/17" WHL-U

Jedi15"/17" WHL-U

Jedi15"/17" WHL-U

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

of

of

of

17 106Tuesday, January 08, 2019

17 106Tuesday, January 08, 2019

17 106Tuesday, January 08, 2019

A00

A00

A00

Vinafix.com

ESPI_IO3
ESPI_IO1
ESPI_IO2
ESPI_IO0

5

3D3V_S0

1D8V_VCCPRIM

3D3V_S0

RN1813

WLAN_CLKREQ_CPU_N

1

8

CLK_PCIE_PEG_REQ#

2

7

SSD_CLKREQ_CPU_N

3

6

OPT_CLKREQ_CPU_N

4 5

SRN10KJ-6-GP

Main Func = PCH

CPU_SMB_ALERT#_P115
WLAN_CLK_CPU_N61

WLAN_CLK_CPU_P61

WLAN_CLKREQ_CPU_N61

SSD_CLK_CPU_N63
SSD_CLK_CPU_P63

SSD_CLKREQ_CPU_N63

SPI_CLK_ROM25,91
SPI_SO_ROM25,91
SPI_SI_ROM15,25,91

SPI_WP_ROM15,25
SPI_HOLD_ROM15,25
SPI_CS_ROM_N025

D D

C C

SPI_CS_ROM_N291

ESPI_IO[3..0]24,68

CPU_SMB_SCL_P124,26,79
CPU_SMB_SDA_P124,26,79
ESPI_CS#24,68
ESPI_RESET#24,68

SUS_CLK_R61

RTCRST_ON24,25
ESPI_CLK24,68

FFS_INT170
TPM_SPI_IRQ#91

CLKIN_XTAL_LCP_R61
PCH_SMBCLK12,13
PCH_SMBDATA12,13

CPU_SMB_ALERT#15

CPU_SMB_ALERT#_P015

PROJECT_ID021

JIO3_PCIE_WAKE#61

For eSPI

GFX_CLK_CPU_N76
GFX_CLK_CPU_P76

CLK_PCIE_PEG_REQ#76

CPU_SMB_ALERT#_P0

B B

PCH strap pin:

Sampled at rising edge of RSMRST#

eSPI or LPC

This signal has a weak internal pull-down.

SML0ALERT# /

0 = LPC Is selected for EC.

GPP_C5

1 = eSPI Is selected for EC.

This signal has a weak internal pull-down.

SA 1227

R1820

1 2

10KR2J-3-GP

R1821

1 2

10KR2J-3-GP

SERIRQ PH:
PDG: 8.2k
CRB: 10k

SC 0522

4

3

2

1

For eSPI

RN1807

1
2
3456

SRN2K2J-4-GP

12

1234

RN1811

SB 0329

X1801
XTAL-24MHZ-182-GP

082.30006.0531

2ND = 082.30006.0571

4 1

R1837150KR2J-GP

3D3V_S5_PCH

SB 0323

C1807

12

SC15P50V2JN-DL-GP

C1808

12

SC15P50V2JN-DL-GP

33R2F-3-GP

DY

1
2345

C1806

SC1U25V3KX-1-DLGP

12

3D3V_S0

ESPI_CLKESPI_CPU_CLK_R

EC1801
SC10P50V2JN-4DLGP

SA 1229 intel

XTL_24M_X1_CPU

XTL_24M_X2_CPU

21

12

G1801

GAP-OPEN

ESPI_CPU_IO0_R
ESPI_CPU_IO1_R
ESPI_CPU_IO2_R
ESPI_CPU_IO3_R

SRN10KJ-L-GP

PCH_SMBCLK

SC15P50V2JN-DL-GP

RTC_AUX_S5

1

23

4

12

C1805

SC1U25V3KX-1-DLGP

2017/03/17

RN1810

C1804

RN1801
SRN20KJ-1-GP

3D3V_S0

1234

R1815 10MR2J-L-GP

XTAL-32D768KHZ-98-GP

12

082.30003.0301

2ND = 082.30003.0191

R1839

1 2

33R2F-3-GP

R1840

1 2

33R2F-3-GP

2

DY

1 2

X1802

1 2

common part

R1841

1MR2J-1-GP

SUS_CLK_R

RO13_20171026

SRTC_RST#
RTC_RST#

1

ED1801

AZ5125-02S-R7G-GP

75.05125.07D

2nd = 075.52215.007D

3

RO13_20171001 EMI request

CPU_SMB_SCL_P0
CPU_SMB_SCL_P1
CPU_SMB_SDA_P1
CPU_SMB_SDA_P0

CPU_SMB_ALERT#_P1

CPU_SMB_SCL
CPU_SMB_SDA

XTL_24M_X1_R

12

XTL_24M_X2_R

DY

1 2

XTL_32K_X1_CPU
XTL_32K_X2_CPU

12

C1803
SC15P50V2JN-DL-GP

FC1801

SC4D7P50V2BN-2-GP

DY

1 2

FC1801 close to EC1803

8
7

SRN2K2J-5-GP

23

EC1803

SC4D7P50V2BN-2-GP

ESPI_IO0

1 2

R1827 15R2F-2-GP

ESPI_IO1

1 2

R1828 15R2F-2-GP

ESPI_IO2

1 2

R1829 15R2F-2-GP

ESPI_IO3

1 2

R1830 15R2F-2-GP

1 2

R1805

RO13_CFLU_20171206

SB 0323

SPI_WP_CPU

1

SIO_RCIN#

DY

ESPI_ALERT#

SPI_CLK_ROM SPI_CLK_CPU
SPI_SO_ROM
SPI_SI_ROM
SPI_WP_ROM
SPI_HOLD_ROM

GPU

WLAN

SC 0522

SSD

TP1805TPAD14-OP-GP

1 2

R1814 0R0402-PAD

1 2

R1819 0R0402-PAD

1 2

R1823 0R0402-PAD

1 2

R1824 0R0402-PAD

1 2

R1826 0R0402-PAD

RCIN#:
Frequency to Avoid: 33 MHz

GFX_CLK_CPU_N
GFX_CLK_CPU_P

CLK_PCIE_PEG_REQ#
WLAN_CLK_CPU_N

WLAN_CLK_CPU_P
WLAN_CLKREQ_CPU_N

OPT_CLKREQ_CPU_N

SSD_CLK_CPU_N
SSD_CLK_CPU_P
SSD_CLKREQ_CPU_N

RO13_20171106

TP1804TPAD14-OP-GP
TP1806TPAD14-OP-GP

AW2

CLKOUT_ PCIE_N0

AY3

CLKOUT_ PCIE_P 0

CF32

GPP_B5 /SRCCLK REQ0#

BC1

CLKOUT_ PCIE_N1

BC2

CLKOUT_ PCIE_P 1

CE32

GPP_B6 /SRCCLK REQ1#

BD3

CLKOUT_ PCIE_N2

BC3

CLKOUT_ PCIE_P 2

CF30

GPP_B7 /SRCCLK REQ2#

BH3

CLKOUT_ PCIE_N3

BH4

CLKOUT_ PCIE_P 3

CE31

GPP_B8 /SRCCLK REQ3#

BA1

CLKOUT_ PCIE_N4

BA2

CLKOUT_ PCIE_P 4

CE30

GPP_B9 /SRCCLK REQ4#

BE1

CLKOUT_ PCIE_N5

BE2

CLKOUT_ PCIE_P 5

CF31

GPP_B1 0/SRCCL KREQ5#

WHISKEY-LAKE-GP

SPI_SO_CPU
SPI_SI_CPU
SPI_WP_CPU
SPI_HOLD_CPU
SPI_CS_ROM_N0

SPI_CS_ROM_N2

TPM_SPI_IRQ#
FFS_INT1

CPU_D4_TP

1

CPU_D6_TP

1

PROJECT_ID0

SIO_RCIN#
ESPI_ALERT#

10 OF 20CPU1J

CLKOUT_ ITPXDP _N
CLKOUT_ ITPXDP _P

GPD8/SUS CLK

XTAL_I N

XTAL_O UT

XCLK_B IASREF

CLKIN_X TAL

SRTCRS T#

RTCRST #

CH37

SPI0_C LK

CF37

SPI0_MI SO

CF36

SPI0_MO SI

Strap

CF34

SPI0_I O2

CG34

SPI0_I O3

CG36

SPI0_C S0#

CG35

SPI0_C S1#

CH34

SPI0_C S2#

CF20

GPP_D1 /SPI1_C LK/BK1/S BK1

CG22

GPP_D2 /SPI1_MI SO_IO1 /BK2/SBK 2

CF22

GPP_D3 /SPI1_MO SI_IO0 /BK3/SBK 3

CG23

GPP_D2 1/SPI1_ IO2

CH23

GPP_D2 2/SPI1_ IO3

CG20

GPP_D0 /SPI1_C S0#/BK0 /SBK0

CH7

CL_CLK

CH8

CL_DAT A

CH9

CL_RST #

BV29

GPP_A0 /RCIN#/TI ME_SYNC1

BV28

GPP_A6 /SERIRQ

WHISKEY-LAKE-GP

XDP_CLK_CPU_N

AU1
AU2

BT32
CK3

CK2
CJ1

CM3
BN31

RTCX1

BN32

RTCX2

BR37
BR34

1

XDP_CLK_CPU_P
SUS_CLK
XTL_24M_X1_CPU

XTL_24M_X2_CPU
XCLK_BIASREF

CLKIN_XTAL_LCP CLKIN_XTAL_LCP_R
XTL_32K_X1_CPU

XTL_32K_X2_CPU
SRTC_RST#

RTC_RST#

TP1808 T PAD14-OP-GP

1

TP1807 T PAD14-OP-GP

1 2

GPP_C0 /SMBCLK

GPP_C1 /SMBDATA

GPP_C2 /SMBALER T#

GPP_C3 /SML0CLK

GPP_C4 /SML0DAT A

Strap

GPP_C5 /SML0ALE RT#

GPP_C6 /SML1CLK

GPP_C7 /SML1DAT A

GPP_B2 3/SML1AL ERT#/PC HHOT#

GPP_A1 /LAD0/ES PI_IO0
GPP_A2 /LAD1/ES PI_IO1
GPP_A3 /LAD2/ES PI_IO2
GPP_A4 /LAD3/ES PI_IO3

GPP_A5 /LFRAME# /ESPI_C S#

GPP_A1 4/SUS_ST AT#/ESP I_RESE T#

GPP_A9 /CLKOUT_ LPC0/ES PI_CLK

GPP_A1 0/CLKOUT _LPC1

GPP_A8 /CLKRUN#

R1844

SUS_CLK_R

0R0402-PAD

EMC 0627

1 2

R1842

0R0402-PAD

SA 1229 intel

5 OF 20CPU1E

CPU_SMB_SCL

CK14

CPU_SMB_SDA

CH15

CPU_SMB_ALERT#

CJ15

CPU_SMB_SCL_P0

CH14

CPU_SMB_SDA_P0

CF15

CPU_SMB_ALERT#_P0

CG15

CPU_SMB_SCL_P1

CN15

CPU_SMB_SDA_P1

CM15

CPU_SMB_ALERT#_P1

CC34

ESPI_CPU_IO0_R

CA29

ESPI_CPU_IO1_R

BY29

ESPI_CPU_IO2_R

BY27

ESPI_CPU_IO3_R

BV27

ESPI_CS#

CA28

ESPI_RESET#

CA27

ESPI_CPU_CLK_R

BV32
BV30
BY30

CLKRUN#

R1843

1 2

0R0402-PAD

12

R1803
60D4R2F-GP

SA 0131

3D3V_VCCDSW

12

DY

R1822
10KR2J-3-GP

JIO3_PCIE_WAKE#

3D3V_S0

common parts

Q1801

CLKRUN#

Note:ZZ.27002.F7C01

6

2N7002KDW-1-GP

75.27002.F7C

2nd = 075.27002.0E7C

R1818

8K2R2F-1-GP

1 2

DY

CPU_SMB_SDA PCH_SMBDATA

CPU_SMB_SCL

For RTC Gen 9 reset circuit n eed DY
20170814

Layout Placement Request

(#514849)

Layout: Place at the open doo r area.

A A

Jedi UMA/DIS 2IN1

Jedi UMA/DIS 2IN1

Jedi UMA/DIS 2IN1

Title

Title

Title

CPU (SPI/ESPI/SMBS/XTAL/CLK)

CPU (SPI/ESPI/SMBS/XTAL/CLK)

CPU (SPI/ESPI/SMBS/XTAL/CLK)

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

A1

A1

A1

Date: Sheet

Date: Sheet

5

4

3

2

Date: Sheet

1

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Jedi15"/17" WHL-U

Jedi15"/17" WHL-U

Jedi15"/17" WHL-U

A00

A00

A00

of

of

of

18 106Tuesday, January 08, 2019

18 106Tuesday, January 08, 2019

18 106Tuesday, January 08, 2019

Vinafix.com

5

4

3

2

1

Main Func = PCH

BT_PCMFRM_R STN61

BT_PCMOUT _CLKREQ061

DMIC_PCH_DA TA55
DMIC_PCH_CLK55

SPKR15,27

HDA_SDIN0_CP U27
HDA_SYNC_C ODEC27
HDA_BITCLK_C ODEC27

ME_FWP_SW68

HDA_SDOU T_CODEC27

D D

KB_LED_BL_DET65

HDA_SDOU T_CPU15

DGPU_PW ROK24,85

SC 1121

DGPU_PW ROK

DY

R1924
100KR2J-1-GP

1 2

EMC 0627

fTPM

TPM

3D3V_S5

12

12

R1910
10KR2J-3-GP

R1911
10KR2J-3-GP

TPM_ID

SA 1229 intel

TPAD14-OP-G P

1 2

R1923

33R2J-2-GP

1 2

R1922

33R2J-2-GP

TP1903

GPP_H1_SFRMBT_PCMFRM_R STN
GPP_H2_CLKR EQ0BT_PCMOUT _CLKREQ0

SA 1229

HDA_SYNC_C PU
HDA_BITCLK_C PU
HDA_SDOU T_CPU
HDA_SDIN0_CP U

HDA_RST_N _CPU

1

KB_LED_BL_DET

DMIC_PCH_CLK
DMIC_PCH_DA TA

TPM_ID
DGPU_PW ROK

SPKR

BN34

HDA_SYNC/I2S0_SFRM

BN37

HDA_BCLK/I2S0_SCLK

BN36

HDA_SDO/I2S0_TXD

BN35

HDA_SDI0/I2S0_RXD

BL36

HDA_SDI1/I2S1_RXD/SNDW1_DATA

BL35

HDA_RST#/I2S1_SCLK/SNDW1_CLK

CK23

GPP_D23/I2S_MCLK

BL37

I2S1_SFRM/SNDW2_CLK

BL34

I2S1_TXD/SNDW2_DATA

CJ32

GPP_H1/I2S2_SFRM/CNV_BT_I2S_BCLK/CNV_RF_RESET#

CH32

GPP_H0/I2S2_SCLK/CNV_BT_I2S_SCLK

CH29

GPP_H2/I2S2_TXD/CNV_BT_I2S_SDI/MODEM_CLKREQ

CH30

GPP_H3/I2S2_RXD/CNV_BT_I2S_SDO

CP24

GPP_D19/DMIC_CLK0/SNDW4_CLK

CN24

GPP_D20/DMIC_DATA0/SNDW4_DATA

CK25

GPP_D17/DMIC_CLK1/SNDW3_CLK

CJ25

GPP_D18/DMIC_DATA1/SNDW3_DATA

CF35

GPP_B14/SPKR

WHISKEY-LAKE- GP

GPP_A17/SD_VDD1_PWR_EN#/ISH_GP7

7 OF 20CPU1G

GPP_G0/SD_CMD
GPP_G1/SD_DATA0
GPP_G2/SD_DATA1
GPP_G3/SD_DATA2
GPP_G4/SD_DATA3

GPP_G5/SD_CD#

GPP_G6/SD_CLK

GPP_G7/SD_WP

GPP_A16/SD_1P8_SEL

SD_1P8_RCOMP
SD_3P3_RCOMP

CH36
CL35
CL36
CM35
CN35
CH35
CK36
CK34

BW36
BY31

CK33
CM34

SD_CMD
SD_SDATA0
SD_SDATA1
SD_SDATA2
SD_SDATA3
SD_CD_N
SD_CLK
SD_WP

SD_PWR _EN#

SD_RCOMP

1 2

R1901

RO13_CFLU_20171207

200R2F-L-GP

SD_SDATA033
SD_SDATA133

SD_SDATA233
SD_SDATA333

SD_CMD33
SD_WP33

SD_CD_N33

SD_CLK33

C C

SD_PWR _EN#33

EC1901

1 2

DY

SC10P50V2JN-4D LGP

RO13_20171027
delete ED1901

HDA_BITCLK_C ODEC

PCH strap pin:

The internal pull-down is disabled after
PLTRST# deasserts

HDA_SYNC_C ODEC

Flash Descriptor Security Overide/
Intel ME Debug Mode

Low = Default

HDA_SDOUT

High = Enable

1 2

R1908 0R0402-PAD

*

PCH strap pin:

HDA_SPKR

The internal pull-up

HDA_SYNC_C PU

SPKR

TOP SWAP OVERRIDE

High = TOP SWAP ENABLED

*

Low = DISABLED (WEAK INTERNAL PD)

RO13_CFLU_20171212

R1920~R1921 need to close for merge prepare

HDA_SDOU T_CODEC

SC33P50V2JN-3DLGP

12

EC1903

DY

B B

HDA_BITCLK_C ODEC HDA_BITCLK_CPU
HDA_SDOU T_CODEC

ME_FWP_SW

1 2

R1920 0R0402-PAD
R1921

1 2

SA 1229 intel

1 2

R1909 1KR2J-1-GP

33R2J-2-GP

HDA_SDOU T_CPU

A A

Jedi UMA/DIS 2IN1

Jedi UMA/DIS 2IN1

Jedi UMA/DIS 2IN1

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin T ai Wu Rd ., Hsichih,

21F, 88, Sec.1, Hsin T ai Wu Rd ., Hsichih,

21F, 88, Sec.1, Hsin T ai Wu Rd ., Hsichih,
Taipei Hsie n 221, Taiwan, R.O .C.

Taipei Hsie n 221, Taiwan, R.O .C.

Title

Title

Title

CPU (HAD/I2S/SD/DMIC)

CPU (HAD/I2S/SD/DMIC)

CPU (HAD/I2S/SD/DMIC)

Size Document Num ber Rev

Size Document Num ber Rev

Size Document Num ber Rev

A2

A2

A2

Jedi15"/17" WHL-U

Jedi15"/17" WHL-U

Jedi15"/17" WHL-U

Date: Sheet of

Date: Sheet of

5

4

3

2

Date: Sheet of

Taipei Hsie n 221, Taiwan, R.O .C.

1

A00

A00

19 106Tuesday, January 08, 2019

19 106Tuesday, January 08, 2019

19 106Tuesday, January 08, 2019

A00

Vinafix.com

5

Main Func = PCH

GC6_FB_EN79,86

CPU_I2C_SDA_P155

CPU_I2C_SCL_P155

CPU_I2C_SDA_P065,66

CPU_I2C_SCL_P065,66

DBC_PANEL_E N55

UART_2_CR XD_DTXD68
UART_2_CT XD_DRXD68

SIO_EXT_WAKE #24

D D

C C

KB_DET#65
LID_CL_SIO#24,66,69
GSEN_INT155

GSEN2_INT170

RTC_DET#15,25
CPU_I2C_SDA_ISH055,70
CPU_I2C_SCL_ISH055,70

FFS_INT270

PIRQA#91

BOARD_ID221

CNV_BRI_RSP61

CNV_RGI_DT_R15,61

CNV_BRI_DT_R61

CNV_RGI_RSP61

DGPU_HOLD _RST#76
GPU_EVENT#79

DGPU_PW R_EN86

NRB_BIT15

GPP_B22_GSPI1_MOSI15

NB_MODE#24

LID_CL_SIO_TAB#24,66,69

ISH_TABLE_MODE#24

1D8V_VCCPR IM

3D3V_S5_PCH

4

1 2

R2053 10KR2J-3-GP

DY

3D3V_S0

1 2
1 2

1 2
1 2
1 2
1 2

1 2

1D8V_S5

SB 0326

R2029 20KR2J-L2-GP

R2030 20KR2J-L2-GP

EC2002

DEBUG
DEBUG

DY

SA 0112

1 2

DY

1 2

DY

DY

DGPU_HOLD _RST#

12

SC1KP50V2KX-1D LGP

RN2009

1

4

2 3

OPS

SRN10KJ-L-G P

UART_2_CR XD_DTXD

R204851KR2J-1- GP

UART_2_CT XD_DRXD

R204951KR2J-1- GP

DBC_PANEL_E N

R204310KR2J-3- GP

FFS_INT2

R204410KR2J-3- GP

KB_DET#

R204510KR2J-3- GP

IR_CAM_DET#

R204610KR2J-3- GP

SIO_EXT_WAKE #

R204110KR2J-3- GP

DGPU_HOLD _RST#
DGPU_PW R_EN

PIRQA#

CNV_RGI_RSP

CNV_BRI_RSP

3

GC6_FB_EN GC6_FB_EN_MC P

SB 1003 Intel

1 2

R2004 0R0402-PAD

CNV_RGI_DT_R
CNV_BRI_DT_R

R2006
R2007

1 2

1 2

1 2

R2003 0R0402-PAD

TPAD

Touch panel

1D8V_S5

PIRQA#

VRAM_ID1
NRB_BIT

DBC_PANEL_E N

GPP_B22_GSPI1_MOSI

33R2J-2-GP

33R2J-2-GP

UART_2_CR XD_DTXD
UART_2_CT XD_DRXD
SIO_EXT_WAKE #
KB_DET#

CPU_I2C_SDA_P0
CPU_I2C_SCL_P0

CPU_I2C_SDA_P1
CPU_I2C_SCL_P1

MEM_CONFIG
MEM_CONFIG

MEM_CONFIG
MEM_CONFIG

MEM_CONFIG

1 2

10KR2J-3-GP

GPU_EVENT_M CP#GPU_EVENT#

CNV_BRI_RSP
CNV_RGI_DT

CNV_BRI_DT

CNV_RGI_RSP

R2054

CC27

GPP_B15/GSPI0_CS0#

CC32

GPP_A7/PIRQA#/GSPI0_CS1#

CE28

GPP_B16/GSPI0_CLK

CE27

GPP_B17/GSPI0_MISO

CE29

GPP_B18/GSPI0_MOSI

CA31

GPP_B19/GSPI1_CS0#

CA32

GPP_A11/PME#/GSPI1_CS1#/SD_VDD2_PWR_EN#

CC29

GPP_B20/GSPI1_CLK

CC30

GPP_B21/GSPI1_MISO

CA30

GPP_B22/GSPI1_MOSI

CK20

GPP_F5/CNV_BRI_RSP

CG19

GPP_F6/CNV_RGI_DT

CJ20

GPP_F4/CNV_BRI_DT

CH19

GPP_F7/CNV_RGI_RSP

CR12

GPP_C20/UART2_RXD

CP12

GPP_C21/UART2_TXD

CN12

GPP_C22/UART2_RTS#

CM12

GPP_C23/UART2_CTS#

CM11

GPP_C16/I2C0_SDA

CN11

GPP_C17/I2C0_SCL

CK12

GPP_C18/I2C1_SDA

CJ12

GPP_C19/I2C1_SCL

CF27

GPP_H4/I2C2_SDA

CF29

GPP_H5/I2C2_SCL

CH27

GPP_H6/I2C3_SDA

CH28

GPP_H7/I2C3_SCL

CJ30

GPP_H8/I2C4_SDA

CJ31

GPP_H9/I2C4_SCL

WHISKEY-LAKE- GP

MEM_CONFIG

Strap

2

6 OF 20CPU1F

GPP_D9/ISH_SPI_CS#/GSPI2_CS0#

GPP_D10/ISH_SPI_CLK/GSPI2_CLK
GPP_D11/ISH_SPI_MISO/GSPI2_MISO
GPP_D12/ISH_SPI_MOSI/GSPI2_MOSI

GPP_D5/ISH_I2C0_SDA
GPP_D6/ISH_I2C0_SCL

GPP_D7/ISH_I2C1_SDA
GPP_D8/ISH_I2C1_SCL

GPP_H10/I2C5_SDA/ISH_I2C2_SDA

GPP_H11/I2C5_SCL/ISH_I2C2_SCL

GPP_D13/ISH_UART0_RXD

GPP_D14/ISH_UART0_TXD

GPP_D15/ISH_UART0_RTS#/GSPI2_CS1#

GPP_D16/ISH_UART0_CTS#/SML0BALERT#

GPP_C12/UART1_RXD/ISH_UART1_RXD

GPP_C13/UART1_TXD/ISH_UART1_TXD
GPP_C14/UART1_RTS#/ISH_UART1_RTS#
GPP_C15/UART1_CTS#/ISH_UART1_CTS#

GPP_A12/ISH_GP6/BM_BUSY#/SX_EXIT_HOLDOFF#

GPP_A18/ISH_GP0
GPP_A19/ISH_GP1
GPP_A20/ISH_GP2
GPP_A21/ISH_GP3
GPP_A22/ISH_GP4
GPP_A23/ISH_GP5

CPU_I2C_SDA_ISH0
CPU_I2C_SCL_ISH0

(PDG#543016) Ensure that all I2C interface on-board terminations are pulled up
to the same voltage rail as the device/end point.

CN22
CR22
CM22
CP22

CK22
CH20

CH22
CJ22

CJ27
CJ29

CM24
CN23
CM23
CR24

CG12
CH12
CF12
CG14

BW35
BW34
CA37
CA36
CA35
CA34
BW37

DGPU_HOLD _RST#

IR_CAM_DET#
RTC_DET#

CPU_I2C_SDA_ISH0
CPU_I2C_SCL_ISH0

DGPU_PW R_EN
VRAM_ID2

BOARD_ID1
FFS_INT2
UART1_RTS #
UART1_CTS #

GSEN_INT1

GSEN2_INT1

ISH_TABLE_MODE#
ISH_ALS_INT#
ISH_KB_DISABLE

LID_CL_SIO#
LID_CL_SIO_TAB#

RN2007

SRN1KJ-7-G P

1
2 3

Layout Placement Request

KBLR:GPP_F10~F11: 1.8V only
CFLU:GPP_H10~H11: ?V

1

TP2001

TPAD14-OP-G P

1

TP2002

TPAD14-OP-G P

1

TP2003

3D3V_S0

4

SA 1228 intel

1

TPAD14-OP-G P

VRAM_ID[2:1] 11: UMA

2016/11/07 modify

12

R2038
10KR2J-3-GP

UMA

B B

CNV_BRI_DT

XTAL FREQUENCY SELECTION
1 = 24MHZ
0 = 38.4/19.2MHZ
PCH HAS INTERNAL 20K PD

A A

5

CNV_RGI_DT

MODEM AND NFC REFERENCE CLOCK SOURCE SELECT
1 = CLKIN_XTAL_LCP
0 = XTAL_IN
PCH HAS INTERNAL 20K PU

4

12

R2037
10KR2J-3-GP

OPS

3D3V_S0 3D3V_ S0

BOARD_ID2

RO13_CFLU_20171226
BOARD_DI[2:1]=10 for WHLU

01: DIS+4G VRAM
00: DIS+2G VRAM

3D3V_S03D3V_S0

12

R2035
10KR2J-3-GP

UMA

12

R2034
10KR2J-3-GP

VRAM_ID_2G

12

R2010
10KR2J-3-GP

DY

12

R2009
10KR2J-3-GP

WHL-U

12

R2005
10KR2J-3-GP

2IN1

12

R2008
10KR2J-3-GP

DY

VRAM_ID1VRAM_ID2

BOARD_ID1

PCH strap pin:

No Reboot

GSPI0_MOSI /
GPP_B18

The signal has a weak internal pull-down.

3

ISH_KB_DISABLE

G

D

2IN1

S

Q2001
PJA138KA-GP

084.00138.0A31

2nd = 084.00138.0C31

NB_MODE#

NRB_BIT

Sampled at rising edge of PCH_PWROK

0 = Disable “No Reboot” mode.
1 = Enable “No Reboot” mode (PCH will disable the TCO
Timer system reboot feature). This function is useful
when running ITP/XDP.

NB_MODE#

2IN1

3D3V_S5

1 2

R2050
10KR2J-3-GP

2

<Core Desig n>

<Core Desig n>

<Core Desig n>

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin T ai Wu Rd ., Hsichih,

21F, 88, Sec.1, Hsin T ai Wu Rd ., Hsichih,

21F, 88, Sec.1, Hsin T ai Wu Rd ., Hsichih,
Taipei Hsie n 221, Taiwan, R.O .C.

Taipei Hsie n 221, Taiwan, R.O .C.

Title

Title

Title

Size Document Num ber Rev

Size Document Num ber Rev

Size Document Num ber Rev

A2

A2

A2

Jedi15"/17" WHL-U

Jedi15"/17" WHL-U

Jedi15"/17" WHL-U

Date: Sheet of

Date: Sheet of

Date: Sheet of

Taipei Hsie n 221, Taiwan, R.O .C.

CPU_(LPSS/ISH)

CPU_(LPSS/ISH)

CPU_(LPSS/ISH)

1

20 106Tuesday, January 08, 2019

20 106Tuesday, January 08, 2019

20 106Tuesday, January 08, 2019

A00

A00

A00

Vinafix.com

Main Func = PCH

5

4

3

2

1

D D

C C

B B

GPPC_H18_BOO TMPC40
WIFI_RF_EN61

SPK_ID29

BLUETOOTH _EN61

TOUCH_D ETECT55

BOARD_ID220

GPP_H2315

GPD715

CNV_WT _CLK_DP61
CNV_WT _CLK_DN61

CNV_WT _DP061
CNV_WT _DN061

CNV_WT _DP161
CNV_WT _DN161

CNV_WR _CLK_DP61
CNV_WR _CLK_DN61

CNV_WR _DP061

CNV_WR _DN061

CNV_WR _DP161

CNV_WR _DN161

PROJECT_ID018
GPP_H2115

R2101150R2F-1-GP

TOUCH_D ETECT TOUCH_D ETECT_R

DY

1 2

R2102

0R2J-L-GP

CNV_WR _DN0

CR30

CNV_WR _DP0
CNV_WR _DN1

CNV_WR _DP1
CNV_WT _DN0

CNV_WT _DP0
CNV_WT _DN1

CNV_WT _DP1
CNV_WR _CLK_DN

CNV_WR _CLK_DP
CNV_WT _CLK_DN

CNV_WT _CLK_DP
CNV_WT _RCOMP

12

PROJECT_ID1
PROJECT_ID2

SPK_ID
BLUETOOTH _EN

BOARD_ID2

CNV_WR_D0N

CP30

CNV_WR_D0P

CM30

CNV_WR_D1N

CN30

CNV_WR_D1P

CN32

CNV_WT_D0N

CM32

CNV_WT_D0P

CP33

CNV_WT_D1N

CN33

CNV_WT_D1P

CN31

CNV_WR_CLKN

CP31

CNV_WR_CLKP

CP34

CNV_WT_CLKN

CN34

CNV_WT_CLKP

CP32

CNV_WT_RCOMP#CP32

CR32

CNV_WT_RCOMP#CR32

CP20

GPP_F0/CNV_PA_BLANKING

CK19

GPP_F1

CG17

GPP_F2

CR14

GPP_C8/UART0_RXD

CP14

GPP_C9/UART0_TXD

CN14

GPP_C10/UART0_RTS#

CM14

GPP_C11/UART0_CTS#

CJ17

GPP_F8/CNV_MFUART2_RXD

CH17

GPP_F9/CNV_MFUART2_TXD

CF17

GPP_F23/A4WP_PRESENT

WHISKEY-LAKE- GP

3D3V_S0

GPP_D4/IMGCLKOUT0/BK4/SBK4

1 2

R210910KR2J-3-GP

DY

GPP_H18/CPU_C10_GATE#

9 OF 20CPU1I

GPP_H19/TIMESYNC0

GPP_H21
GPP_H22
GPP_H23

GPP_F10

GPD7

GPP_F3

GPP_H20/IMGCLKOUT1

GPP_F12/EMMC_DATA0
GPP_F13/EMMC_DATA1
GPP_F14/EMMC_DATA2
GPP_F15/EMMC_DATA3
GPP_F16/EMMC_DATA4
GPP_F17/EMMC_DATA5
GPP_F18/EMMC_DATA6
GPP_F19/EMMC_DATA7

GPP_F20/EMMC_RCLK

GPP_F21/EMMC_CLK

GPP_F11/EMMC_CMD

GPP_F22/EMMC_RESET#

EMMC_RCOMP

BLUETOOTH _EN

GPPC_H18_BOO TMPC

CN27
CM27

GPP_H21

CF25
CN26

GPP_H23

CM26
CK17

BV35

GPD7
PROJECT_ID3

CN20

WIFI_RF_EN

CG25
CH25

CR20
CM20
CN19
CM19

GPP_F: VCCPGPPF = 1.8V Only

CN18
CR18
CP18
CM18

CM16
CP16
CR16
CN16

EMMC_RCOMP

CK15

3D3V_S0

R2110

10KR2J-3-GP

SPK_ID

RO13_20171023

R2108

1 2

200R2F-L-GP

12

3D3V_S0

WIFI_RF_EN

R2107

12

DY

10KR2J-3-GP

Change to Dummy 20150402

PROJECT_ID[1:0] 01: 7000 Series

1D8V_VCCPR IM

12

R2111
10KR2J-3-GP

DY

12

R2112
10KR2J-3-GP

PROJECT_ID1

1D8V_VCCPR IM

12

R2113
10KR2J-3-GP

12

R2114

DY

10KR2J-3-GP

PROJECT_ID0

PROJECT_ID[3:2] 11: Inspiron

1D8V_VCCPR IM1D8V_VCCP RIM

12

12

DY

R2115
10KR2J-3-GP

R2116
10KR2J-3-GP

12

12

DY

R2117
10KR2J-3-GP

R2118
10KR2J-3-GP

PROJECT_ID2PROJECT_ID3

RO13_20171025

A A

Jedi UMA/DIS 2IN1

Jedi UMA/DIS 2IN1

Jedi UMA/DIS 2IN1

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin T ai Wu Rd ., Hsichih,

21F, 88, Sec.1, Hsin T ai Wu Rd ., Hsichih,

21F, 88, Sec.1, Hsin T ai Wu Rd ., Hsichih,
Taipei Hsie n 221, Taiwan, R.O .C.

Taipei Hsie n 221, Taiwan, R.O .C.

Title

Title

Title

Size Document Num ber Rev

Size Document Num ber Rev

Size Document Num ber Rev

A2

A2

A2

Jedi15"/17" WHL-U

Jedi15"/17" WHL-U

Jedi15"/17" WHL-U

Date: Sheet of

Date: Sheet of

5

4

3

2

Date: Sheet of

Taipei Hsie n 221, Taiwan, R.O .C.

CPU (EMMC/CNVi)

CPU (EMMC/CNVi)

CPU (EMMC/CNVi)

21 106Tuesday, January 08, 2019

21 106Tuesday, January 08, 2019

1

21 106Tuesday, January 08, 2019

A00

A00

A00

Vinafix.com

5

Main Func = PCH

4

3

2

1

1D0V_S5

BP20

VCCPRIM_1P05

BW16

VCCPRIM_1P05

BW18

VCCPRIM_1P05

BW19

VCCPRIM_1P05

BY16

VCCPRIM_1P05

CA14

VCCPRIM_1P05

2.57A

CC15

VCCPRIM_1P8

CD15

VCCPRIM_1P8

CD16

VCCPRIM_1P8

CP17

VCCPRIM_1P8

CB22

VCCPRIM_3P3

CB23

VCCPRIM_3P3

CC22

VCCPRIM_3P3

CC23

VCCPRIM_3P3

CD22

VCCPRIM_3P3

CD23

VCCPRIM_3P3

CP29

VCCPRIM_3P3

BU15

VCCPRIM_CORE

BU22

VCCPRIM_CORE

BV15

VCCPRIM_CORE

BV16

VCCPRIM_CORE

BV18

VCCPRIM_CORE

BV19

VCCPRIM_CORE

BV20

VCCPRIM_CORE

BV22

VCCPRIM_CORE

BW20

VCCPRIM_CORE

BW22

VCCPRIM_CORE

CA12

VCCPRIM_CORE

CA16

VCCPRIM_CORE

CA18

VCCPRIM_CORE

CA19

VCCPRIM_CORE

CA20

VCCPRIM_CORE

CB12

VCCPRIM_CORE

CB14

VCCPRIM_CORE

CB15

VCCPRIM_CORE

BT24

VCCDSW_1P05

BU14

VCCAPLL_1P05

BV12

VCCPRIM_MPHY_1P05

BW12

VCCPRIM_MPHY_1P05

BW14

VCCPRIM_MPHY_1P05

BY12

VCCPRIM_MPHY_1P05

BY14

VCCPRIM_MPHY_1P05

BV2

VCCAMPHYPLL_1P05

BR15

VCCAPLL_1P05

CC12

VCCDUSB_1P05

BR24

VCCDSW_3P3

BT20

VCCHDA

BV23

VCCSPI

BT18

VCCPRIM_1P05

BT19

VCCPRIM_1P05

BU18

VCCPRIM_1P05

BU19

VCCPRIM_1P05

BT22

VCCPRIM_1P05

BP22

VCCPRIM_1P05

BV14

VCCPRIM_MPHY_1P05

WHISKEY-LAKE- GP

ZZ.00CPU.271

D D

RO13_CFLU_20171208
RVP_CRB: +VCCPRIM_CORE

C2223

SC1U10V2KX-1DLGP

EC2201

SCD1U16V2KX-3DLGP

12

12

DY

DY

C C

3D3V_VCCPR IM

SA 1228 intel

3D3V_VCCDS W

C2224

SC1U10V2KX-1DLGP

12

1D8V_VCCPR IM

3D3V_VCCPR IM

1D0V_S5

RO13_CFLU_20171211
VCCDSW_1P05 (BT24): PCH internal VRM

1D0V_VCCDS W
1D0V_S5

1D0V_VCCPR IM_MPHY

1D0V_VCCAMPH YPLL

1D0V_S5
1D0V_S5

3D3V_VCCDS W

3D3V_VCCPR IM

1D0V_VCCPR IM_MPHY

RO13_CFLU_20171208

1D0V_S5

16 OF 20CPU1P

VCCPRIM_3P3

VCCRTC

VCCPRIM_1P05

DCPRTC

VCCPRIM_1P05
VCCAPLL_1P05

VCCA_BCLK_1P05

VCCAPLL_1P05

VCCA_SRC_1P05

VCCA_XTAL_1P05

VCCDPHY_1P24
VCCDPHY_1P24

VCCDPHY_1P24
VCCDPHY_1P24
VCCDPHY_1P24

VCCDSW_3P3

VCCA_19P2_1P05

VCCPRIM_1P8
VCCPRIM_1P8
VCCPRIM_1P8
VCCPRIM_1P8
VCCPRIM_1P8

VCCPRIM_3P3

VCCPRIM_3P3

GPP_B0/CORE_VID0
GPP_B1/CORE_VID1

CB16

BR23
BY20

BP24

BR20
BT12
BP14
BR14
BU12
CP5
BY24

CA24
BY23

CA23
CP25

BT23
BR12

CC18
CC19
CD18
CD19
CP23

BW23

BP23
CB36

CB35

VCCRTCE XT

V0.85A_VID0
V0.85A_VID1

3D3V_VCCPR IM

3D3V_VCCPR TC
1D0V_S5

1D0V_S5
1D0V_S5
1D0V_S5
1D0V_S5
1D0V_S5
1D0V_VCCA_XT AL

1D24V_VCCD PHY_EC
3D3V_VCCDS W
1D0V_S5

RO13_CFLU_20171211
VCCRTCEXT (BP24): PCH internal VRM

1 2

C2201

DY

SCD1U16V2KX- 3DLGP

RO13_CFLU_20171211
VCCDPHY_1P24 (BY23 CA23 CP25 BY24 CA24): PCH internal VRM

1D24V_VCCD PHY

RO13_CFLU_20171208

1D8V_VCCPR IM

RO13_CFLU_20171208

3D3V_VCCPR IM

TPAD14-OP-G P

1

TP2201

1

TP2202

TPAD14-OP-G P

K12
K14
K15
K17
K18
K20
L25
M24
M26
P24
P26
R24
R25
R26
V24

W25

Y24
Y25

G2
G1

C34

G3

G4
A34
B35

AJ27
AH26

L5

WHISKEY-LAKE- GP

RSVD#K12
RSVD#K14
RSVD#K15
RSVD#K17
RSVD#K18
RSVD#K20
RSVD#L25
RSVD#M24
RSVD#M26
RSVD#P24
RSVD#P26
RSVD#R24
RSVD#R25
RSVD#R26
RSVD#V24
RSVD#W25
RSVD#Y24
RSVD#Y25
RSVD#G2
RSVD#G1
RSVD#C34
RSVD#G3
RSVD#G4
RSVD#A34
RSVD#B35
RSVD#AJ27
RSVD#AH26
RSVD#L5

WHL QS/CFL U/WHL ES1_CNL U22

15 OF 20CPU1O

RSVD#AA24
RSVD#AA26
RSVD#AB25
RSVD#AC24
RSVD#AC25
RSVD#AC26
RSVD#AD24
RSVD#AD26

RSVD#V25

RSVD#T25
RSVD#A35
RSVD#D34

RSVD#N5

AA24
AA26
AB25
AC24
AC25
AC26
AD24
AD26
V25
T25
A35
D34
N5

RO13_CFLU_20171208

RO13_20171107

1D0V_S5

C2212

SC1U10V2KX-1DLGP

12

RO13_20171110
KR EC list

1D0V_VCCDS W1D8V_VCCPR IM3D3V_VCCPR IM

C2213

SC1U10V2KX-1DLGP

12

RO13_20171107

1D0V_S5

12

Layout Note:

C2204

SC1U10V2KX-1DLGP

C2205

C2202

SC1U10V2KX-1DLGP

C2203

SC1U10V2KX-1DLGP

B B

12

12

12

SC1U10V2KX-1DLGP

12

C2206

12

SCD1U16V2KX-3DLGP

12

1uF:

C2207

SCD1U16V2KX-3DLGP

C2105 near V19
C2106 near AK17
C2107 near AG15
C2109 near Y16
C2110 near T16
C2111 near AJ19

C2211

C2210

SC1U10V2KX-1DLGP

SC1U10V2KX-1DLGP

12

12

DY

RO13_CFLU_20171208

1 2

0R0603-PAD

1 2

C2215

SC1U10V2KX-1DLGP

C2216

SC1U10V2KX-1DLGP

12

RO13_20171107

1D0V_VCCAMPH YPLL 1D0V_S5

12

12

C2209

SC1U25V3KX-1-DLGP

A A

C2208

SC22U6D3V3MX-1-DL-GP

Layout Note:

22uF:
C2113 near BV2
C2126 near BV2

SB 1004

Layout Note:

22uF:
C2113 near K15

SB 0328

12

C2214

SC1U25V3KX-1-DLGP

Layout Note:

1uF:
C2116 near A10
22uF:
C2115 near K19
C2119 near N20
C2122 near L19

R2202

R2203

0R0603-PAD

12

C2217

SC1U10V2KX-1DLGP

1D0V_VCCA_XT AL1D0V_S5

1D0V_VCCPR IM_MPHY1D0V_S5

Layout Note:

1uF:
C2101 near AB19
C2104 near K17
C2116 near A10
C2121 near AL1

1D24V_VCCD PHY_EC

12

C2218
SC4D7U6D3V 3KX-DLGP

RO13_20171030

1D0V_S5

1D0V_VCCA_XT AL

C2219

12

SC1U10V2KX-1DLGP

1 2

R2204

0R0603-PAD

1 2

R2205

0R0603-PAD

1D0V_VCCPR IM_MPHY

12

3D3V_VCCPR TCRTC_AUX_S5

1D0V_VCCAMPH YPLL

SC22U6D3V3MX-1-DL-GP

C2220

3D3V_VCCPR TC

12

C2222

SC1U10V2KX-1DLGP

12

Layout Note:

0.1uF:
C2118 near BR23
1uF:
C2117 near BR23

C2221

SCD1U16V2KX-3DLGP

RO13_CFLU_20171208

Jedi UMA/DIS 2IN1

Jedi UMA/DIS 2IN1

Jedi UMA/DIS 2IN1

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin T ai Wu Rd ., Hsichih,

21F, 88, Sec.1, Hsin T ai Wu Rd ., Hsichih,

21F, 88, Sec.1, Hsin T ai Wu Rd ., Hsichih,
Taipei Hsie n 221, Taiwan, R.O .C.

Taipei Hsie n 221, Taiwan, R.O .C.

Title

Title

Title

Size Document Num ber Rev

Size Document Num ber Rev

Size Document Num ber Rev

A2

A2

A2

Jedi15"/17" WHL-U

Jedi15"/17" WHL-U

Jedi15"/17" WHL-U

Date: Sheet of

Date: Sheet of

5

4

3

2

Date: Sheet of

Taipei Hsie n 221, Taiwan, R.O .C.

CPU (PCH-LP PWR&Caps)

CPU (PCH-LP PWR&Caps)

CPU (PCH-LP PWR&Caps)

22 106Tuesday, January 08, 2019

22 106Tuesday, January 08, 2019

1

22 106Tuesday, January 08, 2019

A00

A00

A00

Vinafix.com

5

Main Func = PCH

4

3

2

1

18 OF 20C PU1R

CR34

VSS

BT5

VSS

BY5

VSS

CP35

VSS

CM37

VSS

CK37

VSS

AW1

CM13

CM17

CM21

CM25

CM29
CM31

CM33

AE24
AE26

AG24
AG26
AH24
AH25

CN37

BK10
AB27

BK28
AB30

AB33
BK33

AB36

AC10

AC27

AC30

AD33

AD35

CM1

BD6
AY4
B34
E35

A4

AF25

B2
B36
C36
C37

CN1
CN2

CP2

D1
A32
F33

A3
BJ7

CJ36

A36
CJ4
BK2

CK1
AB3

BK3
CK4

CK7
BK4

CL2
AB4
BK7

AB7

BL25

BL28

BL29

BL30
BL31

BL32

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

WHISKEY-LAKE- GP

ZZ.00CPU.271

D D

C C

BL7

VSS

AE25

VSS

BM33

VSS

CM5

VSS

AE27

VSS

BM35

VSS

CM9

VSS

AE30

VSS

BM36

VSS

CN13

VSS

AE7

VSS

BM9

VSS

CN17

VSS

AF27

VSS

BN30

VSS

CN21

VSS

AF3

VSS

BN7

VSS

CN25

VSS

AF30

VSS

CN29

VSS

AF33

VSS

BP15

VSS

AF36

VSS

AF4

VSS

CN5

VSS

AF7

VSS

BP25

VSS

CN9

VSS

AG10

VSS

BP3

VSS

CP1

VSS

BP32

VSS

CP11

VSS

AH27

VSS

BP33

VSS

CP13

VSS

AH28

VSS

BP4

VSS

CP15

VSS

AH29

VSS

BP7

VSS

CP19

VSS

AH30

VSS

CP21

VSS

AH31

VSS

BR19

VSS

CP27

VSS

AH33

VSS

BR25

VSS

AH35

VSS

CP37

VSS

AJ25

VSS

BT15

VSS

AJ28

VSS

BT16

VSS

CP9

VSS

AJ7

VSS

CR2

VSS

AK3

VSS

CR36

VSS

AK33

VSS

D21

VSS

AK36

VSS

BT25

VSS

D25

VSS

AK4

VSS

BT28

VSS

AL28

VSS

BT33

VSS

D5

VSS

AL29

VSS

AM10

AM28
AM33

AM35

BW11

BW15

BW24

BT35
AL32

BT36

BU11

BU23

BU24
BU25
AN25

AN28
BV11

AN29
AN30
AN31

BV31

BV33

AP33

AP36

AR28

AT33

AT35
AT36

BY11
AU10
BY15

AU28
BY22

AU29

BW7

VSS

D6

VSS
VSS
VSS

D8

VSS

AL7

VSS

D9

VSS
VSS
VSS

E23

VSS
VSS

E27

VSS
VSS
VSS

E29

VSS
VSS
VSS

E31

VSS
VSS

E33

VSS
VSS

BU7

VSS

E9

VSS
VSS
VSS

F12

VSS
VSS

F15

VSS
VSS

F18

VSS
VSS

BV3

VSS

F2

VSS

AN7

VSS
VSS

F21

VSS

AN8

VSS
VSS

F24

VSS

BV4

VSS

F3

VSS

AP3

VSS
VSS

F4

VSS
VSS
VSS

G21

VSS
VSS

G27

VSS

AP4

VSS

G33

VSS
VSS

G35

VSS

G36

VSS
VSS
VSS

G9

VSS
VSS

H21

VSS
VSS
VSS

H27

VSS

AT4

VSS
VSS
VSS
VSS

H9

VSS
VSS
VSS

J12

VSS
VSS

J15

VSS

WHISKEY-LAKE- GP

ZZ.00CPU.271

19 OF 20CPU1S

BY25

VSS

J18

VSS

AU32

VSS

BY28

VSS

J21

VSS

AV25

VSS

BY33

VSS

J24

VSS

AV28

VSS

BY35

VSS

J33

VSS

AV3

VSS

BY36

VSS

J36

VSS

AV33

VSS

J6

VSS

AV36

VSS

C1

VSS

K21

VSS

AV4

VSS

C21

VSS

K22

VSS

AV6

VSS

C25

VSS

K24

VSS

AV8

VSS

C29

VSS

K25

VSS

AW28

VSS

C33

VSS

K27

VSS

AW29

VSS

C4

VSS

K28

VSS

AW3

VSS

C9

VSS

K29

VSS

AW30

VSS

CA11

VSS

K3

VSS

AW31

VSS

CA15

VSS

K30

VSS

AY33

VSS

CA22

VSS

K31

VSS

AY35

VSS

K32

VSS

B12

VSS

K4

VSS

B15

VSS

CA25

VSS

K9

VSS

B18

VSS

CB11

VSS

L27

VSS

B21

VSS

L33

VSS

B23

VSS

L35

VSS

B25

VSS

CB18

VSS

L36

VSS

B27

VSS

CB19

VSS

L6

VSS

B29

VSS

CB2

VSS

N25

VSS

B31

VSS

CB20

VSS

N27

VSS

CB25

VSS

CB33

CC11

CC20

CC25

CC28

CC31

BC25
CD11

CD12
BC29

CD14

BC32
CD24

CD25

CE33
BD28

CE35
BD33

CE36
BD35

BD36
CF11

CF14

CF19

CB3

CB4

CB7

BA10

BA28

BA3

BB3

BB33

BB36

BB4
CC7

BC8

CE7

BE10

BE28

BE29

CF2
BE3

N6

VSS

B37

VSS
VSS

P10

VSS

B5

VSS
VSS

P3

VSS

B7

VSS
VSS

P33

VSS

B9

VSS
VSS

P36

VSS
VSS
VSS

P4

VSS
VSS

P7

VSS
VSS
VSS

R27

VSS
VSS
VSS

R28

VSS
VSS
VSS

R29

VSS
VSS
VSS

R30

VSS
VSS
VSS

R31

VSS
VSS
VSS

T27

VSS
VSS

T30

VSS
VSS
VSS

T33

VSS

T35

VSS
VSS
VSS

T36

VSS
VSS

T7

VSS
VSS
VSS

U26

VSS
VSS
VSS

U7

VSS
VSS
VSS

V26

VSS
VSS
VSS

V27

VSS
VSS
VSS

V3

VSS
VSS
VSS

V30

VSS
VSS
VSS

V33

VSS
VSS
VSS

V36

VSS
VSS

WHISKEY-LAKE- GP

ZZ.00CPU.271

20 OF 20C PU1T

CF23

VSS

V4

VSS

BE30

VSS

CF28

VSS

W10

VSS

BE31

VSS

CF3

VSS

W27

VSS

CF4

VSS

W30

VSS

BF3

VSS

CG33

VSS

W7

VSS

BF33

VSS

CG7

VSS

BF36

VSS

Y26

VSS

BF4

VSS

CH31

VSS

Y27

VSS

BG25

VSS

Y30

VSS

BG28

VSS

CJ11

VSS

Y33

VSS

CJ14

VSS

Y35

VSS

BH28

VSS

CJ19

VSS

Y7

VSS

BH29

VSS

CJ23

VSS

BH32

VSS

CJ28

VSS

BH33

VSS

CJ33

VSS

BH35

VSS

CJ35

VSS

BP19

VSS

BR16

VSS

BY18

VSS

BY19

VSS

CC16

VSS

BU16

VSS

CC14

VSS

BR22

VSS

BU20

VSS

CD20

VSS

BT14

VSS

BP12

VSS

CB24

VSS

CC24

VSS

J5

VSS

U24

VSS

BD7

VSS

AR4

VSS

AU4

VSS

AW4

VSS

BA6

VSS

BC4

VSS

BE4

VSS

BE8

VSS

BA4

VSS

BD4

VSS

BG4

VSS

CJ2

VSS

CJ3

VSS

AM5

VSS

CM4

VSS

AC5

VSS

AG5

VSS

CR6

VSS

B B

A A

Jedi UMA/DIS 2IN1

Jedi UMA/DIS 2IN1

Jedi UMA/DIS 2IN1

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin T ai Wu Rd ., Hsichih,

21F, 88, Sec.1, Hsin T ai Wu Rd ., Hsichih,

21F, 88, Sec.1, Hsin T ai Wu Rd ., Hsichih,
Taipei Hsie n 221, Taiwan, R.O .C.

Taipei Hsie n 221, Taiwan, R.O .C.

Title

Title

Title

Size Document Num ber Rev

Size Document Num ber Rev

Size Document Num ber Rev

A2

A2

A2

Jedi15"/17" WHL-U

Jedi15"/17" WHL-U

Jedi15"/17" WHL-U

Date: Sheet of

Date: Sheet of

5

4

3

2

Date: Sheet of

Taipei Hsie n 221, Taiwan, R.O .C.

CPU (VSS)

CPU (VSS)

CPU (VSS)

1

A00

A00

23 106Tuesday, January 08, 2019

23 106Tuesday, January 08, 2019

23 106Tuesday, January 08, 2019

A00

Vinafix.com

Main Func = KBC

18,68

KSO[0..16]65

D D

KSI[0..7]65

ESPI_IO[3..0]

C C

B B

A A

5

PM_SLP_S0#17,40,91

VCCDSW_ON25

CLK_TP_SIO65
DAT_TP_SIO65

SIO_PWRBTN#17

SUS_CLK_R161

ESPI_CS#18, 68
ESPI_CLK18, 68

ESPI_RESET#18,68
SYS_PWROK17
PBAT_PRES#43,44
RTCRST_ON25

PCH_RSMRST#17

TP_WAKE_KBC#3 ,65

LID_CL_SIO#20,66,69

VCCST_PWRGD17,40,46
CAP_LED#_R65

CHG_AMBER_LED#64,90

BATT_WHITE_LED#64

FAN_TACH126

PBAT_CHG_SMBDAT43,44

RESET_OUT#17,26

NB_MODE#20

KB_LED_PWM65

BEEP27

PM_SLP_S3#17,27,40,51

PS_ID4 3

PBAT_CHG_SMBCLK43,44

HOST_DEBUG_TX68

PTP_DIS#65

PECI_CPU3

NB_MUTE#2 7

LID_CL_SIO_TAB#2 0,66,69

HW_ACAV_IN44,90

FPR_SCAN#66

FAN1_PWM26

LCD_TST55

SIO_EXT_WAKE#20

LCD_VCC_TEST_EN55

PANEL_BKEN24,55

HW_ACAVIN_NB43

ALWON40

AD_IA4 4

CPU_SMB_SDA_P11 8,26,79

CPU_SMB_SCL_P118,26,79

PANEL_BKEN24,55
DGPUHOT#44 ,79

DGPU_PWROK19,85

PROCHOT#_CPU3,44,46

L_BKLT_EN4

TOUCH_REPORT_SW55

KBC_PWRBTN#66,90

TYPEC_SMBCLK72

TYPEC_SMBDA72

5

LID_POWER_ON#67

SA 1107

UPD1_SMBINT#72

MASK_SATA_LED#64

ME_FWP68

GC6_THM_DIS#4

NC_GPIO8_OVERT#_EC79

AC_DIS43

USB_EN#66

PRIM_PWRGD40 ,53

TYPEC_DCIN_EN#74

SSD_SCP#60

SSD_SCP#_M263

ISH_TABLE_MODE#20

EC_D_INHIB90

M_BIT

PANEL_MONITOR90

BAT2_LED#90

SC 1121

NC_U3_PD#_EC6 6

Layout Placemen t Request

3D3V_S5_KBC

RN2412

1
2
3
4 5

SRN100KJ-5-GP

RN2409

1
2
3
4 5

SRN100KJ-5-GP

RN2410

1
2
3
4 5

SRN100KJ-5-GP

RN2411

1
2 3

SRN100KJ-6-GP

RN2407

1
2 3

SRN100KJ-6-GP

3D3V_S5_KBC

12

R2458
10KR2J-3-GP

DY

FPR_SCAN#

SB 0911

For eSPI

3D3V_S5_KBC

R2450
100KR2J-1-GP

1 2

KSO9

Layout Placemen t Request

R2417

100KR2J-1-GP

4

1D0V_S5

3D3V_S5_KBC

8

KSO1

7

KSO2

6

KSO12

12

KSO16

8

KSO7

7

KSO6

6

KSO8
KSO3

3D3V_S5_KBC

8
7
6

4

4

1

KSO15

2

KSO13

3

KSO14

4 5

SRN100KJ-5-GP

1
2

KSO11

3

KSO10

4 5

SRN100KJ-5-GP

KSO5
KSO4

SA 0122

3D3V_S5_KBC

12

R2460
10KR2J-3-GP

GPU_PWR_LEVEL

SA 1106

ALL_SYS_PWRGD (RUNPWROK)assert,
delay 10ms; PCH_PWROK( RESET_OUT# )assert.

GPIO123 (BSS_ST RAP)GPIO102 (CR_STRAP)

Already pull lo w
on CPU side

PCH_RSMRST#

1

TP2401

TPAD14-OP-GP

PROCHOT

Layout Placemen t Request

Q2408

G

12

DY

D

S

Notice:ZZ.2N70 2.J3101

2N7002K-2-GP

84.2N702.J31

2nd = 084.27002.0N31

4

3D3V_S5 3D3V_S5_KBC

1D0V_S5

C2406

SCD1U16V2KX-3DLGP

12

C2412

SCD1U16V2KX-3DLGP

C2410

C2420

SCD1U16V2KX-3DLGP

12

12

TP2403

TPAD14-OP-GP

For eSPI

0R2J-L-GP

C2425

SC18P50V2JN-1DLGP

2nd = 082.30003.0191

1 2

Microchip: Use CL=12.5p Xtal󶁜C = 15p

PROCHOT#_CPU

12

ED2403
AZ5725-01FDR7G-G P

DY

SCD1U16V2KX-3DLGP

C2411

SCD1U16V2KX-3DLGP

12

1 2

DY

COMMON PARTS

X2401

1 2

XTAL-32D768KHZ-98-GP

082.30003.0301

EMC 0627

12

SC 1121

1

SA 1107

R24610R2J-L -GP

R2484
100KR2J-1-GP

KSO0

RN2403

RN2404

C2416

SCD1U16V2KX-3DLGP

C2421

SCD1U16V2KX-3DLGP

12

12

8

KSI5

7

KSI1

6

KSI3
KSI0

8

KSI7

7

KSI6

6

KSI4
KSI2

R2478

1 2

DY

SC 0522

SUS_CLK_R1

SB 0912

3

For eSPI

1 2

R2446

0R0603-PAD

RTC Gen 9 reset circuit_20170 726

Layout Placemen t Request

If don't need RTC alarm wake up,
can change to 3D3V_AUX_S5

C2413

SCD1U16V2KX-3DLGP

C2414

SCD1U16V2KX-3DLGP

12

12

KSO0
KSO1
KSO2
KSO3
KSO4
KSO5
KSO6
KSO7
KSO8
KSO9
KSO10
KSO11
KSO12
KSO13
KSO14
KSO15
KSO16
CAP_LED#

KSI0
KSI1
KSI2
KSI3
KSI4
KSI5
KSI6
KSI7

R2479

U3_PD#_ECNC_U3_PD#_EC

1 2

GPIO115

SIO_PWRBTN#

0R2J-L-GP

VCCDSW_ON

SA 1106

ESPI_IO0
ESPI_IO1
ESPI_IO2
ESPI_IO3
ESPI_CS#
MASK_SATA_LED#
ESPI_CLK
TYPEC_DCIN_EN#

SB 0327

SYS_LED_MASK#

SB 0402

GPU_PWR_LEVEL
TP_EN#
ESPI_RESET#
LID_CL_SIO#

UPD1_SMBINT#
SYS_PWROK
PBAT_PRES#
PRIM_PWRGD
RTCRST_ON

PCH_RSMRST#
BKLT_IN_EC

AC_DIS LCD_TST
NC_EC_SLP_S0IX#PM_SLP_S0#
FPR_SCAN#
TP_WAKE_KBC#

USB_EN#
VCCST_PWRGD
RESET_OUT#

MEC_XTAL2
MEC_XTAL1_R

SB 0912

C2424

SC18P50V2JN-1DLGP

1 2

3D3V_RTC

3D3V_ECVBAT

C2428

SCD1U16V2KX-3DLGP

12

U2401

2

GPIO027/KSO00/PVT_IO1

14

GPIO015/KSO01/PVT_CS#

15

GPIO016/KSO02/PVT_SCLK

16

GPIO017/KSO03/PVT_IO0

37

GPIO045/BCM_INT1#/KSO04

38

GPIO046/BCM_DAT1/KSO05

39

GPIO047/BCM_CLK1/KSO06

50

GPIO025/KSO07/PVT_IO2

46

GPIO055/PWM2/KSO08/PVT_IO 3

68

GPIO102/KSO09/CR_STRAP

72

GPIO106/KSO10

74

GPIO110/KSO11

75

GPIO111/KSO12

76

GPIO112/PS2_CLK1A/KSO1 3

77

GPIO113/PS2_DAT1A/KSO14

86

GPIO125/KSO15

92

GPIO132/KSO16

93

GPIO140/KSO17

98

GPIO143/KSI0/DTR#

99

GPIO144/KSI1/DCD#

6

GPIO005/SMB00_DATA/SMB00_DATA18/ KSI2

7

GPIO006/SMB00_CLK/SMB00_ CLK18/KSI3

104

GPIO147/KSI4/DSR#

105

GPIO150/KSI5/RI#

107

GPIO151/KSI6/RTS#

108

GPIO152/KSI7/CTS#

78

GPIO114/PS2_CLK0

79

GPIO115/PS2_DAT0

52

GPIO026/PS2_CLK1B

88

GPIO127/PS2_DAT1B

59

GPIO040/LAD0/ESPI_IO0

60

GPIO041/LAD1/ESPI_IO1

61

GPIO042/LAD2/ESPI_IO2

62

GPIO043/LAD3/ESPI_IO3

58

GPIO044/LFRAME#/ESPI_CS#

56

GPIO064/LRESET#

57

GPIO034/PCI_CLK/ESPI_CL K

63

GPIO067/CLKRUN#

55

GPIO063/SER_IRQ/ESPI_ALER T#

10

GPIO011/SMI#/EMI_INT#

49

GPIO060/KBRST

53

GPIO061/LPCPD#/ESPI_RESET#

66

GPIO100/EC_SCI#

32

GPIO126/SHD_SCLK

28

GPIO133/SHD_IO0

29

GPIO134/SHD_IO1

30

GPIO135/SHD_IO2

31

GPIO136/SHD_IO3

27

GPIO123/SHD_CS#

67

GPIO101/SPI_CLK

69

GPIO103/SPI_IO0

71

GPIO105/SPI_IO1

42

GPIO052/SPI_IO2

33

GPIO062/SPI_IO3

3

GPIO001/SPI_CS#/32KHZ_ OUT

13

RESET_IN#/GPIO014

48

GPIO057/VCC_PWRGD

73

GPIO107/RESET_OUT#

125

XTAL2

123

XTAL1

MEC1416-NU-D0-GP

071.01416.000G

D2401

PANEL_BKEN

3

BAT54C-12-GP

75.00054.A7D

2nd = 75.00054.T7D

DGPUHOT#

GC6_THM_DIS#_EC DGPU_PWROK

DY

1D8V_S5 1D8V_S5_ KBC

R2472
0R0402-PAD

1 2

43

103

122

VTR5VTR19VTR

VTR65VTR82VTR

VBAT

GPIO007/SMB01_DATA/SMB01_DATA18

GPIO010/SMB01_CLK/SMB01_ CLK18

GPIO012/SMB02_DATA/SMB02_DATA18

GPIO013/SMB02_CLK/SMB02_ CLK18

GPIO130/SMB03_DATA/SMB03_DATA18

GPIO131/SMB03_CLK/SMB03_ CLK18

GPIO141/SMB04_DATA/SMB04_DATA18

GPIO142/SMB04_CLK/SMB04_ CLK18

GPIO030/BCM_INT0#/PWM4

GPIO031/BCM_DAT0/PWM5
GPIO032/BCM_CLK0/PWM6

GPIO157/LED0/TST_CLK_OU T

GPIO116/TFDP_DATA/UART_RX

GPIO117/TFDP_CLK/UART_TX

GPIO033/PECI_DAT/SB_TSI_DAT

SYSPWR_PRES/GPIO003

GPIO166/CMP_VREF1/UART_CLK

VR_CAP18VSS17VSS51AVSS

VSS_VBAT

VSS

VSS64VSS

84

112

124

100

EC_AGND

VR_CAP

12

C2418
SC1U10V2KX-1DLGP

R2445

1 2

0R0402-PAD

EC_AGND

Connect GND and AGND planes via either
0R resistor or connect directly.

PANEL_BKEN_EC

1

eDP backlight
Control from EC

R2427

L_BKLT_EN_L L_BKLT_EN

1 2

2

DY

R2435

1 2

0R0402-PAD

R2477

1 2

0R0402-PAD

DY

12

R2471

0R2J-L-GP

R2426
10KR2J-3-GP

1 2

3

R2462

1 2

0R0402-PAD

C2423

SCD1U16V2KX-3DLGP

12

VTR_33_18

GPIO050/TACH0
GPIO051/TACH1

GPIO053/PWM0
GPIO054/PWM1

GPIO056/PWM3

GPIO002/PWM7

GPIO156/LED1
GPIO104/LED2

GPIO035/SB-TSI_CLK

VREF_CPU

GPIO145/ICSP_CLOCK

GPIO146/ICSP_DATA

ICSP_MCLR

BGPO/GPIO004

VCI_OUT/GPIO036
VCI_IN1#/GPIO162
VCI_IN0#/GPIO163

VCI_OVRD_IN/GPIO164

GPIO160/DAC_0
GPIO161/DAC_1

DAC_VREF

GPIO124/CMP_VOUT0

GPIO020/CMP_VIN0

GPIO165/CMP_VREF0

GPIO120/CMP_VOUT1

GPIO021/CMP_VIN1

GPIO024/ADC7

GPIO023/ADC6/A20M

GPIO022/ADC5
GPIO153/ADC4
GPIO154/ADC3
GPIO155/ADC2
GPIO122/ADC1
GPIO121/ADC0

ADC_VREF

Layout Note:

0R2J-L-GP

54

PBAT_CHG_SMBDAT

8

PBAT_CHG_SMBCLK

9

GPU_THM_SMBDAT

11

GPU_THM_SMBCLK

12

TYPEC_SMBDA

89

TYPEC_SMBCLK

91

DAT_TP_SIO

96

CLK_TP_SIO

97

FAN1_TACH

40

LID_CL_SIO_TAB#

41

KB_LED_PWM

44
45

BEEP
FAN1_PWM

47

NB_MODE#

34
35

PS_ID

36
4

BAT2_LED#

1

BAT1_LED#

106

NC_GPIO8_OVERT#_EC

70

ME_FWP

80

HOST_DEBUG_TX

81

PTP_DIS#

90

H_PECI PECI_CPU

94

1D0V_S5

95

ICSP_CLK

101

ICSP_DAT

102

ICSP_CLR

87

NB_MUTE#

119

SYSPWR_PRES

120
121

ALWON
LID_POWER_ON#

126

POWER_SW_IN#

127

HW_ACAV_IN

128

GC6_THM_DIS#_EC

23

HW_ACAVIN_NB_R

24
22

ISH_TABLE_MODE#

85

PANEL_MONITOR

20

EC_D_INHIB

25
83

PROCHOT

21
26

NC_THERMAL_T8

118

PANEL_BKEN_EC

117

SIO_EXT_WAKE#

116

MODEL_ID

109

I_ADP

110

BOARD_ID

111

LCD_VCC_TEST_EN

113

I_BATT

114
115

3D3V_S5_KBC

C2422

SCD1U16V2KX-3DLGP

12

EC_AGND

X01 20161227 ch ange

eDP backlight
Control from PCH

L_BKLT_ENBKLT_IN_EC

12

R2436
100KR2J-1-GP

GPU_PWR_LEVEL

A00 1224

49K9R2F-L-GP

BOARD_ID

SCD1U16V2KX-3DLGP

C2408

SB 0403

SB 0403

SA 0117

1 2

R2437
43R2J-GP

12

C2405

DY

SC100P50V2JN-3GP

R2490

0R0402-PAD

1 2

C2429 SCD1U16V2KX-3DLGP

12

R2474 0R2J-L-GP

DY

3D3V_S5_KBC

12

R2443

BOARD ID

12

R2444

12

100KR2F-L1-GP

EC_AGND

BATTER /CHARGER
CPU/ GPU/ Thermal

65982D

Need very close to EC,
PDG: <0.5 inches.

GC6_THM_DIS#

12

SSD_SCP#_M2SSD_SCP#

3D3V_S5_KBC

3D3V_S5_KBC

sa 1031

R2414

1 2

10KR2F-2-GP

1 2

PBAT_CHG_SMBCLK
PBAT_CHG_SMBDAT

PBAT_PRES#

SC 1101

3D3V_S5_KBC

3D3V_S5

SB 0402

SC 1101

I_ADP AD_IA

SYS_LED_MASK#

3D3V_S5_KBC

R2480
100KR2J-1-GP

ECDEBUG

ICSP_CLK
ICSP_DAT

HOST_DEBUG_TX
ICSP_CLR

RN2402

1234

SRN4K7J-8-GP

1 2

R2415 100KR2J-1-GP

3D3V_S0

R2430
10KR2J-3-GP

1 2

Layout Placemen t Request

RN2414

1

4

2 3

SRN10KJ-L-GP

12

C2435
SC2200P50V2KX-2DLGP

EC_AGND

12

C2430
SC2200P50V2KX-2GP

DY

3D3V_S5_KBC

3D3V_S5_KBC

2

Change symbol part number,
because origin symbol is DELL OBS part

SA 0116

D2403

FAN_TACH1

KA

RB520S30-GP

83.R2003.A8M

2ND = 083.52030.008F

12

R2454
100KR2J-1-GP

12

12

R2481

DY

150KR2F-L-GP

R2431

1 2

DY

0R2J-L-GP

12

R2482

DY

115KR2F-GP

DBEC1

7
1

2
3

ECDEBUG

4
5
6
8

20.K0691.006

ACES-CON6-58-GP

SA 1106

HW_ACAVIN_NB_R HW_ACAVIN_NB

ICSP_CLK
ICSP_DAT

R2421
330R2J-3-GP

Power Switch Logic(PSL)

2

SB 0327

SYS_LED_MASK#_R

SA 1108

LID_CL_SIO#

83.00355.G1F

2nd = 83.00355.D1F

KBC_PWRBTN#

NC_THERMAL_T8

1 2

0R0402-PAD

SB 0327

D2402

L1SS355T1G-GP

1 2

R2473

AK

R2432

1KR2J-1-GP

USB_EN#

TOUCH_REPORT_SW

1

3D3V_S5

MODEL ID

12

R2442

154KR2F-GP

MODEL ID

MODEL_ID

12

C2407

SCD1U16V2KX-3DLGP

12

R2441
100KR2F-L1-GP

EC_AGND

SA 0122

R2434
100KR2J-1-GP

SSD_SCP#

12

R2456
10KR2F-2-GP

LID_POWER_ON#

DY

3D3V_ECVBAT

R2496
100KR2J-1-GP

1 2

3D3V_S0

12

R2455
10KR2F-2-GP

3D3V_S0

R2489

100KR2J-1-GP

CAP_LED#

3D3V_S0

GPU_THM_SMBDAT

GPU_THM_SMBCLK

3D3V_S5

12

SB 0402

R2433
100KR2J-1-GP

1 2

3D3V_S5

SC 1121

U3_PD#_EC

SYS_LED_MASK#_R

CHG_AMBER_LED#

1 2

S

G

2N7002K-2-GP

84.2N702.J31

2nd = 084.27002.0N31

Q2414

1D8V_S5

R2497
100KR2J-1-GP

DY

1 2

SA 1031

Layout Placemen t Request

Q2416

BAT2_LED#

1

6

S1

D1

Q2416_G Q2 416_G

2 5

G2

G1

43

D2

S2

PJT138KA-GP

075.00138.0A7C

2nd = 075.00138.0F7C

Layout Placemen t Request

Notice:ZZ.2N70 2.J3101

CAP_LED#_R

D

R2483
330R2J-3-GP

DY

12

C2431
SC2200P50V2KX-2GP

DY

EC_AGND

1 2

0R0402-PAD

R2447

1 2

R2459

0R0402-PAD

12

BATT_WHITE_LED#

BAT1_LED#

SA 1027

SYS_LED_MASK#_R

AD_IAI_BATT

CPU_SMB_SDA_P1

CPU_SMB_SCL_P1

LID_CL_SIO#

For USB TypeC

TYPEC_SMBDA

R2499
100KR2J-1-GP

1

2

75.BAT54.07D

2nd = 75.00054.R7D

3D3V_S5_KBC

1

23

RN2413
SRN2K2J-5-GP

4

64.64925.6DL

64.15435.6DL

LID_CL_SIO#
TP_EN#

SRN100KJ-6-GP

12

1D8V_S5

D2404

Q2416_G

3

DY

BAT54A-11-GP

pull high on CP U side

RN2406

1
2 3

RN2405

2 3
1

SRN100KJ-6-GP

3D3V_S5

4

3D3V_S5

4

Layout Placemen t Request

For 65982DC

TYPEC_SMBCLK

Follow EV project circuit DY Q2417_20171005

3D3V_ECVBAT

R2451
100KR2J-1-GP

1 2

SA 1026

POWER_SW_IN#

12

C2426

SC2D2U10V3KX-1DLGP-U

Jedi UMA/DIS 2IN1

Jedi UMA/DIS 2IN1

Jedi UMA/DIS 2IN1

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev
Custom

Custom

Custom
Date: Sheet of

Date: Sheet of

Date: Sheet of

1

ECIO(SMSC 1416)

ECIO(SMSC 1416)

ECIO(SMSC 1416)

Jedi15"/17" WHL-U

Jedi15"/17" WHL-U

Jedi15"/17" WHL-U

Tuesday, January 0 8, 2019

Tuesday, January 0 8, 2019

Tuesday, January 0 8, 2019

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin T ai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin T ai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin T ai Wu Rd., Hsichih,
Taipei Hsien 221, Ta iwan, R.O.C.

Taipei Hsien 221, Ta iwan, R.O.C.

Taipei Hsien 221, Ta iwan, R.O.C.

24 106

24 106

24 106

A00

A00

A00

Vinafix.com

5

Main Func = SPI Flash

SPI Flash ROM( 16M ) for PCH

SPI_CS_ROM_N0
SPI_SO_ROM_R
SPI_WP_ROM_R

SPI_CS_ROM_N018

D D

C C

SPI_HOLD_ROM15,18

RTCRST_ON24

3V_5V_DSW_OK52,53

SPI_SO_ROM18,91

SPI_WP_ROM15,18

SPI_CLK_ROM18,91

SPI_SI_ROM15,18,91

RTC_DET#15,20
VCCDSW_ON24
3V_5V_PWRGD17,45

SSKT1

1

8
7

DY

3 6
425

SKT-G6179HT0321-001-GP

62.10089.011

SPI_HOLD_ROM_R
SPI_CLK_ROM_R
SPI_SI_ROM_R

SPI_CS_ROM_N0
SPI_SO_ROM_R
SPI_WP_ROM_R

12

EC2502

DY

(R2505

󵄘󳑫󱻕󰵖󴣊󲒂󲅙

3D3V_S5_PCH

3D3V_S5_PCH

SC4D7P50V2BN-GP

Main Func = RTC

1 2

SA 0201

R2501
4K7R2J-L-GP

4

SB 0330

BIOS1

1

CS#

2

DO/IO1

3

WP#/IO2

4

GND

W25Q128JVSIQ-GP

072.25128.0B51

2nd = 072.25127.0001

3rd = 072.25128.0D61

SB 0330

short pad)

HOLD#/RESET#/IO3

DI/IO0

3D3V_AUX_S5

12

12

8

VCC

7
6

CLK

5

R2505
0R2J-L-GP

3D3V_RTC_SYS

R2517
47KR2F-GP

DY

SPI_HOLD_ROM_R
SPI_CLK_ROM_R
SPI_SI_ROM_R

12

EC2501

DY

1

2

75.00054.A7D

2nd = 75.00054.T7D

common parts

3D3V_S5_PCH

SA 0201

SC4D7P50V2BN-GP

D2501

BAT54C-12-GP

3

SA 0201

3D3V_S5_PCH

12

12

C2501

SC10U6D3V3MX-DL-GP

DY

C2502

DY

SCD1U16V2KX-3GP

SA 1227

R2507 33R2F-3-GP

1 2

SPI_SI_ROM_R

1 2

R2508 33R2F-3-GP

1 2

R2509 33R2F-3-GP

SA 1227

R2503

SPI_HOLD_ROM

1 2

15R2F-2-GP

12

EC2503

SC10P50V2JN-4GP

DY

SPI_WP_ROM SPI_WP_ROM_R

R2510 33R2F-3-GP

1 2

RO13_CFLU_20171206
0 ohm to 33 ohm

072.25128.0B51

072.25127.0001

072.25128.0D61

SPI_CLK_ROMSPI_CLK_ROM_R
SPI_SI_ROM

SPI_SO_ROM_RSPI_SO_ROM

QUAD/DUAL fast read DUAL fast readSource

O

O

O O

2

1

SFDP

O

O

O

O

O

3D3V_RTC

RTC_AUX_S5

Layout Placement Request

COMMON PARTS

Q2507

DS

RTC_RST

PJA3415-GP

084.03415.0031

G

2nd = 084.02421.0031

SA 1102

3D3V_RTC+RTC_VCC

3

12

C2503
SCD47U25V3KX-1-DL-GP

RTCRST_ON

Layout Placement Request

R2567

1 2

RTC_RST

12

R2518

1MR2J-1-GP

100KR2J-1-GP

RTC_RST

RTC_3P3_EN_G

C2517

SCD022U16V2KX-3DLGP

2 1

RTC_RST

RTC_RST

1 2

RTC_3P3_EN_D

D

G

R2506
4K7R2J-L-GP

S

Q2510
2N7002K-2-GP

RTC_RST

84.2N702.J31

2nd = 084.27002.0N31

D2503

1

2

BAT54A-11-GP

RTC_RST

75.BAT54.07D

common parts

OC#
GND
OUT

3D3V_S5

12

3

3D3V_VCCDSW 3D3V_S5_PCH

3
2
1

Layout Placement Request

R2514
10KR2J-3-GP

RTC_RST

3V_5V_DSW_OK

R2516

1 2

0R0805-PAD

B B

12

R2504
10MR2J-L-GP

Q2505

G

D

S

Notice:ZZ.2N702.J3101

2N7002K-2-GP

84.2N702.J31

2nd = 084.27002.0N31

RTC_DET#

VCCDSW_ON

3D3V_S5

12

R2520

100KR2J-1-GP

RTC_RST

Layout Placement Request

3D3V_S5

SB 0417

Layout Placement Request

3V_5V_PWRGD

2nd = 75.00054.R7D

U2502

RTC_RST

4

EN

5

IN

SY6288C20AAC-GP

074.06288.007B

2nd = 074.03553.007F

Add RTC Gen 9 reset circuit_20170726

A A

5

4

3

2

Layout Placement Request

Jedi UMA/DIS 2IN1

Jedi UMA/DIS 2IN1

Jedi UMA/DIS 2IN1

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev
Custom

Custom

Custom

Tuesday, January 08, 2019

Tuesday, January 08, 2019

Tuesday, January 08, 2019

Date: Sheet

Date: Sheet

Date: Sheet

Taipei Hsien 221, Taiwan, R.O.C.

Flash/RTC

Flash/RTC

Flash/RTC

Jedi15"/17" WHL-U

Jedi15"/17" WHL-U

Jedi15"/17" WHL-U

1

25 106

25 106

25 106

of

of

of

A00

A00

A00

Vinafix.com

5

4

3

2

1

Main Func = Thermal Sensor

R2602

1 2

0R0402-PAD

3D3V_S0_THM

DY

12

DY

7718

DY

3D3V_S0_THM

12

12

C2601

7718

SC10U6D3V3MX-DL-GP

NCT7718_DXP

C2606
SC470P50V3JN-2 GP

NCT7718_DXN

C2602
SCD1U16V2KX- 3DLGP

12

C2607
SC2200P50V2KX-2D LGP

7718

12

ALERT#

T_CRIT#

T_CRIT#

R2601
0R0402-PAD

CPU_SMB_SDA _P1

CPU_SMB_SCL_ P1

U2601

1

VDD

2

7718

D+

3

D­T_CRIT#4GND

NCT7718W -GP

74.07718.0B9

2ND = 074.00788.00B9

PLTRST#_CPU

0R2J-L-GP

RESET_OUT #

THERM_SYS_SHD N#

ALERT#

SCL
SDA

8
7
6
5

R2616

1 2

3D3V_S0 3D3V_S0

common parts

Q2601

Note:ZZ.27002.F7C01

1

6

2345

7718

2N7002KDW -1-GP

75.27002.F7C

2nd = 075.27002.0E7C

ALERT#

DY

G

S

84.2N702.J31

2ND = 084.27002.0N31

3D3V_S5

1

23

RN2602
SRN2K2J-5-G P

7718

4

THM_SML1_CLK
THM_SML1_DAT A

Layout Placement Request

Q2602

D

Notice:ZZ.2N70 2.J3101

2N7002K-2-GP

R2607 7K5R2F-1-GP

1 2

7718

12

DY

C2610

SCD1U16V2KX-3GP

THM_SML1_DAT A

THM_SML1_CLK

RESET_OUT #

12

DY

PURE_HW _SHUTD OWN#

Layout Placement Request

C2614

SCD1U16V2KX- 3GP

5V_S0

Close to KBC
VD_IN1 for system thermal sensorClose to Thermal sensor

PWM FAN1

SA 1103

C2604

5V_FAN_VCC

C2605

SCD1U16V2KX-3DLGP

KA

12

12

SC4D7U6D3V3KX-DLGP

DY

83.R5003.H8H

R2613

1 2
1 2

R2614
0R0402-PAD
0R0402-PAD

AFTP2604

FAN_TACH 1_C

1

FAN_PWM 1_C

1

5V_FAN_VCC

1

1 2

R2612

0R0603-PAD

FAN_TACH 1
FAN1_PWM FAN_PWM 1_C

EC2601

SC10P50V2JN-4GP

EC2602

SC10P50V2JN-4GP

12

12

DY

DY

Layout Note:

Signal Routing Guideline:
Trace width = 15mil

D2601

C2603

SC2200P50V2KX-2GP

12

DY

RB551V30-GP

5V_FAN_VCC

FAN_TACH 1_C

1

2nd = 20.F1804.004

3rd = 020.F0097.0004

AFTP2601
AFTP2602
AFTP2603

FAN1

5

1
2

3
4

6

ACES-CON 4-29-GP

20.F1639.004

3D3V_S0

FAN_TACH 124

FAN1_PWM24

CPU_SMB_SDA _P118,24,79

D D

CPU_SMB_SCL_ P118,24,79

PURE_HW _SHUTD OWN#40

PLTRST#_CPU17,61,63,66,76,91

RESET_OUT #17,24

SC 0522

84.T3904.K11

2nd = 84.03904.T11

Q2603

MMBT3904-5-GP- U

C

E

7718

B

2.System Sensor, Put on palm rest

Layout Note:

C2607 close THM2601

C C

Layout Note:

Both DXN and DXP routing 10 mil trace width and 10 mil spacing.

3D3V_S0

1 2

R2603 7K5R2F-1-GP

1 2

R2604 7K5R2F-1-GP

Layout Placement Request

B B

A A

5

4

3

2

Layout Placement Request

Jedi UMA/DIS 2IN1

Jedi UMA/DIS 2IN1

Jedi UMA/DIS 2IN1

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin T ai Wu Rd ., Hsichih,

21F, 88, Sec.1, Hsin T ai Wu Rd ., Hsichih,

21F, 88, Sec.1, Hsin T ai Wu Rd ., Hsichih,
Taipei Hsie n 221, Taiwan, R.O .C.

Taipei Hsie n 221, Taiwan, R.O .C.

Title

Title

Title

INT IO (Thermal/Fan)

INT IO (Thermal/Fan)

INT IO (Thermal/Fan)

Size Document Num ber Rev

Size Document Num ber Rev

Size Document Num ber Rev
A2

A2

A2

Jedi15"/17" WHL-U

Jedi15"/17" WHL-U

Jedi15"/17" WHL-U

Tuesday, January 08, 2019

Tuesday, January 08, 2019

Tuesday, January 08, 2019

Date: Sheet of

Date: Sheet of

Date: Sheet of

Taipei Hsie n 221, Taiwan, R.O .C.

1

26 106

26 106

26 106

A00

A00

A00

Vinafix.com

5

Main Func = Audio

3D3V_S0

D D

C C

B B

HDA_SYNC_CODEC19
HDA_SDOUT_CODEC19
HDA_BITCLK_CODEC19

DMIC_DATA55

AUD_SENSE66

HDA_SDIN0_CPU19

DMIC_CLK55

BEEP24

RING229,66

SPKR15,1 9
LINE1_L29
LINE1_R29

NB_MUTE#24

AUD_SPK_L+29

AUD_SPK_L-29
AUD_SPK_R+29
AUD_SPK_R-29

AUD_HP1_JACK_L2 9

AUD_HP1_JACK_R29

MIC2_VREFO_L2 9
MIC2_VREFO_R29

SLEEVE29,66

PM_SLP_S3#17,40,51

1D8V_S0

3D3V_S0

1D8V_S0

2.5A

5V_S0 5V_PVDD

1 2

R2721

0R0603-PAD

Layout Placement Request

1D8V_S0

SC 0525

1 2

R2710

0R0603-PAD

4

R2725
0R0603-PAD

1 2

R2705 0R2J-L-GP

1 2

DY

Layout Placement Request

Layout Placement Request

R2711

1 2

0R0402-PAD

R2701 0R2J-L-GP

1 2

DY

Layout Placement Request

C2712

SCD1U16V2KX-3DLGP

C2710

C2711

12

12

12

SC10U6D3V3MX-DL-GP

Layout Note:

Close pin41

C2709

SCD1U16V2KX-3DLGP

12

AUD_AGND

Layout Note:

Close pin46

AUD_AGND

12

SC10U6D3V3MX-DL-GP

1D8V_CPVDD

12

C2713

3D3V_1D8V_AVDD

C2701

SCD1U16V2KX-3DLGP

12

3D3V_1D8V_AVDD_IO

C2703

SCD1U16V2KX-3DLGP

12

3D3V_1D8V_AVDD

SCD1U16V2KX-3DLGP

C2708

SC10U6D3V3MX-DL-GP

Close pin 20

C2702

12

C2704

12

1 2

100KR2J-1-GP

R2724

SC10U6D3V3MX-DL-GP

SC10U6D3V3MX-DL-GP

HDA_BITCLK_CODEC

12

EC2701

SC10P50V2JN-4DL GP

EC2709

SC22P50V2JN-4DLGP

AUD_SENSE_A

12

C2725

DY

Close pin6 pin7

3D3V_1D8V_AVDD

12

DY

SCD1U16V2KX-3DLGP

3

3D3V_S0

4

RN2701
SRN2K2J-5-GP

DY

3D3V_AUX_S5

1

2 3

SPK_I2C_DATA
SPK_I2C_CLK

HDA_SDOUT_CODEC COD EC_SDOUT_R

Place close to Pin 1

12

R2715

100KR2J-1-GP

DMIC_DATA

DMIC_CLK

3D3V_1D8V_AVDD

R2714 10KR2J-3-GP

3D3V_1D8V_AVDD

C2726

SCD1U16V2KX-3DLGP

12

RTC_AUX_S5

R2720

1 2

1 2

R2727 0R2J-L-GP

DY

EMC 0627

R2719

1 2

R2713

1 2

R2726

1 2

TP2701

TPAD14-OP-GP

Layout Placement Request

Layout Note:

AUD_SENSE AUD_SENSE_A

200KR2F-L-GP

0702

Layout Placement Request

12

NB_MUTE#

RN2702

2 3

SPKR

1

BEEP

SRN1KJ-7-GP

EC2703
EC2704
EC2706

EC2702
EC2705

EC2707

AUD_AGND

EC2708

Layout Note:

AUD_AGND

R2739 should place nearby code c IC.

1

R2712

moat

1 2
1 2
1 2

1 2
1 2

1 2

1 2

3D3V_1D8V_AVDD_IO

0R0402-PAD

0R0402-PAD
0R0402-PAD
0R0402-PAD

12

Audio_47

4

0R0402-PAD
0R0402-PAD
0R0402-PAD

0R0402-PAD
0R0402-PAD

0R0402-PAD

0R0402-PAD

5V_AVDD

1D8V_CPVDD

5V_PVDD
5V_PVDD

AUX_MODE

HDA_SYNC_CODEC
CODEC_BITCLK_RHDA_BITCLK_CODEC

HDA_CODEC_SDIN0HDA_SDI N0_CPU
DVSS

HDA_SPKR_R

KBC_BEEP_R

U2701

3

DVDD

18

DVDD-IO

40

AVDD1

20

CPVDD/AVDD2

41

PVDD1

46

PVDD2

33

5VSTB/AUX_MODE

6

I2C-DATA

7

I2C-CLK

15

AUDIOLINK_SYNC

14

AUDIOLINK_BCLK

17

AUDIOLINK_SDATA-OUT

16

AUDIOLINK_SDATA-IN

13

DC-DET/EAPD

11

I2S-MCLK

10

I2S-BCLK

12

I2S-LRCK

8

I2S-IN

9

I2S-OUT

48

HP/LINE2-JD(JD1)

47

I2S-IN/I2S-OUT-JD(JD2)

4

GPIO0/DMIC-DATA12

5

GPIO1/DMIC-CLK

1

DMIC-CLK-IN/I2S-EN/SPDI F-OUT/GPIO2/DMIC-DATA34

2

PDB

ALC3254-VA3-CG-GP

071.03254.M001

SA 1102

D2701

2

AUD_PC_BEEP_C

3

1

BAT54C-12-GP

75.00054.A7D

2nd = 75.00054.T7D

20181008 keep 0 ohm

SCD1U16V2KX-3DLGP

12

R2716
10KR2J-3-GP

C2716

1 2

Line2

AUD_PC_BEEP_R

2

PCBEEP

MIC2-L(PORT-F-L)/RI NG2

MIC2-R(PORT-F-R)/SLE EVE

LINE2-L(PORT-E-L)

LINE2-R(PORT-E-R)

SPK-OUT-L+
SPK-OUT-L-

SPK-OUT-R+

SPK-OUT-R-

HPOUT-L(PORT-I-L)

HPOUT-R(PORT-I-R)

LDO1-CAP
LDO2-CAP
LDO3-CAP

MIC2-VREFO-L

MIC2-VREFO-R

MIC2-CAP

CPVEE

AVSS1
AVSS2

1

AUD_PC_BEEP_R

34
30

RING2

31

SLEEVE
LINE1_L

36

LINE1_R

35

AUD_SPK_L+

42

AUD_SPK_L-

43

AUD_SPK_R+

45

AUD_SPK_R-

44

AUD_HP1_JACK_L

27

AUD_HP1_JACK_R

26

AUD_VREF

38

VREF

LDO1_CAP

39

LDO2_CAP

21

LDO3_CAP

19

MIC2_VREFO_L

28

MIC2_VREFO_R

29

MIC_CAP

32
25

CPVEE

23

CBP

CBP

24

CBN

CBN

37
22

49

GND

12

C2721 SC2D2U10V3KX-1 DLGP-U

12

C2718 SC10U6D3V3MX-DL -GP

1 2

C2720 SC10U6D3V3MX-DL -GP

1 2

C2719 SC10U6D3V3MX-DL -GP

1 2

C2724 SC1U25V3KX-1-D LGP

1 2

C2723 SC1U25V3KX-1-D LGP

moat

1 2

R2704 0R060 3-PAD

C2715

SCD1U16V2KX-3DLGP

12

12

C2714

Layout Note:

Place close to Pin 40

AUD_AGND

SC10U6D3V3MX-DL-GP

Layout Placement Request

Width>40mil, to improve Headpo hone Crosstalk noise

Layout Note:

Change it to sharp will be bet ter.
Add 2 vias (>0.5A) when trace layer change.

Layout Note:

Speaker trace width >40mil @ 2 W4ohm speaker power

AUD_AGND

AUD_AGND

AUD_AGND

AUD_AGND

SB 0329

AUD_AGND
AUD_AGND

5V_S05V_AVDD

12

C2717 SC10U6D3V3MX-DL -GP

12

R2718 100KR2J-1 -GP

AUD_AGND

COMMON PARTS

084.03415.0031

2nd = 084.02421.0031

12

1D8V_EN#

R2723
10KR2J-3-GP

1 2

R2702

20KR2J-L2-GP

150mA

12

1D8V_EN_R#

C2705
SC1U25V3KX-1-DLGP

C2707

SCD1U16V2KX-3DLGP

12

2nd = 084.27002.0N31

4

Q2701

G

S

Notice:ZZ.2N702.J3101

2N7002K-2-GP

84.2N702.J31

D

A A

5

PM_SLP_S3#

1D8V_S01D8V_S5

PJA3415-GP
Q2702

DS

G

Layout Placement Request

Jedi UMA/DIS 2IN1

Jedi UMA/DIS 2IN1

Jedi UMA/DIS 2IN1

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

3

2

Date: Sheet of

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Se c.1, Hsin Tai W u Rd., Hsichih,

21F, 88, Se c.1, Hsin Tai W u Rd., Hsichih,

21F, 88, Se c.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Audio (Codec ALC3254)

Audio (Codec ALC3254)

Audio (Codec ALC3254)

Jedi15"/17" WHL-U

Jedi15"/17" WHL-U

Jedi15"/17" WHL-U

1

27 106Tuesday, January 08, 20 19

27 106Tuesday, January 08, 20 19

27 106Tuesday, January 08, 20 19

A00

A00

A00

Vinafix.com

5

4

3

2

1

(Blanking)

D D

C C

B B

A A

Jedi UMA/DIS 2IN1

Jedi UMA/DIS 2IN1

Jedi UMA/DIS 2IN1

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

A1

A1

A1

Date: Sheet

Date: Sheet

5

4

3

2

Date: Sheet

1

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Audio (RSVD) (Audio AMP)

Audio (RSVD) (Audio AMP)

Audio (RSVD) (Audio AMP)

Jedi15"/17" WHL-U

Jedi15"/17" WHL-U

Jedi15"/17" WHL-U

28 106Tuesday, January 08, 2019

28 106Tuesday, January 08, 2019

28 106Tuesday, January 08, 2019

A00

A00

A00

of

of

of

Vinafix.com

5

4

3

2

1

Main Func = Audio

SPK_ID21

AUD_SPK_L+27
AUD_SPK_L-27
AUD_SPK_R-27

D D

AUD_SPK_R+27

MIC2_VREFO_R27
MIC2_VREFO_L27

RING227,66

LINE1_L27

LINE1_R27

SLEEVE27,66

Layout Note:

Speaker trace width >40mil @ 2W4ohm speaker power

AUD_SPK_L+

AUD_SPK_L-

EMC 0627

R2919
R2920

R2921
R2922

1 2
1 2

1 2
1 2

0R0402-PAD
0R0402-PAD

0R0402-PAD
0R0402-PAD

AUD_SPK_L+_C
AUD_SPK_L-_C

AUD_SPK_R- _CAUD_SPK_R­AUD_SPK_R+_ CAUD_SPK_R+

EC2906

12

SC1KP50V2KX-1DLGP

Speaker

12

EC2905

SC1KP50V2KX-1DLGP

EC2907

SPK1

7
1
2

3
4

SPK_ID

5
6

8

ACES-CON 6-20-GP-U

12

12

EC2908

SC1KP50V2KX-1DLGP

SC1KP50V2KX-1DLGP

20.F1639.006

2nd = 20.F1804.006

AFTP TESTPOINT

AUD_SPK_L-_C

1

AUD_SPK_L+_C
AUD_SPK_R- _C

AUD_SPK_R+_ C

AUD_HP1_JAC K_L27

AUD_HP1_JAC K_R27

SPK_ID

AFTP2901

1

AFTP2902

1

AFTP2903

1

AFTP2904

1

AFTP2911

CONN Pin

Net name

Pin1

SPK_L+

Pin2 SPK_L-

SPK_R-

Pin3

SPK_R+

Pin4
Pin5

SPK_DET#

Pin6 GND

SPK_ID 1: FG
0: Veci

C C

B B

AUD_SENSE27,66

MIC2_VREFO_R
MIC2_VREFO_L

AUD_HP1_JAC K_L166

RING2_R27,66

SLEEVE_R27,66

AUD_HP1_JAC K_R166

Line2 ->

Line2 ->

RING2
AUD_HP1_JAC K_L
LINE1_L

C2901

LINE1_R

C2902

SLEEVE

LINE1-L_C

1 2

SC10U6D3V3MX- DL-GP

LINE1-L_R

1 2

SC10U6D3V3MX- DL-GP

RN2901

1

4

2 3

SRN2K2J-5-G P

1 2

R2915 0R0603-PAD

R2918

1 2

0R0402-PAD

1 2

R2916 0R0603-PAD

R2917

1 2

0R0402-PAD

AUD_HP1_JAC K_L1

AUD_HP1_JAC K_R1AUD_HP1_JAC K_R

RING2_R

SLEEVE_R

A A

<Core Desig n>

<Core Desig n>

<Core Desig n>

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin T ai Wu Rd ., Hsichih,

21F, 88, Sec.1, Hsin T ai Wu Rd ., Hsichih,

21F, 88, Sec.1, Hsin T ai Wu Rd ., Hsichih,
Taipei Hsie n 221, Taiwan, R.O .C.

Taipei Hsie n 221, Taiwan, R.O .C.

Title

Title

Title

Audio IO

Audio IO

Audio IO

Size Document Num ber Rev

Size Document Num ber Rev

Size Document Num ber Rev
A2

A2

A2

Jedi15"/17" WHL-U

Jedi15"/17" WHL-U

Jedi15"/17" WHL-U

Tuesday, January 08, 2019

Tuesday, January 08, 2019

Tuesday, January 08, 2019

Date: Sheet of

Date: Sheet of

5

4

3

2

Date: Sheet of

Taipei Hsie n 221, Taiwan, R.O .C.

1

29 106

29 106

29 106

A00

A00

A00

Vinafix.com

5

D D

C C

4

3

2

1

B B

A A

5

4

3

2

Jedi UMA/DIS 2IN1

Jedi UMA/DIS 2IN1

Jedi UMA/DIS 2IN1

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev
A3

A3

A3
Date: Sheet of

Date: Sheet of

Date: Sheet of

Audio (RSVD)

Audio (RSVD)

Audio (RSVD)

Jedi15"/17" WHL-U

Jedi15"/17" WHL-U

Jedi15"/17" WHL-U

Tuesday, January 08, 2019

Tuesday, January 08, 2019

Tuesday, January 08, 2019

30 106

30 106

30 106

1

A00

A00

A00