Dell 5300 Schematics

5

Vinafix.com

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BANDON/NorthBay 13" Schematics Document

D D

Whiskey Lake -U 42

2019-02-12

C C

REV:A00

DY : None Installed
WWAN:For WWAN installed

B B

LAN:For LAN Installed
Sensor:For Sensor Installed
Debug:For Debug Port installed

<Core Design>

<Core Design>

<Core Design>

A A

5

Title

Titl e

Titl e

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

A4

A4

A4

Date: Sheet of

Date: Sheet of

4

3

Date: Sheet of

2

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Cover Page

Cover Page

Cover Page

Bandon / NorthBay 13''

Bandon / NorthBay 13''

Bandon / NorthBay 13''

1 106Friday, February 15, 2019

1 106Friday, February 15, 2019

1 106Friday, February 15, 2019

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Project code : 4PD0G3010001
PCB P/N : 18717
Revision : -1

NON_TBT_CONFIG

D D

TMDS

DDI/USB3.1

HDMI 1.4b

TMDS

HDMI Level Shift

PS8407A

Retiming Switch

PS8802QFN52GTR

ALPINE RIDGE

JHL6340

57

Type C Connector

TBT3 / USB3.1 / DP 1.2

73

C C

TBT_CONFIG

WINBOND
W25Q80DVSSIG

USB2.0 / I2C

CC control pin

WINBOND
W25Q80DVSSIG

B B

72

Micro SIM

SPIFlash ROM

71

Type C PD

TI
TPS65982DC

SPIFlash ROM

M.2 2230 Hybrid Key E

WLAN+BT

802.11ac / BT 5.0
support CNVi / Discrete mode

M.2 3042 KEY B

WWAN/LTE/SSD

62

De-pop on Bandon

Connector
RJ45

SD 4.0

A A

5

32

33

LOM

Intel
WGI219LM-vPRO

WGI219V-Non-vPRO

Card Reader

Realtek
RTS5242

M.2 2280 KEY M

SSD

4

EDP 1.4eDP 13" Panel

55

I2CTouch Panel

55

DDI1

57

DDI2

71

USB3.1 [1] GEN2

DDI1

DDI2

PCIE[5] PCIE GEN2

PCIE[6] PCIE GEN2

PCIE[7] PCIE GEN2

71

PCIE[8] PCIE GEN2

From EC

I2C

USB2.0 [1]

72

USB2.0 [10]

PCIE[10] PCIE GEN2

CNVI

61

USB2.0 [7]

SATA[1] SATA GEN3/
PCIE [12] PCIE Gen2

USB3.1 [4] GEN1

62

PCIE [9] PCIE GEN1

97

PCIE [11] PCIE GEN2Connector

33

PCIE[13] PCIE GEN3

PCIE[14] PCIE GEN3

PCIE[15] PCIE GEN3

PCIE[16] PCIE GEN3/

63

SATA[2] SATA GEN3

4

Intel CPU

WHISKEY LAKE-U 42

WHL U PCH-LP

16 PCIe* Lanes

3 SATA Lanes

6 USB3.1 Gen1/Gen2 Lanes

5 GbE Lanes

2 Remapped PCIe* storage

3,4,5,6,7,8,9,10,11,15
16,17,18,19,20,21,22,23

3

DDR4 Channel A

DDR4 Channel B

USB2.0 [3]

USB3.1 [3] GEN1

USB2.0 [2]

USB3.1 [2] GEN1

USB2.0 [6]

HDA

SPI

eSPI

GPIO

GPIO

USB2.0 [9][RESV]

USH BD

From EC

SMBUS

USB2.0 [8]

Accelerometer

ST
LNG2DMTR

I2C

3

DDR4 2400
SODIMM A

DDR4 2400
SODIMM B

USB PowerShare

SILEGO
SLGC55544CVTR

Internal Digital MIC

Camera

Audio Codec

RealTek
ALC3254

Flash ROM

WSON
Winbond
W25Q64JVZEIQ (8MB) non-Vpro SKU
W25Q256JVEIQ (32MB) Vpro SKU

Flash ROM

SOP8
Winbond
W25Q128JVSIQ (16MB) non-Vpro

TPM 2.0

ST
ST33TPHF2XSPI
[Co-lay Nuvoton 750]

EC

SMSC
MEC 5106

12

13

NON-INTERLEAVE MODE

36

27

24

KB/TP Conn

65

Hall sensor

BANDON
TCS40DLR

NORTHBAY
APX8131A

LED BD

Finger Printer

92

CV3 Lynx Controller

Broadcom
BCM58202

E-compass

ST
LIS2MDLTR

70

2

1

Bandon/Northbay 13" Block Diagram

Charger
ISL9538HRTZ-GP-U

USB2.0 [3]

55

Universal Jack

25

25

91

Thermal & Fan

67

64

USB2.0

FLASH ROM

SOP8 6*5
Winbond
MX25L12872FM2I(16MB)

66

SmartCard IC

NXP
TDA8034HN

Accelerometer + Gyro

ST
LSM6DS3USTR

USB3.1 / PowerShare

USB Port : 2

USB3.1

USB Port : 1

( 2W, 4ohm /channel )
2CH Speaker

eSPI debug port

26

2

De-pop on NorthBay

35

35

RFID/NFC

RFID Antenna

Connector
Smart Card

P-sensor

SEMTECH
SX9310

Sensor BD

INPUTS
AD+

BT+

SYSTEM DC/DC
SY8288BRAC/SY8288CRAC
INPUTS

DCBATOUT

CPU DC/DC
FDMF3035-GP
INPUTS
DCBATOUT

CPU DC/DC
ISL95808HRZ-T-1-GP
INPUTS
DCBATOUT

SYSTEM DC/DC
SY8288RAC
INPUTS
DCBATOUT

SYSTEM DC/DC
AOZ2260QI-10-GP
INPUTS
DCBATOUT

SYSTEM DC/DC
RT6542AGQW-GP

INPUTS

Load Switches

INPUTS

3D3V_S5

68

3D3V_S0

5V_S5 5V_S0

5V_S0

1D8V_S5 1D8V_S0

1D2V_S3 0D6V_S0

1D05V_S5

PCB LAYER(FR4-10 Layer)

L1:Top
L2:GND
L3:Signal
L4:GND
L5:Signal

<Core Design>

<Core Design>

<Core Design>

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

A2

A2

A2

Date: Sheet of

Date: Sheet of

Date: Sheet of

OUTPUTS

DCBATOUT

OUTPUTS
3D3V_AUX_S5
3D3V_S5
5V_AUX_S5
5V_S5

OUTPUTS
1V_VCCGT

OUTPUTS
1V_VCCSA

OUTPUTS
1D2V_S3

OUTPUTS
1D05V_S5

OUTPUTS

1D05V_VCCPRIM_COREDCBATOUT

OUTPUTS

3D3V_S5_PCH
3D3V_LAN
3D3V_S5_WWAN
3D3V_S5_WLAN
2D5V_S3
1D8V_S5
VCDVDD_FUSE
3D3V_S0

+3V_AVDD
3D3V_CAMERA_S0
3D3V_S0_SATA

1D05V_VCCIO

+5V_PVDD
5V_TSP_S0
5V_HDMI

1D2V_VCCPLL_OC

1D05V_VCCST
1D05V_VCCSTG

L6:Signal
L7:GND/PWR
L8:Signal
L9:GND
L10:Bottom

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, T aiwan, R.O.C.

Taipei Hsien 221, T aiwan, R.O.C.

Taipei Hsien 221, T aiwan, R.O.C.

Block Diagram

Block Diagram

Block Diagram

Bandon / NorthBay 13 ''

Bandon / NorthBay 13 ''

Bandon / NorthBay 13 ''

1

44

45

47

50

51

52

54

X00

X00

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2 106Friday, February 15, 2019

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Main Func = CPU

TP309

TPAD14-OP-GP

PECI_CPU[24]

PROCHOT#_CPU[24,43,44,46]

D D

C C

1D8V_S0

B B

3D3V_SUS

12

DY

12

THERMTRIP#_CPU[24]

BPM_N0[99]
BPM_N1[99]

CPU_JTAG_TCK[99]

CPU_JTAG_TDI[99]

CPU_JTAG_TDO[99]

CPU_JTAG_TMS[99]

CPU_JTAG_TRST#[99]

CPU_JTAG_PRDY#[99]

CPU_JTAG_PREQ#[99]

PCH_JTAG_TCK[99]

H_CPUPWRGD[17]

TOUCH_SCREEN_PD#_R[55]

TOUCHPAD_INTR#[24,65]

TOUCH_SCREEN_DET#[55]

3D3V_S0

R308 10KR2F-2-GP

1 2

R309 10KR2F-2-GP

1

DY

1

R313

DY

R314
10KR2F-2-GP

MEM_INTERLEAVED

R315
10KR2F-2-GP

2

10KR2F-2-GP

2

TPAD14-OP-GP

TPAD14-OP-GP

TOUCHPAD_INTR#

TOUCH_SCREEN_PD#

On_LCD_SIDE

TP310

TP311

TOUCH_SCREEN_PD#_R TOUCH_SCREEN_PD#

TOUCH_SCREEN_PD#_R

TOUCH_SCREEN_PD#

1

CATERR#
PECI_CPU
PROCHOT#_CPU_R
THERMTRIP#_CPU

BPM_N0
BPM_N1
BPM_N2

1

BPM_N3

1

MEM_INTERLEAVED
TOUCH_SCREEN_PD#
TOUCHPAD_INTR#
TOUCH_SCREEN_DET#

CPU_POPIRCOMP

12

R30549D9R2F-GP
R30449D9R2F-GP

PCH_POPIRCOMP

12

AA4
AR1

Y 4

BJ1

U1
U2
U3
U4

CE9

CN3
CB34
CC35

BP27

BW25

R302
100R2F-L1-GP-U

1 2

PQ4305

Note:ZZ.27002.F7C01

6

5

1

DY

2

34

2N7002KDW-1-GP

CATERR#
PECI
PROCHOT#
THRMTRIP#

BPM#0
BPM#1
BPM#2
BPM#3

GPP_E3/CPU_GP0
GPP_E7/CPU_GP1
GPP_B3/CPU_GP2
GPP_B4/CPU_GP3

PROC_POPIRCOMP
PCH_OPIRCOMP

WHISKEY-LAKE-GP

ZZ.00CPU.271

TOUCH_SCREEN_PD#_Q

75.27002.F7C

1D05V_VCCSTG

12

R306
1KR2J-1-GP

Rb [PECI] and [PROCHOT#]

R307

499R2F-2-GP

1 2

Ra

Impedance control: 50 ohm

PROCHOT#_CPU_RPROCHOT#_CPU

4 OF 20CPU1D

PROC_TCK

PROC_TDI
PROC_TDO
PROC_TMS

PROC_TRST#

PCH_TCK

PCH_TDI
PCH_TDO
PCH_TMS

PCH_TRST#
PCH_JTAGX

PROC_PREQ#
PROC_PRDY#

T6
U6
Y 5
T5
AB6

W6
U5
W5
P5
Y 6
P6

W2
W1

3D3V_S0

1

DY

R303
10KR2F-2-GP

CPU_JTAG_TCK
CPU_JTAG_TDI
CPU_JTAG_TDO
CPU_JTAG_TMS
CPU_JTAG_TRST#

PCH_JTAG_TCK

CPU_JTAG_PREQ#
CPU_JTAG_PRDY#

2

<Core Design>

<Core Design>

<Core Design>

1D05V_VCCSTG

1 2

1

DY

1

DEBUG

2 3

1 2

2 3

DY

1

THERMTRIP#_CPU

H_CPUPWRGD

R323
100R2F-L1-GP-U

R320
51R2J-2-GP

RN302

SRN51J-GP

R319
51R2J-2-GP

RN304

SRN51J-GP

CPU_JTAG_TDO

CPU_JTAG_PREQ#

2

CPU_JTAG_TDI

4

CPU_JTAG_TMS

CPU_JTAG_TCK

CPU_JTAG_TRST#
PCH_JTAG_TCK

4

#544669 CRB Rev0.52

1D05V_VCCST

12

R310
1KR2J-1-GP

2

1

ED301

DY

3

AZ5125-02S-R7G-GP

75.05125.07D

A A

DIMM_TYPE

LOW

NON_INTERLEAVED

5

HIGH

INTERLEAVED

M1,2,3,4,5: <3 inches
M6: 1-11 inches
MCPU: 0.3-1.5 inches
Mt <0.3 mils
Main route(M1+M2+M3+M4+M5+M6+MCPU): 1-12 inches

4

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Title

Titl e

Titl e

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

A4

A4

A4

Date: Sheet of

Date: Sheet of

Date: Sheet of

(Reserved)

(Reserved)

(Reserved)

2

Bandon / NorthBay 13''

Bandon / NorthBay 13''

Bandon / NorthBay 13''

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

3 106Friday, February 15, 2019

3 106Friday, February 15, 2019

3 106Friday, February 15, 2019

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Main Func = CPU

DP to HDMI

Edp

D D

eDP_TX_CPU_N0[55]
eDP_TX_CPU_P0[55]
eDP_TX_CPU_N1[55]
eDP_TX_CPU_P1[55]

eDP_AUX_CPU_N[55]
eDP_AUX_CPU_P[55]

EDP_HPD[55]

eDP_BLEN_CPU[55]
eDP_BLCTRL_CPU[55]
eDP_VDDEN_CPU[55]

DP to MUX

575412

DP to HDMI

HDMI_DDI_TX_N2[57]
HDMI_DDI_TX_P2[57]
HDMI_DDI_TX_N1[57]

C C

HDMI_DDI_TX_P1[57]
HDMI_DDI_TX_N0[57]
HDMI_DDI_TX_P0[57]
HDMI_DDI_TX_N3[57]
HDMI_DDI_TX_P3[57]

HDMI_DET_CPU[57]

HDMI_SCL_CPU[57]
HDMI_SDA_CPU[57]

R401
24D9R2F-L-GP

PH/PL on TBT Page

DP to AR

DP2_DDI_TX_N0[71]
DP2_DDI_TX_P0[71]

B B

DP2_DDI_TX_N1[71]
DP2_DDI_TX_P1[71]
DP2_DDI_TX_N2[71]
DP2_DDI_TX_P2[71]
DP2_DDI_TX_N3[71]
DP2_DDI_TX_P3[71]

DP2_AUX_CPU_P[71]
DP2_AUX_CPU_N[71]

DP2_HPD_CPU[71,72]

3D3V_S0

1

DY

1 2

4

R411
2K2R2F-GP

2

R412
2K2R2F-GP

HDMI_DDI_TX_N2
HDMI_DDI_TX_P2
HDMI_DDI_TX_N1
HDMI_DDI_TX_P1
HDMI_DDI_TX_N0
HDMI_DDI_TX_P0
HDMI_DDI_TX_N3
HDMI_DDI_TX_P3

DP2_DDI_TX_N0
DP2_DDI_TX_P0
DP2_DDI_TX_N1
DP2_DDI_TX_P1
DP2_DDI_TX_N2
DP2_DDI_TX_P2
DP2_DDI_TX_N3
DP2_DDI_TX_P3

0D95V_VCCIO

1 2

eDP_RCOMP_CPU

HDMI_SCL_CPU
HDMI_SDA_CPU

CPU_DP2_CTRL_CLK
CPU_DP2_CTRL_DATA

CPU_DP2_CTRL_CLK
CPU_DP2_CTRL_DATA

3

AL5

DDI1_TXN0

AL6

DDI1_TXP0

AJ5

DDI1_TXN1

AJ6

DDI1_TXP1

AF6

DDI1_TXN2

AF5

DDI1_TXP2

AE5

DDI1_TXN3

AE6

DDI1_TXP3

AC4

DDI2_TXN0

AC3

DDI2_TXP0

AC1

DDI2_TXN1

AC2

DDI2_TXP1

AE4

DDI2_TXN2

AE3

DDI2_TXP2

AE1

DDI2_TXN3

AE2

DDI2_TXP3

GPP_E13/DDPB_HPD0/DISP_MISC0
GPP_E14/DDPC_HPD1/DISP_MISC1
GPP_E15/DPPD_HPD2/DISP_MISC2
GPP_E16/DPPE_HPD3/DISP_MISC3

GPP_E17/EDP_HPD/DISP_MISC4

AM6

DISP_RCOMP

CC8

GPP_E18/DPPB_CTRLCLK/CNV_BT_HOST_WAKE#

CC9

GPP_E19/DPPB_CTRLDATA

CH4

GPP_E20/DPPC_CTRLCLK

CH3

GPP_E21/DPPC_CTRLDATA

CP4

GPP_E22/DPPD_CTRLCLK

CN4

GPP_E23/DPPD_CTRLDATA

CR26

GPP_H16/DDPF_CTRLCLK

CP26

GPP_H17/DDPF_CTRLDATA

WHISKEY-LAKE-GP

ZZ.00CPU.271

1 OF 20CPU1A

EDP_TXN0
EDP_TXP0
EDP_TXN1
EDP_TXP1
EDP_TXN2
EDP_TXP2
EDP_TXN3
EDP_TXP3

EDP_AUX_N
EDP_AUX_P

DISP_UTILS

DDI1_AUX_N
DDI1_AUX_P
DDI2_AUX_N
DDI2_AUX_P
DDI3_AUX_N
DDI3_AUX_P

EDP_BKLTEN

EDP_VDDEN

EDP_BKLTCTL

AG4
AG3
AG2
AG1
AJ4
AJ3
AJ2
AJ1

AH4
AH3

AM7

AC7
AC6
AD4
AD3
AG7
AG6

CN6
CM6
CP7
CP6
CM7

CK11
CG11
CH11

3D3V_S5_PCH

3D3V_S5_PCH

<Core Design>

<Core Design>

<Core Design>

2

eDP_TX_CPU_N0
eDP_TX_CPU_P0
eDP_TX_CPU_N1
eDP_TX_CPU_P1

eDP_AUX_CPU_N
eDP_AUX_CPU_P

DP2_AUX_CPU_N
DP2_AUX_CPU_P

HDMI_DET_CPU_R
DP2_HPD_CPU_R

FFS_INT2
EDP_HPD

eDP_BLEN_CPU
eDP_VDDEN_CPU
eDP_BLCTRL_CPU

12

R406
10KR2J-3-GP

HDMI_DET_CPU_P

12

R408
10KR2J-3-GP

CPU_DP2_HPD_P

For TYPEC

TP401

1

TPAD14-OP-GP

Q401

1

2

3 4

2N7002KDW-1-GP

75.27002.F7C

Q402

1

2

3 4

2N7002KDW-1-GP

75.27002.F7C

3D3V_S5_PCH

12

Note:ZZ.27002.F7C01

6

5

3D3V_S5_PCH

12

Note:ZZ.27002.F7C01

6

5

1

R405
10KR2J-3-GP

HDMI_DET_CPU_R

HDMI_DET_CPU

100KR2J-1-GP

R407
10KR2J-3-GP

DP2_HPD_CPU_R

DP2_HPD_CPU

100KR2J-1-GP

R403

1 2

R410

1 2

A A

5

Title

Titl e

Titl e

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

A4

A4

A4

Date: Sheet of

Date: Sheet of

4

3

Date: Sheet of

CPU_(JTAG/CPU SIDE BAND)

CPU_(JTAG/CPU SIDE BAND)

CPU_(JTAG/CPU SIDE BAND)

2

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Bandon / NorthBay 13''

Bandon / NorthBay 13''

Bandon / NorthBay 13''

4 106Friday, February 15, 2019

4 106Friday, February 15, 2019

4 106Friday, February 15, 2019

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X00

X00

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DDR4 ball type: NON- Interleaved TypeMain Func = CPU

M_A_DQ[63:0][12]

D D

C C

M_A_BA0[12]
M_A_BA1[12]

M_A_BG0[12]
M_A_BG1[12]

M_A_A[16:0][12]

B B

M_A_DQS_DN[7:0][12]

M_A_DQS_DP[7:0][12]

M_A_PARITY[12]

M_A_ACT_N[12]

M_A_ALERT_N[12]

V_SM_VREF_CNTA[12]
V_SM_VREF_CNTB[13]

A A

VTT_CNTL[51]

SM_DRAMRST#[12,13]

M_A_DQ46
M_A_DQ43
M_A_DQ42
M_A_DQ45
M_A_DQ47
M_A_DQ44
M_A_DQ41
M_A_DQ40
M_A_DQ61
M_A_DQ57
M_A_DQ56
M_A_DQ59
M_A_DQ60
M_A_DQ63
M_A_DQ58
M_A_DQ62
M_A_DQ38
M_A_DQ35
M_A_DQ39
M_A_DQ37
M_A_DQ34
M_A_DQ32
M_A_DQ36
M_A_DQ33
M_A_DQ49
M_A_DQ52
M_A_DQ48
M_A_DQ50
M_A_DQ53
M_A_DQ51
M_A_DQ55
M_A_DQ54
M_A_DQ26
M_A_DQ25
M_A_DQ30
M_A_DQ31
M_A_DQ27
M_A_DQ29
M_A_DQ28
M_A_DQ24
M_A_DQ13
M_A_DQ8
M_A_DQ9
M_A_DQ11
M_A_DQ12
M_A_DQ14
M_A_DQ10
M_A_DQ15
M_A_DQ23
M_A_DQ22
M_A_DQ19
M_A_DQ21
M_A_DQ18
M_A_DQ16
M_A_DQ20
M_A_DQ17
M_A_DQ6
M_A_DQ2
M_A_DQ1
M_A_DQ3
M_A_DQ4
M_A_DQ0
M_A_DQ5
M_A_DQ7

M_A_CLK#0[12]

M_A_CLK0[12]

M_A_CLK#1[12]

M_A_CLK1[12]

M_A_CKE0[12]
M_A_CKE1[12]

M_A_CS#0[12]
M_A_CS#1[12]

M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15
M_A_A16

M_A_ODT0[12]
M_A_ODT1[12]

M_A_DQS_DN0
M_A_DQS_DN1
M_A_DQS_DN2
M_A_DQS_DN3
M_A_DQS_DN4
M_A_DQS_DN5
M_A_DQS_DN6
M_A_DQS_DN7

M_A_DQS_DP0
M_A_DQS_DP1
M_A_DQS_DP2
M_A_DQS_DP3
M_A_DQS_DP4
M_A_DQS_DP5
M_A_DQS_DP6
M_A_DQS_DP7

5

M_B_DQ[63:0][13]

M_B_BA0[13]
M_B_BA1[13]

M_B_BG0[13]
M_B_BG1[13]

M_B_A[16:0][13]

M_B_DQS_DN[7:0][13]

M_B_DQS_DP[7:0][13]

M_B_PARITY[13]

M_B_ACT_N[13]

M_B_ALERT_N[13]

M_B_DQ46
M_B_DQ42
M_B_DQ43
M_B_DQ45
M_B_DQ47
M_B_DQ44
M_B_DQ40
M_B_DQ41
M_B_DQ57
M_B_DQ63
M_B_DQ60
M_B_DQ62
M_B_DQ59
M_B_DQ61
M_B_DQ58
M_B_DQ56
M_B_DQ33
M_B_DQ36
M_B_DQ35
M_B_DQ38
M_B_DQ39
M_B_DQ37
M_B_DQ32
M_B_DQ34
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ55
M_B_DQ51
M_B_DQ53
M_B_DQ52
M_B_DQ54
M_B_DQ31
M_B_DQ27
M_B_DQ30
M_B_DQ24
M_B_DQ26
M_B_DQ25
M_B_DQ29
M_B_DQ28
M_B_DQ19
M_B_DQ21
M_B_DQ17
M_B_DQ20
M_B_DQ23
M_B_DQ22
M_B_DQ16
M_B_DQ18
M_B_DQ14
M_B_DQ13
M_B_DQ15
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ8
M_B_DQ12
M_B_DQ4
M_B_DQ3
M_B_DQ1
M_B_DQ0
M_B_DQ5
M_B_DQ2
M_B_DQ6
M_B_DQ7

M_B_CLK#0[13]

M_B_CLK0[13]

M_B_CLK#1[13]

M_B_CLK1[13]

M_B_CKE0[13]
M_B_CKE1[13]

M_B_CS#0[13]
M_B_CS#1[13]

M_A_DQ[0:7]0

M_A_DQ[8:15]1

M_A_DQ[32:39]4

5 M_A_DQ[40:47]

0

M_B_DQ[0:7]

M_B_DQ[8:15]1

4

M_B_DQ[32:39]

M_B_DQ[40:47]

5

M_A_DQ[16:23]2

M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15
M_B_A16

M_B_ODT0[13]
M_B_ODT1[13]

M_B_DQS_DN0
M_B_DQS_DN1
M_B_DQS_DN2
M_B_DQS_DN3
M_B_DQS_DN4
M_B_DQS_DN5
M_B_DQS_DN6
M_B_DQS_DN7

M_B_DQS_DP0
M_B_DQS_DP1
M_B_DQS_DP2
M_B_DQS_DP3
M_B_DQS_DP4
M_B_DQS_DP5
M_B_DQS_DP6
M_B_DQS_DP7

M_A_DQ[24:31]3

M_A_DQ[48:55]

6

M_A_DQ[56:63]

7

M_B_DQ[16:23]2

M_B_DQ[24:31]

3

M_B_DQ[48:55]6

M_B_DQ[56:63]

7

4

M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ14
M_B_DQ13
M_B_DQ15
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47

M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63

CPU1B

A26

DDR0_DQ0/DDR0_DQ0

D26

DDR0_DQ1/DDR0_DQ1

D28

DDR0_DQ2/DDR0_DQ2

C28

DDR0_DQ3/DDR0_DQ3

B26

DDR0_DQ4/DDR0_DQ4

C26

DDR0_DQ5/DDR0_DQ5

B28

DDR0_DQ6/DDR0_DQ6

A28

DDR0_DQ7/DDR0_DQ7

B30

DDR0_DQ8/DDR0_DQ8

D30

DDR0_DQ9/DDR0_DQ9

B33

DDR0_DQ10/DDR0_DQ10

D32

DDR0_DQ11/DDR0_DQ11

A30

DDR0_DQ12/DDR0_DQ12

C30

DDR0_DQ13/DDR0_DQ13

B32

DDR0_DQ14/DDR0_DQ14

C32

DDR0_DQ15/DDR0_DQ15

H37

DDR0_DQ16/DDR0_DQ32

H34

DDR0_DQ17/DDR0_DQ33

K34

DDR0_DQ18/DDR0_DQ34

K35

DDR0_DQ19/DDR0_DQ35

H36

DDR0_DQ20/DDR0_DQ36

H35

DDR0_DQ21/DDR0_DQ37

K36

DDR0_DQ22/DDR0_DQ38

K37

DDR0_DQ23/DDR0_DQ39

N36

DDR0_DQ24/DDR0_DQ40

N34

DDR0_DQ25/DDR0_DQ41

R37

DDR0_DQ26/DDR0_DQ42

R34

DDR0_DQ27/DDR0_DQ43

N37

DDR0_DQ28/DDR0_DQ44

N35

DDR0_DQ29/DDR0_DQ45

R36

DDR0_DQ30/DDR0_DQ46

R35

DDR0_DQ31/DDR0_DQ47

AN35

DDR0_DQ32/DDR1_DQ0

AN34

DDR0_DQ33/DDR1_DQ1

AR35

DDR0_DQ34/DDR1_DQ2

AR34

DDR0_DQ35/DDR1_DQ3

AN37

DDR0_DQ36/DDR1_DQ4

AN36

DDR0_DQ37/DDR1_DQ5

AR36

DDR0_DQ38/DDR1_DQ6

AR37

DDR0_DQ39/DDR1_DQ7

AU35

DDR0_DQ40/DDR1_DQ8

AU34

DDR0_DQ41/DDR1_DQ9

AW35

DDR0_DQ42/DDR1_DQ10

AW34

DDR0_DQ43/DDR1_DQ11

AU37

DDR0_DQ44/DDR1_DQ12

AU36

DDR0_DQ45/DDR1_DQ13

AW36

DDR0_DQ46/DDR1_DQ14

AW37

DDR0_DQ47/DDR1_DQ15

BA35

DDR0_DQ48/DDR1_DQ32

BA34

DDR0_DQ49/DDR1_DQ33

BC35

DDR0_DQ50/DDR1_DQ34

BC34

DDR0_DQ51/DDR1_DQ35

BA37

DDR0_DQ52/DDR1_DQ36

BA36

DDR0_DQ53/DDR1_DQ37

BC36

DDR0_DQ54/DDR1_DQ38

BC37

DDR0_DQ55/DDR1_DQ39

BE35

DDR0_DQ56/DDR1_DQ40

BE34

DDR0_DQ57/DDR1_DQ41

BG35

DDR0_DQ58/DDR1_DQ42

BG34

DDR0_DQ59/DDR1_DQ43

BE37

DDR0_DQ60/DDR1_DQ44

BE36

DDR0_DQ61/DDR1_DQ45

BG36

DDR0_DQ62/DDR1_DQ46

BG37

DDR0_DQ63/DDR1_DQ47

WHISKEY-LAKE-GP

ZZ.00CPU.271

J22

DDR1_DQ0/DDR0_DQ16

H25

DDR1_DQ1/DDR0_DQ17

G22

DDR1_DQ2/DDR0_DQ18

H22

DDR1_DQ3/DDR0_DQ19

F25

DDR1_DQ4/DDR0_DQ20

J25

DDR1_DQ5/DDR0_DQ21

G25

DDR1_DQ6/DDR0_DQ22

F22

DDR1_DQ7/DDR0_DQ23

D22

DDR1_DQ8/DDR0_DQ24

C22

DDR1_DQ9/DDR0_DQ25

C24

DDR1_DQ10/DDR0_DQ26

D24

DDR1_DQ11/DDR0_DQ27

A22

DDR1_DQ12/DDR0_DQ28

B22

DDR1_DQ13/DDR0_DQ29

A24

DDR1_DQ14/DDR0_DQ30

B24

DDR1_DQ15/DDR0_DQ31

G31

DDR1_DQ16/DDR0_DQ48

G32

DDR1_DQ17/DDR0_DQ49

H29

DDR1_DQ18/DDR0_DQ50

H28

DDR1_DQ19/DDR0_DQ51

G28

DDR1_DQ20/DDR0_DQ52

G29

DDR1_DQ21/DDR0_DQ53

H31

DDR1_DQ22/DDR0_DQ54

H32

DDR1_DQ23/DDR0_DQ55

L31

DDR1_DQ24/DDR0_DQ56

L32

DDR1_DQ25/DDR0_DQ57

N29

DDR1_DQ26/DDR0_DQ58

N28

DDR1_DQ27/DDR0_DQ59

L28

DDR1_DQ28/DDR0_DQ60

L29

DDR1_DQ29/DDR0_DQ61

N31

DDR1_DQ30/DDR0_DQ62

N32

DDR1_DQ31/DDR0_DQ63

AJ29

DDR1_DQ32/DDR1_DQ16

AJ30

DDR1_DQ33/DDR1_DQ17

AM32

DDR1_DQ34/DDR1_DQ18

AM31

DDR1_DQ35/DDR1_DQ19

AM30

DDR1_DQ36/DDR1_DQ20

AM29

DDR1_DQ37/DDR1_DQ21

AJ31

DDR1_DQ38/DDR1_DQ22

AJ32

DDR1_DQ39/DDR1_DQ23

AR31

DDR1_DQ40/DDR1_DQ24

AR32

DDR1_DQ41/DDR1_DQ25

AV30

DDR1_DQ42/DDR1_DQ26

AV29

DDR1_DQ43/DDR1_DQ27

AR30

DDR1_DQ44/DDR1_DQ28

AR29

DDR1_DQ45/DDR1_DQ29

AV32

DDR1_DQ46/DDR1_DQ30

AV31

DDR1_DQ47/DDR1_DQ31

BA32

DDR1_DQ48/DDR1_DQ48

BA31

DDR1_DQ49/DDR1_DQ49

BD31

DDR1_DQ50/DDR1_DQ50

BD32

DDR1_DQ51/DDR1_DQ51

BA30

DDR1_DQ52/DDR1_DQ52

BA29

DDR1_DQ53/DDR1_DQ53

BD29

DDR1_DQ54/DDR1_DQ54

BD30

DDR1_DQ55/DDR1_DQ55

BG31

DDR1_DQ56/DDR1_DQ56

BG32

DDR1_DQ57/DDR1_DQ57

BK32

DDR1_DQ58/DDR1_DQ58

BK31

DDR1_DQ59/DDR1_DQ59

BG29

DDR1_DQ60/DDR1_DQ60

BG30

DDR1_DQ61/DDR1_DQ61

BK30

DDR1_DQ62/DDR1_DQ62

BK29

DDR1_DQ63/DDR1_DQ63

WHISKEY-LAKE-GP

ZZ.00CPU.271

2 OF 20

DDR0_CKN0/DDR0_CKN0
DDR0_CKP0/DDR0_CKP0
DDR0_CKN1/DDR0_CKN1
DDR0_CKP1/DDR0_CKP1

DDR0_CKE0/DDR0_CKE0
DDR0_CKE1/DDR0_CKE1

DDR0_CKE2/NC
DDR0_CKE3/NC

DDR0_CS#0/DDR0_CS#0
DDR0_CS#1/DDR0_CS#1

DDR0_ODT0/DDR0_ODT0

NC/DDR0_ODT1

DDR0_CAB9/DDR0_MA0
DDR0_CAB8/DDR0_MA1
DDR0_CAB5/DDR0_MA2

NC/DDR0_MA3

NC/DDR0_MA4
DDR0_CAA0/DDR0_MA5
DDR0_CAA2/DDR0_MA6
DDR0_CAA4/DDR0_MA7
DDR0_CAA3/DDR0_MA8
DDR0_CAA1/DDR0_MA9

DDR0_CAB7/DDR0_MA10
DDR0_CAA7/DDR0_MA11
DDR0_CAA6/DDR0_MA12
DDR0_CAB0/DDR0_MA13

DDR0_CAB2/DDR0_MA14
DDR0_CAB1/DDR0_MA15
DDR0_CAB3/DDR0_MA16

DDR0_CAB4/DDR0_BA0
DDR0_CAB6/DDR0_BA1
DDR0_CAA5/DDR0_BG0

DDR0_CAA8/DDR0_ACT#

DDR0_CAA9/DDR0_BG1

DDR0_DQSN0/DDR0_DQSN0
DDR0_DQSP0/DDR0_DQSP0
DDR0_DQSN1/DDR0_DQSN1
DDR0_DQSP1/DDR0_DQSP1
DDR0_DQSN2/DDR0_DQSN4
DDR0_DQSP2/DDR0_DQSP4
DDR0_DQSN3/DDR0_DQSN5
DDR0_DQSP3/DDR0_DQSP5
DDR0_DQSN4/DDR1_DQSN0
DDR0_DQSP4/DDR1_DQSP0
DDR0_DQSN5/DDR1_DQSN1
DDR0_DQSP5/DDR1_DQSP1
DDR0_DQSN6/DDR1_DQSN4
DDR0_DQSP6/DDR1_DQSP4
DDR0_DQSN7/DDR1_DQSN5
DDR0_DQSP7/DDR1_DQSP5

NC/DDR0_ALERT#

NC/DDR0_PAR

DDR_VREF_CA
DDR0_VREF_DQ0
DDR0_VREF_DQ1

DDR1_VREF_DQ

DDR_VTT_CTL

3 OF 20CPU1C

DDR1_CKN0/DDR1_CKN0
DDR1_CKP0/DDR1_CKP0
DDR1_CKN1/DDR1_CKN1
DDR1_CKP1/DDR1_CKP1

DDR1_CKE0/DDR1_CKE0
DDR1_CKE1/DDR1_CKE1

DDR1_CKE2/NC
DDR1_CKE3/NC

DDR1_CS#0/DDR1_CS#0
DDR1_CS#1/DDR1_CS#1

DDR1_ODT0/DDR1_ODT0

NC/DDR1_ODT1

DDR1_CAB9/DDR1_MA0
DDR1_CAB8/DDR1_MA1
DDR1_CAB5/DDR1_MA2

NC/DDR1_MA3

NC/DDR1_MA4
DDR1_CAA0/DDR1_MA5
DDR1_CAA2/DDR1_MA6
DDR1_CAA4/DDR1_MA7
DDR1_CAA3/DDR1_MA8
DDR1_CAA1/DDR1_MA9

DDR1_CAB7/DDR1_MA10
DDR1_CAA7/DDR1_MA11
DDR1_CAA6/DDR1_MA12
DDR1_CAB0/DDR1_MA13

DDR1_CAB2/DDR1_MA14
DDR1_CAB1/DDR1_MA15
DDR1_CAB3/DDR1_MA16

DDR1_CAB4/DDR1_BA0
DDR1_CAB6/DDR1_BA1
DDR1_CAA5/DDR1_BG0

DDR1_CAA9/DDR1_BG1

DDR1_CAA8/DDR1_ACT#

DDR1_DQSN0/DDR0_DQSN2
DDR1_DQSP0/DDR0_DQSP2
DDR1_DQSN1/DDR0_DQSN3
DDR1_DQSP1/DDR0_DQSP3
DDR1_DQSN2/DDR0_DQSN6
DDR1_DQSP2/DDR0_DQSP6
DDR1_DQSN3/DDR0_DQSN7
DDR1_DQSP3/DDR0_DQSP7
DDR1_DQSN4/DDR1_DQSN2
DDR1_DQSP4/DDR1_DQSP2
DDR1_DQSN5/DDR1_DQSN3
DDR1_DQSP5/DDR1_DQSP3
DDR1_DQSN6/DDR1_DQSN6
DDR1_DQSP6/DDR1_DQSP6
DDR1_DQSN7/DDR1_DQSN7
DDR1_DQSP7/DDR1_DQSP7

NC/DDR1_ALERT#

NC/DDR1_PAR

DRAM_RESET#

DDR_RCOMP0
DDR_RCOMP1
DDR_RCOMP2

3

AF28
AF29
AE28
AE29

T28
T29
V28
V29

AL37
AL35
AL36
AL34
AG36
AG35
AF34
AG37
AE35
AF35
AE37
AC29
AE36
AB29
AG34
AC28
AB28
AK35

AJ35
AK34
AJ34

AJ37
AJ36
W29

Y28
W28

H24
G24
C23
D23
G30
H30
L30
N30
AL31
AL30
AU31
AU30
BC31
BC30
BH31
BH30

Y29
AE34
BU31

BN28
BN27
BN29

V32
V31
T32
T31

U36
U37
U34
U35

AE32
AF32
AE31
AF31

AC37
AC36
AC34
AC35
AA35
AB35
AA37
AA36
AB34
W36
Y31
W34
AA34
AC32

AC31
AB32
Y32

W32
AB31
V34

V35
W35

C27
D27
D31
C31
J35
J34
P34
P35
AP35
AP34
AV34
AV35
BB35
BB34
BF34
BF35

W37
W31
F36
D35
D37
E36
C35

M_A_CLK#0
M_A_CLK0
M_A_CLK#1
M_A_CLK1

M_A_CKE0
M_A_CKE1

M_A_CS#0
M_A_CS#1
M_A_ODT0
M_A_ODT1

M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13

M_A_A14
M_A_A15
M_A_A16

M_A_BA0
M_A_BA1
M_A_BG0

M_A_ACT_N
M_A_BG1

M_A_DQS_DN0
M_A_DQS_DP0
M_A_DQS_DN1
M_A_DQS_DP1
M_A_DQS_DN4
M_A_DQS_DP4
M_A_DQS_DN5
M_A_DQS_DP5
M_B_DQS_DN0
M_B_DQS_DP0
M_B_DQS_DN1
M_B_DQS_DP1
M_B_DQS_DN4
M_B_DQS_DP4
M_B_DQS_DN5
M_B_DQS_DP5

M_A_ALERT_N
M_A_PARITY
V_SM_VREF_CNTA

V_SM_VREF_CNTB
VTT_CNTL_CPU

M_B_CLK#0
M_B_CLK0
M_B_CLK#1
M_B_CLK1

M_B_CKE0
M_B_CKE1

M_B_CS#0
M_B_CS#1

M_B_ODT0
M_B_ODT1
M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13

M_B_A14
M_B_A15
M_B_A16

M_B_BA0
M_B_BA1
M_B_BG0

M_B_BG1

M_B_ACT_N

M_A_DQS_DN2
M_A_DQS_DP2
M_A_DQS_DN3
M_A_DQS_DP3
M_A_DQS_DN6
M_A_DQS_DP6
M_A_DQS_DN7
M_A_DQS_DP7
M_B_DQS_DN2
M_B_DQS_DP2
M_B_DQS_DN3
M_B_DQS_DP3
M_B_DQS_DN6
M_B_DQS_DP6
M_B_DQS_DN7
M_B_DQS_DP7

M_B_ALERT_N
M_B_PARITY

SM_RCOMP_0
SM_RCOMP_1
SM_RCOMP_2

CKE_A1 AND CKE_B0 USED ONLY FOR LPDIMM
CSA1_N AND CSB0_N USED ONLY FOR LPDIMM

M_A_DQS0

M_A_DQS1

M_A_DQS4

M_A_DQS5

M_B_DQS0

M_B_DQS1

M_B_DQS4

M_B_DQS5

CKE_A1 AND CKE_B0 USED ONLY FOR LPDIMM
CSA1_N AND CSB0_N USED ONLY FOR LPDIMM

M_A_DQS2

M_A_DQS3

M_A_DQS6

M_A_DQS7

M_B_DQS2

M_B_DQS3

M_B_DQS6

M_B_DQS7

1 2

R501 121R2F-GP

1 2

R505 80D6R2F-L-GP

1 2

R506

100R2F-L1-GP-U

084.00138.0A31

1D2V_S3_DM1

12

DY

1 2

220KR2F-GP

PJA138KA-GP

VTT_CNTL_CPU

R504
470R2F-GP

ED501
AZ5725-01FDR7G-GP

83.05725.0A0

close to CPU

3D3V_S0

12

R510

VTT_CNTL

D

Q501

1D2V_S3

S

G

R507
0R0402-PAD

SM_DRAMRST#SM_DRAMRST#_CPU

1 2

<Core Design>

<Core Design>

<Core Design>

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, T aiwan, R.O.C.

Taipei Hsien 221, T aiwan, R.O.C.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

A2

A2

A2

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Taipei Hsien 221, T aiwan, R.O.C.

CPU (DDR)

CPU (DDR)

CPU (DDR)

Bandon / NorthBay 13 ''

Bandon / NorthBay 13 ''

Bandon / NorthBay 13 ''

1

5 106Friday, February 15, 2019

5 106Friday, February 15, 2019

5 106Friday, February 15, 2019

X00

X00

X00

5

Vinafix.com

Main Func = CPU

4

3

2

1

0D95V_VCCIO

CFG0[99]
CFG1[99]
CFG2[99]
CFG3[99]
CFG4[99]

D D

C C

B B

CFG5[99]
CFG6[99]
CFG7[99]
CFG8[99]
CFG9[99]
CFG10[99]
CFG11[99]
CFG12[99]
CFG13[99]
CFG14[99]
CFG15[99]
CFG16[99]
CFG17[99]
CFG18[99]
CFG19[99]

ITP_PMODE[15,99]

12

R63349D9R2F-GP

CFG0

CFG1
CFG2
CFG3
CFG4
CFG5
CFG6
CFG7
CFG8
CFG9
CFG10
CFG11
CFG12
CFG13
CFG14
CFG15

CFG16
CFG17
CFG18
CFG19

CFG_RCOMP

ITP_PMODE

R4

R3

M4

M3

R2
N2
R1
N1

N3

N4

AB5

W4

CG2
CG1

H4
H3

BV24
BV25

T4

T3

J4

J3

J2

L2

J1

L1

L3

L4

WHL QS/CFL/ WHL_ES1_CNL U

CFG0

CFG1
CFG2
CFG3
CFG4
CFG5
CFG6
CFG7
CFG8
CFG9
CFG10
CFG11
CFG12
CFG13
CFG14
CFG15

CFG16
CFG18
CFG17
CFG19

CFG_RCOMP

ITP_PMODE

RSVD#CG2
RSVD#CG1

RSVD#H4
RSVD#H3

RSVD#BV24
RSVD#BV25

17 OF 20CPU1Q

RSVD_TP#F37
RSVD_TP#F34

IST_TRIG

RSVD_TP#CN36

RSVD_TP#BJ36
RSVD_TP#BJ34

TP#BK34
TP#BR18

RSVD_TP#BT9
RSVD_TP#BT8

RSVD_TP#BP8
RSVD_TP#BP9

RSVD#CR4

RSVD#CP3
RSVD#CR3

RSVD_TP#AT3

RSVD_TP#AU3

RSVD#AN1
RSVD#AN2

RSVD#AN4
RSVD#AN3

IST_TP0
IST_TP1

F37
F34
CP36
CN36

BJ36
BJ34

BK34
BR18

BT9
BT8

BP8
BP9

CR4

CP3
CR3

AT3
AU3

AN1
AN2

AN4
AN3

AL2
AL1

IST_TRIG

TP_AN1
TP_AN2

TP_AN4
TP_AN3

1

1
1

1
1

TP620
TPAD14-OP-GP

TP621
TPAD14-OP-GP
TP622
TPAD14-OP-GP
TP623
TPAD14-OP-GP
TP624
TPAD14-OP-GP

CFG0
CFG1
CFG2
CFG3
CFG4
CFG5
CFG6
CFG7
CFG8
CFG9
CFG10
CFG11
CFG12
CFG13
CFG14
CFG15

CFG0
CFG1
CFG2
CFG3
CFG4
CFG5
CFG6
CFG7
CFG8
CFG9
CFG10
CFG11
CFG12
CFG13
CFG14
CFG15

1 2

DY

1 2

DY

1 2

DY

1 2

DY

1 2

DY

1 2

DY

1 2

DY

1 2

DY

1 2

DY

1 2

DY

1 2

DY

1 2

DY

1 2

DY

1 2

DY

1 2

DY

1 2

DY

1 2

DY

1 2

DY

1 2

DY

1 2

DY

1 2
1 2

DY

1 2

DY

1 2

DY

1 2

DY

1 2

DY

1 2

DY

1 2

DY

1 2

DY

1 2

DY

1 2

DY

1 2

DY

R666
0R0603-PAD

1 2

0D95V_VCCIO_CFG

R60110KR2F-2-GP
R60210KR2F-2-GP
R60310KR2F-2-GP
R60410KR2F-2-GP
R60510KR2F-2-GP
R60610KR2F-2-GP
R60710KR2F-2-GP
R60810KR2F-2-GP
R60910KR2F-2-GP
R61010KR2F-2-GP
R61110KR2F-2-GP
R61210KR2F-2-GP
R61310KR2F-2-GP
R61410KR2F-2-GP
R61510KR2F-2-GP
R61610KR2F-2-GP

R6171KR2F-L-GP
R6181KR2F-L-GP
R6191KR2F-L-GP
R6201KR2F-L-GP
R6211KR2J-1-GP
R6221KR2F-L-GP
R6231KR2F-L-GP
R6241KR2F-L-GP
R6251KR2F-L-GP
R6261KR2F-L-GP
R6271KR2F-L-GP
R6281KR2F-L-GP
R6291KR2F-L-GP
R6301KR2F-L-GP
R6311KR2F-L-GP
R6321KR2F-L-GP

VSS

AL4
AL3

BP34
BP36
BP35

CR35

E1

3

TP_CR35

SKTOCC#

1

1

TP625
TPAD14-OP-GP

TP619
TPAD14-OP-GP

<Core Design>

<Core Design>

<Core Design>

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Titl e

Titl e

CPU_(RESERVED)

CPU_(RESERVED)

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

A4

A4

A4

Date: Sheet of

Date: Sheet of

Date: Sheet of

2

CPU_(RESERVED)

Bandon / NorthBay 13''

Bandon / NorthBay 13''

Bandon / NorthBay 13''

6 106Friday, February 15, 2019

6 106Friday, February 15, 2019

6 106Friday, February 15, 2019

1

X00

X00

X00

IST_TRIG0

BK36

RSVD#BK36

BK35

RSVD#BK35

W3

RSVD#W3

AM4

RSVD#AM4

AM3

RSVD_TP#AM3

A A

WHISKEY-LAKE-GP

IST_TRIG1

TP#BP34

TP#BP35

RSVD_TP#CR35

SKTOCC#

ZZ.00CPU.271

5

4

5

Vinafix.com

4

3

2

1

Main Func = CPU

VCCCORE_SENSE[46]
VSSCORE_SENSE[46]

D D

C C

B B

A A

SVID_DATA_CPU[46]
SVID_CLK_CPU[46]
SVID_ALERT#_CPU[46]

1V_CPU_CORE 1V_CPU_CORE

AN9

VCCCORE

AN10

VCCCORE

AN24

VCCCORE

AN26

VCCCORE

AN27

VCCCORE

AP2

VCCCORE

AP9

VCCCORE

AP24

VCCCORE

AP26

VCCCORE

AR5

VCCCORE

AR6

VCCCORE

AR7

VCCCORE

AR8

VCCCORE

AR10

VCCCORE

AR25

VCCCORE

AR27

VCCCORE

AT9

VCCCORE

AT24

VCCCORE

AT26

VCCCORE

AU5

VCCCORE

AU6

VCCCORE

AU7

VCCCORE

AU8

VCCCORE

AU9

VCCCORE

AU24

VCCCORE

AU25

VCCCORE

AU26

VCCCORE

AU27

VCCCORE

AV2

VCCCORE

AV5

VCCCORE

AV7

VCCCORE

AV10

VCCCORE

AV27

VCCCORE

AW5

VCCCORE

AW6

VCCCORE

AW7

VCCCORE

AW8

VCCCORE

AW9

VCCCORE

AW10

VCCCORE

BB9

RSVD#BB9

BC24

RSVD#BC24

AY9

RSVD#AY9

BB24

RSVD#BB24

WHISKEY-LAKE-GP

ZZ.00CPU.271

5

12 OF 20CPU1L

VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE

VCC_SENSE

VSS_SENSE

VIDALERT#

VIDSCK

VIDSOUT

RSVD#Y3

VCCSTG

AW24
AW25
AW26
AW27
AY24
AY26
BA5
BA7
BA8
BA25
BA27
BB2
BB26
BC5
BC6
BC7
BC9
BC10
BC26
BC27
BD5
BD8
BD10
BD25
BD27
BE9
BE24
BE25
BE26
BE27
BF2
BF9
BF24
BF26
BG27

AN6
AN5

AA3

AA1

AA2

Y 3

BG3

Layout Note:
The total Length of Data and Clock (from CPU to each VR) must be equal (±0.1 inch).
Route the Alert signal between the Clock and the Data signals.

SVID DATA

1D05V_VCCST

#575962
CLOSE TO VR

SVID_DATA_CPU_R

1 2

R702
0R0402-PAD

12

R726
100R2F-L1-GP-U

SVID_DATA_CPU

SVID CLOCK

1D05V_VCCST

#575962
CLOSE TO VR

SVID_CLK_CPU_R

1 2

R703
0R0402-PAD

DY

12

R723
43R2F-2-GP

SVID_CLK_CPU

SVID ALERT

1D05V_VCCST

VCCCORE_SENSE
VSSCORE_SENSE

SVID_ALERT#_CPU_R

SVID_CLK_CPU_R

SVID_DATA_CPU_R

1D05V_VCCSTG

Layout Note:

1. Place close to CPU

2. VCC_SENSE/ VSS_SENSE
impedance=50 ohm

3. Length match<25mil

4

#575962
CLOSE TO VR

1V_CPU_CORE

12

R719
100R2F-L1-GP-U

VCCCORE_SENSE
VSSCORE_SENSE

12

R720
100R2F-L1-GP-U

R728
220R2J-L2-GP

3

12

12

R727
56R2J-4-GP

SVID_ALERT#_CPUSVID_ALERT#_CPU_R

<Core Design>

<Core Design>

<Core Design>

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev
A4

A4

A4

Friday, February 15, 2019

Friday, February 15, 2019

Friday, February 15, 2019

Date: Sheet of

Date: Sheet of

Date: Sheet of

2

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

CPU(VCC_CORE)

CPU(VCC_CORE)

CPU(VCC_CORE)

Bandon / NorthBay 13''

Bandon / NorthBay 13''

Bandon / NorthBay 13''

7 106

7 106

7 106

1

X00

X00

X00

5

Vinafix.com

Main Func = CPU

VCCGT_SENSE[46]
VSSGT_SENSE[46]

VSSSA_SENSE[46]

D D

C C

B B

A A

VCCSA_SENSE[46]

VCCIO_SENSE[54]
VSSIO_SENSE[54]

1V_VCCGT 1V_VCCSA

12

R807
100R2F-L1-GP-U

VSSGT_SENSE VSSSA_SENSE

12

R808
100R2F-L1-GP-U

5

VCCSA_SENSEVCCGT_SENSE

12

12

R810
100R2F-L1-GP-U

R809
100R2F-L1-GP-U

4

WHL QS/CFL/ WHL_ES1_CNL U

A5

VCCGT

A6

VCCGT

A8

VCCGT

A11

VCCGT

A12

VCCGT

A14

VCCGT

A15

VCCGT

A17

VCCGT

A18

VCCGT

A20

VCCGT

B3

VCCGT

B4

VCCGT

B6

VCCGT

B8

VCCGT

B11

VCCGT

B14

VCCGT

B17

VCCGT

B20

VCCGT

C2

VCCGT

C3

VCCGT

C6

VCCGT

C7

VCCGT

C8

VCCGT

C11

VCCGT

C12

VCCGT

C14

VCCGT

C15

VCCGT

C17

VCCGT

C18

VCCGT

C20

VCCGT

D4

VCCGT

D7

VCCGT

D11

VCCGT

D12

VCCGT

D14

VCCGT

D15

VCCGT

D17

VCCGT

D18

VCCGT

D20

VCCGT

E4

VCCGT

F5

VCCGT

F6

VCCGT

F7

VCCGT

F8

VCCGT

F11

VCCGT

F14

VCCGT

F17

VCCGT

F20

VCCGT

G11

VCCGT

G12

VCCGT

G14

VCCGT

G15

VCCGT

G17

VCCGT

G18

VCCGT

G20

VCCGT

H5

VCCGT

H6

VCCGT

H7

VCCGT

H8

VCCGT

H11

VCCGT

WHISKEY-LAKE-GP

ZZ.00CPU.271

4

13 OF 20CPU1M

VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT

VCCGT
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE

VCCGT_SENSE

VSSGT_SENSE

H12
H14
H15
H17
H18
H20
J7
J8
J11
J14
J17
J20
K2
K11
L7
L8
L10
M9
N7
N8
N9
N10
P2
P8
R9
T8
T9
T10
U8
U10
V9
W8
W9
AA9
AB2
AB8
AB9
AB10
AC8
AD9
AE8
AE9
AE10
AF2
AF8
AF10
AG8
AG9
AH9
AJ8
AJ10
AK2
AK9
AL8
AL9
AL10
AM8
V2
Y 8
Y 1 0
E3
D2

1V_VCCGT1V_VCCGT

VCCGT_SENSE
VSSGT_SENSE

3

1V_CPU_CORE

3

SC1U10V2KX-1DLGP

SC1U10V2KX-1DLGP

SC1U10V2KX-1DLGP

SC1U10V2KX-1DLGP

C801

12

C802

12

C803

12

1D05V_VCCST

C807

SC22U6D3V3MX-1-DL-GP

1 2

1 2

2

1D2V_S3

C804

DY

12

1D05V_VCCST

1D05V_VCCSTG

1D2V_VCC_PLL_OC

C805

C806

SCD1U16V2KX-3DLGP

SC1U10V2KX-1DLGP

1 2

AD36
AH32
AH36
AM36
AN32

AW32

AY36
BE32

BH36

R32
Y 3 6

BC28

BP11

BP2

0.04 A

BG1
BG2

BL27

BM26

BR11

BT11

0.12 A

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

RSVD#BC28

VCCST
VCCST

VCCSTG
VCCSTG

VCCPLL_OC
VCCPLL_OC

VCCPLL
VCCPLL

WHISKEY-LAKE-GP

VCCIO_OUT
VCCIO_OUT
VCCIO_OUT
VCCIO_OUT
VCCIO_OUT
VCCIO_OUT
VCCIO_OUT
VCCIO_OUT
VCCIO_OUT
VCCIO_OUT
VCCIO_OUT
VCCIO_OUT
VCCIO_OUT
VCCIO_OUT
VCCIO_OUT
VCCIO_OUT

VCCIO_SENSE

VSSIO_SENSE

VSSSA_SENSE

VCCSA_SENSE

14 OF 20CPU1N

VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA

1

+VCCIO(ICCMAX.=2.73A

0D95V_VCCIO

AK24
AK26
AL24
AL25
AL26
AL27
AM25
AM27
BH24
BH25
BH26
BH27
BJ24
BJ26
BP16
BP18

BG8
BG10
BH9
BJ8
BJ9
BJ10
BK8
BK25
BK27
BL8
BL9
BL10
BL24
BL26
BM24
BN25

VCCIO_SENSE

BP28

VSSIO_SENSE

BP29

VSSSA_SENSE

BE7

VCCSA_SENSE

BG7

ZZ.00CPU.271

<Core Design>

<Core Design>

<Core Design>

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Titl e

Titl e

CPU_(DISPLAY)

CPU_(DISPLAY)

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

A4

A4

A4

Date: Sheet of

Date: Sheet of

Date: Sheet of

2

CPU_(DISPLAY)

Bandon / NorthBay 13''

Bandon / NorthBay 13''

Bandon / NorthBay 13''

8 106Friday, February 15, 2019

8 106Friday, February 15, 2019

8 106Friday, February 15, 2019

1

1V_VCCSA

X00

X00

X00

5

Vinafix.com

D D

4

3

2

1

(Blanking)

C C

B B

<Core Design>

<Core Design>

<Core Design>

A A

5

Title

Titl e

Titl e

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

A4

A4

A4

Date: Sheet of

Date: Sheet of

4

3

Date: Sheet of

(Reserved)

(Reserved)

(Reserved)

2

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Bandon / NorthBay 13''

Bandon / NorthBay 13''

Bandon / NorthBay 13''

9 106Friday, February 15, 2019

9 106Friday, February 15, 2019

9 106Friday, February 15, 2019

1

X00

X00

X00

X00

Vinafix.com

X00

X00

10 106Friday, February 15, 2019

10 106Friday, February 15, 2019

10 106Friday, February 15, 2019

1

1

SC22U6D3V3MX-1-DL-GP

PC1086

12

SC22U6D3V3MX-1-DL-GP

PC1085

12

SC22U6D3V3MX-1-DL-GP

PC1078

12

SC22U6D3V3MX-1-DL-GP

PC1077

12

SC22U6D3V3MX-1-DL-GP

PC1076

12

ST220U2VDM-13-GP
TC1002

2

3

12

SC22U6D3V3MX-1-DL-GP

PC1088

12

SC22U6D3V3MX-1-DL-GP

PC1084

12

SC22U6D3V3MX-1-DL-GP

PC1083

12

SC22U6D3V3MX-1-DL-GP

PC1082

12

SC22U6D3V3MX-1-DL-GP

PC1081

12

SC22U6D3V3MX-1-DL-GP

PC1080

12

SC22U6D3V3MX-1-DL-GP

PC1079

12

SC22U6D3V3MX-1-DL-GP

PC1036

12

SC22U6D3V3MX-1-DL-GP

PC1034

12

SC22U6D3V3MX-1-DL-GP

PC1032

12

SC22U6D3V3MX-1-DL-GP

PC1099

12

SC22U6D3V3MX-1-DL-GP

PC1098

12

SC22U6D3V3MX-1-DL-GP

PC1097

12

SC22U6D3V3MX-1-DL-GP

PC1096

12

SC22U6D3V3MX-1-DL-GP

PC1095

12

SC22U6D3V3MX-1-DL-GP

PC1094

12

SC22U6D3V3MX-1-DL-GP

PC1093

12

SC22U6D3V3MX-1-DL-GP

PC1092

12

SC22U6D3V3MX-1-DL-GP

PC1091

12

SC22U6D3V3MX-1-DL-GP

PC1090

12

SC22U6D3V3MX-1-DL-GP

PC1089

12

SC22U6D3V3MX-1-DL-GP

C1002

12

SC22U6D3V3MX-1-DL-GP

C1001

12

1V_VCCSA

SC22U6D3V3MX-1-DL-GP

PC1075

12

SC22U6D3V3MX-1-DL-GP

PC1074

12

SC22U6D3V3MX-1-DL-GP

PC1073

12

SC22U6D3V3MX-1-DL-GP

PC1072

12

SC22U6D3V3MX-1-DL-GP

PC1071

12

1V_VCCSA

22U x 10

SC22U6D3V3MX-1-DL-GP

PC1087

12

SC22U6D3V3MX-1-DL-GP

PC1035

12

SC22U6D3V3MX-1-DL-GP

PC1033

12

SC22U6D3V3MX-1-DL-GP

PC1070

12

SC22U6D3V3MX-1-DL-GP

PC1069

12

SC22U6D3V3MX-1-DL-GP

PC1001

12

SC22U6D3V3MX-1-DL-GP

PC1068

12

SC22U6D3V3MX-1-DL-GP

PC1067

12

Wistron Corporation

21F, 88, S ec.1, Hsin Tai Wu Rd., H sichih,

Taipei Hsien 221, Taiwan, R .O.C.

Wistron Corporation

21F, 88, S ec.1, Hsin Tai Wu Rd., H sichih,

Taipei Hsien 221, Taiwan, R .O.C.

Wistron Corporation

21F, 88, S ec.1, Hsin Tai Wu Rd., H sichih,

Taipei Hsien 221, Taiwan, R .O.C.

Bandon / NorthBay 13''

Bandon / NorthBay 13''

Bandon / NorthBay 13''

CPU_(Power CAP1)

CPU_(Power CAP1)

CPU_(Power CAP1)

A3

A3

A3

Title

Size Document Number Rev

<Core Design>

<Core Design>

<Core Design>

Title

Title

Date: Sheet of

Size Document Number Rev

Date: Sheet of

Size Document Number Rev

Date: Sheet of

2

3

SC22U6D3V3MX-1-DL-GP

PC1011

12

SC22U6D3V3MX-1-DL-GP

PC1010

4

5

1V_CPU_CORE

Main Func = CPU Follow RO13 CAP account and vaule .

22U*52/220U*1

12

SC22U6D3V3MX-1-DL-GP

PC1009

12

SC22U6D3V3MX-1-DL-GP

PC1008

12

SC22U6D3V3MX-1-DL-GP

PC1007

12

SC22U6D3V3MX-1-DL-GP

PC1006

12

SC22U6D3V3MX-1-DL-GP

PC1005

12

SC22U6D3V3MX-1-DL-GP

PC1004

12

SC22U6D3V3MX-1-DL-GP

PC1003

12

SC22U6D3V3MX-1-DL-GP

PC1002

12

1V_CPU_CORE

D D

SC22U6D3V3MX-1-DL-GP

PC1021

12

SC22U6D3V3MX-1-DL-GP

PC1020

12

SC22U6D3V3MX-1-DL-GP

PC1019

12

SC22U6D3V3MX-1-DL-GP

PC1018

12

SC22U6D3V3MX-1-DL-GP

PC1017

12

SC22U6D3V3MX-1-DL-GP

PC1016

12

SC22U6D3V3MX-1-DL-GP

PC1015

12

SC22U6D3V3MX-1-DL-GP

PC1014

12

SC22U6D3V3MX-1-DL-GP

PC1013

12

SC22U6D3V3MX-1-DL-GP

PC1012

12

SC22U6D3V3MX-1-DL-GP

PC1031

12

SC22U6D3V3MX-1-DL-GP

PC1030

12

SC22U6D3V3MX-1-DL-GP

PC1029

12

SC22U6D3V3MX-1-DL-GP

PC1028

12

SC22U6D3V3MX-1-DL-GP

PC1027

12

SC22U6D3V3MX-1-DL-GP

PC1026

12

SC22U6D3V3MX-1-DL-GP

PC1025

12

SC22U6D3V3MX-1-DL-GP

PC1024

12

SC22U6D3V3MX-1-DL-GP

PC1023

12

SC22U6D3V3MX-1-DL-GP

PC1022

12

C C

SC22U6D3V3MX-1-DL-GP

PC1046

12

SC22U6D3V3MX-1-DL-GP

PC1045

12

SC22U6D3V3MX-1-DL-GP

PC1044

12

SC22U6D3V3MX-1-DL-GP

PC1043

12

SC22U6D3V3MX-1-DL-GP

PC1042

12

SC22U6D3V3MX-1-DL-GP

PC1041

12

SC22U6D3V3MX-1-DL-GP

PC1040

12

SC22U6D3V3MX-1-DL-GP

PC1039

12

SC22U6D3V3MX-1-DL-GP

PC1038

12

SC22U6D3V3MX-1-DL-GP

PC1037

12

22U x 38

1V_VCCGT

1V_VCCGT

SC22U6D3V3MX-1-DL-GP

PC1056

12

SC22U6D3V3MX-1-DL-GP

PC1055

12

SC22U6D3V3MX-1-DL-GP

PC1054

12

SC22U6D3V3MX-1-DL-GP

PC1053

12

SC22U6D3V3MX-1-DL-GP

PC1052

12

SC22U6D3V3MX-1-DL-GP

PC1051

12

SC22U6D3V3MX-1-DL-GP

PC1050

12

SC22U6D3V3MX-1-DL-GP

PC1049

12

SC22U6D3V3MX-1-DL-GP

PC1048

12

SC22U6D3V3MX-1-DL-GP

PC1047

12

B B

SC22U6D3V3MX-1-DL-GP

PC1066

12

SC22U6D3V3MX-1-DL-GP

PC1065

12

SC22U6D3V3MX-1-DL-GP

PC1064

12

SC22U6D3V3MX-1-DL-GP

PC1063

12

SC22U6D3V3MX-1-DL-GP

PC1062

12

SC22U6D3V3MX-1-DL-GP

PC1061

12

SC22U6D3V3MX-1-DL-GP

PC1060

12

SC22U6D3V3MX-1-DL-GP

PC1059

12

SC22U6D3V3MX-1-DL-GP

PC1058

12

SC22U6D3V3MX-1-DL-GP

PC1057

12

A A

4

5

5

Vinafix.com

4

3

2

1

Main Func = CPU

VDDQ VCCIO

1D2V_S3 0D95V_VCCIO

D D

12

C1121

SC1U10V2KX-1DLGP

12

C1122

SC1U10V2KX-1DLGP

12

C1123

SC1U10V2KX-1DLGP

12

C1124

SC1U10V2KX-1DLGP

12

C1105

SC1U10V2KX-1DLGP

12

C1112

SC1U10V2KX-1DLGP

12

C1113

SC1U10V2KX-1DLGP

12

C1114

SC1U10V2KX-1DLGP

DY

12

12

C1151

SC10U6D3V3MX-DL-GP

C1115

SC1U10V2KX-1DLGP

12

DY

C1150

SC10U6D3V3MX-DL-GP

C1116

12

C1118

SC1U10V2KX-1DLGP

12

C1153

SC10U6D3V3MX-DL-GP

C1149

SC10U6D3V3MX-DL-GP

12

SC1U10V2KX-1DLGP

DY

12

12

12

C1137

SC10U6D3V3MX-DL-GP

C1147

SC10U6D3V3MX-DL-GP

12

12

C1136

SC10U6D3V3MX-DL-GP

C1146

SC10U6D3V3MX-DL-GP

12

C1145

SC10U6D3V3MX-DL-GP

12

C1144

SC10U6D3V3MX-DL-GP

12

C1143

SC10U6D3V3MX-DL-GP

C1138

SC10U6D3V3MX-DL-GP

12

C C

C1131

SC22U6D3V3MX-1-DL-GP

12

C1148

SC10U6D3V3MX-DL-GP

B B

12

DY

12

12

C1117

SC1U10V2KX-1DLGP

C1154

SC10U6D3V3MX-DL-GP

12

C1152

SC10U6D3V3MX-DL-GP

<Core Design>

<Core Design>

<Core Design>

A A

5

Title

Titl e

Titl e

CPU_(Power CAP2)

CPU_(Power CAP2)

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

A4

A4

A4

Date: Sheet of

Date: Sheet of

4

3

Date: Sheet of

2

CPU_(Power CAP2)

Bandon / NorthBay 13''

Bandon / NorthBay 13''

Bandon / NorthBay 13''

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

11 106Friday, February 15, 2019

11 106Friday, February 15, 2019

11 106Friday, February 15, 2019

1

X00

X00

X00

5

Vinafix.com

Main Func = Memory

M_A_A[16:0][5]

D D

M_A_BA0[5]
M_A_BA1[5]
M_A_BG0[5]
M_A_BG1[5]

M_A_CLK0[5]

M_A_CLK#0[5]

M_A_CLK1[5]

M_A_CLK#1[5]

M_A_CKE0[5]
M_A_CKE1[5]

M_A_CS#0[5]
M_A_CS#1[5]

M_A_ODT0[5]
M_A_ODT1[5]

CPU_SMB_SDA_DDR[13,18,99]
CPU_SMB_SCL_DDR[13,18,99]

SM_DRAMRST#[5,13]

M_A_ACT_N[5]
M_A_ALERT_N[5]
M_A_PARITY[5]

M_A_DQ[63:0][5]

C C

B B

M_A_DQS_DN[7:0][5]

M_A_DQS_DP[7:0][5]

A A

V_SM_VREF_CNTA[5]

M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15
M_A_A16

M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63

M_A_DQS_DN0
M_A_DQS_DN1
M_A_DQS_DN2
M_A_DQS_DN3
M_A_DQS_DN4
M_A_DQS_DN5
M_A_DQS_DN6
M_A_DQS_DN7

M_A_DQS_DP0
M_A_DQS_DP1
M_A_DQS_DP2
M_A_DQS_DP3
M_A_DQS_DP4
M_A_DQS_DP5
M_A_DQS_DP6
M_A_DQS_DP7

1D2V_S3

DY

1 2

R1201
240R2F-1-LS-GP

C1204

SC2D2U10V3KX-1DLGP-U

12

12

C1201

SCD1U16V2KX-3DLGP

1

D

ED1201

Y

AZ5725-01FDR7G-GP

83.05725.0A0

2

Layout note: closed to Dimm

3D3V_S0

R1213

R1217

0R2J-2-GP

0R2J-2-GP

DY

DY

1 2

1 2

R1219

R1221

0R0402-PAD

0R0402-PAD

1 2

1 2

SM_DRAMRST#

M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15
M_A_A16

M_A_BA0
M_A_BA1
M_A_BG0
M_A_BG1

M_A_CLK0
M_A_CLK#0
M_A_CLK1
M_A_CLK#1

M_A_CKE0
M_A_CKE1

M_A_CS#0
M_A_CS#1

M_A_ODT0
M_A_ODT1

M_A_SA0
M_A_SA1
M_A_SA2

CPU_SMB_SDA_DDR
CPU_SMB_SCL_DDR

SM_DRAMRST#
M_A_ACT_N
M_A_ALERT_N
M_A_EVENT_N

M_A_PARITY

M_A_VREFCA

C1205

SCD1U16V2KX-3DLGP

12

R1210

0R2J-2-GP

DY

1 2

M_A_SA0

M_A_SA1

M_A_SA2

R1218

0R0402-PAD

1 2

4

DM1A

144

A0

133

A1

132

A2

131

A3

128

A4

126

A5

127

A6

122

A7

125

A8

121

A9

146

A10/AP

120

A11

119

A12

158

A13

151

WE#/A14

156

CAS#/A15

152

RAS#/A16

150

BA0

145

BA1

115

BG0

113

BG1

92

CB0/NC

91

CB1/NC

101

CB2/NC

105

CB3/NC

88

CB4/NC

87

CB5/NC

100

CB6/NC

104

CB7/NC

137

CK0_T

139

CK0_C

138

CK1_T/NF

140

CK1_C/NF

109

CKE0

110

CKE1

149

CS0#

157

CS1#

162

C0/CS2#/NC

165

C1/CS3#/NC

155

ODT0

161

ODT1

256

SA0

260

SA1

166

SA2

254

SDA

253

SCL

108

RESET#

114

ACT#

116

ALERT#

134

EVENT#/NF

143

PARITY

164

VREFCA

DDR4-260P-79-GP- U

062.10011.M003

1 OF 4

DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63

DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9

M_A_DQ28

8

M_A_DQ24

7

M_A_DQ26

20

M_A_DQ27

21

M_A_DQ29

4

M_A_DQ25

3

M_A_DQ30

16

M_A_DQ31

17

M_A_DQ5

28

M_A_DQ1

29

M_A_DQ3

41

M_A_DQ2

42

M_A_DQ0

24

M_A_DQ4

25

M_A_DQ7

38

M_A_DQ6

37

M_A_DQ8

50

M_A_DQ12

49

M_A_DQ14

62

M_A_DQ11

63

M_A_DQ9

46

M_A_DQ13

45

M_A_DQ15

58

M_A_DQ10

59

M_A_DQ23

70

M_A_DQ18

71

M_A_DQ20

83

M_A_DQ21

84

M_A_DQ19

66

M_A_DQ16

67

M_A_DQ22

79

M_A_DQ17

80

M_A_DQ50

174

M_A_DQ51

173

M_A_DQ55

187

M_A_DQ49

186

M_A_DQ53

170

M_A_DQ52

169

M_A_DQ48

183

M_A_DQ54

182

M_A_DQ61

195

M_A_DQ57

194

M_A_DQ62

207

M_A_DQ59

208

M_A_DQ60

191

M_A_DQ56

190

M_A_DQ63

203

M_A_DQ58

204

M_A_DQ36

216

M_A_DQ37

215

M_A_DQ35

228

M_A_DQ34

229

M_A_DQ32

211

M_A_DQ33

212

M_A_DQ38

224

M_A_DQ39

225

M_A_DQ45

237

M_A_DQ41

236

M_A_DQ46

249

M_A_DQ43

250

M_A_DQ40

232

M_A_DQ44

233

M_A_DQ47

245

M_A_DQ42

246

1D2V_S3

R1207
1KR2F-L-GP

12

12

R1208
1KR2F-L-GP

1D2V_S3 1D2V_S3_DM1

1 2

R1211 0R0402-PAD

1 2

R1212 0R0402-PAD

1 2

R1214 0R0402-PAD

1 2

R1215 0R0402-PAD

1 2

R1216 0R0402-PAD

1 2

R1220 0R0402-PAD

M_A_VREFCA

3

2R2F-GP

1D2V_S3

1 2

R1204

DM1B

DDR4-260P-79-GP- U

062.10011.M003

DM1C

111

VDD

112

VDD

117

VDD

118

VDD

123

VDD

124

VDD

129

VDD

130

VDD

135

VDD

136

VDD

141

VDD

142

VDD

147

VDD

148

VDD

153

VDD

154

VDD

159

VDD

160

VDD

163

VDD

DDR4-260P-79-GP- U

062.10011.M003

V_SM_VREF_CNTA

C1211
SCD022U16V2KX-3DLG P

2 1

+V_VREF_PATH1

12

R1205
24D9R2F-L-GP

2 OF 4

DQS0_C
DQS0_T
DQS1_C
DQS1_T
DQS2_C
DQS2_T
DQS3_C
DQS3_T
DQS4_C
DQS4_T
DQS5_C
DQS5_T
DQS6_C
DQS6_T
DQS7_C
DQS7_T
DQS8_C
DQS8_T

DM0#/DBI0#

DM1#/DBI#
DM2#/DBI2#
DM3#/DBI3#
DM4#/DBI4#
DM5#/DBI5#
DM6#/DBI6#
DM7#/DBI7#

DM8#/DBI#/NC

VDDSPD

3 OF 4

2

4 OF 4

12

12

C1216

C1231

SC1U10V2KX-1DLGP

SC10U6D3V3MX-DL-GP

12

12

C1217

C1232

SC1U10V2KX-1DLGP

2
5
6

9
10
14
15
18
19
22
23
26
27
30
31
35
36
39
40
43
44
47
48
51
52
56
57
60
61
64
65
68
69
72
73
77
78
81
82
85
86
89
90
93
94
98

2D5V_S3

SC10U6D3V3MX-DL-GP

DM1D

VSS1VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

DDR4-260P-79-GP-U

062.10011.M003

VPP DECAPS

C1210

C1209

SC10U6D3V3MX-DL-GP

12

12

12

12

C1218

C1219

SC10U6D3V3MX-DL-GP

SC10U6D3V3MX-DL-GP

12

12

C1233

C1234

SC1U10V2KX-1DLGP

SC1U10V2KX-1DLGP

99
102

VSS

103

VSS

106

VSS

107

VSS

167

VSS

168

VSS

171

VSS

172

VSS

175

VSS

176

VSS

180

VSS

181

VSS

184

VSS

185

VSS

188

VSS

189

VSS

192

VSS

193

VSS

196

VSS

197

VSS

201

VSS

202

VSS

205

VSS

206

VSS

209

VSS

210

VSS

213

VSS

214

VSS

217

VSS

218

VSS

222

VSS

223

VSS

226

VSS

227

VSS

230

VSS

231

VSS

234

VSS

235

VSS

238

VSS

239

VSS

243

VSS

244

VSS

247

VSS

248

VSS

251

VSS

252

VSS

1D2V_S3

SC1U10V2KX-1DLGP

1D2V_S3

C1220

SC12P50V2JN-DL-GP

12

12

1D2V_S3

12

12

FC1201

SC1U10V2KX-1DLGP

M_A_DQS_DN3

11

M_A_DQS_DP3

13

M_A_DQS_DN0

32

M_A_DQS_DP0

34

M_A_DQS_DN1

53

M_A_DQS_DP1

55

M_A_DQS_DN2

74

M_A_DQS_DP2

76

M_A_DQS_DN6

177

M_A_DQS_DP6

179

M_A_DQS_DN7

198

M_A_DQS_DP7

200

M_A_DQS_DN4

219

M_A_DQS_DP4

221

M_A_DQS_DN5

240

M_A_DQS_DP5

242

M_A_DQS_DN8

95

M_A_DQS_DP8

97

12
33
54
75
178
199
220
241
96

255

257

VPP

259

VPP

258

VTT

261

261

262

262

NP1

NP1

NP2

NP2

2D5V_S3

1DY2
1DY2

12

0D6V_S0

240R2F-1-LS-GP
240R2F-1-LS-GP

C1202

SCD1U16V2KX-3DLGP

R1202
R1203

3D3V_S0

1D2V_S3

12

C1203

SC2D2U10V3KX-1DLGP-U

VTT DECAPS

0D6V_S0

C1206

12

VDDQ DECAPS ABOVE CAPS ARE ADDED FOR EMC LAYOUT FEEDBACK

1D2V_S3

12

C1212

12

1

D

TC1201

Y

ST330U2D5VBM-1-GP

2

2017.10.20 Change to as power package for placement

C1208

C1207

12

12

C1213

C1228

SC1U10V2KX-1DLGP

SC1U10V2KX-1DLGP

12

12

12

C1215

C1214

SC10U6D3V3MX-DL-GP

SC10U6D3V3MX-DL-GP

SC10U6D3V3MX-DL-GP

12

12

C1229

C1230

SC1U10V2KX-1DLGP

SC1U10V2KX-1DLGP

SC1U10V2KX-1DLGP

SC10U6D3V3MX-DL-GP

12

SC10U6D3V3MX-DL-GP

C1227

SC1U10V2KX-1DLGP

C1221

FC1202

SC1U10V2KX-1DLGP

1

EC1202

EC1203

EC1204

SC12P50V2JN-DL-GP

SC12P50V2JN-DL-GP

DY

DY

12

12

C1222

SC12P50V2JN-DL-GP

SC12P50V2JN-DL-GP

12

12

12

FC1203

SC1U10V2KX-1DLGP

FC1206

SC12P50V2JN-DL-GP

SC1U10V2KX-1DLGP

DY

12

12

C1224

C1223

SC12P50V2JN-DL-GP

SC12P50V2JN-DL-GP

12

1D2V_S3

12

12

FC1205

SC1U10V2KX-1DLGP

FC1204

SC1U10V2KX-1DLGP

<Core Design>

<Core Design>

<Core Design>

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, T aiwan, R.O.C.

Taipei Hsien 221, T aiwan, R.O.C.

Title

Title

Title

DDR (DDR4-CHA)

DDR (DDR4-CHA)

DDR (DDR4-CHA)

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev
A2

A2

A2

Friday, February 15, 2019

Friday, February 15, 2019

Friday, February 15, 2019
Date: Sheet of

Date: Sheet of

5

4

3

2

Date: Sheet of

Taipei Hsien 221, T aiwan, R.O.C.

Bandon / NorthBay 13''

Bandon / NorthBay 13''

Bandon / NorthBay 13''

1

12 106

12 106

12 106

X00

X00

X00

5

Vinafix.com

Main Func = Memory

M_B_A[16:0][5]

D D

M_B_BA0[5]
M_B_BA1[5]
M_B_BG0[5]
M_B_BG1[5]

M_B_CLK0[5]

M_B_CLK#0[5]

M_B_CLK1[5]

M_B_CLK#1[5]

M_B_CKE0[5]
M_B_CKE1[5]
M_B_CS#0[5]
M_B_CS#1[5]

M_B_ODT0[5]
M_B_ODT1[5]

CPU_SMB_SDA_DDR[12,18,99]
CPU_SMB_SCL_DDR[12,18,99]

SM_DRAMRST#[5,12]

M_B_ACT_N[5]

M_B_ALERT_N[5]

M_B_PARITY[5]

M_B_DQ[63:0][5]

C C

B B

M_B_DQS_DN[7:0][5]

M_B_DQS_DP[7:0][5]

A A

V_SM_VREF_CNTB[5]

M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15
M_B_A16

M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63

M_B_DQS_DN0
M_B_DQS_DN1
M_B_DQS_DN2
M_B_DQS_DN3
M_B_DQS_DN4
M_B_DQS_DN5
M_B_DQS_DN6
M_B_DQS_DN7

M_B_DQS_DP0
M_B_DQS_DP1
M_B_DQS_DP2
M_B_DQS_DP3
M_B_DQS_DP4
M_B_DQS_DP5
M_B_DQS_DP6
M_B_DQS_DP7

1D2V_S3_DM1

DY

1 2

R1301
240R2F-1-LS-GP

C1301

SC2D2U10V3KX-1DLGP-U

12

SM_DRAMRST#

12

C1310

SCD1U16V2KX-3DLGP

1

ED1301

D

AZ5725-01FDR7G-GP

Y

83.05725.0A0

2

Layout note: closed to Dimm

Comfirm with SW ok .

3D3V_S0

R1315

R1314

0R0402-PAD

0R2J-2-GP

DY

1 2

1 2

R1319

R1318

0R2J-2-GP

0R0402-PAD

DY

1 2

1 2

M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15
M_B_A16

M_B_BA0
M_B_BA1
M_B_BG0
M_B_BG1

M_B_CLK0
M_B_CLK#0
M_B_CLK1
M_B_CLK#1

M_B_CKE0
M_B_CKE1

M_B_CS#0
M_B_CS#1

M_B_ODT0
M_B_ODT1

M_B_SA0
M_B_SA1
M_B_SA2

CPU_SMB_SDA_DDR
CPU_SMB_SCL_DDR

SM_DRAMRST#
M_B_ACT_N
M_B_ALERT_N
M_B_EVENT_N

M_B_PARITY

M_B_VREFCA

C1304

SCD1U16V2KX-3DLGP

12

R1316

0R2J-2-GP

DY

1 2

M_B_SA0

M_B_SA1

M_B_SA2

R1320

0R0402-PAD

1 2

4

DM2A

144

A0

133

A1

132

A2

131

A3

128

A4

126

A5

127

A6

122

A7

125

A8

121

A9

146

A10/AP

120

A11

119

A12

158

A13

151

WE#/A14

156

CAS#/A15

152

RAS#/A16

150

BA0

145

BA1

115

BG0

113

BG1

92

CB0/NC

91

CB1/NC

101

CB2/NC

105

CB3/NC

88

CB4/NC

87

CB5/NC

100

CB6/NC

104

CB7/NC

137

CK0_T

139

CK0_C

138

CK1_T/NF

140

CK1_C/NF

109

CKE0

110

CKE1

149

CS0#

157

CS1#

162

C0/CS2#/NC

165

C1/CS3#/NC

155

ODT0

161

ODT1

256

SA0

260

SA1

166

SA2

254

SDA

253

SCL

108

RESET#

114

ACT#

116

ALERT#

134

EVENT#/NF

143

PARITY

164

VREFCA

DDR4-260P-79-GP- U

062.10011.M003

1 OF 4

DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63

DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9

M_B_DQ1

8

M_B_DQ5

7

M_B_DQ7

20

M_B_DQ3

21

M_B_DQ0

4

M_B_DQ4

3

M_B_DQ6

16

M_B_DQ2

17

M_B_DQ12

28

M_B_DQ11

29

M_B_DQ13

41

M_B_DQ15

42

M_B_DQ14

24

M_B_DQ8

25

M_B_DQ10

38

M_B_DQ9

37

M_B_DQ37

50

M_B_DQ36

49

M_B_DQ38

62

M_B_DQ39

63

M_B_DQ35

46

M_B_DQ32

45

M_B_DQ33

58

M_B_DQ34

59

M_B_DQ41

70

M_B_DQ44

71

M_B_DQ43

83

M_B_DQ42

84

M_B_DQ40

66

M_B_DQ45

67

M_B_DQ46

79

M_B_DQ47

80

M_B_DQ17

174

M_B_DQ22

173

M_B_DQ18

187

M_B_DQ19

186

M_B_DQ16

170

M_B_DQ23

169

M_B_DQ20

183

M_B_DQ21

182

M_B_DQ24

195

M_B_DQ28

194

M_B_DQ26

207

M_B_DQ30

208

M_B_DQ25

191

M_B_DQ29

190

M_B_DQ31

203

M_B_DQ27

204

M_B_DQ49

216

M_B_DQ48

215

M_B_DQ50

228

M_B_DQ55

229

M_B_DQ52

211

M_B_DQ53

212

M_B_DQ51

224

M_B_DQ54

225

M_B_DQ56

237

M_B_DQ61

236

M_B_DQ62

249

M_B_DQ58

250

M_B_DQ60

232

M_B_DQ57

233

M_B_DQ63

245

M_B_DQ59

246

1D2V_S3_DM1

R1307
1KR2F-L-GP

R1308
1KR2F-L-GP

12
12

M_B_VREFCA

1D2V_S3_DM1

111
112
117
118
123
124
129
130
135
136
141
142
147
148
153
154
159
160
163

1 2

R1304

2R2F-GP

3

2 OF 4

DM2B

DQS0_C
DQS0_T
DQS1_C
DQS1_T
DQS2_C
DQS2_T
DQS3_C
DQS3_T
DQS4_C
DQS4_T
DQS5_C
DQS5_T
DQS6_C
DQS6_T
DQS7_C
DQS7_T
DQS8_C
DQS8_T

DM0#/DBI0#

DM1#/DBI#
DM2#/DBI2#
DM3#/DBI3#
DM4#/DBI4#
DM5#/DBI5#
DM6#/DBI6#
DM7#/DBI7#

DM8#/DBI#/NC

DDR4-260P-79-GP- U

062.10011.M003

DM2C

VDDSPD

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

DDR4-260P-79-GP- U

062.10011.M003

V_SM_VREF_CNTB

C1311
SCD022U16V2KX-3DLG P

2 1

+V_VREF_PATH2

12

R1305
24D9R2F-L-GP

3 OF 4

2

4 OF 4

DM2D

VSS1VSS

2

VSS

5

12

12

C1313

C1321

12

SC1U10V2KX-1DLGP

C1306

SC1U10V2KX-1DLGP

12

C1314

SC10U6D3V3MX-DL-GP

12

C1322

VSS

6

VSS

9

VSS

10

VSS

14

VSS

15

VSS

18

VSS

19

VSS

22

VSS

23

VSS

26

VSS

27

VSS

30

VSS

31

VSS

35

VSS

36

VSS

39

VSS

40

VSS

43

VSS

44

VSS

47

VSS

48

VSS

51

VSS

52

VSS

56

VSS

57

VSS

60

VSS

61

VSS

64

VSS

65

VSS

68

VSS

69

VSS

72

VSS

73

VSS

77

VSS

78

VSS

81

VSS

82

VSS

85

VSS

86

VSS

89

VSS

90

VSS

93

VSS

94

VSS

98

VSS

DDR4-260P-79-GP- U

062.10011.M003

12

C1307

12

C1315

SC10U6D3V3MX-DL-GP

12

C1323

SC1U10V2KX-1DLGP

M_B_DQS_DN0

11

M_B_DQS_DP0

13

M_B_DQS_DN1

32

M_B_DQS_DP1

34

M_B_DQS_DN4

53

M_B_DQS_DP4

55

M_B_DQS_DN5

74

M_B_DQS_DP5

76

M_B_DQS_DN2

177

M_B_DQS_DP2

179

M_B_DQS_DN3

198

M_B_DQS_DP3

200

M_B_DQS_DN6

219

M_B_DQS_DP6

221

M_B_DQS_DN7

240

M_B_DQS_DP7

242

M_B_DQS_DN8

95
97

12
33
54
75
178
199
220
241
96

255

257

VPP

259

VPP

258

VTT

261

261

262

262

NP1

NP1

NP2

NP2

M_B_DQS_DP8

2D5V_S3

1DY2
1DY2

0D6V_S0

R1302

R1303
240R2F-1-LS-GP
240R2F-1-LS-GP

C1302

SC2D2U10V3KX-1DLGP-U

12

1D2V_S3_DM1

3D3V_S0

C1303

SCD1U16V2KX-3DLGP

12

VTT DECAPS VPP DECAPS

0D6V_S0 2D5V_S3

12

C1305

SC10U6D3V3MX-DL-GP

VDDQ DECAPS

1D2V_S3_DM1

12

C1312

SC10U6D3V3MX-DL-GP

12

C1320

SC1U10V2KX-1DLGP

99
102

VSS

103

VSS

106

VSS

107

VSS

167

VSS

168

VSS

171

VSS

172

VSS

175

VSS

176

VSS

180

VSS

181

VSS

184

VSS

185

VSS

188

VSS

189

VSS

192

VSS

193

VSS

196

VSS

197

VSS

201

VSS

202

VSS

205

VSS

206

VSS

209

VSS

210

VSS

213

VSS

214

VSS

217

VSS

218

VSS

222

VSS

223

VSS

226

VSS

227

VSS

230

VSS

231

VSS

234

VSS

235

VSS

238

VSS

239

VSS

243

VSS

244

VSS

247

VSS

248

VSS

251

VSS

252

VSS

12

12

C1308

C1309

SC10U6D3V3MX-DL-GP

SC1U10V2KX-1DLGP

12

12

12

C1317

C1318

C1316

SC10U6D3V3MX-DL-GP

SC10U6D3V3MX-DL-GP

SC10U6D3V3MX-DL-GP

12

12

12

C1325

C1324

C1326

SC1U10V2KX-1DLGP

SC1U10V2KX-1DLGP

SC1U10V2KX-1DLGP

SC1U10V2KX-1DLGP

SC1U10V2KX-1DLGP

1D2V_S3_DM1

12

C1319

SC10U6D3V3MX-DL-GP

SC10U6D3V3MX-DL-GP

12

12

C1329

SC12P50V2JN-DL-GP

SC12P50V2JN-DL-GP

EC1302
SC1KP50V2KX-1GP

12

C1330

12

C1327

C1328

1D2V_S3_DM1

1

D

Y

SC1U10V2KX-1DLGP

2

1

12

12

C1331

C1332

SC12P50V2JN-DL-GP

SC12P50V2JN-DL-GP

SC12P50V2JN-DL-GP

<Core Design>

<Core Design>

<Core Design>

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, T aiwan, R.O.C.

Taipei Hsien 221, T aiwan, R.O.C.

Title

Title

Title

DDR (DDR4-CHB)

DDR (DDR4-CHB)

DDR (DDR4-CHB)

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev
A2

A2

A2

Friday, February 15, 2019

Friday, February 15, 2019

Friday, February 15, 2019
Date: Sheet of

Date: Sheet of

5

4

3

2

Date: Sheet of

Taipei Hsien 221, T aiwan, R.O.C.

Bandon / NorthBay 13''

Bandon / NorthBay 13''

Bandon / NorthBay 13''

1

13 106

13 106

13 106

X00

X00

X00

5

Vinafix.com

D D

C C

4

3

2

1

(Blanking)

B B

<Core Design>

<Core Design>

<Core Design>

A A

5

Title

Titl e

Titl e

(Reserved)_SODIMM _SODIMM4

(Reserved)_SODIMM _SODIMM4

(Reserved)_SODIMM _SODIMM4

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

A4

A4

A4

Date: Sheet of

Date: Sheet of

4

3

Date: Sheet of

2

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Bandon / NorthBay 13''

Bandon / NorthBay 13''

Bandon / NorthBay 13''

14 106Friday, February 15, 2019

14 106Friday, February 15, 2019

14 106Friday, February 15, 2019

1

X00

X00

X00

5

Vinafix.com

Main Func = PCH

SPKR[19,27]

NRB_BIT[20]

SPI_SI_CPU[18,68,99]

SPI_WP_CPU[18,68,99]

SPI_HOLD_CPU[18,68]

GPP_C2[18]

D D

CFG3[6,99]

CFG4[6,99]

GPD_7[15,21]

GPP_D12[20]

GPP_B23[18]

GPD_7[15,21]

GPP_H21[21]

GPP_H23[21]

ITP_PMODE[6,99]

HDA_SDO[19]

GPP_C5[18]

GPP_B22[20]

CNV_RGI_DT[20,61]

Description

LOW

HIGH

Top Swap
Override

GPP_B14 / SPKR /
TIME_SYNC1 /
GSPI0_CS#

3D3V_S5_PCH 3D3V_S0 3D3V_S5_PCH 3D3V_S5_PCH

1

D

R1501

Y

4K7R2F-GP

2

SPKR

1

D

R1507

Y

20KR2F-L-GP

2

Disable (Default)

Enable

20 K± 30% internal pull-down.

4

No Reboot

TLS Confi­dentiality

GPP_B18 GPP_C2 GPP_C5GPIO

1

D

R1502

Y

4K7R2F-GP

2

NRB_BIT GPP_C2 GPP_C5

1

D

R1508

Y

20KR2F-L-GP

2

Disable (Default)

Enable

20 K± 30% internal pull-down.

12

R1503
4K7R2F-GP

1

D

R1509

Y

20KR2F-L-GP

2

Disable Intel ME Crypto Transport Layer Security
(TLS) cipher suite (no confidentiality). (Default)

Enable Intel ME Crypto Transport Layer Security
(TLS) cipher suite (with confidentiality). Must be
pulled up to support Intel AMT with TLS.

20 K± 30% internal pull-down.

3

BOOT BIOS STRAP (BBS)

GPP_B22

1

D

R1504

Y

4K7R2F-GP

2

1

D

R1510

Y

20KR2F-L-GP

2

SPI SELECTED. (DEFAULT)

LPC SELECTED FOR SYSTEM FLASH

20 K± 30% internal pull-down.

2

ESPI OR LPC

12

R1505

4K7R2F-GP

1

D

R1511

Y

20KR2F-L-GP

2

LPC SELECTED

HIGH: ESPI IS SELECTED FOR EC

20 K± 30% internal pull-down.

BOOT HALT

SPI0_MOSI

3D3V_S5_PCH3D3V_S5_PCH

12

R1506
100KR2F-L1-GP

SPI_SI_CPUGPP_B22

1

D

R1512

Y

4K7R2F-GP

2

This strap should sample HIGH.

20 K± 30% internal pull-up.

1

Description

GPIO

C C

LOW

HIGH

Description

B B

GPIO

LOW

HIGH

JTAG ODT DISABLE

GPP_D12

3D3V_S5_PCH 3D3V_S5_PCH

R1513
100KR2F-L1-GP

1 2

GPP_D12 GPP_B23 ITP_PMODE

1

D

R1518

Y

10KR2F-2-GP

2

JTAGE ODT DISABLED

JTAG ODT ENABLED

20 K± 30% internal pull-up

RING OSCILLATOR BYPASS

GPD7

3D3V_SUS 3D3V_SUS 3D3V_SUS

12

R1523
100KR2F-L1-GP

GPD_7 GPP_H21 GPP_H23

1

D

R1527

Y

20KR2F-L-GP

2

XTAL INPUT IS SINGLE ENDED

XTAL INPUT IS ATTACHED 24MHZ

EXI BOOT STALL BYPASS

GPP_B23

12

RVP PH

R1514
4K7R2F-GP

1

D

R1519

Y

20KR2F-L-GP

2

ENABLED (BSSB 2+2) ENABLED

DIABLED (BSSB 4 WIRE)

20 K± 30% internal pull-up

SPI0_IO2 SPI0_IO3 HDA_SDO/I2S0_TXD

3D3V_VCCPRIM 3D3V_VCCPRIM 3D3V_VCCPRIM

12

1

D

2

DISABLED

20 K± 30% internal pull-up

XTAL FREQUENCY SELECT

GPP_H21

12

R1524
4K7R2F-GP

1

D

R1528

Y

20KR2F-L-GP

2

38.4/19.2MHZ (DEFAULT)

R1515
100KR2F-L1-GP

SPI_WP_CPU SPI_HOLD_CPU

R1520

Y

4K7R2F-GP

M.2 CNVi
Mode
Select

GPP_F6 /CNV_RGI_DT GPP_H23

1D8V_S5

12

R1525
20KR2F-L-GP

CNV_RGI_DT

1

D

R1529

Y

4K7R2F-GP

2

Integrated CNVi enabled

Integrated CNVi disabled

A0 PERSONALITY STRAPCONSENT STRAP

12

R1516
100KR2F-L1-GP

1

D

R1521

Y

4K7R2F-GP

2

ENABLED

DISABLED

20 K± 30% internal pull-up

MAF/SAF STRAP

1

D

R1526

Y

4K7R2F-GP

2

1

D

R1530

Y

4K7R2F-GP

2

MAF ENABLE

SAF ENABLE

Flash Descriptor
Security Override

DY

12

R1517
2K2R2F-GP

HDA_SDO

Enable security measures,
and security is not overridden

Disable security measures,
and security is overridden

20 K± 30% internal pull-down.

DFXTESTMODE

ITP_PMODE

1

R1522

D

1KR2F-L-GP

Y

2

DFXTESTMODE DISABLE (DEFAULT)

DFXTESTMODE ENABLE

20 K± 30% internal pull-up

A A

5

<Core Design>

<Core Design>

<Core Design>

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, T aiwan, R.O.C.

Taipei Hsien 221, T aiwan, R.O.C.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

A2

A2

A2

Date: Sheet of

Date: Sheet of

4

3

2

Date: Sheet of

Taipei Hsien 221, T aiwan, R.O.C.

CPU_(CS-2/EMMC)

CPU_(CS-2/EMMC)

CPU_(CS-2/EMMC)

Bandon / NorthBay 13 ''

Bandon / NorthBay 13 ''

Bandon / NorthBay 13 ''

1

15 106Friday, February 15, 2019

15 106Friday, February 15, 2019

15 106Friday, February 15, 2019

X00

X00

X00

5

Vinafix.com

Main Func = PCH

USB3.1 PORT3

USB3_USB31_RX_N[35]
USB3_USB31_RX_P[35]
USB3_USB31_TX_N[35]
USB3_USB31_TX_P[35]

USB3.1 PORT4

USB4_USB31_RX_N[35]
USB4_USB31_RX_P[35]
USB4_USB31_TX_N[35]

D D

C C

B B

USB4_USB31_TX_P[35]

WWAN

WWAN _USB31_RX_N[62]
WWAN _USB31_RX_P[62]
WWAN _USB31_TX_N[62]
WWAN _USB31_TX_P[62]

LAN

LAN_PCIE_RX_N[97]
LAN_PCIE_RX_P[97]
LAN_PCIE_TX_N[97]
LAN_PCIE_TX_P[97]

CARD

CARD_PCIE_RX_N[33]
CARD_PCIE_RX_P[33]
CARD_PCIE_TX_N[33]
CARD_PCIE_TX_P[33]

WLAN

WLAN_PCIE_RX_N[61]
WLAN_PCIE_RX_P[61]
WLAN_PCIE_TX_N[61]
WLAN_PCIE_TX_P[61]

WWAN

WWAN_SATA_R X_N[62]
WWAN_SATA_R X_P[62]
WWAN_SATA_TX_N[62]
WWAN_SATA_TX_P[62]

SSD

SSD_PCIE_RX_N1[63]
SSD_PCIE_RX_P1[63]
SSD_PCIE_TX_N1[63]
SSD_PCIE_TX_P1[63]

SSD_PCIE_RX_N2[63]
SSD_PCIE_RX_P2[63]
SSD_PCIE_TX_N2[63]
SSD_PCIE_TX_P2[63]

SSD_PCIE_RX_N3[63]
SSD_PCIE_RX_P3[63]
SSD_PCIE_TX_N3[63]
SSD_PCIE_TX_P3[63]

SSD_SATA_RX_N[63]
SSD_SATA_RX_P[63]
SSD_SATA_TX_N[63]
SSD_SATA_TX_P[63]

Type C port 1

USB1_USB20_N[72]
USB1_USB20_P[72]

FP

FP_USB20_N[92]
FP_USB20_P[92]

USB charger

Charger_USB20_N[36]
Charger_USB20_P[36]

USB2.0 port1

USB3_USB20_N[35]

USB3_USB20_P[35]

CAMERA

CCD_USB20_N[56]
CCD_USB20_P[56]

WWAN

WWAN _USB20_N[62]
WWAN _USB20_P[62]

USH

USH_USB20_N[66]
USH_USB20_P[66]

BT

BT_USB20_N[61]
BT_USB20_P[61]

#543016:
220 nF nominal capacitors are recommended for Gen 3.
100 nF nominal capacitors are recommended for Gen 2.

USB3.1 PORT3

USB1_USB31_RX_N[71]
USB1_USB31_RX_P[71]
USB1_USB31_TX_N[71]
USB1_USB31_TX_P[71]

4

LAN

WLAN

CARDREADER

WWAN

SSD

1 2

R1604 100R2F-L1-GP-U

3

(#545659) The xHCI controller supports USB Debug port on all USB3.0 capable ports.

8 OF 20CPU1H

USB_ID

CB5
CB6
CA4
CA3

BY8
BY9
CA2
CA1

BY7
BY6
BY4
BY3

BW6
BW5
BW2
BW1

CE3
CE4

CE1
CE2

CG3
CG4

CD3
CD4

CG5
CG6

CC1
CC2

CG8
CG9

CB8
CB9

CH5
CH6

CC3
CC4

CC5
CE8
CC6

CK6
CK5
CK8
CK9

CP8
CR8
CM8

CN8
CM10
CP10

CN7

AR3

M3042_PCIE#_SATA

USB1_USB31_RX_N
USB1_USB31_RX_P
USB1_USB31_TX_N
USB1_USB31_TX_P

USB3_USB31_RX_N
USB3_USB31_RX_P
USB3_USB31_TX_N
USB3_USB31_TX_P

USB4_USB31_RX_N
USB4_USB31_RX_P
USB4_USB31_TX_N
USB4_USB31_TX_P

WWAN _USB31_RX_N
WWAN _USB31_RX_P
WWAN _USB31_TX_N
WWAN _USB31_TX_P

USB1_USB20_N
USB1_USB20_P

USB3_USB20_N
USB3_USB20_P

Charger_USB20_N
Charger_USB20_P

CCD_USB20_N
CCD_USB20_P

WWAN _USB20_N
WWAN _USB20_P

USH_USB20_N
USH_USB20_P

FP_USB20_N
FP_USB20_P

BT_USB20_N
BT_USB20_P

USB2_COMP
USB_ID
USB_VBUSSENSE

USB_OC0#
USB_OC1#
USB_OC2#
USB_OC3#

HDD_DEVSLP
M3042_DEVSLP
M2280_DEVSLP

HDD_DET#

M2280_PCIE_SATA#

LAN_PCIE_RX_N
LAN_PCIE_RX_P
LAN_PCIE_TX_N
LAN_PCIE_TX_P

WLAN_PCIE_RX_N
WLAN_PCIE_RX_P
WLAN_PCIE_TX_N
WLAN_PCIE_TX_P

CARD_PCIE_RX_N
CARD_PCIE_RX_P
CARD_PCIE_TX_N
CARD_PCIE_TX_P

WWAN_SATA_R X_N
WWAN_SATA_R X_P
WWAN_SATA_TX_N
WWAN_SATA_TX_P

SSD_PCIE_RX_N1
SSD_PCIE_RX_P1
SSD_PCIE_TX_N1
SSD_PCIE_TX_P1

SSD_PCIE_RX_N2
SSD_PCIE_RX_P2
SSD_PCIE_TX_N2
SSD_PCIE_TX_P2

SSD_PCIE_RX_N3
SSD_PCIE_RX_P3
SSD_PCIE_TX_N3
SSD_PCIE_TX_P3

SSD_SATA_RX_N
SSD_SATA_RX_P
SSD_SATA_TX_N
SSD_SATA_TX_P

PCIE_RCOMPN
PCIE_RCOMPP

Layout Note:

BW9

PCIE5_RXN/USB31_5_RXN

BW8

PCIE5_RXP/USB31_5_RXP

BW4

PCIE5_TXN/USB31_5_TXN

BW3

PCIE5_TXP/USB31_5_TXP

BU6

PCIE6_RXN/USB31_6_RXN

BU5

PCIE6_RXP/USB31_6_RXP

BU4

PCIE6_TXN/USB31_6_TXN

BU3

PCIE6_TXP/USB31_6_TXP

BT7

PCIE7_RXN

BT6

PCIE7_RXP

BU2

PCIE7_TXN

BU1

PCIE7_TXP

BU9

PCIE8_RXN

BU8

PCIE8_RXP

BT4

PCIE8_TXN

BT3

PCIE8_TXP

BP5

PCIE9_RXN

BP6

PCIE9_RXP

BR2

PCIE9_TXN

BR1

PCIE9_TXP

BN6

PCIE10_RXN

BN5

PCIE10_RXP

BR4

PCIE10_TXN

BR3

PCIE10_TXP

BN10

PCIE11_RXN/SATA0_RXN

BN8

PCIE11_RXP/SATA0_RXP

BN4

PCIE11_TXN/SATA0_TXN

BN3

PCIE11_TXP/SATA0_TXP

BL6

PCIE12_RXN/SATA1A_RXN

BL5

PCIE12_RXP/SATA1A_RXP

BN2

PCIE12_TXN/SATA1A_TXN

BN1

PCIE12_TXP/SATA1A_TXP

BK6

PCIE13_RXN

BK5

PCIE13_RXP

BM4

PCIE13_TXN

BM3

PCIE13_TXP

BJ6

PCIE14_RXN

BJ5

PCIE14_RXP

BL2

PCIE14_TXN

BL1

PCIE14_TXP

BG5

PCIE15_RXN/SATA1B_RXN

BG6

PCIE15_RXP/SATA1B_RXP

BL4

PCIE15_TXN/SATA1B_TXN

BL3

PCIE15_TXP/SATA1B_TXP

BE5

PCIE16_RXN/SATA2_RXN

BE6

PCIE16_RXP/SATA2_RXP

BJ4

PCIE16_TXN/SATA2_TXN

BJ3

PCIE16_TXP/SATA2_TXP

CE6

PCIE_RCOMP_N

CE5

PCIE_RCOMP_P

CR28

GPP_H12/M2_SKT2_CFG0

CP28

GPP_H13/M2_SKT2_CFG1

CN28

GPP_H14/M2_SKT2_CFG2

CM28

GPP_H15/M2_SKT2_CFG3

WHISKEY-LAKE-GP

ZZ.00CPU.271

1. Trace Width: 4 mils min (breakout) 12-15 mils (trace)
Note: Must maintain low DC resistance routing (<0.1 ohm).

2. Isolation Spacing: At least 12 mils to any adjacent
high speed I/O.

PCIE1_RXN/USB31_1_RXN
PCIE1_RXP/USB31_1_RXP
PCIE1_TXN/USB31_1_TXN

PCIE1_TXP/USB31_1_TXP

PCIE2_RXN/USB31_2_RXN/SSIC_1_R XN
PCIE2_RXP/USB31_2_RXP/SSIC_1_RXP
PCIE2_TXN/USB31_2_TXN/SSIC_1_T XN

PCIE2_TXP/USB31_2_TXP/SSIC_1_TXP

PCIE3_RXN/USB31_3_RXN
PCIE3_RXP/USB31_3_RXP
PCIE3_TXN/USB31_3_TXN

PCIE3_TXP/USB31_3_TXP

PCIE4_RXN/USB31_4_RXN
PCIE4_RXP/USB31_4_RXP
PCIE4_TXN/USB31_4_TXN

PCIE4_TXP/USB31_4_TXP

USB2_COMP

USB_VBUSSENSE

GPP_E9/USB2_OC0#/GP_BSSB_CLK

GPP_E10/USB2_OC1#/GP_BSSB_DI

GPP_E11/USB2_OC2#
GPP_E12/USB2_OC3#

GPP_E4/DEVSLP0
GPP_E5/DEVSLP1
GPP_E6/DEVSLP2

GPP_E0/SATAXPCIE0/SATAGP0
GPP_E1/SATAXPCIE1/SATAGP1
GPP_E2/SATAXPCIE2/SATAGP2

GPP_E8/SATALED#/SPI1_CS1#

USB2N_1
USB2P_1

USB2N_2
USB2P_2

USB2N_3
USB2P_3

USB2N_4
USB2P_4

USB2N_5
USB2P_5

USB2N_6
USB2P_6

USB2N_7
USB2P_7

USB2N_8
USB2P_8

USB2N_9
USB2P_9

USB2N_10
USB2P_10

RSVD#AR3

2

USB3.1 port1

USB3.1 port3

USB3.1 port4

WWAN

Type C port 1

USB3.1 port 3

USB3.1 port 4

CAMERA

WWAN

USH

FP

BT

1 2

R1607 113R2F-GP

1 2

R1606 0R0402-PAD

1 2

R1608 10KR2F-2-GP

DY

1

TPAD14-OP-GP

TP1602

USB_OC3#
USB_OC2#
USB_OC1#
USB_OC0#

HDD_DET#

m2280_PCIE_SATA#
m3042_PCIE#_SATA

RN1601

8
7
6

SRN10KJ-6-GP

R1605

10KR2F-2-GP

RN1602

2 3
1

SRN10KJ-5-GP

12

DY

1

3D3V_S5_PCH

1
2
3
45

3D3V_S0

4

3D3V_SUS

A A

USB_OC1#[35]
USB_OC0#[36]

m2280_PCIE_SATA#[63]
m3042_PCIE#_SATA[24]

M3042_DEVSLP[62]
M2280_DEVSLP[16,63]

M2280_DEVSLP[16,63]

5

<Core Design>

<Core Design>

<Core Design>

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiw an, R.O.C.

Taipei Hsien 221, Taiw an, R.O.C.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

4

3

2

Date: Sheet of

Taipei Hsien 221, Taiw an, R.O.C.

CPU_(PCIE/SATA/USB)

CPU_(PCIE/SATA/USB)

CPU_(PCIE/SATA/USB)

Bandon / NorthBay 13 ''

Bandon / NorthBay 13 ''

Bandon / NorthBay 13 ''

16 106Friday, February 15, 2019

16 106Friday, February 15, 2019

16 106Friday, February 15, 2019

1

X00

X00

X00

5

Vinafix.com

Main Func = PCH

SIO_SLP_SUS#[24,40,52,53,54]
SIO_SLP_S5#[68]
SIO_SLP_S4#[40,51,68]
SIO_SLP_S3#[24,40,51,68,71]
SIO_SLP_A#[68]

D D

C C

SIO_SLP_S0#[40,54,68,91]

SIO_SLP_WLAN#[40]

SIO_SLP_LAN#[40]

SYS_RESET#[68,99]

DSW_PWROK_R[24]
PCH_PWROK[46]
SYS_PWROK_R[24]

SIO_PWRBTN#[24,99]

AC_PRESENT[24]

LAN_WAKE#[24,97]

PCH_PCIE_WAKE#[24,62,71]

PM_LANPHY_ENABLE[97]

RTCRST_ON[18,24]

RSMRST#_KBC[24,64,99]

ALL_SYS_PWRGD[24]

PCH_PLTRST#_ RIGHT[33,61,62,91,97]

PCH_PLTRST#_LEFT[63,71,99]

CPU_C10_GATE#[ 21,24,40,54,91]

H_CPUPWRGD[3]

3.3V_CAM_EN#[40]

AC_DIS_ACP[44]

RSMRST#_KBC PCH_RSMRST#_R

SYS_PWROK_R
PCH_PWROK

TP1701 TPAD14-OP-GP
TP1702 TPAD14-OP-GP

RSMRST#_KBC

DSW_PWROK_R DSW _PWROK

From EC Control

12

EC1705

SC1KP50V2KX-1DLGP

DY

12

4

1

R17440R0402-PAD

1

R17420R0402-PAD
R17430R0402-PAD 1 2

Reserve ,Can be remove on EVT .

1 2

NON_DS

R1745
0R0402-PAD

1 2

DS

R1713

10KR2F-2-GP

R1738
0R2J-2-GP

12

R1709

100KR2F-L1-GP

DS

DY

12

12

PCH_PLTRST#
SYS_RESET#

2

H_CPUPWRGD
VCCST_PWRGD_ R

SYS_PWROK_CPU

2

PCH_PWROK_R
DSW_PWRO K

ME_SUS_PWR_ACK

1
1

SUSACK#

PCH_PCIE_WAKE#
LAN_WAKE#
PM_LANPHY_ENABLE

R1739
100KR2F-L1-GP

12

EC1701

EC1702

SC1KP50V2KX-1DLGP

SC1KP50V2KX-1DLGP

DY

DY

BJ35

GPP_B13/PLTRST#

CN10

SYS_RESET#

BR36

RSMRST#

AR2

PROCPWRGD

BJ2

VCCST_PWRGOOD

CR10

SYS_PWROK

BP31

PCH_PWROK

BP30

DSW_PWRO K

BV34

GPP_A13/SUSWARN#/SUSPWRDACK

BY32

GPP_A15/SUSACK#

BU30

WAKE#

BU32

GPD2/LAN_WAKE#

BU34

GPD11/LANPHYPC

WHISKEY-LAKE-GP

ZZ.00CPU.271

RSMRST#_KBC
PCH_RSMRST#_R
PCH_PWROK
DSW_PWROK_R
SYS_RESET#
PCH_PLTRST#

EC1703

SC1KP50V2KX-1DLGP

12

ED1702
AZ5725-01FDR7G-GP

12

83.05725.0A0

3

11 OF 20CP U1K

GPP_B12/SLP_S0#

GPD4/SLP_S3#
GPD5/SLP_S4#

GPD10/SLP_S5#

SLP_SUS#

SLP_LAN#

GPD9/SPL_WLAN#

GPD6/SLP_A#

GPD3/PWRBTN#

GPD1/ACPRESENT

GPD0/BATLOW#

INTRUDER#

GPP_B11/EXT_PWR_GATE#

GPP_B2/VRALERT#

INPUT3VSEL

SPI Voltage
Configu-ration

12

R1731
330KR2J-L1-GP

RTC_INTRUDER#

BJ37
BU36
BU27
BT29

BU29
BT31
BT30
BU37

BU28
BU35
BV36

BR35

CC37
CC36

BT27

3V SELECT STRAP
LOW → 3.3V +/-5%
HIGH → 3.0V +/-5%

3D3V_SUS3D3V_RTC_PCH

2

SIO_SLP_S0#
SIO_SLP_S3#
SIO_SLP_S4#
SIO_SLP_S5#

SIO_SLP_SUS#
SIO_SLP_LAN#
SIO_SLP_WLAN#
SIO_SLP_A#

SIO_PWRBTN#
AC_PRESENT
PCH_BATLOW#

RTC_INTRUDER#

3.3V_CAM_EN#
VRALERT#

INPUT3VSEL

12

DY

R1729
4K7R2F-GP

INPUT3VSEL

12

R1730
4K7R2F-GP

3D3V_SUS

1 2

1 2

1 2

1 2

1

DY

1 2

1 2

1 2

DY

12

12

AC_PRESENT

SIO_SLP_S0#

SYS_RESET#

VRALERT#

SIO_PWRBTN#

2

LAN_WAKE#

PCH_PCIE_WAKE#

3.3V_CAM_EN#

R1725
10KR2F-2-GP

PCH_BATLOW#

R1732
10KR2F-2-GP

R1723
100KR2F-L1-GP

R1733
100KR2F-L1-GP

R1726
10KR2F-2-GP

R1735
10KR2F-2-GP

R1728
10KR2F-2-GP

R1724
10KR2F-2-GP

R1727
1KR2J-1-GP

R1736
100KR2F-L1-GP

3D3V_SUS

1

SIO_SLP_S3#

SIO_SLP_S4#

SIO_SLP_SUS#

SIO_SLP_LAN#

SIO_SLP_WLAN#

SIO_SLP_A#

1

DY

R1737
100KR2F-L1-GP

1

DY

R1746
100KR2F-L1-GP

1

DY

R1747
100KR2F-L1-GP

1

DY

R1748
100KR2F-L1-GP

1

DY

R1749
100KR2F-L1-GP

1

DY

R1750
100KR2F-L1-GP

2

2

2

2

2

2

PCH_PWROK:
pull-up resistance should be in range 1/10th of pull down resistance

B B

12

VCCST_PWRGD

Volatge Level 1V

ALL_SYS_PWRGD

U1702

1

NC#1

VCC

2

A

GND3Y

74LVC1G07GW-GP

73.01G07.0HG

5

4

C1704

1D05V_VCCST3D3V_SUS

SCD1U16V2KX-3DLGP

12

R1740
1KR2J-1-GP

R1741

1 2

62R2F-GP

PCH_PLTRST#

U74LVC1G08G-AL5-R-GP-U

VCCST_PWRGD_ R

U1701

1

A

2

B

GND3Y

73.01G08.EHG

2ND = 73.7SZ08.DAH

SSD
TBT

Intel requst set as PDG .

A A

VCC

EC
LAN
CARDREADER
WLAN
WWAN
TPM
ESPI CONN1
ESPI CONN2

3D3V_SUS

5

4

C1701
SCD1U16V2KX-3DLGP

1 2

PCH_PLTRST#_Q

12

R1708
100KR2F-L1-GP

1 2

R1701
0R0402-PAD

1 2

R1706
0R0402-PAD

PCH_PLTRST#_ RIGHT

PCH_PLTRST#_LEFT

5

4

3

CheckList 10K ,Reserve PL for RTC rst test

3D3V_AUX_S5

1 2

R1734
100KR2F-L1-GP

Q1702

Note:ZZ.27002.F7C01

1

2

3 4

2N7002KDW-1-GP

6

5

75.27002.F7C

<Core Design>

<Core Design>

<Core Design>

Title

Title

Title

CPU_(POWER MANAGEMENT)

CPU_(POWER MANAGEMENT)

CPU_(POWER MANAGEMENT)

Size Document Number Re v

Size Document Number Re v

Size Document Number Re v

Cu st om

Cu st om

Cu st om

Da te : Sheet of

Da te : Sheet of

Da te : Sheet of

2

D1702
RB751VM-40TE-17-GP

83.R2004.J8F

A K

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Bandon / NorthBay 13''

Bandon / NorthBay 13''

Bandon / NorthBay 13''

AC_DIS_ACP

AC_PRESENT

RSMRST#_KBC

17 106Friday, February 15, 2019

17 106Friday, February 15, 2019

17 106Friday, February 15, 2019

1

X00

X00

X00

5

Vinafix.com

Main Func = PCH

SPI_CLK_CPU[68]
SPI_SI_CPU[15,68,99]
SPI_SO_CPU[68]

SPI ROM

D D

WLAN

WWAN

LAN

CARD

SSD

C C

ESPI

OTHER

B B

A A

SPI_WP_CPU[15,68,99]
SPI_HOLD_CPU[15,68]
SPI_CS_CPU_N0[68]
SPI_CS_CPU_N1[68]
SPI_CS_CPU_N2[91]

WLAN_CLK_CPU_P[61]
WLAN_CLK_CPU_N[61]
WLAN_CLKREQ_CPU_N[61]

WW AN_CLK_CPU_P[62]
WW AN_CLK_CPU_N[62]
WW AN_CLKREQ_CPU_N[62]

LAN_CLK_CPU_N[97]
LAN_CLK_CPU_P[97]
LAN_CLKREQ_CPU_N[97]

CARD_CLK_CPU_N[33]
CARD_CLK_CPU_P[33]
CARD_CLKREQ_CPU_N[33]

SSD_CLK_CPU_N[63]
SSD_CLK_CPU_P[63]
SSD_CLKREQ_CPU_N[63]

ESPI_IO0[24,68]
ESPI_IO1[24,68]
ESPI_IO2[24,68]
ESPI_IO3[24,68]
ESPI_CS#[24,68]
ESPI_RESET#[24,68]
ESPI_CLK[24,68]

CPU_SMB_SCL_DDR[12,13,99]
CPU_SMB_SDA_DDR[12,13,99]
GPP_C2[15]
SML0_SMBCLK[97]
SML0_SMBDATA[97]
SML1_SMBCLK[24]
SML1_SMBDAT[24]
GPP_C5[15]
SUSCLK[61,63]

WW AN_GPIO_PERST#[62]

WW AN_BB_RST#[62]

XDP_CLK_CPU_N[99]
XDP_CLK_CPU_P[99]

TBT_CLK_CPU_N[71]
TBT_CLK_CPU_P[71]
TBT_CLKREQ_CPU_N[71]

PULSAR_38P4M_REFCLK[61]

CL_CLK[61]
CL_RST#[61]
CL_DATA[61]

RTC_RST#[68]

GPP_B23[15]

ESPI_ALERT#[24]

RTCRST_ON[24]

MEDIACARD_IRQ#[33]

RTC_DET#[20,25]

5

SPI_CLK_CPU
SPI_SO_CPU
SPI_SI_CPU
SPI_WP_CPU
SPI_HOLD_CPU
SPI_CS_CPU_N0
SPI_CS_CPU_N1
SPI_CS_CPU_N2

ISH_LAN#
RTC_DET#_2
WW AN_BB_RST#
WW AN_GPIO_PERST#
MEDIACARD_IRQ#

CL_CLK
CL_DATA
CL_RST#

ESPI_ALERT#

3D3V_S0

75.27002.F7C

MEM_SMBCLK

LAN_CLKREQ_CPU_N

CARD_CLKREQ_CPU_N

WLAN_CLKREQ_CPU_N

WW AN_CLKREQ_CPU_N

SSD_CLKREQ_CPU_N

3D3V_S0

RN1805

1
2
3
4 5

SRN10KJ-6-GP

1 2

R1822

10KR2F-2-GP

1 2

R1824

10KR2F-2-GP

DY

1 2

R1817

100KR2F-L1-GP

4

CH37

SPI0_CLK

CF 37

SPI0_MISO

CF 36

SPI0_MOSI

CF 34

SPI0_IO2

CG 34

SPI0_IO3

CG 36

SPI0_CS0#

CG 35

SPI0_CS1#

CH34

SPI0_CS2#

CF 20

GPP_D1/SPI1_CLK/BK1/ SBK1

CG 22

GPP_D2/SPI1_MISO_I O1/BK2/SBK2

CF 22

GPP_D3/SPI1_MOSI_I O0/BK3/SBK3

CG 23

GPP_D21/SPI1_IO2

CH23

GPP_D22/SPI1_IO3

CG 20

GPP_D0/SPI1_CS0#/BK0/ SBK0

CH7

CL_CLK

CH8

CL_DATA

CH9

CL_RST#

BV29

GPP_A0/RCIN#/TIME_SYNC1

BV28

GPP_A6/SERIRQ

WHISKEY-LAKE-GP

ZZ.00CPU.271

RN1803

1

4

2 3

SRN2K2J-1-GP

Q1803

Note:ZZ.27002.F7C01

1

6

2

5

34

2N7002KDW-1-GP

R1843
0R0402-PAD

1 2

R1842
0R0402-PAD

1 2

R1845
0R0402-PAD

1 2

R1847
0R0402-PAD

1 2

R1848
0R0402-PAD

1 2

R1849
0R0402-PAD

1 2

R1851
0R0402-PAD

1 2

8
7
6

RTC_DET#_2RTC_DET#

LAN_CLK_CPU_N
LAN_CLK_CPU_P
CLKREQ_PCIE#0

CARD_CLK_CPU_N
CARD_CLK_CPU_P
CLKREQ_PCIE#1

WLAN_CLK_CPU_N
WLAN_CLK_CPU_P
CLKREQ_PCIE#2

WW AN_CLK_CPU_N
WW AN_CLK_CPU_P
CLKREQ_PCIE#3

SSD_CLK_CPU_N
SSD_CLK_CPU_P
CLKREQ_PCIE#4

TBT_CLK_CPU_N
TBT_CLK_CPU_P
CLKREQ_PCIE#5TBT_CLKREQ_CPU_N

CARD_CLKREQ_CPU_N
WW AN_CLKREQ_CPU_N
WLAN_CLKREQ_CPU_N
LAN_CLKREQ_CPU_N

SSD_CLKREQ_CPU_N

TBT_CLKREQ_CPU_N

SUSCLK

4

CPU_SMB_SDA_DDRMEM_SMBDATA

AW 2

AY3

CF 32

BC1
BC2

CE 32

BD3
BC3

CF 30

BH3
BH4

CE 31

BA1
BA2

CE 30

BE1
BE2

CF 31

GPP_C0/SMBCLK

GPP_C1/SMBDATA

GPP_C2/SMBALERT#

GPP_C3/SML0CLK

GPP_C4/SML0DATA

GPP_C5/SML0ALERT#

GPP_C6/SML1CLK

GPP_B23/SML1ALERT#/PCHHOT#

GPP_A14/SUS_STAT#/ESPI_RESET#

GPP_A9/CLKOUT_LPC0/ESPI _CLK

GPP_C7/SML1DATA

GPP_A1/LAD0/ESPI_I O0
GPP_A2/LAD1/ESPI_I O1
GPP_A3/LAD2/ESPI_I O2
GPP_A4/LAD3/ESPI_I O3

GPP_A5/LFRAME#/ESPI_CS#

GPP_A10/CLKOUT_LPC1

GPP_A8/CLKRUN#

ESPI_CPU_CLK_R

ESPI_CPU_IO0_R

ESPI_CPU_IO2_R

ESPI_CPU_IO3_R

Intel requst set as PDG .

CLKOUT_PCIE_N0
CLKOUT_PCIE_P0
GPP_B5/SRCCLKREQ0#

CLKOUT_PCIE_N1
CLKOUT_PCIE_P1
GPP_B6/SRCCLKREQ1#

CLKOUT_PCIE_N2
CLKOUT_PCIE_P2
GPP_B7/SRCCLKREQ2#

CLKOUT_PCIE_N3
CLKOUT_PCIE_P3
GPP_B8/SRCCLKREQ3#

CLKOUT_PCIE_N4
CLKOUT_PCIE_P4
GPP_B9/SRCCLKREQ4#

CLKOUT_PCIE_N5
CLKOUT_PCIE_P5
GPP_B10/SRCCLKREQ5#

WHISKEY-LAKE-GP

ZZ.00CPU.271

XTL_24M_X1_CPU

XTL_24M_X2_CPU

LAN

CARDREADER

WLAN

WWAN

SSD

TBT

R1839
33R2F-3-GP

R1841

200KR2F-L-GP

R1840
33R2F-3-GP

3

5 OF 20CPU1E

CK 14
CH15
CJ 15

CH14
CF 15
CG 15

CN15
CM1 5
CC34

CA 29
BY2 9
BY2 7
BV2 7
CA 28
CA 27

BV3 2
BV3 0
BY3 0

R1834
33R2F-3-GP

1 2

R1835
15R2F-2-GP

1 2

R1836
15R2F-2-GP

1 2

R1838
15R2F-2-GP

1 2

R1850
15R2F-2-GP

1 2

10 OF 20CPU1J

CLKOUT_ITPXDP_N

CLKOUT_ITPXDP_P

GPD8/SUSCLK

XTAL_IN

XTAL_OUT

XCLK_BIASREF

CLKIN_XTAL

RTCX1
RTCX2

SRTCRST#

RTCRST#

XTL_24M_X1_R

12

12

XTL_24M_X2_R

12

3

MEM_SMBCLK
MEM_SMBDATA
GPP_C2

SML0_SMBCLK
SML0_SMBDATA
GPP_C5

SML1_SMBCLK
SML1_SMBDAT
GPP_B23

ESPI_CPU_IO0_R
ESPI_CPU_IO1_R
ESPI_CPU_IO2_R
ESPI_CPU_IO3_R
ESPI_CS#
ESPI_RESET#

ESPI_CPU_CLK_R

CLKRUN#

ESPI_CLK

ESPI_IO0

ESPI_IO1ESPI_CPU_IO1_R

ESPI_IO2

ESPI_IO3

XDP_CLK_CPU_N

AU1

XDP_CLK_CPU_P

AU2

BT3 2

SUSCLK

XTL_24M_X1_CPU

CK 3

XTL_24M_X2_CPU

CK 2

XCLK_BIASREF

CJ 1

PULSAR_38P4M_REFCLK_CPU

CM3

XTL_32K_X1_CPU

BN3 1

XTL_32K_X2_CPU

BN3 2

SRTC_RST#

BR3 7

RTC_RST#

BR3 4

23

4 1

ESPI_ALERT#

SML0_SMBCLK
SML0_SMBDATA

SML0_SMBCLK
SML0_SMBDATA

SML1_SMBCLK
SML1_SMBDAT

MEM_SMBCLK
MEM_SMBDATA

CLKRUN#

SPI_CLK_CPU
ESPI_RESET#
ESPI_CS#

ESPI_CLK

1

D

Y

2

R1825
10KR2J-3-GP

1 2

C1807
SC15P50V2JN-DL-GP

12

X1801
XTAL-24MHZ-189-GP

082.30006.0571

C1808
SC15P50V2JN-DL-GP

12

1 2

SERIRQ PH:
PDG: 8.2k
CRB: 10k

R1802 499R2F-2-GP

1

R1812 499R2F-2-GP

1

1 2

R1807

1 2

R1808 499R2F-2-GP

2 3
1

2 3
1

1

R1810 8K2R2F-1-GP

DY

1 2

R1809 100KR2F-L1-GP

1

R1813 100KR2F-L1-GP

DY

1

R1814 75KR2J-GP

DY

RF Reserve

FC1802
SC27P50V2JN-2-GP

1 2

R1823

60D4R2F-GP

R1853
0R0402-PAD

1 2

RTCRST_ON

2

R1821
10KR2J-3-GP

DY
DY

RN1804

SRN1KJ-7-GP
RN1806

SRN1KJ-7-GP

2

2
2

PULSAR_38P4M_REFCLKPULSAR_38P4M_REFCLK_CPU

2

2
2

499R2F-2-GP

4

4

1 2

R1844
0R0402-PAD

R1846

100KR2F-L1-GP

1

1D8V_VCCPRIM

3D3V_LAN

3D3V_S5_PCH

3D3V_S0

XTL_32K_X2_CPU

XTL_32K_X1_CPU

RTCRST_ON_Q

12

SC1U10V2KX-1DLGP

SRTC_RST#
RTC_RST#CPU_SMB_SCL_DDR

X1802
XTAL-32D768KHZ-98-GP

082.30003.0301

C1804

SC12P50V2JN-DL-GP

1 2

Q1802

G

S

Notice:ZZ.2N702.J3101

2N7002K-2-GP

84.2N702.J31

GAP-OPEN

1 2

1 2

3D3V_S5_PCH

BANDON

R1818
100KR2F-L1-GP

1 2

ISH_LAN#

NORTHBAY

R1819
100KR2F-L1-GP

1 2

3D3V_RTC_PCH

1

23

RN1802
SRN20KJ-1-GP

4

12

C1801

21

G1802

R1815
10MR2J-L-GP

D

12

C1802
SC1U10V2KX-1DLGP

C1803
SC12P50V2JN-DL-GP

1 2

R1852

RTC_RST#_R RTC_RST#

75R2F-2-GP

1 2

ARD 0.85

<Core Design>

<Core Design>

<Core Design>

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, S ec.1, Hsin Tai Wu Rd., H sichih,

21F, 88, S ec.1, Hsin Tai Wu Rd., H sichih,

21F, 88, S ec.1, Hsin Tai Wu Rd., H sichih,
Taipei Hsien 221, Taiwan, R .O.C.

Taipei Hsien 221, Taiwan, R .O.C.

Taipei Hsien 221, Taiwan, R .O.C.

Title

Title

Title

CPU_(LPC/SPI/SMBUS/CL/CLK)

CPU_(LPC/SPI/SMBUS/CL/CLK)

CPU_(LPC/SPI/SMBUS/CL/CLK)

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

A3

A3

A3

Date: Sheet of

Date: Sheet of

Date: Sheet of

Bandon / NorthBay 13''

Bandon / NorthBay 13''

Bandon / NorthBay 13''

18 106Friday, February 15, 2019

18 106Friday, February 15, 2019

18 106Friday, February 15, 2019

1

X00

X00

X00

5

Vinafix.com

4

3

2

1

Main Func = PCH

HDA_SDI0[27]
HDA_SDOUT_CODEC[27]
HDA_SYNC_CODEC[27]
HDA_BITCLK_CODEC[27]

D D

C C

B B

HDA_SDO[15]

CONTACTLESS_DET#[66]

CAM_MIC_CBL_DET#[56]

SPK_DET#[29]

HOST_SD_WP#[33]

AUD_PWR_EN[27]

ME_FWP_PCH[68]

SPKR[15,27]

CLKREQ_CNV[61]
CNV_RF_RESET#[61]

KB_DET#[65]

WWAN_GPIO_WAKE#[62]

TBT_CIO_PLUG_EVENT#[71]

DMIC_SDA_CODEC_CPU[56]

DMIC_SCL_CODEC_CPU[56]

ANT_CONFIG[62]

CNV_EN[61]

HDA_RST#[27]

3D3V_S0

3D3V_SUS

3D3V_S0

33R2F-3-GP
33R2F-3-GP
33R2F-3-GP

1 2

R1908 10KR2F-2-GP

1 2

R1909 10KR2F-2-GP

1 2

R1911 10KR2F-2-GP

1 2

R1903 10KR2F-2-GP

1 2

R1910 10KR2F-2-GP

1 2

R1904

1KR2J-1-GP

1 2

R1915

1 2

R1914

1 2

R1918

HDA_SDOME_FWP_PCH

HDA_SYNCHDA_SYNC_CODEC
HDA_BCLKHDA_BITCLK_CODEC
HDA_SDOHDA_SDOUT_CODEC
HDA_SDI0

HDA_RST#
WWAN_GPIO_WAKE#

CNV_RF_RESET#

CLKREQ_CNV_R
CNV_EN

GPP_D19
GPP_D20

KB_DET#

SPKR

AUD_PWR_EN

HOST_SD_WP#

CONTACTLESS_DET#

KB_DET#

CAM_MIC_CBL_DET#

BN34

HDA_SYNC/I2S0_SFRM

BN37

HDA_BCLK/I2S0_SCLK

BN36

HDA_SDO/I2S0_TXD

BN35

HDA_SDI0/I2S0_RXD

BL36

HDA_SDI1/I2S1_RXD/SNDW1_DATA

BL35

HDA_RST#/I2S1_SCLK/SNDW1_CLK

CK23

GPP_D23/I2S_MCLK

BL37

I2S1_SFRM/SNDW2_CLK

BL34

I2S1_TXD/SNDW2_DATA

CJ32

GPP_H1/I2S2_SFRM/CNV_BT_I2S_BCLK/CNV_RF_RESET#

CH32

GPP_H0/I2S2_SCLK/CNV_BT_I2S_SCLK

CH29

GPP_H2/I2S2_TXD/CNV_BT_I2S_SDI/MODEM_CLKREQ

CH30

GPP_H3/I2S2_RXD/CNV_BT_I2S_SDO

CP24

GPP_D19/DMIC_CLK0/SNDW4_CLK

CN24

GPP_D20/DMIC_DATA0/SNDW4_DATA

CK25

GPP_D17/DMIC_CLK1/SNDW3_CLK

CJ25

GPP_D18/DMIC_DATA1/SNDW3_DATA

CF35

GPP_B14/SPKR

WHISKEY-LAKE-GP

GPP_A17/SD_VDD1_PWR_EN#/ISH_GP7

ZZ.00CPU.271

R1905

DMIC_SDA_CODEC_CPU

DMIC_SCL_CODEC_CPU

33R2F-3-GP

1 2

DY

R1906

33R2F-3-GP

1 2

DY

Reserve for Dmic connect to PCH

R1912

33R2F-3-GP

1 2

7 OF 20CPU1G

GPP_G0/SD_CMD
GPP_G1/SD_DATA0
GPP_G2/SD_DATA1
GPP_G3/SD_DATA2
GPP_G4/SD_DATA3

GPP_G5/SD_CD#
GPP_G6/SD_CLK

GPP_G7/SD_WP

GPP_A16/SD_1P8_SEL

SD_1P8_RCOMP
SD_3P3_RCOMP

GPP_D20

GPP_D19

CLKREQ_CNVCLKREQ_CNV_R

CAM_MIC_CBL_DET#

CH36

ANT_CONFIG

CL35

TBT_CIO_PLUG_EVENT#

CL36
CM35

CONTACTLESS_DET#

CN35

HOST_SD_WP#

CH35

AUD_PWR_EN

CK36

SPK_DET#

CK34

BW36
BY31

SD3_RCOMP

CK33
CM34

R1916
200R2F-L-GP

1 2

GPIO0.5 change to 1.8V

HDA_BCLK

12

EC1901

DY

SC22P50V2JN-4DLGP

<Core Design>

<Core Design>

<Core Design>

A A

5

3D3V_S5_PCH

1 2

R1913 10KR2F-2-GP

VCC3P3_SX

1

R1917 10KR2F-2-GP

DY

4

TBT_CIO_PLUG_EVENT#

Title

Titl e

Titl e

CPU_(AUDIO/SDIO/SDXC)

CPU_(AUDIO/SDIO/SDXC)

2

3

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

A4

A4

A4

Date: Sheet of

Date: Sheet of

Date: Sheet of

CPU_(AUDIO/SDIO/SDXC)

2

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Bandon / NorthBay 13''

Bandon / NorthBay 13''

Bandon / NorthBay 13''

19 106Friday, February 15, 2019

19 106Friday, February 15, 2019

19 106Friday, February 15, 2019

1

X00

X00

X00

5

Vinafix.com

Main Func = PCH

CPU_UART2_TXD[68]
CPU_UART2_RXD[68]

CPU_I2C_SDA_TS[55]
CPU_I2C_SCL_TS[55]

CPU_I2C_SDA_TP[65]

D D

C C

B B

CPU_I2C_SCL_TP[65]

CPU_I2C_SDA_SENSOR[69,70]
CPU_I2C_SCL_SENSOR[69,70]

CPU_I2C_SDA_GNSS[62]
CPU_I2C_SCL_GNSS[62]

GSEN_INT1[69]

LNG2DMTR_INT1[70]

NB_MODE#[24]

LID_CL#_NB_R[24]

LID_CL#_TAB_R[24]

NRB_BIT[15,20]

TPM_PIRQ#[91]

PCH_3.3V_TS_EN[40]

GPP_B22[15]

TS_INT#[55]

SIO_EXT_WAKE#[24]

LCD_CBL_DET#[55]

CNV_BRI_RSP[61]
CNV_RGI_DT[15,61]
CNV_BRI_DT[61]
CNV_RGI_RSP[61]

NRB_BIT[15,20]

GPP_D12[15]

IR_CAM_DET#[56]

WW AN_FULL_PWR_EN_R[62]

PRIM_CORE_OPT_DIS[54]

RTC_DET#[18,25]

TP2003
TPAD14-OP-GP

TS_I2C_SDA

TS_I2C_SCL

I2C1_SDA_TP

I2C1_SCK_TP

PRIM_CORE_OPT_DIS

ONE_DIMM#
RTC_DET#_1
NRB_BIT

HDD_FALL_INT

1

TPM_PIRQ#
PCH_3.3V_TS_EN
GPP_B22

CNV_BRI_PRX_DTX
CNV_RGI_PTX_DRX
CNV_BRI_PTX_DRX
CNV_RGI_PRX_DTX

CPU_UART2_RXD

CPU_UART2_TXD

TS_INT#

TS_I2C_SDA

TS

TS_I2C_SCL

I2C1_SDA_TP

TP

I2C1_SCK_TP

ALS

ANT

CNV_BRI_PRX_DTX

CNV_RGI_PTX_DRX

CNV_BRI_PTX_DRX

CNV_RGI_PRX_DTX

3D3V_S0 1D8V_S5

1

23

RN2002
SRN2K2J-1-GP

R2014

4

0R0402-PAD

1 2

R2015
0R0402-PAD

1 2

R2025
0R0402-PAD

1 2

R2024
0R0402-PAD

1 2

4

CC27

GPP_B15/GSPI0_CS0#

CC32

GPP_A7/PIRQA#/G SPI0_CS1#

CE 28

GPP_B16/GSPI0_CLK

CE 27

GPP_B17/GSPI0_MISO

CE 29

GPP_B18/GSPI0_MOSI

CA 31

GPP_B19/GSPI1_CS0#

CA 32

GPP_A11/PME#/GSPI1_CS1#/SD_VDD2_PWR_EN#

CC29

GPP_B20/GSPI1_CLK

CC30

GPP_B21/GSPI1_MISO

CA 30

GPP_B22/GSPI1_MOSI

CK 20

GPP_F5/CNV_BRI_RSP

CG 19

GPP_F6/CNV_RGI_DT

CJ 20

GPP_F4/CNV_BRI_DT

CH19

GPP_F7/CNV_RGI_RSP

CR12

GPP_C20/UART2_RXD

CP 12

GPP_C21/UART2_TXD

CN12

GPP_C22/UART2_RTS#

CM1 2

GPP_C23/UART2_CTS#

CM1 1

GPP_C16/I2C0_SDA

CN11

GPP_C17/I2C0_SCL

CK 12

GPP_C18/I2C1_SDA

CJ 12

GPP_C19/I2C1_SCL

CF 27

GPP_H4/I2C2_SDA

CF 29

GPP_H5/I2C2_SCL

CH27

GPP_H6/I2C3_SDA

CH28

GPP_H7/I2C3_SCL

CJ 30

GPP_H8/I2C4_SDA

CJ 31

GPP_H9/I2C4_SCL

WHISKEY-LAKE-GP

ZZ.00CPU.271

1 2

R2028 22R2J-2-GP

1 2

R2029 33R2F-3-GP

1 2

R2030 33R2F-3-GP

1 2

R2035 22R2J-2-GP

CPU_I2C_SDA_TS

CPU_I2C_SCL_TS

CPU_I2C_SDA_TP

CPU_I2C_SCL_TP

ISH_ I2C2_S CL

CPU_I2C_SDA_SENSOR

CPU_I2C_SCL_SENSOR

CNV_BRI_RSP

CNV_RGI_DT

CNV_BRI_DT

CNV_RGI_RSP

RN2006

SRN1KJ-7-GP

3

GPP_D9/ISH_SPI_CS#/GSPI2_CS0#

GPP_D10/ISH_SPI_CLK/GSPI2_CLK
GPP_D11/ISH_SPI_MISO /GSPI2_MISO
GPP_D12/ISH_SPI_MOSI /GSPI2_MOSI

GPP_D5/ISH_I2C0_SDA
GPP_D6/ISH_I2C0_SCL

GPP_D7/ISH_I2C1_SDA
GPP_D8/ISH_I2C1_SCL

GPP_H10/I2C5_SDA/ISH_I2C2_SDA

GPP_H11/I2C5_SCL/ISH_I2C2_SCL

GPP_D13/ISH_UART0_RXD

GPP_D15/ISH_UART0_RTS#/GSPI2_CS1#

GPP_D16/ISH_UART0_CTS#/SML0BALERT#

GPP_C14/UART1_RTS#/ISH_UART1_RTS#
GPP_C15/UART1_CTS#/ISH_UART1_CTS#

GPP_A12/ISH_GP6/BM_BUSY#/SX_EXIT_HOLDOFF#

0R2J-2-GP

1 2

DY

1

23

DY

R2022

4

0R2J-2-GP

1 2

DY

R2023

0R2J-2-GP

1 2

DY

R2032
0R0402-PAD

1 2

R2031
0R0402-PAD

1 2

GPP_D14/ISH_UART0_TXD

GPP_C12/UART1_RXD/ ISH_UART1_RXD

GPP_C13/UART1_TXD/ISH_UART1_TXD

R2026

RTC_DET#_1RTC_DET#

CPU_I2C_SDA_GNSSISH_ I2C2_S DA

CPU_I2C_SCL_GNSS

ISH_I2C0_SDA

ISH_I2C0_SCL

6 OF 20CPU1F

IR_CAM_DET#

CN22
CR22

TBT_DET#

CM2 2

GPP_D12

CP 22

ISH_I2C0_SDA

CK 22

ISH_I2C0_SCL

CH20

CH22
CJ 22

ISH_I2C2_SDA

CJ 27

ISH_I2C2_SCL

CJ 29

CM2 4
CN23

WW AN_FULL_PWR_EN W WAN_FULL_PWR_EN_R

CM2 3
CR24

SIO_EXT_WAKE#

CG 12

GPP_C13

CH12

LCD_CBL_DET#

CF 12

PCH_HDD_EN

CG 14

ISH_ACC1_INT#

GPP_A18/ISH_GP0
GPP_A19/ISH_GP1
GPP_A20/ISH_GP2
GPP_A21/ISH_GP3
GPP_A22/ISH_GP4
GPP_A23/ISH_GP5

ISH_NB_MODE NB_MODE_Q

R2017
10KR2F-2-GP

BW 35
BW 34
CA 37
CA 36
CA 35
CA 34
BW 37

12

3D3V_S0

DY

ISH_ACC2_INT#

ISH_NB_MODE

ISH_LID_CL#_TAB

NB_MODE#

12

R2013
10KR2F-2-GP

ONE_DIMM#

12

R2011
10KR2F-2-GP

6

5

DIMM Dectect
HIGH 1 DIMM
LOW 2 DIMM

1

1

Q2002

Note:ZZ.27002.F7C01

1

BANDON

2

34

2N7002KDW-1-GP

75.27002.F7C

SENSOR

ALS

WWAN

1 2

TP2007
TPAD14-OP-GP
TP2006
TPAD14-OP-GP

1 2
1 2

1 2
1 2

TBT_DET# Dectect

HIGH
LOW

2

3D3V_SUS

R2001

R2003 49K9R2F-L-GP

R2005 49K9R2F-L-GP

3D3V_S0

R2016 100KR2F-L1-GP

R2021 10KR2F-2-GP

R2051 0R0402-PAD

ACC SENSOR BD

1 2

T

B

GSEN_INT1
LNG2DMTR_INT1

ACC MB

LID_CL#_NB_RISH_LID_CL#_NB
LID_CL#_TAB_R

R2010
10KR2F-2-GP

ISH_NB_MODE NB_MODE#

T

R2038

0R2J-2-GP

DY

1 2

R2047 0R0402-PAD
R2042 0R0402-PAD

R2057 0R0402-PAD
R2058 0R0402-PAD

3D3V_SUS

BANDON

Check final GPIO group ,
if connect to 3.3V group can reserve Q2002 .

3D3V_SUS

1

N

O

R2008

N

10KR2F-2-GP

_

2

TBT_DET#

1

T

B

R2012

T

10KR2F-2-GP

2

R2020 10KR2F-2-GP

R2002 100KR2F-L1-GP

R2007 100KR2F-L1-GP

R2004 49K9R2F-L-GP

R2006 49K9R2F-L-GP

NON TBT
TBT

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1

DY

1

DY

RN2004

1
2
3
4 5

SRN10KJ-6-GP

1

10KR2F-2-GP

2

2

8
7
6

3D3V_SUS

BANDON

1 2

NORTHBAY

1 2

SIO_EXT_WAKE#

CPU_UART2_RXD

CPU_UART2_TXD

IR_CAM_DET#

LID_CL#_NB_R

LID_CL#_TAB_R

PCH_3.3V_TS_EN

LCD_CBL_DET#

CPU_UART2_RXD

CPU_UART2_TXD

GSEN_INT1
LNG2DMTR_INT1

R2019
10KR2F-2-GP

NB_MODE#

R2009
10KR2F-2-GP

DEBUG

A A

5

<Core Design>

<Core Design>

<Core Design>

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, S ec.1, Hsin Tai Wu Rd., H sichih,

21F, 88, S ec.1, Hsin Tai Wu Rd., H sichih,

21F, 88, S ec.1, Hsin Tai Wu Rd., H sichih,
Taipei Hsien 221, Taiwan, R .O.C.

Taipei Hsien 221, Taiwan, R .O.C.

Taipei Hsien 221, Taiwan, R .O.C.

Title

Title

Title

CPU_(LPSS/ISH)

CPU_(LPSS/ISH)

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

A3

A3

A3

Date: Sheet of

Date: Sheet of

4

3

2

Date: Sheet of

CPU_(LPSS/ISH)

Bandon / NorthBay 13''

Bandon / NorthBay 13''

Bandon / NorthBay 13''

1

X00

X00

20 106Friday, February 15, 2019

20 106Friday, February 15, 2019

20 106Friday, February 15, 2019

X00

5

Vinafix.com

Main Func = PCH

CNV_WR_DN0[61]
CNV_WR_DP0[61]
CNV_WR_DN1[61]
CNV_WR_DP1[61]

D D

C C

CNV_WR_CLKN[61]
CNV_WR_CLKP[61]
CNV_WT_DN0[61]
CNV_WT_DP0[61]
CNV_WT_DN1[61]
CNV_WT_DP1[61]
CNV_WT_CLKN[61]
CNV_WT_CLKP[61]

CNV_COEX3[61,62]

SBIOS_TX[62,68]

CPU_C10_GATE#[24,40,54,91]

TBT_FORCE_PWR[71]

PCH_TBT_PERST#[71]

CNV_MFUART2_TXD[61,62]
CNV_MFUART2_RXD[61,62]

GPP_H21[15]

GPP_H23[15]

GPD_ 7[15]

TBT_RTD3_WAKE#[71]

RTD3_CIO_PWR_EN[71]

150R2F-1-GP

R2102

4

CNV_WR_DN0
CNV_WR_DP0

CNV_WR_DN1
CNV_WR_DP1

CNV_WT_DN0
CNV_WT_DP0

CNV_WT_DN1
CNV_WT_DP1

CNV_WR_CLKN
CNV_WR_CLKP

CNV_WT_CLKN
CNV_WT_CLKP

CNV_WT_RCOMP

12

CNV_COEX3

PCH_TBT_PERST#
SBIOS_TX

TYPEC_CON_SEL1
TYPEC_CON_SEL2

CNV_COEX1
CNV_COEX2

WLAN
(CNVI)

CR30

CNV_WR_D0N

CP30

CNV_WR_D0P

CM30

CNV_WR_D1N

CN30

CNV_WR_D1P

CN32

CNV_WT_D0N

CM32

CNV_WT_D0P

CP33

CNV_WT_D1N

CN33

CNV_WT_D1P

CN31

CNV_WR_CLKN

CP31

CNV_WR_CLKP

CP34

CNV_WT_CLKN

CN34

CNV_WT_CLKP

CP32

CNV_WT_RCOMP#CP32

CR32

CNV_WT_RCOMP#CR32

CP20

GPP_F0/CNV_PA_BLANKING

CK19

GPP_F1

CG17

GPP_F2

CR14

GPP_C8/UART0_RXD

CP14

GPP_C9/UART0_TXD

CN14

GPP_C10/UART0_RTS#

CM14

GPP_C11/UART0_CTS#

CJ17

GPP_F8/CNV_MFUART2_RXD

CH17

GPP_F9/CNV_MFUART2_TXD

CF17

GPP_F23/A4WP_PRESENT

WHISKEY-LAKE-GP

3

GPP_H18/CPU_C10_GATE#

GPP_H19/TIMESYNC0

GPP_D4/IMGCLKOUT0/BK4/SBK4

GPP_H20/IMGCLKOUT1

GPP_F12/EMMC_DATA0
GPP_F13/EMMC_DATA1
GPP_F14/EMMC_DATA2
GPP_F15/EMMC_DATA3
GPP_F16/EMMC_DATA4
GPP_F17/EMMC_DATA5
GPP_F18/EMMC_DATA6
GPP_F19/EMMC_DATA7

GPP_F20/EMMC_RCLK

GPP_F21/EMMC_CLK

GPP_F11/EMMC_CMD

GPP_F22/EMMC_RESET#

9 OF 20CPU1I

GPP_H21
GPP_H22
GPP_H23
GPP_F10

GPD7

GPP_ F3

EMMC_RCOMP

2

CPU_C10_GATE# CPU_C10_GATE#

CN27

CM27

GPP_H21

CF25

RTD3_CIO_PWR_EN

CN26

GPP_H23

CM26
CK17

GPD_ 7 TBT_RTD3_WAKE#

BV35
CN20

TBT_FORCE_PWR

CG25
CH25

CR20
CM20
CN19
CM19
CN18
CR18
CP18
CM18

CM16
CP16
CR16
CN16

EMMC_RCOMP

CK15

R2110
0R0402-PAD

1 2

R2104
200R2F-L-GP

1 2

1

DY

DY

R2111

R2103

100KR2F-L1-GP

100KR2F-L1-GP

3D3V_S5_PCH

12

3D3V_S0

12

ZZ.00CPU.271

3D3V_S0

R2108

CNV_COEX2 CNV_MFUART2_TXD

B B

CNV_COEX1 CNV_MFUART2_RXD

0R2J-2-GP

1 2

DY

R2109

0R2J-2-GP

1 2

DY

12

DY

R2105
10KR2F-2-GP

TYPEC_CON_SEL1 TYPEC_CON_SEL2

12

R2106
10KR2F-2-GP

3D3V_S0

12

DY

12

R2101
10KR2F-2-GP

R2107
10KR2F-2-GP

<Core Design>

<Core Design>

<Core Design>

A A

5

Title

Titl e

Titl e

CPU_(POWER1)

CPU_(POWER1)

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

A4

A4

A4

Date: Sheet of

Date: Sheet of

4

3

Date: Sheet of

2

CPU_(POWER1)

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Bandon / NorthBay 13''

Bandon / NorthBay 13''

Bandon / NorthBay 13''

21 106Friday, February 15, 2019

21 106Friday, February 15, 2019

21 106Friday, February 15, 2019

1

X00

X00

X00

5

Vinafix.com

4

3

2

1

Main Func = PCH

PRIMCORE_G0[54]

PRIMCORE_G1[54]

D D

1D05V_VCCPRIM

1D8V_VCCPRIM

3D3V_VCCPRIM

1D05V_VCCPRIM_CORE

C C

1D05V_VCCDSW

1D05V_VCCPRIM

1D05V_VCCMPHYGTAON

1D05V_VCCAMPHYPLL

1D05V_VCCPRIM

1D05V_VCCPRIM

3D3V_SUS

3D3V_VCCPRIM

B B

3D3V_VCCPRIM

1D05V_VCCPRIM

1D05V_VCCPRIM

1D05V_VCCMPHYGTAON

BP20

VCCPRIM_1P05

BW 16

VCCPRIM_1P05

BW 18

VCCPRIM_1P05

BW 19

VCCPRIM_1P05

BY16

VCCPRIM_1P05

CA 14

VCCPRIM_1P05

CC15

VCCPRIM_1P8

CD15

VCCPRIM_1P8

CD16

VCCPRIM_1P8

CP 17

VCCPRIM_1P8

CB 22

VCCPRIM_3P3

CB 23

VCCPRIM_3P3

CC22

VCCPRIM_3P3

CC23

VCCPRIM_3P3

CD22

VCCPRIM_3P3

CD23

VCCPRIM_3P3

CP 29

VCCPRIM_3P3

BU1 5

VCCPRIM_CORE

BU2 2

VCCPRIM_CORE

BV15

VCCPRIM_CORE

BV16

VCCPRIM_CORE

BV18

VCCPRIM_CORE

BV19

VCCPRIM_CORE

BV20

VCCPRIM_CORE

BV22

VCCPRIM_CORE

BW 20

VCCPRIM_CORE

BW 22

VCCPRIM_CORE

CA 12

VCCPRIM_CORE

CA 16

VCCPRIM_CORE

CA 18

VCCPRIM_CORE

CA 19

VCCPRIM_CORE

CA 20

VCCPRIM_CORE

CB 12

VCCPRIM_CORE

CB 14

VCCPRIM_CORE

CB 15

VCCPRIM_CORE

BT2 4

VCCDSW_1P05

BU1 4

VCCAPLL_1P05

BV12

VCCPRIM_MPHY_1P05

BW 12

VCCPRIM_MPHY_1P05

BW 14

VCCPRIM_MPHY_1P05

BY12

VCCPRIM_MPHY_1P05

BY14

VCCPRIM_MPHY_1P05

BV2

VCCAMPHYPLL_1P05

BR1 5

VCCAPLL_1P05

CC12

VCCDUSB_1P05

BR2 4

VCCDSW_3P3

BT2 0

VCCHDA

BV23

VCCSPI

BT1 8

VCCPRIM_1P05

BT1 9

VCCPRIM_1P05

BU1 8

VCCPRIM_1P05

BU1 9

VCCPRIM_1P05

BT2 2

VCCPRIM_1P05

BP22

VCCPRIM_1P05

BV14

VCCPRIM_MPHY_1P05

WHISKEY-LAKE-GP

16 OF 20CPU1P

VCCPRIM_3P3

VCCRTC

VCCPRIM_1P05

DCPRTC

VCCPRIM_1P05

VCCAPLL_1P05

VCCA_BCLK_1P05

VCCAPLL_1P05

VCCA_SRC_1P05

VCCA_XTAL_1P05

VCCDPHY_1P24
VCCDPHY_1P24

VCCDPHY_1P24
VCCDPHY_1P24
VCCDPHY_1P24

VCCDSW_3P3

VCCA_19P2_1P05

VCCPRIM_1P8
VCCPRIM_1P8
VCCPRIM_1P8
VCCPRIM_1P8
VCCPRIM_1P8

VCCPRIM_3P3

VCCPRIM_3P3

GPP_B0/CORE_VID0
GPP_B1/CORE_VID1

CB 16

BR2 3

BY20
BP24

BR2 0

BT1 2

BP14

BR1 4

BU1 2

CP 5

BY24
CA 24

BY23
CA 23
CP 25

BT2 3

BR1 2

CC18
CC19
CD18
CD19
CP 23

BW 23

BP23

CB 36
CB 35

PRIMCORE_G0
PRIMCORE_G1

3D3V_VCCPRIM

3D3V_RTC_PCH

1D05V_VCCPRIM
VCCRTCEXT

1D05V_VCCPRIM

1D05V_VCCPRIM

1D05V_VCCPRIM

1D05V_VCCPRIM

1D05V_VCCPRIM

1D05V_VCCA_XTAL

1D24V_VCCDPHY

1D24V_VCCDPHY_EC

3D3V_SUS

1D05V_VCCPRIM

1D8V_VCCPRIM

3D3V_VCCPRIM

3D3V_VCCPRIM

K12
K14
K15
K17
K18
K20

L25
M2 4
M2 6

P24
P26
R2 4
R2 5
R2 6
V24

W25

Y24
Y25

G2
G1

C3 4

G3

G4
A34
B35

AJ2 7

AH2 6

L5

1D05V_VCCPRIM 1D05V_VCCA_XTAL 1D05V_VCCA_XTAL

1D8V_S5 1D8V_VCCPRIM 1D8V_VCCPRIM

3D3V_S5_PCH 3D3V_VCCPRIM

ZZ.00CPU.271

1D05V_S5 1D05V_VCCAMPHYPLL

152mA

12

R2206

0R0402-PAD

12

R2210

0R0402-PAD

1D05V_VCCMPHYGTAON

2063mA

12

R2208

0R0402-PAD

12

A A

R2211

0R0402-PAD

12

R2212

0R0402-PAD

1D05V_VCCPRIM

1625mA

12

R2209

0R0603-PAD

12

R2213

0R0402-PAD-2-GP

12

R2214

0R0402-PAD-2-GP

5

1D05V_VCCAMPHYPLL 1D05V_VCCMPHYGTAON

C2208

SC1U10V2KX-1DLGP

12

1

D

2

C2209

SC47U6D3V3MX-1-GP

Y

Layout Note:

22uF:
C2209 near BV2

4

C2210

SC22U6D3V3MX-1-DL-GP

12

1D05V_VCCPRIM

C2211

SC1U10V2KX-1DLGP

12

R2207

1

D

Y

2

WHL QS/CFL U/WHL ES1_CNL U22

RSVD#K12
RSVD#K14
RSVD#K15
RSVD#K17
RSVD#K18
RSVD#K20
RSVD#L25
RSVD#M24
RSVD#M26
RSVD#P24
RSVD#P26
RSVD#R24
RSVD#R25
RSVD#R26
RSVD#V24
RSVD#W25
RSVD#Y24
RSVD#Y25
RSVD#G2
RSVD#G1
RSVD#C34
RSVD#G3
RSVD#G4
RSVD#A34
RSVD#B35
RSVD#AJ27
RSVD#AH26
RSVD#L5

WHISKEY-LAKE-GP

ZZ.00CPU.271

R2201
0R0603-PAD

R2202
0R0603-PAD

R2204
0R0603-PAD

1MR2F-GP

3

12

12

12

RSVD#AA24
RSVD#AA26
RSVD#AB25
RSVD#AC24
RSVD#AC25
RSVD#AC26
RSVD#AD24
RSVD#AD26

2mA

702mA

823mA

15 OF 20CPU1O

RSVD#V25
RSVD#T25
RSVD#A35

RSVD#D34

RSVD#N5

AA2 4
AA2 6
AB2 5
AC2 4
AC2 5
AC2 6
AD2 4
AD2 6
V25
T25
A35
D3 4
N5

C2201

SC1U10V2KX-1DLGP

12

C2203

SC1U10V2KX-1DLGP

12

3D3V_VCCPRIM

C2205

SCD01U16V2KX-3DLGP

1

D

Y

2

1D05V_VCCPRIM_CORE

C2213

SC1U10V2KX-1DLGP

1

D

Y

2

1D24V_VCCDPHY_EC

12

C2218

SC4D7U6D3V2KX-GP-U

Layout Note:

R2202 near CP5

SC22U6D3V3MX-1-DL-GP

R2203

1MR2F-GP

SC1U10V2KX-1DLGP

1

D

Y

2

R2205

C2206

1MR2F-GP

1

D

Y

Y

2

1D05V_VCCDSW 3D3V_SUS 3D3V_RTC_PCH

C2214

SC1U10V2KX-1DLGP

12

2

C2207

SC1U10V2KX-1DLGP

DY

SCD1U16V2KX-3GP

12

C2215

SC1U10V2KX-1DLGP

1

D

Y

2

DY

C2202

12

12

C2204

1

D

2

VCCRTCEXT

C2216

C2212

SC1U10V2KX-1DLGP

SCD1U16V2KX-3DLGP

12

12

<Core Design>

<Core Design>

<Core Design>

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

A3

A3

A3

Date: Sheet of

Date: Sheet of

Date: Sheet of

C2217

SCD1U16V2KX-3DLGP

1

D

Y

2

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, S ec.1, Hsin Tai Wu Rd., H sichih,

21F, 88, S ec.1, Hsin Tai Wu Rd., H sichih,

21F, 88, S ec.1, Hsin Tai Wu Rd., H sichih,
Taipei Hsien 221, Taiwan, R .O.C.

Taipei Hsien 221, Taiwan, R .O.C.

Taipei Hsien 221, Taiwan, R .O.C.

CPU_(RSVD)

CPU_(RSVD)

CPU_(RSVD)

Bandon / NorthBay 13''

Bandon / NorthBay 13''

Bandon / NorthBay 13''

22 106Friday, February 15, 2019

22 106Friday, February 15, 2019

22 106Friday, February 15, 2019

1

X00

X00

X00

5

Vinafix.com

18 OF 20CPU1R

CR34

VSS

BT5

VSS

BY5

VSS

CP35

VSS

CM37

VSS

CK37

VSS

AW1

D D

C C

B B

A A

VSS

CM1

VSS

BD6

VSS

AY4

VSS

B34

VSS

E35

VSS

A4

VSS

AE24

VSS

AE26

VSS

AF25

VSS

AG24

VSS

AG26

VSS

AH24

VSS

AH25

VSS

B2

VSS

B36

VSS

C36

VSS

C37

VSS

CN1

VSS

CN2

VSS

CN37

VSS

CP2

VSS

D1

VSS

A32

VSS

F33

VSS

A3

VSS

BJ7

VSS

CJ36

VSS

A36

VSS

BK10

VSS

CJ4

VSS

AB27

VSS

BK2

VSS

CK1

VSS

AB3

VSS

BK28

VSS

AB30

VSS

BK3

VSS

CK4

VSS

AB33

VSS

BK33

VSS

CK7

VSS

AB36

VSS

BK4

VSS

CL2

VSS

AB4

VSS

BK7

VSS

CM13

VSS

AB7

VSS

BL25

VSS

CM17

VSS

AC10

VSS

BL28

VSS

CM21

VSS

AC27

VSS

BL29

VSS

CM25

VSS

AC30

VSS

BL30

VSS

CM29

VSS

BL31

VSS

CM31

VSS

AD33

VSS

BL32

VSS

CM33

VSS

AD35

VSS

WHISKEY-LAKE-GP

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

BL7
AE25
BM33
CM5
AE27
BM35
CM9
AE30
BM36
CN13
AE7
BM9
CN17
AF27
BN30
CN21
AF3
BN7
CN25
AF30
CN29
AF33
BP15
AF36
AF4
CN5
AF7
BP25
CN9
AG10
BP3
CP1
BP32
CP11
AH27
BP33
CP13
AH28
BP4
CP15
AH29
BP7
CP19
AH30
CP21
AH31
BR19
CP27
AH33
BR25
AH35
CP37
AJ25
BT15
AJ28
BT16
CP9
AJ7
CR2
AK3
CR36
AK33
D21
AK36
BT25
D25
AK4
BT28
AL28
BT33
D5
AL29

ZZ.00CPU.271

5

4

BT35

VSS

D6

VSS

AL32

VSS

BT36

VSS

D8

VSS

AL7

VSS

D9

VSS

AM10

VSS

BU11

VSS

E23

VSS

AM28

VSS

E27

VSS

AM33

VSS

BU23

VSS

E29

VSS

AM35

VSS

BU24

VSS

E31

VSS

BU25

VSS

E33

VSS

AN25

VSS

BU7

VSS

E9

VSS

AN28

VSS

BV11

VSS

F12

VSS

AN29

VSS

F15

VSS

AN30

VSS

F18

VSS

AN31

VSS

BV3

VSS

F2

VSS

AN7

VSS

BV31

VSS

F21

VSS

AN8

VSS

BV33

VSS

F24

VSS

BV4

VSS

F3

VSS

AP3

VSS

BW11

VSS

F4

VSS

AP33

VSS

BW15

VSS

G21

VSS

AP36

VSS

G27

VSS

AP4

VSS

G33

VSS

AR28

VSS

G35

VSS

G36

VSS

AT33

VSS

BW24

VSS

G9

VSS

AT35

VSS

H21

VSS

AT36

VSS

BW7

VSS

H27

VSS

AT4

VSS

BY11

VSS

AU10

VSS

BY15

VSS

H9

VSS

AU28

VSS

BY22

VSS

J12

VSS

AU29

VSS

J15

VSS

WHISKEY-LAKE-GP

ZZ.00CPU.271

4

3

19 OF 20CPU1S

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

BY25
J18
AU32
BY28
J21
AV25
BY33
J24
AV28
BY35
J33
AV3
BY36
J36
AV33
J6
AV36
C1
K21
AV4
C21
K22
AV6
C25
K24
AV8
C29
K25
AW28
C33
K27
AW29
C4
K28
AW3
C9
K29
AW30
CA11
K3
AW31
CA15
K30
AY33
CA22
K31
AY35
K32
B12
K4
B15
CA25
K9
B18
CB11
L27
B21
L33
B23
L35
B25
CB18
L36
B27
CB19
L6
B29
CB2
N25
B31
CB20
N27
CB25

N6

VSS

B37

VSS

CB3

VSS

P10

VSS

B5

VSS

CB33

VSS

P3

VSS

B7

VSS

CB4

VSS

P33

VSS

B9

VSS

CB7

VSS

P36

VSS

BA10

VSS

CC11

VSS

P4

VSS

BA28

VSS

P7

VSS

BA3

VSS

CC20

VSS

R27

VSS

BB3

VSS

CC25

VSS

R28

VSS

BB33

VSS

CC28

VSS

R29

VSS

BB36

VSS

CC31

VSS

R30

VSS

BB4

VSS

CC7

VSS

R31

VSS

BC25

VSS

CD11

VSS

T27

VSS

CD12

VSS

T30

VSS

BC29

VSS

CD14

VSS

T33

VSS

T35

VSS

BC32

VSS

CD24

VSS

T36

VSS

CD25

VSS

T7

VSS

BC8

VSS

CE33

VSS

U26

VSS

BD28

VSS

CE35

VSS

U7

VSS

BD33

VSS

CE36

VSS

V26

VSS

BD35

VSS

CE7

VSS

V27

VSS

BD36

VSS

CF11

VSS

V3

VSS

BE10

VSS

CF14

VSS

V30

VSS

BE28

VSS

CF19

VSS

V33

VSS

BE29

VSS

CF2

VSS

V36

VSS

BE3

VSS

WHISKEY-LAKE-GP

20 OF 20CPU1T

CF23

VSS

V4

VSS

BE30

VSS

CF28

VSS

W10

VSS

BE31

VSS

CF3

VSS

W27

VSS

CF4

VSS

W30

VSS

BF3

VSS

CG33

VSS

W7

VSS

BF33

VSS

CG7

VSS

BF36

VSS

Y 2 6

VSS

BF4

VSS

CH31

VSS

Y 2 7

VSS

BG25

VSS

Y 3 0

VSS

BG28

VSS

CJ11

VSS

Y 3 3

VSS

CJ14

VSS

Y 3 5

VSS

BH28

VSS

CJ19

VSS

Y 7

VSS

BH29

VSS

CJ23

VSS

BH32

VSS

CJ28

VSS

BH33

VSS

CJ33

VSS

BH35

VSS

CJ35

VSS

BP19

VSS

BR16

VSS

BY18

VSS

BY19

VSS

CC16

VSS

BU16

VSS

CC14

VSS

BR22

VSS

BU20

VSS

CD20

VSS

BT14

VSS

BP12

VSS

CB24

VSS

CC24

VSS

J5

VSS

U24

VSS

BD7

VSS

AR4

VSS

AU4

VSS

AW4

VSS

BA6

VSS

BC4

VSS

BE4

VSS

BE8

VSS

BA4

VSS

BD4

VSS

BG4

VSS

CJ2

VSS

CJ3

VSS

AM5

VSS

CM4

VSS

AC5

VSS

AG5

VSS

CR6

VSS

ZZ.00CPU.271

3

2

1

Main Func = PCH

<Core Design>

<Core Design>

<Core Design>

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Titl e

Titl e

CPU_(VSS)

CPU_(VSS)

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

A4

A4

A4

Date: Sheet of

Date: Sheet of

Date: Sheet of

2

CPU_(VSS)

Bandon / NorthBay 13''

Bandon / NorthBay 13''

Bandon / NorthBay 13''

23 106Friday, February 15, 2019

23 106Friday, February 15, 2019

23 106Friday, February 15, 2019

1

X00

X00

X00

5

Vinafix.com

Main Func = EC

WWAN_WAKE#[62]

WLAN_WIGIG60GHZ_DIS#[61]

SIO_PWRBTN#[17,99]

SLP_WLAN#_GATE[40]

LID_CL#_TAB_R[20]

LID_CL#_NB_R[20]

LID_CL_SIO_TAB#_R[64,67]
LID_CL_SIO#_R[55,64,67]

JTAG_CLK[68]
JTAG_TDI[68]
JTAG_TDO[68]
JTAG_TMS[68]

TACH_FAN1[26]

D D

C C

B B

A A

PWM_FAN1[26]

BIA_PWM_EC[55]

PANEL_BKEN_EC[55]

BEEP[27]

AC_DIS[43,44]

PROCHOT#_CPU[3,43,44,46]

WWAN_RADIO_DIS#[62]

RTCRST_ON[18]

BC_CLK_ECE1117[65]
BC_DAT_ECE1117[65]

DCIN2_EN[43]

ESPI_RESET#[18,68]

VBUS2_ECOK[44,74]

CV2_ON[66]

LCD_TST[55]

ESPI_CLK[18,68]
ESPI_CS#[18,68]
ESPI_IO0[18,68]
ESPI_IO1[18,68]
ESPI_IO2[18,68]
ESPI_IO3[18,68]

ALW ON[40]

ACAV_IN[44,64]

NB_MUTE#[27]

EN_INVPWR[55]

VBUS1_ECOK[43,74]

NGFF_CONFIG_0[62]

USH_EXPANDER_SMBDAT[66,69]

USH_DET#[66]

AC_DISC#[43,74]

USH_EXPANDER_SMBCLK[66,69]

3.3V_WWAN_EN[40]

MSDATA[68]

BT_RADIO_DIS#[61]

BAT1_LED#[64]
BAT2_LED#[64]

LCD_VCC_TEST_EN[55]

RUN_ON_EC[40]

PBAT_PRES#[43,44]

UPD1_SMBINT#[72]

RUNPWROK[40]

BCM5882_ALERT#[66]

HOST_DEBUG_TX[68]

ME_FWP[68]

GPS_DISABLE#[62]

MSCLK[68]

3.3V_TS_EN[40]

SYS_PWROK_R[17]

m3042_PCIE#_SATA[16]

AC_PRESENT[17]

NGFF_CONFIG_1[62]

SIO_EXT_WAKE#[20]

SIO_SLP_SUS#[17,40,52,53,54]

PECI_CPU[3]

DAT_TP_SIO_I2C_CLK[65]
CLK_TP_SIO_I2C_DAT[65]

UPD1_SMBCLK[72]
UPD1_SMBDAT[72]

LED_MASK#[32,64]

NGFF_CONFIG_2[62]

VCCDSW_EN[40,52,53,54]

PBAT_CHARGER_SMBCLK[43,44]
PBAT_CHARGER_SMBDAT[43,44]

REM_DIODE1_P[26]
REM_DIODE1_N[26]
REM_DIODE2_P[26]
REM_DIODE2_N[26]
REM_DIODE4_P[26]
REM_DIODE4_N[26]

NGFF_CONFIG_3[62]

I_AD P[44]

I_BATT_R[44]

I_SYS_R[44,46]

TOUCHPAD_INTR#[3,65]

USH_PWR_STATE#[66]

USB_POWERSHARE_VBUS_EN[36]

USB_POWERSHARE_EN#[36]

USB_PWR_EN1#[35]

AUX_EN_W OWL[40]

LOM_CABLE_DETECT#[97]

BC_INT#_ECE1117[65]

DCIN1_EN[74]

PCH_PCIE_WAKE#[17,24,62,71]

LAN_WAKE#[17,97]

THERMTRIP#_CPU[3]

RUN_ON_R[40,54]

PCIE_WAKE#_R[61,62,63,71]

PCH_PCIE_WAKE#[17,24,62,71]

DSW_PWROK_R[17]

ALW_PWRGD_3V_5V[40]

RSMRST#_KBC[17,64,99]

SIO_SLP_S3#[17,40,51,68,71]

ALL_SYS_PWRGD[17]

VR_ EN[46]

KBC_PWRBTN#[64,66,68]

NB_MODE#[20]

CNV_DET#[61]

PS_ID[43]

HW_ACAVIN_NB[43,44,74]

BREATH_LED#[64]

PANEL_PWRGD[55]

PCH_RSMRST#[68]

3D3V_S0

13"

4

4

4

4

4

4

10KR2F-2-GP

8
7
6

SSD_SCP#

PWM_FAN1
TACH_FAN1

UPD1_SMBDAT
UPD1_SMBCLK

PBAT_CHARGER_SMBCLK
PBAT_CHARGER_SMBDAT

UPD2_SMBDAT
UPD2_SMBCLK

PRIVACY_ENABLE

NGFF_CONFIG_0
NGFF_CONFIG_1

NGFF_CONFIG_2
NGFF_CONFIG_3

FPR_PWR_EN#
USB_POWERSHARE_VBUS_EN
USB_POWERSHARE_EN#
USB_PWR_EN1#
USB_PWR_EN2#
GPS_DISABLE#
WLAN_WIGIG60GHZ_DIS#
BC_DAT_ECE1117
WWAN_RADIO_DIS#
BT_RADIO_DIS#
LID_CL_SIO#
LID_CL_SIO_TAB#
PBAT_PRES#
AC_DIS
LOM_CABLE_DETECT#
WWAN_WAKE#
LED_MASK#
THERMTRIP1#
PCIE_WAKE#_R
PCIE_WAKE#

VCI_IN1#
VCI_IN2#
NFC_ACTIVITY_STATUS#_R

PCH_RSMRST#
SYS_PWROK
I_SYS_R
EN_INVPWR
TBT_RESET_N_EC

LCD_TST
CV2_ON
IMVP_VR_O N
RUN_ON_EC

SAR_DRP#

SSD_SCP_PWR_EN

3D3V_S5

12

R2466
100KR2F-L1-GP

JTAG_RST#

DY

12

C2421

R2471

100R2F-L1-GP-U

SC1U10V2KX-1DLGP

1 2

EV Board

4700pF

RTCRST_ON_POWER[25]

SSD_SCP#[62,63]

TP_DISABLE#[65]

NFC_ACTIVITY_STATUS#[66]

VCCDSW_EN_EC[25]

CPU_C10_GATE#[21,40,54,91]

PRIVACY_ENABLE[25]

TYPEC_ID

240k ohm

130k ohm

62k ohm

33k ohm

8.2k ohm

4.3k ohm

2k ohm

1k ohm

Bandon
SYSTEM_ID

240k ohm

130k ohm

33k ohm

Cap. Value Res. Value

4700pF

Cap. Value Res. Value

3D3V_S0

1

D

R2409

Y

100KR2F-L1-GP

2

PRIVACY_ENABLE

1

D

R2411

Y

100KR2F-L1-GP

2

DCIN1_EN UPD2_SMBDAT
DCIN2_EN
VBUS1_ECOK
VBUS2_ECOK

KBC_PWRBTN#

12

C2415

DY

SC1U10V2KX-1DLGP

Vendor suggest 2017/11/27
Change to 2.2u

3D3V_S5

BANDON

12

R2489
100KR2F-L1-GP

BANDON_NB13#_DET

12

NORTHBAY

R2490
100KR2F-L1-GP

TYPE

Single Port ACE w/o AR

Single Port ACE w AR

Dual Port ACE w/o AR

Dual Port ACE w AR

Dual Port ACE (w AR + w/o AR)

12

R2484

11"

12"

13"62k ohm

14"

15"8.2k ohm

1KR2F-L-GP

BOARD_ID

12

C2434
SC4700P25V2KX-4-GP

BOARD_ID rise time is measured from 5%~68%.

SIZE

1DY2

R2454 100KR2F-L1-GP

RN2407

1
2 3

SRN10KJ-5-GP

3D3V_S5

RN2401

1
2 3

SRN2K2J-1-GP

RN2402

1
2 3

SRN2K2J-1-GP

RN2403

1
2 3

SRN2K2J-1-GP

1 2

R2461 100KR2F-L1-GP

DY

RN2404

1
2 3

SRN100KJ-6-GP

RN2406

1
2 3

SRN100KJ-6-GP

1DY2

R2431 100KR2F-L1-GP

1 2

R2414 100KR2F-L1-GP

1 2

R2421 100KR2F-L1-GP

1 2

R2416 100KR2F-L1-GP

1 2

R2418 100KR2F-L1-GP

1 2

R2426 100KR2F-L1-GP

1 2

R2427 100KR2F-L1-GP

1 2

R2436 100KR2F-L1-GP

1 2

R2437 100KR2F-L1-GP

1 2

R2439 100KR2F-L1-GP

1 2

R2443 100KR2F-L1-GP

1 2

R2447 100KR2F-L1-GP

1 2

R2444 100KR2F-L1-GP

1DY2

R2423 100KR2F-L1-GP

1DY2

R2432 100KR2F-L1-GP

1DY2

R2428 10KR2F-2-GP

1 2

R2429 10KR2F-2-GP

1 2

R2430 10KR2F-2-GP

1 2

R2434 10KR2F-2-GP
R2446

1DY2

3D3V_RTC_AUX

1 2

R2459 100KR2F-L1-GP

1 2

R2460 100KR2F-L1-GP

1 2

R2456 100KR2F-L1-GP

1 2

R2448 10KR2F-2-GP

1 2

R2449 10KR2F-2-GP

1DY2

R2451 10KR2F-2-GP

1 2

R2457 100KR2F-L1-GP

1 2

R2458 100KR2F-L1-GP

RN2405

1
2
3
4 5

SRN100KJ-5-GP

1D8V_S0

1 2

R2445 100KR2F-L1-GP

1D8V_S5

1 2

R2453 100KR2F-L1-GP

DY

ESPI_CLK

1

D

ER2401

Y

10R2F-L-GP

2

ESPI_CLK_R

Place close
to Pin58

1

D

EC2401

Y

SC4D7P50V2BN-2-GP

2

Single Port ACE w AR

3D3V_S5

12

R2477
240KR2J-1-GP

TYPEC_ID

12

C2401
SC4700P25V2KX-4-GP

TYPEC_ID rise time is measured from 5%~68%.

3D3V_S5 3D3V_S5

12

R2483
62KR2F-GP

SYSTEM_ID

12

C2433
SC4700P25V2KX-4-GP

SYSTEM_ID rise time is measured from 5%~68%.

RTD3_SELECT[71]

TBT_RESET_N_EC[71,72]

S5_PG[52,53,54]

SSD_SCP_PWR_EN[63]

ESPI_ALERT#[18]

M_BIST[64]

FPR_SCAN_INT#[66,92]

FPR_SSO_EN#[92]

FPR_UEFI_MGMT#[92]

FPR_LOW_PWR_MODE#[92]

FPR_DET#[64,92]

SAR_DRP#[62]

WWAN_GPIO_CTRL[62]

FPR_PWR_EN#[92]

SML1_SMBDAT[18]
SML1_SMBCLK[18]

5

1 2

R2491 0R0402-PAD

1 2

R2479 0R0402-PAD

1 2

R2488 0R0402-PAD

1 2

R2480 0R0402-PAD

3D3V_RTC_AUX

R2450
100KR2F-L1-GP

1 2

POWER_SW_IN#

12

R2455

10KR2F-2-GP

12

C2414
SC2D2U10V3KX-1DLGP-U

A00

4

SC10U6D3V3MX-DL-GP

C2427 bulk capacitor CLOCE place close to MEC5105.

Vendor suggest 2017/11/27

0 = Reset JTAG I/F
1 = Disable

PROCHOT#_CPU

1 2

R2442
100R2F-L1-GP-U

DCIN1_EN_EC
DCIN2_EN_EC
VBUS1_ECOK_EC
VBUS2_ECOK_EC

TPAD14-OP-GP

NFC_ACTIVITY_STATUS#

3D3V_S5

1 2

R2465 100KR2F-L1-GP

TPAD14-OP-GP

X2401
XTAL-32D768KHZ-98-GP

082.30003.0301

12

C2424
SC18P50V2JN-1DLGP

UMA

3D3V_S5

Cap. Value Res. Value

R2473 100KR2F-L1-GP

2DY1

R2474 100KR2F-L1-GP

Discrete 10

UMA

EV board
BOARD_ID

240k ohm

130k ohm

33k ohm

1k ohm A00

4

12

VGA_ID0

REV

3D3V_S5

12

C2427

3D3V_RTC_AUX

C2409 SCD1U16V2KX-3DLGP

1

TP2409

R2492

VCI_IN2#

0R2J-2-GP

1DY2

1

TP2407

1 2

12

VGA_IDENT IFY

VGA_IDENT IFY

X004700pF

X01

X02

R2413
0R0402-PAD

1 2

12

CLOCE to A2

WWAN_WAKE#
FPR_LOW_PWR_MODE#
WLAN_WIGIG60GHZ_DIS#
SIO_PWRBTN#
SLP_WLAN#_GATE
LID_CL_SIO#

JTAG_CLK
JTAG_RST#
JTAG_TDI
JTAG_TDO
JTAG_TMS

TACH_FAN1
TBT_RESET_N_EC
PWM_FAN1
CNV_DET#
PCH_RSMRST#
PS_ID
BIA_PWM_EC
FPR_SCAN_INT#
HW_ACAVIN_NB
PANEL_BKEN_EC
BEEP
FPR_DET#
AC_DIS
PROCHOT#

WWAN_RADIO_DIS#
RTCRST_ON
BC_CLK_ECE1117
BC_DAT_ECE1117

SAR_DRP#
DCIN1_EN_EC
ESPI_RESET#
VBUS1_ECOK_EC
ESPI_ALERT#
CV2_ON
LCD_TST
WWAN_GPIO_CTRL
ESPI_CLK
ESPI_CS#
ESPI_IO0
ESPI_IO1
ESPI_IO2
ESPI_IO3
ENABLE_DS#
SSD_SCP_PWR_EN

ALW ON
BGPO0
POWER_SW_IN#
VCI_IN1#

NFC_ACTIVITY_STATUS#_R
ACAV_IN

NB_MUTE#
EN_INVPWR
RESET_IN#
32KHZ_OUT
SSD_SCP#
VGA_IDENT IFY
VBUS2_ECOK_EC
FPR_UEFI_MGMT#
IMVP_VR_O N
M_BIST
NGFF_CONFIG_0
USH_EXPANDER_SMBDAT
USH_DET#
AC_DISC#
USH_EXPANDER_SMBCLK

1 2

R2472
0R0402-PAD

C2425
SC18P50V2JN-1DLGP

1D8V_S5

3D3V_S5

R2410
0R0402-PAD

12

C2406 CLOCE to G8
C2407 CLOCE to M9

SCD1U16V2KX-3DLGP

SCD1U16V2KX-3DLGP

RTC_CELL_VBAT

M13

K12
L13
K11
K10
N11

C8

G13

E9
F6
C5

E3

D1
L10
L11

M5

N1

N6

H11

D9
H12
H13

F12
F11

D13
D12

K7
L12

K6

N3

H7

H8

M2

K1

G7

H6

K5

G6

M1

A5

D6

D5

B5

D4

E4

C7

A4

B2

C1

F3

M6

K9

N7

N8

N9

E5

C13

E13

B3

MEC_XTAL1

A1

MEC_XTAL2MEC_XTAL2_ R

A3

Non-Deep Sleep

2

R2476 100KR2F-L1-GP

NON_DS

2DS1

R2475 100KR2F-L1-GP

Non-Deep Sleep 1

DeepSleep

1D8V_S5

R2403
0R0402-PAD

3D3V_S5

1

2

DY

R2404
0R2J-2-GP

C2406

1 2

1 2

C2407

A2

U2401

VBAT

15mA

PS2 Interface

GPIO110/PS2_CLK2
GPIO111/PS2_DAT2
GPIO112/PS2_CLK1A
GPIO113/PS2_DAT1A
GPIO114/PS2_CLK0A/EC_SCI#
GPIO115/PS2_DAT0A

JTAG Interface

GPIO147/SMB08_DATA/JTAG_CLK
JTAG_RST#
GPIO145/SMB09_DATA/JTAG_TDI
GPIO146/SMB09_CLK/JTAG_TDO
GPIO150/SMB08_CLK/JTAG_TMS

FAN PWM & TACH

GPIO050/FAN_TACH0/GTACH0
GPIO051/FAN_TACH1/GTACH1
GPIO053/PWM0/GPWM0
GPIO054/PWM1/GPWM1
GPIO055/PWM2/SHD_CS#/(RSMRST#)

J8

GPIO056/PWM3/SHD_CLK
GPIO001/PWM4

L8

GPIO002/PWM5
GPIO014/PWM6/GPTP-IN6

J9

GPIO015/PWM7
GPIO035/PWM8/CTOUT1
GPIO133/PWM9
GPIO134/PWM10/UART1_RTS#
GPIO160/PWM11/PROCHOT#

BC-LINK

GPIO123/BCM0_CLK/PVT_IO2
GPIO122/BCM0_DAT/PVT_IO1
GPIO047/BCM1_CLK
GPIO046/BCM1_DAT

Host Interface

GPIO011/SMI#
GPIO107/SM#
GPIO061/LPCPD#/ESPI_RESET#
GPIO021/LPCPD#
GPIO063/SER_IRQ/ESPI_ALERT#
GPIO222/SER_IRQ
GPIO052/FAN_TACH2/LRESET#
GPIO064/LRESET#
GPIO065/PCI_CLK/ESPI_CLK
GPIO066/LFRAME#/ESPI_CS#
GPIO070/LAD0/ESPI_IO0

L4

GPIO071/LAD1/ESPI_IO1
GPIO072/LAD2/ESPI_IO2

L5

GPIO073/LAD3/ESPI_IO3

L2

GPIO067/CLKRUN#
GPIO100/EC_SCI#

VCI Interface

VCI_OUT
BGPO0
GPIO163/VCI_IN0#
GPIO162/VCI_IN1#
GPIO161/VCI_IN2#
GPIO000/VCI_IN3#
GPIO164/VCI_OVRD_IN

GPIO & Pass Through

GPIO022/GPTP-IN0
GPIO023/GPTP-IN1
GPIO024/GPTP-IN2
GPIO221/GPTP-IN3/32KHZ_OUT

L6

GPIO224/GPTP-IN4/SHD_IO1

L9

GPIO017/GPTP-IN5
GPIO016/GPTP-IN7/SHD_IO3/ICT3
GPIO032/GPTP-OUT0
GPIO031/GPTP-OUT1
GPIO040/GPTP-OUT2
GPIO152/GPTP-OUT3
GPIO005/SMB01_DATA/GPTP-OUT4
GPIO125/GPTP-OUT5/PVT_CLK
GPIO124/GPTP-OUT6/PVT_CS#
GPIO006/SMB01_CLK/GPTP-OUT7

Master Clock

XTAL1
XTAL2

MEC5105K-D2-TN-TR-GP

071.05105.0B0U

071.05105.0A0U VER.B

071.05105.0B0U VER.C

ENABLE_DS#

1

ENABLE_DS#

ENABLE_DS#

0

12

VTR3

G8

N5

VTR1

VTR2M9VTR3

3

C2402
SCD1U16V2KX-3DLGP

1 2

C2408
SCD1U16V2KX-3DLGP

1 2

PLL_PWR

VTR_REG

F1

H1

VTR_PLL

VTR_REG

VTR3

GPIO144/SMB04_CLK/SPI1_CS#/UART0_RI#/TRACEDAT3

GPIO143/SMB04_DATA/SPI1_MISO/UART0_DTR#/TRACEDAT2

GPIO142/SMB05_CLK/SPI1_MOSI/UART0_DSR#/TRACEDAT1
GPIO141/SMB05_DATA/SPI1_CLK/UART0_DCD#/TRACEDAT0

VSS1A6VSS2

VSS3E6VSS_PLLG1VR_CAP

A13

+VSS_PLL

3

R2406
100R2F-L1-GP-U

1 2

1DY2

1 2

GPIO171/TFDP_DATA/UART1_RX/(JTAG_STRAP)

J1

VR_CAP

1 2

PCH_DPWROK

3D3V_S5

C2404
SC22U6D3V2MX-1-GP

+VSS_PLL

C2405
SCD1U16V2KX-3DLGP

Misc. Interface

GPIO165/32KHZ_IN/CTOUT0/TRACECLK

SYSPWR_PRES

THERMTRIP1#

GPIO127/A20M/UART0_CTS#

GPIO156/LED0
GPIO157/LED1
GPIO153/LED2
GPIO226/LED3

GPIO126/PVT_IO3

GPIO033/RC_ID0

GPIO225/UART0_RTS#

GPIO121/PVT_IO0

GPIO057/VCC_PWRGD

GPIO106/PWROK

GPIO135/UART1_CTS#

GPIO104/UART0_TX
GPIO105/UART0_RX

GPIO103/THERMTRIP2#

GPIO060/KBRST/48MHZ_OUT

GPIO030/TIN3

GPIO170/TFDP_CLK/UART1_TX

GPIO223/SHD_IO0

GPIO034/RC_ID1/SPI0_CLK

GPIO044/VREF_VTT

GPIO043/SB-TSI_CLK

GPIO036/RC_ID2/SPI0_MISO

GPIO042/PECI_DAT/SB-TSI_DAT

GPIO227/SHD_IO2

GPIO151/ICT4
GPIO027/TIN2

GPIO026/TIN1

GPIO025/TIN0/NEM_INT/UART_CLK

SMBus & GPIO

GPIO004/SMB00_CLK/SPI0_MOSI
GPIO003/SMB00_DATA/SPI0_CS#

GPIO155/SMB02_CLK/PS2_DAT1B

GPIO154/SMB02_DATA/PS2_CLK1B

GPIO010/SMB03_CLK/PS2_DAT0B

GPIO007/SMB03_DATA/PS2_CLK0B

GPIO140/SMB06_CLK/ICT5

GPIO132/SMB06_DATA

GPIO013/SMB07_CLK/TOUT2

GPIO012/SMB07_DATA/TOUT3

GPIO131/SMB10_CLK/TOUT0

GPIO130/SMB10_DATA/TOUT1

Thermal Interface

DP1_DN1A
DN1_DP1A
DP2_DN2A
DN2_DP2A
DP3_DN3A
DN3_DP3A
DP4_DN4A
DN4_DP4A

GPIO041/SYS_SHDN#

ADC Interface

VTR_ANALOG

VREF_ADC

GPIO200/ADC00
GPIO201/ADC01
GPIO202/ADC02
GPIO203/ADC03
GPIO204/ADC04
GPIO205/ADC05
GPIO206/ADC06
GPIO207/ADC07
GPIO210/ADC08
GPIO211/ADC09
GPIO212/ADC10
GPIO213/ADC11
GPIO214/ADC12
GPIO215/ADC13
GPIO216/ADC14
GPIO217/ADC15

VSS_ANALOG

C2426
SC1U10V2KX-1DLGP

R2487

0R2J-2-GP

PCH_DPWROK_EC

1 2

DS

100KR2F-L1-GP

R2407
0R0402-PAD

1 2

GPIO166

GPIO045

GPIO020
GPIO175

GPIO233

GPIO231

GPIO120
GPIO230

VSS_ADC

R2485

VSET

VIN

VCP

C6
G9
B1
B12
B13
C2
C11
D10
D11
E1
E8
E12
F2
F8
F9
F10
F13
G3
G4
G10
G11
G12
H3
H5
H9
H10
J7
J10
J11
J12
J13
K8
K13
L7
M8
M10
M11
M12
N4
N12
N13

D7
E7
C12
E10
D8
E11
C3
B4
F7
B6
A12
N10
M4
M7
N2
M3

A7
A8
A9
A10
B8
B9
B10
A11
F4
C9
C10
B11

B7
K2

J4
J5
J6
G2
H2
J2
J3
K3
D3
D2
E2
G5
F5
K4
L1
L3

H4
C4

1

D

S

2

IMVP_VR_O N

S0_PGSIO_SLP_S3#

ALW_PWRGD_3V_5V

ALW_PWRGD_3V_5V

PCH_RSMRST#

2

3.3V_WWAN_EN
MSDATA

3.3V_ALW2
THERMTRIP1#

RTCRST_ON_POWER
BT_RADIO_DIS#
BREATH_LED#
BAT1_LED#
BAT2_LED#
LCD_VCC_TEST_EN
RUN_ON_EC
LID_CL_SIO_TAB#
TYPEC_ID
PCH_DPWROK
PBAT_PRES#
UPD1_SMBINT#
RTD3_SELECT
RUNPWROK
SYS_PWROK
BCM5882_ALERT#
HOST_DEBUG_TX
ME_FWP
THERMTRIP2#
GPS_DISABLE#
FPR_SSO_EN#
MSCLK

3.3V_TS_EN
SYSTEM_ID
+PECI_VREF
m3042_PCIE#_SATA
BOARD_ID
AC_PRESENT
PECI_EC_R
PRIM_PWRGD
PANEL_PWRGD
NGFF_CONFIG_1
FPR_PWR_EN#
SIO_EXT_WAKE#_EC
SIO_SLP_SUS#
TP_DISABLE#
PCIE_WAKE#

UPD2_SMBCLK

DAT_TP_SIO_I2C_CLK
CLK_TP_SIO_I2C_DAT
SML1_SMBCLK
SML1_SMBDAT
UPD1_SMBCLK
UPD1_SMBDAT
GPU_SMCLK
CPU_C10_GATE#_R
LED_MASK#
NGFF_CONFIG_2
BANDON_NB13#_DET
VCCDSW_EN_EC
PBAT_CHARGER_SMBCLK
PBAT_C HARGE R_SM BDAT

REM_DIODE1_P
REM_DIODE1_N
REM_DIODE2_P
REM_DIODE2_N
REM_DIODE3_P_TP
REM_DIODE3_N_TP
REM_DIODE4_P
REM_DIODE4_N
NGFF_CONFIG_3
VSET_5105
VR_CAP
I_AD P

ANALOG_P WR
VREF_ADC

I_BA T T
I_SY S
NB_MODE#
TOUCHPAD_INTR#
USH_PWR_STATE#
USB_POWERSHARE_VBUS_EN
USB_POWERSHARE_EN#
USB_PWR_EN1#
AUX_EN_W OWL
LOM_CABLE_DETECT#
BC_INT#_ECE1117
USB_PWR_EN2#
PRIVACY_ENABLE
DCIN2_EN_EC
PCH_PCIE_WAKE#
LAN_WAKE #

(from5085)

SYS_PWROK_R

1 2

R2425
0R0402-PAD

LPC mode

U74LVC1G08G-AL5-R-GP-U

2ND= 73.7SZ08.DAH

C2411 SCD1U16V2KX-3DLGP

R2435 0R0402-PAD

C2413

R2438 43R2F-2-GP
R2478 0R0402-PAD

1 2

R2481 0R0402-PAD

1

TP2408 TPAD14-OP-GP

1DY2

R2493
0R1J-GP

1

TP2419 TPAD14-OP-GP

1

TP2420 TPAD14-OP-GP

R2462 698R2F-GP
C2416 SCD1U16V2KX-3DLGP
C2417 SCD1U16V2KX-3DLGP

C2418
C2419 SCD1U16V2KX-3DLGP
R2467 0R0402-PAD
R2468 0R0402-PAD
C2420 SCD1U16V2KX-3DLGP

POWERGD-> EC ->RSMRST
HARDWELL ACT
*After RSMRST 50ms ,control DPWROK .
*If on power down ,SLP_SUS low DSW must be low .
RSMRST 󲬝SLP SUS

3D3V_S5

U2406

1

5

A

VCC

2

DS

B

DSW_PWROK_CPU DSW_PWROK_R

4

GND3Y

73.01G08.EHG

12

1 2

DY

SC100P50V2JN-3DLGP

1 2

1 2
1 2

SIO_EXT_WAKE#

CPU_C10_GATE#

Thermal T8 resistor

1 2

12
12

SC1U10V2KX-1DLGP

1 2

12
1 2
1 2

12

󴿍󲔲󲈒󳗍󲖋󰽢󰵉󱫣󴣊

C2429
SCD1U16V2KX-3DLGP

2DY1

1DS2

R2482

0R2J-2-GP

12

R2420
100KR2F-L1-GP

R2419
1KR2F-L-GP

PECI_CPU
S5_PG

12

1

D

2

DY

C2422

C2432
SCD1U16V2KX-3DLGP

Y

RC_delay 10ms

3D3V_S5

C2410

U2404

1

A

2

B

GND3Y

U74LVC1G08G-AL5-R-GP-U

73.01G08.EHG

2ND= 73.7SZ08.DAH

R2402
0R2J-2-GP

1 2

DY

U2403

1

A

2

B

GND3Y

U74LVC1G08G-AL5-R-GP-U

73.01G08.EHG

2ND= 73.7SZ08.DAH

SCD1U16V2KX-3DLGP

1

5

2

DY

VCC

PCH_RSMRST#_Q

4

1 2

R2486
0R0402-PAD

RSMRST#_KBC

1

C2435

D

SCD1U16V2KX-3DLGP

Y

2

RC_delay 10ms

3D3V_S5

C2403
SCD1U16V2KX-3DLGP

2DY1

5

VCC

4

1 2

2

12

3D3V_AUX_S5

1D05V_VCCST

3D3V_S5
3D3V_S5

R

2469 300R2F-GP

R2470 300R2F-GP

12

C2423

SC2200P50V2KX-2DLGP

DPWROK󰶨󲈒.

ALL_SYS_PWRGD

VR_ EN

R2405
0R0402-PAD

SC2200P50V2KX-2DLGP

1 2
1

2

0D95V_VCCIO

RUN_ON_R

1DY2

R2417 0R2J-2-GP

SIO_SLP_S3#

1 2

R2422 0R0402-PAD

Q2401

G

D

DY

S

2N7002K-2-GP

84.2N702.J31

2ND= 84.2N702.031

3rd= 84.2N702.W31

1 2

DY

R2440
0R2J-2-GP

PCIE_WAKE#

1 2

A B

R2463
0R0402-PAD

Stuff R2445 and no stuff R2446 keep E5 design

A

Stuff R2446 and no stuff R2445 to save two GPIOs on EC

B

(PCH_PCIE_WAKE# should be output with OpenDrain)

LID_CL#_TAB_R

A K

D2402
RB751VM-40TE-17-GP

83.R2004.J8F

LID_CL#_NB_R

A K

D2403
RB751VM-40TE-17-GP

83.R2004.J8F

VCCDSW_EN_EC VCCDSW_EN

ALW_PWRGD_3V_5V

I_BATT_R
I_SYS_R

Q2402_G

Q2402_S

1 2

R2441
0R0402-PAD

1 2

DY

R2464
0R2J-2-GP

B
A

LID_CL_SIO_TAB#_R

LID_CL_SIO#_R

D2404

A

NON_DS

RB751VM-40TE-17-GP

83.R2004.J8F

D2405

K

NON_DS

RB751VM-40TE-17-GP

83.R2004.J8F

1

3D3V_S5

12

R2424
8K2R2J-3-GP

C

Q2402

Q2403_B

B

1 2

R2433

2K2R2F-GP

1D05V_VCCST

PCIE_WAKE#_R

PCH_PCIE_WAKE#

R2415 10R2F-L-GP

R2412 10R2F-L-GP

K

A

LMBT3904LT1G-GP

84.T3904.H11

E

2nd= 84.T3904.K11

3rd= 84.03904.E11

THERMTRIP#_CPU

1 2

1 2

LID_CL_SIO_TAB#

LID_CL_SIO#

R2408
1MR2F-GP

1 2

<Core Design>

<Core Design>

<Core Design>

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

A1

A1

A1

Date: Sheet of

Date: Sheet of

Date: Sheet of

1

THERMTRIP2#

12

C2412
SCD1U16V2KX-3DLGP

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

ECIO(KBC5105)

ECIO(KBC5105)

ECIO(KBC5105)

Bandon / NorthBay 13''

Bandon / NorthBay 13''

Bandon / NorthBay 13''

24 106Friday, February 15, 2019

24 106Friday, February 15, 2019

24 106Friday, February 15, 2019

X00

X00

X00

5

Vinafix.com

4

3

2

1

Main Func = BIOS ROM/RTC

SPI_CLK_DEBUG[68,91]
SPI_SI_DEBUG[68,91]
SPI_SO_DEBUG[68,91]
SPI_WP_DEBUG[68]
SPI_HOLD_DEBUG[68]
SPI_CS_DEBUG_N0[68]
SPI_CS_DEBUG_N1[68]

D D

C C

RTCRST_ON[18,24]

VCCDSW_EN_EC[24]

RTCRST_ON_POWER[24]

RTC_DET#[18,20]

SPI_CLK_DEBUG
SPI_SI_DEBUG SPI_SI_ROM1

SPI_SO_DEBUG SPI_SO_ROM2
SPI_HOLD_DEBUG

R2509

SPI_CS_DEBUG_N0

SPI_CS_DEBUG_N1

SPI_CS_DEBUG_N0

SPI_CS_DEBUG_N1

SPI_WP_DEBUG SPI_WP_ROM2

0R1J-GP

1

DY

R2503

0R0201-PAD-1-NSP-GP

1 2

1 2

R2504
33R1F-GP

R2510

0R0201-PAD-1-NSP-GP

1 2

R2506

0R1J-GP

1

DY

1 2

R2507
33R1F-GP

1 2

R2520 33R1F-GP

1 2

R2521 33R1F-GP

1 2

R2522 33R1F-GP

1 2

R2523 33R1F-GP

1 2

R2524 33R1F-GP

1 2

R2525 33R1F-GP

1 2

R2526 33R1F-GP

1 2

R2527 33R1F-GP

3D3V_SPI

12

R2502

2

4K7R2F-GP

SPI_CS_ROM1_N0
SPI_SO_ROM1
SPI_WP_ROM1SPI_WP_DEBUG

3D3V_SPI

12

R2505
4K7R2F-GP

SPI_CS_ROM2_N1

2

SPI_SO_ROM2

SYSTEM SPI ROM

SPI_CLK_ROM1

SPI_HOLD_ROM1SPI_HOLD_DEBUG
SPI_SO_ROM1SPI_SO_DEBUG

SPI_HOLD_ROM2
SPI_SI_ROM2SPI_SI_DEBUG

Non_Vpor-SOP8-16MB

U2502

1

CS #

2

DO/IO1
WP#/IO2
GND

HOLD#/RESET#/I O3

65

3
4

W25Q128JVSIQ-GP

072.25128.0B51

Vpor-WSON-32MB
Non_Vpor-WSON-8MB

U2501

1

CS #

2

DO/IO1

3

65

IO2
GND4DI/IO0

W25Q256JVEIQ-GP

072.25256.0N01

VCC

CL K

GND

VCC

CL K

DI/IO0

8
7

IO3

6
5

9

1

DY

R2501
1KR1F-GP

1 2

DY

EC2501
SC33P50V2JN-3DLGP

1 2

DY

EC2502
SC33P50V2JN-3DLGP

8

SPI_HOLD_ROM1

7

SPI_CLK_ROM1

6

SPI_SI_ROM1

5

SPI_HOLD_ROM2
SPI_CLK_ROM2
SPI_SI_ROM2

SPI_HOLD_DEBUG

2

SPI_CLK_ROM1_R

SPI_CLK_ROM2_RSPI_CLK_DEBUG SPI_CLK_ROM2

3D3V_SPI

1 2

C2501
SCD1U16V2KX-3DLGP

3D3V_SPI

1 2

C2502
SCD1U16V2KX-3DLGP

NON_VPRO_8MB

072.25Q64.0E03

1

DY

ER2501
33R2F-3-LS-GP

1

DY

ER2502
33R2F-3-LS-GP

SPI_CLK_ROM1

2

SPI_CLK_ROM2

2

󲆔󱈞󲌤󲓢

Non-vPRO configs - 16MB (UI)
Winbond W25Q128JVSIQ; MXIC: MX25L12873FM; GigaDevice:
GD25B127D
If more than 3 sources are required then these parts can be
considered:
Spansion: S25FL128L; Micron: MT25QL128ABA1ESE-0SIT

vPRO Configs: 32MB
Winbond W25Q256JV, Gigadevice GD25Q256C, Cypress
S25FL256L

X09 design DS3_Non-DS3 with RTC power gating

3D3V_RTC_AUX 3D3V_RTC_PCH

B B

3D3V_AUX_S5

RTC1

3
1

2
4

ACES-CON2-20-GP-U

20.F1639.002

2nd:20.F1841.002

+RTC_PWR

AFTP2502

AFTE14P-GP

A A

1

+RTC_PWR

AFTP2501
AFTE14P-GP

1

R2508
1KR2J-1-GP

12

RTC_PWR

Width=20mils

Q2506

12

R2517

10MR2J-L-GP

5

G

S

2N7002K-2-GP

84.2N702.J31

2ND = 84.2N702.031

3rd = 84.07002.I31

4th = 84.2N702.W31

R2528
D01R3F-L-GP

2

1

DY

3D3V_S5 3D3V_SUS

R2529
D01R3F-L-GP

2

1

DY

Q2501

2

1

BAT54C-12-GP

75.00054.A7D

D

3D3V_SUS

R2519
10KR2F-2-GP

1 2

3D3V_RTC_AUX

3

RTCRST_ON_POWER

RTC_DET#

4

1 2

3D3V_RTC_AUX

RTCRST_ON_POWER_R RTC_3P3_EN_G

R2516
0R0402-PAD

SC1U10V2KX-1DLGP

C2503

Q2507
PJA3413-1-GP

084.03413.0031

G

12

DY

12

DS

D2502

AK

RB751VM-40TE-17-GP

83.R2004.J8F

R2567

1MR2F-GP

1 2

R2518
100KR2F-L1-GP

3

3D3V_RTC_PCH

R2531

0R0603-PAD

1 2

12

R2515
10KR2F-2-GP

RTC_3P3_EN_D

D

S

G

12

C2517

SC22P50V2JN-4DLGP

12

Q2510
2N7002K-2-GP

84.2N702.J31

VCCDSW_EN_EC

C2505
SC1U10V2KX-1DLGP

1 2

R2534
0R0402-PAD

2

VCCDSW_EN_R

3D3V_S5 3D3V_SUS

12

R2511
10KR2F-2-GP

DS

1 2

VCCDSW_EN_GPIO_R

1

C2504

SC1U10V2KX-1DLGP

D

Y

2

<Core Design>

<Core Design>

<Core Design>

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

A3

A3

A3

Date: Sheet of

Date: Sheet of

Date: Sheet of

R2513
499KR2F-1-GP

Q2502
PJA3413-1-GP

3D3V_SUS_R

DS

DS

084.03413.0031

G

1

D

R2512

S

49K9R2F-L-GP

2

VCCDSW_EN_GPIO_Q1

D

Q2503
2N7002K-2-GP

DS

84.2N702.J31

Notice:ZZ.2N702.J3101

S

G

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, S ec.1, Hsin Tai Wu Rd., H sichih,

21F, 88, S ec.1, Hsin Tai Wu Rd., H sichih,

21F, 88, S ec.1, Hsin Tai Wu Rd., H sichih,
Taipei Hsien 221, Taiwan, R .O.C.

Taipei Hsien 221, Taiwan, R .O.C.

Taipei Hsien 221, Taiwan, R .O.C.

Flash/RTC

Flash/RTC

Flash/RTC

Bandon / NorthBay 13''

Bandon / NorthBay 13''

Bandon / NorthBay 13''

1

R2514
D01R3F-L-GP

1 2

DS

25 106Friday, February 15, 2019

25 106Friday, February 15, 2019

25 106Friday, February 15, 2019

X00

X00

X00

5

Vinafix.com

4

3

2

1

Main Func = Thermal / FAN

REM_DIODE1_P[24]
REM_DIODE1_N[24]
REM_DIODE2_P[24]

D D

REM_DIODE2_N[24]

LMBT3904LT1G-GP

REM_DIODE4_P[24]
REM_DIODE4_N[24]

PWM_FAN1[24]
TACH_FAN1[24]

84.T3904.H11

2nd = 84.T3904.K11

3rd = 84.03904.E11

C

Q2601

Layout Note: Place to CPU

Both DXN and DXP routing 10 mil trace width and 10 mil spacing.

B

E

C2601
SC100P50V2JN-3DLGP

12

DY

12

C2602

Layout Note: Close to EC

REM_DIODE1_P

SC2200P50V2KX-2DLGP

REM_DIODE1_N

5105 Channel

DP1/DN1

DP2/DN2

DN2a/DP2a

DP4/DN4

3D3V_S0

Layout Note: Close to WWAN/2nd SSD

REM_DIODE2_P

C C

B B

C2604

SC100P50V2JN-3DLGP

12

DY

LMBT3904LT1G-GP

3rd = 84.03904.E11

2nd = 84.T3904.K11

LMBT3904LT1G-GP

84.T3904.H11

2nd = 84.T3904.K11

3rd = 84.03904.E11

84.T3904.H11

Layout Note:Place to DIMM

Both DXN and DXP routing 10 mil trace width and 10 mil spacing.

Q2605

Q2603

E

B

C

C2610

C

B

E

12

SC100P50V2JN-3DLGP

DY

Layout Note:Place to V.R

Both DXN and DXP routing 10 mil trace width and 10 mil spacing.

C2603
SC100P50V2JN-3DLGP

12

DY

LMBT3904LT1G-GP

84.T3904.H11

2nd = 84.T3904.K11

3rd = 84.03904.E11

C

Q2602

C2609

12

SC2200P50V2KX-2DLGP

B

E

REM_DIODE4_P

REM_DIODE4_N

Layout Note: Close to EC

12

C2605
SC2200P50V2KX-2DLGP

REM_DIODE2_N

Layout Note: Close to EC

5V_S0

AFTP2601
AFTE14P-GP

SC4D7U6D3V3KX-DLGP

1

12

C2608

Signal Routing Guideline:
Trace width = 15mil

PWM_FAN1

TACH_FAN1_Q TACH_FAN1

2N7002KDW-1-GP

75.27002.F7C

TACH_FAN1_Q
PWM_FAN1_Q

Layout Note:

TACH_FAN1_Q
PWM_FAN1_Q

1
1

Location

CPU

WWAN

DDR

V.R

U2601

1

2

3 4

5V_S0

1

23

4

AFTP2602 AFTE14P-GP
AFTP2603 AFTE14P-GP

(Q2601)

(Q2602)

(Q2603)

(Q2605)

Note:ZZ.27002.F7C01

6

5

RN2601
SRN10KJ-5-GP

ACES-CON4-29-GP

20.F1639.004

2nd:020.F0097.0004

PWM_FAN1_Q

FAN

FAN1

1

2
3
4

5

6

<Core Design>

<Core Design>

<Core Design>

A A

5

Title

Titl e

Titl e

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

A4

A4

A4

Date: Sheet of

Date: Sheet of

4

3

Date: Sheet of

2

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

INT IO (Thermal/Fan)

INT IO (Thermal/Fan)

INT IO (Thermal/Fan)

Bandon / NorthBay 13''

Bandon / NorthBay 13''

Bandon / NorthBay 13''

26 106Friday, February 15, 2019

26 106Friday, February 15, 2019

26 106Friday, February 15, 2019

1

X00

X00

X00

5

Vinafix.com

Main Func = Audio

AUD_SPK_L+[29]
AUD_SPK_L-[29]
AUD_SPK_R-[29]
AUD_SPK_R+[29]

AUD_HPJD_N[29]
NB_MUTE#[24]

HDA_RST#[19]
HDA_SDI0[19]
HDA_SDOUT_CODEC[19]
HDA_SYNC_CODEC[19]
HDA_BITCLK_CODEC[19]

moat

R2710
0R0603-PAD

1 2

50mA

DMIC_SDA_CODEC[56]
DMIC_SCL_CODEC[56]

SIO_SLP_S3#[17,24,40,51,68,71]

SPKR[15,19]
BEEP[24]
AUD_RING[29]
AUD_SELEEVE[29]

LINE1_R[29]
LINE1_L[29]

MIC2_VREFO_R[29]
MIC2_VREFO_L[29]
AUD_HPOUT_L[29]
AUD_HPOUT_R[29]

AUD_PWR_EN[19]

+5V_AVDD5V_S0

Layout Note:

Place close to Pin 40

12

12

C2703

C2702

SC10U6D3V3MX-DL-GP

SCD1U16V2KX-3DLGP

D D

C C

1D8V_S0

1D8V_S0

1D8V_S0

3D3V_S0 +3V_1D8V_AVDD

R2725
0R3J-0-U-GP

2

1

DY

3D3V_S0 +3V_1D8V_AVDD_IO

R2726
0R3J-0-U-GP

2

1

DY

200mA

1 2

R2703
0R0402-PAD

Close pin 20

12

+3V_1D8V_AVDD

DMIC_SDA_CODEC

4

15mA

R2702
0R0603-PAD

1 2

R2707
0R0603-PAD

1 2

CPVDD

12

C2701

C2705

SCD1U16V2KX-3DLGP

R2724 100KR2F-L1-GP

R2718 0R0402-PAD
R2720 0R0402-PAD

SC10U6D3V3MX-DL-GP

SC10U6D3V3MX-DL-GP

12

12
12

3

+3V_1D8V_AVDD

12

12

SC10U6D3V3MX-DL-GP

HDA_SYNC_CODEC
HDA_BITCLK_CODEC HDA_BITCLK_CODEC_R

Layout Note:

Place close to Pin 1

C2719

+3V_1D8V_AVDD_IO

12

C2722

1 2
1 2
1 2
1

DY

R2714

200KR2F-L-GP

DMIC_SDA_CODEC_R
DMIC_SCL_CODEC_RDMIC_SCL_CODEC

12

R2723 33R2F-3-GP
R2719 0R0402-PAD
R2721 33R2F-3-GP
R2722 0R2J-2-GP

Close pin5

C2720
SCD1U16V2KX-3DLGP

C2718
SCD1U16V2KX-3DLGP

3D3V_RTC_AUX

1 2

R2712
0R0402-PAD

2

+3V_1D8V_AVDD

12

R2713
100KR2F-L1-GP

12

1

D

EC2721

SC33P50V2JN-3DLGP

Y

2

HDA_SDOUT_CODEC_RHDA_SDOUT_CODEC
HDA_SDIN0_CODECHDA_SDI0
DVSS

+5V_AVDD

CPVDD

+5V_PVDD
+5V_PVDD

5V_STB

AUD_HPJD_N_RAUD_HPJD_N
AUD_IS2-IN

1

D

EC2708

SC33P50V2JN-3DLGP

Y

2

R2729
1KR2J-1-GP

1 2

SPKR

1 2

BEEP

R2730
1KR2J-1-GP

U2701

3

DVDD

18

DVDD-IO

40

AVDD1

20

CPVDD/AVDD2

41

PVDD1

46

PVDD2

33

5VSTB/AUX_MODE

6

I2C-DATA

7

I2C-CLK

15

AUDIOLINK_SYNC

14

AUDIOLINK_BCLK

17

AUDIOLINK_SDATA- OUT

16

AUDIOLINK_SDATA- IN

13

DC-DET/EAPD

11

I2S-MCLK

10

I2S-BCLK

12

I2S-LRCK

8

I2S-IN

9

I2S-OUT

48

HP/LINE2-JD( JD1)

47

I2S-IN/I2S-OUT-JD(JD2)

4

GPIO0/DMIC-DATA12

5

GPIO1/DMIC-CLK

1

DMIC-CLK-IN/I 2S-EN/SPDIF-OUT/GPI O2/DMIC-DATA34

2

PDB

ALC3254-VA3-CG-GP

071.03254.M001

2

HDA_SPKR_R

KBC_BEEP_R

MIC2-L(PORT-F-L)/RING2

MIC2-R(PORT-F-R)/SLEEVE

HPOUT-R(PORT-I -R)

1

2

PCBEEP

LINE2-L(PORT-E-L)

LINE2-R(PORT- E-R)

SPK-OUT-L+
SPK-OUT-L-

SPK-OUT-R+

SPK-OUT-R-

HPOUT-L(PORT- I-L)

VREF

LDO1-CAP
LDO2-CAP
LDO3-CAP

MIC2-VREFO-L

MIC2-VREFO-R

MIC2-CAP

CPVEE

CB P
CB N

AVSS1
AVSS2

GND

D2701

3

BAT54C-12-GP

75.00054.A7D

34

30
31

36
35

42
43
45
44

27
26

38

39
21
19

28
29

32

25

23
24

37
22

49

SCD1U16V2KX-3DLGP

AUD_PC_BEEP_C

AUD_PC_BEEP

AUD_RING
AUD_SELEEVE

LINE1_L
LINE1_R

AUD_SPK_L+
AUD_SPK_L­AUD_SPK_R+
AUD_SPK_R-

AUD_HPOUT_L
AUD_HPOUT_R

AUD_VREF

LDO1_CAP

LDO2_CAP
LDO3_CAP
MIC2_VREFO_L
MIC2_VREFO_R

MIC_CAP

CPVEE

CBP
CBN

AUD_AGND
AUD_AGND

1

C2717

AUD_PC_BEEP_R

1 2

12

R2715
2K2R2F-GP

Layout Note:

Width>40mil, to improve Headpohone Crosstalk noise
Change it to sharp will be better.
Add 2 vias (>0.5A) when trace layer change.

Layout Note:

Speaker trace width >40mil @ 2W4ohm speaker power

1 2

12

12

12
12
12

12

12

C2710 SC2D2U10V3KX-1DLGP-U

C2712 SC10U6D3V3MX-DL-GP
R2708 100KR2F-L1-GP
C2714 SC10U6D3V3MX-DL-GP
C2716 SC10U6D3V3MX-DL-GP

C2704 SC10U6D3V3MX-DL-GP

C2713 SC1U50V3KX-1-GP

C2711 SC1U50V3KX-1-GP

R2704

0R0402-PAD

1 2

AUD_AGND

AUD_AGND

AUD_AGND

AUD_AGND

AUD_AGND

+3V_1D8V_AVDD

12

R2716

AUD_AGND

5V_S0 +5V_PVDD

800mA

1 2

R2732

B B

1 2

R2733

1 2

R2734

0R0402-PAD
0R0402-PAD
0R0402-PAD

Layout Note:

Close pin41

12

C2706

SC10U6D3V3MX-DL-GP

12

C2707

SCD1U16V2KX-3DLGP

Layout Note:

Close pin46

12

C2708

12

SC10U6D3V3MX-DL-GP

C2709

SCD1U16V2KX-3DLGP

12

12

C2733

C2734

SCD1U16V2KX-3DLGP

SCD1U16V2KX-3DLGP

moat

1 2

EC2702 SCD1U25V2KX-1-DL-GP

1 2

EC2703 SCD1U25V2KX-1-DL-GP

1 2

EC2704 SCD1U25V2KX-1-DL-GP

1 2

EC2705 SCD1U25V2KX-1-DL-GP

1 2

EC2706 SCD1U25V2KX-1-DL-GP

A A

AUD_AGND

1 2

R2705 0R0603-PAD

AUD_AGND

Layout Note:

R2705 must place nearby codec IC.

5

NB_MUTE#

HDA_RST#

DY

EC2701

SC10P50V2JN-4DLGP

1 2

12

EC2707

SC22P50V2JN-4DLGP

4

100KR2F-L1-GP

R2717

0R0402-PAD

1 2

R2731
0R2J-2-GP

1

DY

HDA_SDOUT_CODEC

1

FC2701

SC33P50V2JN-3DLGP

D

Y

2

HDA_BITCLK_CODEC

1

FC2702

SC33P50V2JN-3DLGP

D

Y

2

EAPD#

2

SC10U6D3V3MX-DL-GP

SC10U6D3V3MX-DL-GP

2
2

EMI suggest change to 33p
2015/12/02
Azalia I/F EMI

3

AUD_PWR_EN AUD_3V_EN

SC1U10V2KX-1DLGP

C2724

1DY2

C2731

DY

1 2

R2709
0R2J-2-GP

1

DY

1

DY

R2711
0R2J-2-GP

C2732

2

DY

5V_S0

3D3V_S0

DY

12

1

AUD_5V_EN

C2725

+5V_PVDD/+3V_AVDD

5V_S5

U2702

4

VBIAS

VOUT1#13

VI N1# 1
VI N1# 2

VI N2# 6
VI N2# 7

ON1
ON2

DY

VOUT1#14

VOUT2#8
VOUT2#9

1
2

6
7

3
5

DY

12

APE8910GN3B-GP

C2726

SCD1U16V2KX-3DLGP

SCD1U16V2KX-3DLGP

074.08910.0093

2

13
14

8
9

U2702_CT1

12

CT 1

U2702_CT2

10

CT 2

11

GND

15

GND

<Core Design>

<Core Design>

<Core Design>

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

A3

A3

A3

Date: Sheet of

Date: Sheet of

Date: Sheet of

1500mA

15mA

C2727

SC470P50V2KX-3DLGP

1DY2
1DY2

C2728

SC470P50V2KX-3DLGP

+3V_AVDD +3V_1D8V_AVDD

R2727
0R3J-0-U-GP

1

DY

+3V_1D8V_AVDD_IO

R2728
0R3J-0-U-GP

1

DY

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, S ec.1, Hsin Tai Wu Rd., H sichih,

21F, 88, S ec.1, Hsin Tai Wu Rd., H sichih,

21F, 88, S ec.1, Hsin Tai Wu Rd., H sichih,
Taipei Hsien 221, Taiwan, R .O.C.

Taipei Hsien 221, Taiwan, R .O.C.

Taipei Hsien 221, Taiwan, R .O.C.

Audio (CodecALC3253)

Audio (CodecALC3253)

Audio (CodecALC3253)

Bandon / NorthBay 13''

Bandon / NorthBay 13''

Bandon / NorthBay 13''

+5V_PVDD

1

1

D

2

+3V_AVDD

DY

1 2

2

2

27 106Friday, February 15, 2019

27 106Friday, February 15, 2019

27 106Friday, February 15, 2019

1

C2723

Y

C2729

SC10U6D3V3MX-DL-GP

C2715

SCD1U16V2KX-3DLGP

SC10U6D3V3MX-DL-GP

D

Y

2

1

C2730

SCD1U16V2KX-3DLGP

D

Y

2

X00

X00

X00

5

Vinafix.com

D D

C C

4

3

2

1

B B

<Core Design>

<Core Design>

<Core Design>

A A

5

Title

Titl e

Titl e

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

A4

A4

A4

Date: Sheet of

Date: Sheet of

4

3

Date: Sheet of

2

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Audio (RSVD) (Audio AMP)

Audio (RSVD) (Audio AMP)

Audio (RSVD) (Audio AMP)

X00

X00

Bandon / NorthBay 13''

Bandon / NorthBay 13''

Bandon / NorthBay 13''

28 106Friday, February 15, 2019

28 106Friday, February 15, 2019

28 106Friday, February 15, 2019

1

X00

5

Vinafix.com

4

3

2

1

Main Func = Audio

AUD_SPK_L+[27]
AUD_SPK_L-[27]
AUD_SPK_R-[27]
AUD_SPK_R+[27]

D D

C C

MIC2_VREFO_R
MIC2_VREFO_L

AUD_RING
AUD_HPOUT_L
LINE1_L

AUD_HPOUT_R
LINE1_R

B B

AUD_SELEEVE

A A

MIC2_VREFO_R[27]
MIC2_VREFO_L[27]

AUD_RING[27]

AUD_HPOUT_L[27]

LINE1_L[27]

AUD_HPOUT_R[27]

LINE1_R[27]

AUD_SELEEVE[27]

AUD_HPJD_N[27]

SPK_DET#[19]

2

1

3

ED2901
AZ5125-02S-R7G-GP

12

C2901
SC10U6D3V3MX-DL-GP

12

C2902
SC10U6D3V3MX-DL-GP

2

3

75.05125.07D

5

AUD_SPK_L+

AUD_SPK_L­AUD_SPK_R­AUD_SPK_R+ AUD_SPK_R+_C

12

EC2901

SC100P50V2JN-3DLGP

DY

4

AUD_HPJD_N JACK_PLUG

AUD_AGND

12

DY

AUD_HP1_JACK_L1

AUD_HP1_JACK_R1

R2913
0R0603-PAD

1 2

C2903

SC10U6D3V3MX-DL-GP

1

D

Y

2

LINE1-L_C

LINE1-R_C

1

ED2902
AZ5125-02S-R7G-GP

75.05125.07D

12

EC2904

SC100P50V2JN-3DLGP

DY

SRN2K2J-1-GP

R2901 0R0603-PAD
R2904 0R0402-PAD

R2906 0R0603-PAD
R2908 0R0402-PAD

2

3

12

EC2903

SC100P50V2JN-3DLGP

DY

RN2901

1
2 3

1 2
1 2

1 2
1 2

RING2_R
AUD_PORTA_L_R_B

JACK_PLUG
JACK_PLUG_DET

AUD_PORTA_R_R_B
SLEEVE_R

1

ED2903
AZ5125-02S-R7G-GP

75.05125.07D

4

1 2

EL2901 HCB1005KF-121T20-GP

1 2

EL2902 HCB1005KF-121T20-GP

1 2

EL2903 HCB1005KF-121T20-GP

1 2

EL2904 HCB1005KF-121T20-GP

EC2902

SC100P50V2JN-3DLGP

main: 68.00358.031
2nd: 068.00006.0041

3D3V_S0

R2915
10KR2F-2-GP

1 2

SPK_DET#

12

R2911

10KR2F-2-GP

DY

10 mils10 mils

Delay circuit

3

Speaker trace width >40mil @ 2W4ohm speaker power

AUD_SPK_L+_C

AUD_SPK_L-_C
AUD_SPK_R-_C

EC2908

SC1KP50V2KX-1DLGP

12

EC2907

SC1KP50V2KX-1DLGP

12

EC2906

SC1KP50V2KX-1DLGP

12

2017/03/27 modify by EMI suggest

HI
LOWYGFG

Layout Note:

R2901 must place nearby AUD1.

1 2

R2902 0R0603-PAD

1 2

R2903 16D2R3F-2-GP

1 2

R2907 16D2R3F-2-GP

1 2

R2909 0R0603-PAD

12

12

EC2909

SC680P50V2KX-2DLGP

AUD_AGND

DY

EC2910

SC680P50V2KX-2DLGP

12

AUD_AGND

10 mils

JACK_PLUG_DET

12

R2914
0R0402-PAD

R2912

10KR2F-2-GP

12

EC2911

SC680P50V2KX-2DLGP

EC2912

SC680P50V2KX-2DLGP

12

AUD_AGND

<Core Design>

<Core Design>

<Core Design>

Title

Title

Title

Audio (HP/SPK/MIC Jack)

Audio (HP/SPK/MIC Jack)

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev
A4

A4

A4

Date: Sheet of

Date: Sheet of

Date: Sheet of

2

Audio (HP/SPK/MIC Jack)

Bandon / NorthBay 13''

Bandon / NorthBay 13''

Bandon / NorthBay 13''

Friday, February 15, 2019

Friday, February 15, 2019

Friday, February 15, 2019

Speaker

SPK1

7

1

2
3

SPK_DET#

12

EC2905

SC1KP50V2KX-1DLGP

2nd:020.F1263.0006

AUD_SPK_L-_C
AUD_SPK_L+_C
AUD_SPK_R-_C
AUD_SPK_R+_C

CONN Pin
Pin1

Pin2 SPK_L­Pin3
Pin4
Pin5
Pin6 GND

RING2_R
AUD_PORTA_L_R_B

AUD_PORTA_R_R_B
SLEEVE_R

SLEEVE_R
AUD_PORTA_L_R_B

JACK_PLUG
JACK_PLUG_DET
AUD_PORTA_R_R_B
RING2_R

AUD_AGND

2nd:022.10002.00P1
3nd:022.10002.0981

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

4
5
6

8

ACES-CON6-20-GP-U

20.F1639.006

1
1
1
1

Net name
SPK_L+

SPK_R­SPK_R+
SPK_DET#

1

DY

R2905

0R5J-5-GP

AUD_AGND

Universal Jack

AUD1

3
1

5
6
2
4

MS

Audio(IP/NK comb)

AUDIO-JK522-GP

022.10002.00D1

29 106

29 106

29 106

1

AFTP2901
AFTP2902
AFTP2903
AFTP2904

2

X00

X00

X00

Layout Note:

5

Vinafix.com

D D

C C

4

3

2

1

B B

<Core Design>

<Core Design>

<Core Design>

A A

5

Title

Titl e

Titl e

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

A4

A4

A4

Date: Sheet of

Date: Sheet of

4

3

Date: Sheet of

2

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Audio (RSVD)

Audio (RSVD)

Audio (RSVD)

Bandon / NorthBay 13''

Bandon / NorthBay 13''

Bandon / NorthBay 13''

30 106Friday, February 15, 2019

30 106Friday, February 15, 2019

30 106Friday, February 15, 2019

1

X00

X00

X00