DATEL ADS-119 Service Manual

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Page 1

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REGISTERREGISTER

OUTPUT REGISTER

DIGITAL CORRECTION LOGIC

SUPPLY

GROUND

SUPPLY

GROUND

查询ADC-B119供应商查询ADC-B119供应商

FEATURES

• 12-bit resolution

• 10MHz minimum sampling rate

• Functionally complete

• Small 24-pin DDIP or SMT package

• Requires only ±5V supplies

• Low-power, 1.8 Watts

• Outstanding dynamic performance

• Edge-triggered

• No missing codes over temperature

• Ideal for both time and frequency-domain applications

GENERAL DESCRIPTION

The ADS-119 is a high-performance, 12-bit, 10MHz sampling A/D converter. The device samples input signals up to Nyquist frequencies with no missing codes. The ADS-119 features excellent dynamic performance including a typical SNR of 69dB.

Packaged in a metal-sealed, ceramic, 24-pin DDIP, the functionally complete ADS-119 contains a fast-settling sample/ hold amplifier, a subranging (two-pass) A/D converter, a precise voltage reference, timing/control logic, and errorcorrection circuitry. All timing and control logic operates from the rising edge of a single start convert pulse. Digital input and output levels are TTL.

Requiring only ±5V supplies, the ADS-119 typically dissipates

1.8 Watts. The unit offers a bipolar input range of ±1.5V. Models are available for use in either commercial (0 to +70°C) or military (–55 to +125°C) operating temperature ranges.

ADS-119

12-Bit, 10MHz, Low-Power

Sampling A/D Converters

INPUT/OUTPUT CONNECTIONS

PIN FUNCTION PIN FUNCTION

1 BIT 12 (LSB) 24 NO CONNECT 2 BIT 11 23 ANALOG GROUND 3 BIT 10 22 NO CONNECT 4 BIT 9 21 +5V ANALOG SUPPLY 5 BIT 8 20 –5V SUPPLY 6 BIT 7 19 ANALOG INPUT 7 BIT 6 18 ANALOG GROUND 8 BIT 5 17 OFFSET ADJUST

9 BIT 4 16 START CONVERT 10 BIT 3 15 DATA VALID 11 BIT 2 14 DIGITAL GROUND 12 BIT 1 13 +5V DIGITAL SUPPLY

Typical applications include signal analysis, medical/graphic imaging, process control, ATE, radar, and sonar.

OFFSET ADJUST 17

AMP

+5V DIGITAL

BUFFER

REF

FLASH

ADC

DAC

FLASH

ADC

DIGITAL

–5V SUPPLY

12 BIT 1 (MSB) 11 BIT 2 10 BIT 3 9 BIT 4 8 BIT 5 7 BIT 6 6 BIT 7 5 BIT 9 4 BIT 9 3 BIT 10 2 BIT 11 1 BIT 12 (LSB)

18, 23

ANALOG

22, 24

NO CONNECT

ANALOG INPUT 19

START CONVERT 16

DATA VALID 15

+5V ANALOG

–

S/H

TIMING AND

CONTROL LOGIC

Figure 1. ADS-119 Functional Block Diagram

DATEL, Inc., 11 Cabot Boulevard, Mansfield, MA 02048-1151 (U.S.A.) • Tel: (508) 339-3000 Fax: (508) 339-6356 • For immediate assistance: (800) 233-2765

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ADS-119

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ABSOLUTE MAXIMUM RATINGS

PARAMETERS LIMITS UNITS

+5V Supply (Pin 13, 21) 0 to +6 Volts –5V Supply (Pin 20) 0 to –6 Volts Digital Input (Pin 16) –0.3 to +V

DD +0.3 Volts

Analog Input (Pin 19) ±5 Volts Lead Temp (10 seconds) +300 °C

FUNCTIONAL SPECIFICATIONS

(TA = +25°C, ±VDD = ±5V, 10mHz sampling rate, and a minimum 3 minute warmup ➀ unless otherwise specified.)

PHYSICAL/ENVIRONMENTAL

PARAMETERS MIN. TYP. MAX. UNITS

Operating Temp. Range, Case

ADS-119MC/GC 0 — +70 °C ADS-119MM/GM/883 –55 — +125 °C

Thermal Impedance

θjc 6 °C/Watt θca 24 °C/Watt

Storage Temperature –65 — +150 °C Package Type 24-pin, metal-sealed, ceramic DDIP or SMIT Weight 0.42 ounces (12 grams)

+25°C 0 to +70°C –55 to +125°C

ANALOG INPUT MIN. TYP. MAX. MIN. TYP. MAX. MIN. TYP. MAX. UNITS

Input Voltage Range ➁ — ±1.5 — — ±1.5 — — ±1.5 — Volts Input Resistance 300 350 — 300 350 — 300 350 — Ω Input Capacitance — 6 15 — 6 15 — 6 15 pF

DIGITAL INPUT

Logic Levels

Logic "1" +2.0 — — +2.0 — — +2.0 — — Volts Logic "0" — — +0.8 — — +0.8 — — +0.8 Volts Logic Loading "1" — — +20 — — +20 — — +20 µA Logic Loading "0" — — –20 — — –20 — — –20 µA

Start Convert Positive Pulse Width ➂ — 50 — — 50 — — 50 — ns

STATIC PERFORMANCE

Resolution — 12 — — 12 — — 12 — Bits Integral Nonlinearity (f Differential Nonlinearity (f

in = 10kHz) — ±0.75 — — ±1.0 — — ±1.5 — LSB

in = 10kHz) — ±0.5 ±0.95 0.95 ±0.5 +1 –0.95 ±0.75 +1.25 LSB

Full Scale Absolute Accuracy — ±0.2 ±0.5 — ±0.5 ±0.75 — ±0.75 ±1.5 %FSR Bipolar Zero Error (Tech Note 2) — ±0.2 ±0.6 — ±0.3 ±0.7 — ±0.6 ±1.0 Unipolar Offset Error (Tech Note 2) — ±0.1 ±0.6 — ±0.3 ±0.7 — ±0.7 ±1.5 %FSR Gain Error (Tech Note 2) — ±0.1 ±0.5 — ±0.5 ±1.0 — ±1.0 ±2.5 % No Missing Codes (f

in = 10kHz) 12 — — 12 — — 12 — — Bits

DYNAMIC PERFORMANCE

Peak Harmonics (–0.5dB)

dc to 1MHz — –70 –63 — –70 –63 — –69 –61 dB 1MHz to 2.5MHz — –70 –63 — –70 –63 — –69 –60 dB

2.5MHz to 5MHz — –70 –63 — –70 –63 — –67 –60 dB

Total Harmonic Distortion (–0.5dB)

dc to 1MHz — –69 –63 — –69 –63 — –68 –60 dB 1MHz to 2.5MHz — –68 –63 — –68 –63 — –67 –60 dB

2.5MHz to 5MHz — –68 –63 — –67 –63 — –66 –60

Signal-to-Noise Ratio

(w/o distortion, –0.5dB) dc to 1MHz 66 69 — 66 69 — 63 67 — dB 1MHz to 2.5MHz 66 69 — 66 69 — 63 66 — dB

2.5MHz to 5MHz 66 69 — 66 69 — 63 66 — dB

Signal-to-Noise Ratio ➃

(& distortion, –0.5dB) dc to 1MHz 62 66 — 62 66 — 60 65 — dB 1MHz to 2.5MHz 62 66 — 62 66 — 60 65 — dB

2.5MHz to 5MHz 62 66 — 62 66 — 60 64 — dB

Two-tone Intermodulation

Distortion (f

240kHz, f

in = 100kHz,

s = 1MHz, –0.5dB) — –72 — — –72 — — –72 — dB

Noise — 250 — — 300 — — 400 — µVrms Input Bandwidth (–3dB)

Small Signal (–20dB input) — 60 — — 60 — — 60 — MHz Large Signal (–0dB input) — 10 — — 10 — — 10 — MHz

Feedthrough Rejection (f

in = 5MHz) — 76 — — 76 — — 76 — dB

Slew Rate — ±400 — — ±400 — — ±400 — V/µs Aperture Delay Time — 5 — — 5 — — 5 — ns Aperture Uncertainty — 3 — — 3 — — 3 — ps rms S/H Aquisition Time

(to ±0.01%FSR, 3V step) 30 35 37 30 35 37 30 35 37 ns

Overvoltage Recovery Time ➄ — 100 — — 100 — — 100 — ns A/D Conversion Rate 10 — — 500 — — 500 — — MHz

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Scale is approximately 5ns per division.

ADS-119

+25°C 0 to +70°C –55 to +125°C

DIGITAL OUTPUTS MIN. TYP. MAX. MIN. TYP. MAX. MIN. TYP. MAX. UNITS

Logic Levels

Logic "1" +2.4 — — +2.4 — — +2.4 — — Volts Logic "0" — — +0.4 — — +0.4 — — +0.4 Volts Logic Loading "1" — — –4 — — –4 — — –4 mA Logic Loading "0" — — +4 — — +4 — — +4 mA

Output Coding Offset Binary

POWER REQUIREMENTS

Power Supply Ranges ➅

+5V Supply +4.75 +5.0 +5.25 +4.75 +5.0 +5.25 +4.9 +5.0 +5.25 Volts –5V Supply –4.75 –5.0 –5.25 –4.75 –5.0 –5.25 –4.9 –5.0 –5.25 Volts

Power Supply Current

+5V Supply — +200 +215 — +200 +215 — +200 +215 mA –5V Supply — –180 –205 — –180 –205 — –180 –205 mA

Power Dissipation — 1.8 2.1 — 1.8 2.1 — 1.8 2.1 Watts Power Supply Rejection — — ±0.01 — — ±0.01 — — ±0.01 %FSR/%V

Footnotes:

➀ All power supplies must be on before applying a start convert pulse. All supplies

and the clock (START CONVERT) must be present during warmup periods. The device must be continuously converting during this time. There is slight degradation in performance when using ±12V supplies.

➁ See ordering information for availability of ±5V input range. Contact DATEL for

availability of other input voltage ranges.

➂ A 200ns wide start convert pulse is used for all production testing. Only the rising

edge of the start convert pulse is required for the device to operate (edge-triggered).

➃ Effective bits is equal to:

(SNR + Distortion) – 1.76 + 20 log

6.02

Full Scale Amplitude

Actual Input Amplitude

➄ This is the time required before the A/D output data is valid after the analog input

is back within the specified range.

TECHNICAL NOTES

1. Obtaining fully specified performance from the ADS-119 requires careful attention to pc-card layout and power supply decoupling. The device's analog and digital ground systems are connected to each other internally. For optimal performance, tie all ground pins (14, 18, and 23) directly to a large analog ground plane beneath the package.

Bypass all power supplies to ground with 4.7µF tantalum capacitors in parallel with 0.1µF ceramic capacitors. Locate the bypass capacitors as close to the unit as possible.

2. The ADS-119 achieves its specified accuracies without the need for external calibration. If required, the device's small

START

CONVERT

INTERNAL S/H

INTERNAL EOC

DATA

VALID

50ns typ.

10ns typ.

Hold

65ns typ.

15ns typ.

Conversion Time

35ns typ.

40ns typ.

Acquisition Time

37ns max.

±5ns

30ns min.

35ns typ.

60ns typ.

initial offset and gain errors can be reduced to zero using the adjustment circuitry shown in Figures 3 and 4. For operation without adjustment, tie pin 17 to analog ground. When using this circuitry, or any similar offset and gaincalibration hardware, make adjustments following warmup. To avoid interaction, always adjust offset before gain.

3. Applying a start convert pulse while a conversion is in progress (EOC = logic "1") will initiate a new and inaccurate conversion cycle.

4. Data is valid only for the time period (55ns, typical) shown in Figure 2 even if the device is sampling at less than 10MHz.

N+1

Hold

20ns typ.

72ns min.

80ns typ.

83ns max.

40ns typ.

±5ns

DATA

INVALID DATA

10ns typ.

DATA N-1 VALID

55ns typ.

45ns typ.

INVALID DATA

Figure 2. ADS-119 Timing Diagram

DATA N VALID

INVALID DATA

Page 4

ADS-119

–15V

CONVERT

If separate supplies are used, the difference between the two cannot exceed 100mV.

® ®

CALIBRATION PROCEDURE

(Refer to Figures 3 and 4, Table 1) Any offset and/or gain calibration procedures should not be

implemented until devices are fully warmed up. To avoid interaction, offset must be adjusted before gain. The ranges of adjustment for the circuits in Figure 3 and 4 are guaranteed to compensate for the ADS-119's initial accuracy errors and may not be able to compensate for additional system errors.

A/D converters are calibrated by positioning their digital outputs exactly on the transition point between two adjacent digital output codes. This can be accomplished by connecting LED's to the digital outputs and adjusting until certain LED's "flicker" equally between on and off. Other approaches employ digital comparators or microcontrollers to detect when the outputs change from one code to the next.

Offset adjusting for the ADS-119 is normally accomplished at the point where the MSB is a 1 and all other output bits are 0's and the LSB just changes from a 0 to a 1. This digital output transition ideally occurs when the applied analog input is +½ LSB (+366µV).

Gain adjusting is accomplished when all bits are 1's and the LSB just changes from a 1 to a 0. This transition ideally occurs when the analog input is at +full scale minus 1 ½ LSB's (+1.4989V).

Zero/Offset Adjust Procedure

1. Apply a train of pulses to the START CONVERT input (pin 16) so the converter is continuously converting.

2. Apply +366µV to the ANALOG INPUT (pin 19).

3. Adjust the offset potentiometer until the output bits are 1000 0000 0000 and the LSB flickers between 0 and 1.

Gain Adjust Procedure

1. Apply +1.4989V to the ANALOG INPUT (pin 19).

2. Adjust the gain potentiometer until all output bits are 1's and the LSB flickers between 1 and 0.

3. To confirm proper operation of the device, vary the input signal to obtain the output coding listed in Table 1.

Table 1. Output Coding for Bipolar Operation

BIPOLAR ADS-119 OUTPUT CODING SCALE INPUT VOLTAGE OFFSET BINARY

(±1.5V RANGE) MSB LSB

+FS–1 LSB +1.49927V 1111 1111 1111 +3/4 FS +1.12500V 1110 0000 0000 +1/2 FS +0.75000V 1100 0000 0000

0 0.00000V 1000 0000 0000 –1/2 FS –0.75000V 01000000 0000 –3/4 FS –1.12500V 00100000 0000

–FS +1 LSB –1.49927V 00000000 0001

–FS –1.50000V 0000 0000 0000

Ω

GAIN

SIGNAL

INPUT

ADJUST

Ω

1.98k

50Ω

Figure 3. Optional Calibration Circuit, ADS-119

+15V

To Pin 19 of ADS-119

➀

+5V

4.7µF

–5V

4.7µF

OFFSET ADJUST

➀

0.1µF

+5V

–5V

A single +5V supply should be used for both the +5V analog and +5V digital.

13, 20

ADS-119

18, 20

20kΩ

Figure 4. Typical Connection Diagram

BIT 1 (MSB) BIT 2

11 10

BIT 3

BIT 4

BIT 5

BIT 6

BIT 7

BIT 8

BIT 9

BIT 10

BIT 11

BIT 12 (LSB)

DATA VALID ANALOG INPUT

START

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®®

312729

3230282624

(MSB)

ADS-119

P1P1P1P1P1P1P1P1P1

P1P1P1P1P1P1P1P1P1P1P1P1P1P1P1P1P1P1P1P1P1P1P1P1P1

B12

B11

B10

(LSB) 6

JPR4

+15V

+5VF

NOTES:

1. UNLESS OTHERWISE SPECIFIED

START

C17

2.2MF

ALL CAPACITORS ARE 50V

C1-C6 ARE 20V

CONVERT

SG4

1.2M

74HCT573

BETWEEN THESE TWO POINTS.

ALL RESISTORS ARE IN OHMS

20K

C22

C20

2. AS AN OPTION, COXIAL CABLE

4.7MF

OPTIONAL

-15V

+5VF

C21

0.1MF

FOR ADS-118/118A 5MHZ

FOR ADS-119 10MHZ

JPR3

+5VA

+15V

1213

ADS-118/119

+5V

SG6

SG5

813

912

+5VD

TRIG

DGND

141516

119

118

JPR5

C18

.1MF

OPTION

1.98K

OELE

+5VF

ANAIN

SG9

C16

2.2MF

0.1MF

+5VF

+5VA

+5V

118A

JPR1

OPTION

119A

118A

74HCT573

ENABLE

20K

119

SG8

SG7

118

OFFSET

222324

119A

118A

JPR6

+5VA

C19

SEE NOTE 2

GAIN

500

-5V

119

-5VA

-15V

-5V

+5V

B11

B10

AGND

181920

JPR2

-5VA

INPUT

ANALOG

B12

EOC

20MHY

L7,

P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2P2

C15

+5VF

+5VA

C14

.01MF

2.2MF

OELE

813

+5VF

0.1MF

+15V

-15V

C13

C12

0.01MF

2.2MF

20MHY

10 9

12 11

74HCT86

+5V

C10

20MHY

0.01MF

2.2MF

14 13

0.01MF

2.2MF

-5VA

16 15

74HCT86

C11

20MHY

+5VF

0.01MF

18 17

20MHY

2.2MF

20 19

0.01MF

2.2MF

Figure 5. ADS-119 Evaluation Board Schematic

74HCT86

-5V

0.01MF

2.2MF

20MHY

SG1

SG2

22 21

24 23

26 25

SPARE GATES

SG3

Page 6

ADS-119

Digital Output Code

Occurrences

(fs = 10MHz, fin = 4.9MHz, Vin = –0.5dB, 4,096-point FFT)

Amplitude Relative to Full Scale (dB)

® ®

THERMAL REQUIREMENTS

All DATEL sampling A/D converters are fully characterized and specified over operating temperature (case) ranges of 0 to +70°C and –55 to +125°C. All room-temperature (T production testing is performed without the use of heat sinks or forced-air cooling. Thermal impedance figures for each device are listed in their respective specification tables.

These devices do not normally require heat sinks, however, standard precautionary design and layout procedures should be used to ensure devices do not overheat. The ground and power planes beneath the package, as well as all pcb signal runs to and from the device, should be as heavy as possible to help conduct heat away from the package. Electricallyinsulating, thermally-conductive "pads" may be installed underneath the package. Devices should be soldered to boards rather than "socketed", and of course, minimal air flow over the surface can greatly help reduce the package temperature.

In more severe ambient conditions, the package/junction temperature of a given device can be reduced dramatically (typically 35%) by using one of DATEL's HS Series heat sinks. See Ordering Information for the assigned part number. See page 1-183 of the DATEL Data Acquisition Components Catalog for more information on the HS Series. Request DATEL Application Note AN-8, "Heat Sinks for DIP Data Converters", or contact DATEL directly, for additional information.

A = +25°C)

3000

2500

2000

1500

1000

500

Figure 6. ADS-119 Grounded Input Histogram

This histogram represents the typical peak-to-peak noise

(including quantization noise) associated with the ADS-119.

4,096 conversions were processed with the input to the

ADS-119 tied to analog ground.

0 –10 –20 –30 –40 –50 –60 –70 –80 –90

–100 –110 –120 –130

0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5

Frequency (MHz)

Figure 7. ADS-119 FFT Analysis

Page 7

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Peak Harmonic (–dB)

THD (–dB)

Frequency (kHz)

SNR (dB)

Frequency (kHz)

SNR+D (dB)

Digital Output Code

Number of Occurences

4096

DNL (LSB's)

+0.73

–0.47

Digital Output Code

ADS-119

4096

Figure 8. ADS-119 Histogram and Differential Nonlinearity

1 10 100 1000 10000

PH vs. Input Frequency

Frequency (kHz)

SNR vs. Input Frequency SNR+D vs. Input Frequency

1 10 100 1000 10000

THD vs. Input Frequency

Frequency (kHz)

Figure 9. ADS-119 Performance Curves

Page 8

ADS-119

ISO 9001

REGISTERED

24-Pin DDIP

Version

ADS-119MC ADS-119MM ADS-926MC

ADS-119/883

24-Pin

Surface Mount

Versions

ADS-119GC ADS-119GM

MECHANICAL DIMENSIONS INCHES (mm)

1.31 MAX. (33.27)

0.190 MAX. (4.826)

1 12

0.235 MAX. (5.969)

PIN 1 INDEX

0.018 ±0.002 (0.457)

1.31 MAX. (33.02)

1.100

(27.940)

0.100 TYP. (2.540)

0.100

(2.540)

0.040

(1.016)

121

0.80 MAX.

0.200 MAX.

0.80 MAX. (20.32)

(20.32)

(5.080)

SEATING

PLANE

0.025

(0.635)

Dimension Tolerances

2 place decimal (.XX) ±0.010 (±0.254) 3 place decimal (.XXX) ±0.005 (±0.127)

Lead M Lead Finish: 50 microinches (minimum) gold plating

over 100 microinches (nominal) nickel plating

Dimension Tolerances

2 place decimal (.XX) ±0.010 (±0.254) 3 place decimal (.XXX) ±0.005 (±0.127)

Lead Material: Kovar alloy Lead Finish:

over 100 microinches (nominal) nickel plating

ateria

(unless otherwise indicated):

50 microinches (minimum) gold plating

+0.002

0.010

–0.001

(0.254)

0.100

0.600 ±0.010 (15.240)

Kovar alloy

(2.540)

(unless otherwise indicated):

® ®

0.210 MAX. (5.334)

INDEX

0.100 TYP. (2.540)

PIN 1

0.020 TYP. (0.508)

0.040

(1.016)

0.100

(2.540)

0.020

(0.508)

0.060 TYP. (1.524)

0.130 TYP. (3.302)

0.015

(0.381)

MAX. radius

for any pin

0.010 TYP. (0.254)

ORDERING INFORMATION

MODEL NUMBER OPERATING TEMP. RANGE ADS-119MC 0 to +70°C ADS-119MM –55 to +125°C

ADS-119/883 –55 to +125°C ADS-119GC 0 to +70°C ADS-119GM –55 to +125°C

Receptacles for PC board mounting can be ordered through AMP Inc. Part # 3-331272-8 (Components Lead Socket), 24 required. For MIL-STD-883 product specification or availability of surface mounts package, contact DATEL.

® ®

ACCESSORIES ADS-B119 Evaluation Board (without ADS-119) HS-24 Heat Sinks for all ADS-119 DDIP models

ISO 9001

DS-0289B 3/97

DATEL, Inc. 11 Cabot Boulevard, Mansfield, MA 02048-1151 Tel: (508) 339-3000 (800) 233-2765 Fax: (508) 339-6356 Internet: www.datel.com E-mail:sales@datel.com Data Sheet Fax Back: (508) 261-2857

DATEL makes no representation that the use of its products in the circuits described herein, or the use of other technical information contained herein, will not infringe upon existing or future patent rights. The descriptions contained herein do not imply the granting of licenses to make, use, or sell equipment constructed in accordance therewith. Specifications are subject to change without notice. The DATEL logo is a registered DATEL, Inc. trademark.

DATEL (UK) LTD. Tadley, England Tel: (01256)-880444 DATEL S.A.R.L. Montigny Le Bretonneux, France Tel: 1-34-60-01-01 DATEL GmbH München, Germany Tel: 89-544334-0 DATEL KK Tokyo, Japan Tel: 3-3779-1031, Osaka Tel: 6-354-2025