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FEATURES
• 12-bit resolution
• 10MHz minimum sampling rate
• Functionally complete
• Small 24-pin DDIP or SMT package
• Requires only ±5V supplies
• Low-power, 1.8 Watts
• Outstanding dynamic performance
• Edge-triggered
• No missing codes over temperature
• Ideal for both time and frequency-domain applications
GENERAL DESCRIPTION
The ADS-119 is a high-performance, 12-bit, 10MHz sampling
A/D converter. The device samples input signals up to Nyquist
frequencies with no missing codes. The ADS-119 features
excellent dynamic performance including a typical SNR of
69dB.
Packaged in a metal-sealed, ceramic, 24-pin DDIP, the
functionally complete ADS-119 contains a fast-settling sample/
hold amplifier, a subranging (two-pass) A/D converter, a
precise voltage reference, timing/control logic, and errorcorrection circuitry. All timing and control logic operates from
the rising edge of a single start convert pulse. Digital input and
output levels are TTL.
Requiring only ±5V supplies, the ADS-119 typically dissipates
1.8 Watts. The unit offers a bipolar input range of ±1.5V.
Models are available for use in either commercial (0 to +70°C)
or military (–55 to +125°C) operating temperature ranges.
ADS-119
12-Bit, 10MHz, Low-Power
Sampling A/D Converters
INPUT/OUTPUT CONNECTIONS
PIN FUNCTION PIN FUNCTION
1 BIT 12 (LSB) 24 NO CONNECT
2 BIT 11 23 ANALOG GROUND
3 BIT 10 22 NO CONNECT
4 BIT 9 21 +5V ANALOG SUPPLY
5 BIT 8 20 –5V SUPPLY
6 BIT 7 19 ANALOG INPUT
7 BIT 6 18 ANALOG GROUND
8 BIT 5 17 OFFSET ADJUST
9 BIT 4 16 START CONVERT
10 BIT 3 15 DATA VALID
11 BIT 2 14 DIGITAL GROUND
12 BIT 1 13 +5V DIGITAL SUPPLY
Typical applications include signal analysis, medical/graphic
imaging, process control, ATE, radar, and sonar.
OFFSET ADJUST 17
Σ
AMP
13
+5V DIGITAL
BUFFER
REF
FLASH
ADC
1
DAC
FLASH
ADC
2
14
DIGITAL
20
–5V SUPPLY
12 BIT 1 (MSB)
11 BIT 2
10 BIT 3
9 BIT 4
8 BIT 5
7 BIT 6
6 BIT 7
5 BIT 9
4 BIT 9
3 BIT 10
2 BIT 11
1 BIT 12 (LSB)
18, 23
ANALOG
22, 24
NO CONNECT
ANALOG INPUT 19
START CONVERT 16
DATA VALID 15
21
+5V ANALOG
–
S/H
+
TIMING AND
CONTROL LOGIC
Figure 1. ADS-119 Functional Block Diagram
DATEL, Inc., 11 Cabot Boulevard, Mansfield, MA 02048-1151 (U.S.A.) • Tel: (508) 339-3000 Fax: (508) 339-6356 • For immediate assistance: (800) 233-2765
ADS-119
® ®
ABSOLUTE MAXIMUM RATINGS
PARAMETERS LIMITS UNITS
+5V Supply (Pin 13, 21) 0 to +6 Volts
–5V Supply (Pin 20) 0 to –6 Volts
Digital Input (Pin 16) –0.3 to +V
DD +0.3 Volts
Analog Input (Pin 19) ±5 Volts
Lead Temp (10 seconds) +300 °C
FUNCTIONAL SPECIFICATIONS
(TA = +25°C, ±VDD = ±5V, 10mHz sampling rate, and a minimum
3 minute warmup ➀ unless otherwise specified.)
PHYSICAL/ENVIRONMENTAL
PARAMETERS MIN. TYP. MAX. UNITS
Operating Temp. Range, Case
ADS-119MC/GC 0 — +70 °C
ADS-119MM/GM/883 –55 — +125 °C
Thermal Impedance
θjc 6 °C/Watt
θca 24 °C/Watt
Storage Temperature –65 — +150 °C
Package Type 24-pin, metal-sealed, ceramic DDIP or SMIT
Weight 0.42 ounces (12 grams)
+25°C 0 to +70°C –55 to +125°C
ANALOG INPUT MIN. TYP. MAX. MIN. TYP. MAX. MIN. TYP. MAX. UNITS
Input Voltage Range ➁ — ±1.5 — — ±1.5 — — ±1.5 — Volts
Input Resistance 300 350 — 300 350 — 300 350 — Ω
Input Capacitance — 6 15 — 6 15 — 6 15 pF
DIGITAL INPUT
Logic Levels
Logic "1" +2.0 — — +2.0 — — +2.0 — — Volts
Logic "0" — — +0.8 — — +0.8 — — +0.8 Volts
Logic Loading "1" — — +20 — — +20 — — +20 µA
Logic Loading "0" — — –20 — — –20 — — –20 µA
Start Convert Positive Pulse Width ➂ — 50 — — 50 — — 50 — ns
STATIC PERFORMANCE
Resolution — 12 — — 12 — — 12 — Bits
Integral Nonlinearity (f
Differential Nonlinearity (f
in = 10kHz) — ±0.75 — — ±1.0 — — ±1.5 — LSB
in = 10kHz) — ±0.5 ±0.95 0.95 ±0.5 +1 –0.95 ±0.75 +1.25 LSB
Full Scale Absolute Accuracy — ±0.2 ±0.5 — ±0.5 ±0.75 — ±0.75 ±1.5 %FSR
Bipolar Zero Error (Tech Note 2) — ±0.2 ±0.6 — ±0.3 ±0.7 — ±0.6 ±1.0
Unipolar Offset Error (Tech Note 2) — ±0.1 ±0.6 — ±0.3 ±0.7 — ±0.7 ±1.5 %FSR
Gain Error (Tech Note 2) — ±0.1 ±0.5 — ±0.5 ±1.0 — ±1.0 ±2.5 %
No Missing Codes (f
in = 10kHz) 12 — — 12 — — 12 — — Bits
DYNAMIC PERFORMANCE
Peak Harmonics (–0.5dB)
dc to 1MHz — –70 –63 — –70 –63 — –69 –61 dB
1MHz to 2.5MHz — –70 –63 — –70 –63 — –69 –60 dB
2.5MHz to 5MHz — –70 –63 — –70 –63 — –67 –60 dB
Total Harmonic Distortion (–0.5dB)
dc to 1MHz — –69 –63 — –69 –63 — –68 –60 dB
1MHz to 2.5MHz — –68 –63 — –68 –63 — –67 –60 dB
2.5MHz to 5MHz — –68 –63 — –67 –63 — –66 –60
Signal-to-Noise Ratio
(w/o distortion, –0.5dB)
dc to 1MHz 66 69 — 66 69 — 63 67 — dB
1MHz to 2.5MHz 66 69 — 66 69 — 63 66 — dB
2.5MHz to 5MHz 66 69 — 66 69 — 63 66 — dB
Signal-to-Noise Ratio ➃
(& distortion, –0.5dB)
dc to 1MHz 62 66 — 62 66 — 60 65 — dB
1MHz to 2.5MHz 62 66 — 62 66 — 60 65 — dB
2.5MHz to 5MHz 62 66 — 62 66 — 60 64 — dB
Two-tone Intermodulation
Distortion (f
240kHz, f
in = 100kHz,
s = 1MHz, –0.5dB) — –72 — — –72 — — –72 — dB
Noise — 250 — — 300 — — 400 — µVrms
Input Bandwidth (–3dB)
Small Signal (–20dB input) — 60 — — 60 — — 60 — MHz
Large Signal (–0dB input) — 10 — — 10 — — 10 — MHz
Feedthrough Rejection (f
in = 5MHz) — 76 — — 76 — — 76 — dB
Slew Rate — ±400 — — ±400 — — ±400 — V/µs
Aperture Delay Time — 5 — — 5 — — 5 — ns
Aperture Uncertainty — 3 — — 3 — — 3 — ps rms
S/H Aquisition Time
(to ±0.01%FSR, 3V step) 30 35 37 30 35 37 30 35 37 ns
Overvoltage Recovery Time ➄ — 100 — — 100 — — 100 — ns
A/D Conversion Rate 10 — — 500 — — 500 — — MHz
2
® ®
Scale is approximately 5ns per division.
ADS-119
+25°C 0 to +70°C –55 to +125°C
DIGITAL OUTPUTS MIN. TYP. MAX. MIN. TYP. MAX. MIN. TYP. MAX. UNITS
Logic Levels
Logic "1" +2.4 — — +2.4 — — +2.4 — — Volts
Logic "0" — — +0.4 — — +0.4 — — +0.4 Volts
Logic Loading "1" — — –4 — — –4 — — –4 mA
Logic Loading "0" — — +4 — — +4 — — +4 mA
Output Coding Offset Binary
POWER REQUIREMENTS
Power Supply Ranges ➅
+5V Supply +4.75 +5.0 +5.25 +4.75 +5.0 +5.25 +4.9 +5.0 +5.25 Volts
–5V Supply –4.75 –5.0 –5.25 –4.75 –5.0 –5.25 –4.9 –5.0 –5.25 Volts
Power Supply Current
+5V Supply — +200 +215 — +200 +215 — +200 +215 mA
–5V Supply — –180 –205 — –180 –205 — –180 –205 mA
Power Dissipation — 1.8 2.1 — 1.8 2.1 — 1.8 2.1 Watts
Power Supply Rejection — — ±0.01 — — ±0.01 — — ±0.01 %FSR/%V
Footnotes:
➀ All power supplies must be on before applying a start convert pulse. All supplies
and the clock (START CONVERT) must be present during warmup periods. The
device must be continuously converting during this time. There is slight
degradation in performance when using ±12V supplies.
➁ See ordering information for availability of ±5V input range. Contact DATEL for
availability of other input voltage ranges.
➂ A 200ns wide start convert pulse is used for all production testing. Only the rising
edge of the start convert pulse is required for the device to operate
(edge-triggered).
➃ Effective bits is equal to:
(SNR + Distortion) – 1.76 + 20 log
6.02
Full Scale Amplitude
Actual Input Amplitude
➄ This is the time required before the A/D output data is valid after the analog input
is back within the specified range.
TECHNICAL NOTES
1. Obtaining fully specified performance from the ADS-119
requires careful attention to pc-card layout and power
supply decoupling. The device's analog and digital ground
systems are connected to each other internally. For optimal
performance, tie all ground pins (14, 18, and 23) directly to
a large analog ground plane beneath the package.
Bypass all power supplies to ground with 4.7µF tantalum
capacitors in parallel with 0.1µF ceramic capacitors. Locate
the bypass capacitors as close to the unit as possible.
2. The ADS-119 achieves its specified accuracies without the
need for external calibration. If required, the device's small
START
CONVERT
INTERNAL S/H
INTERNAL EOC
DATA
VALID
N
50ns typ.
10ns typ.
Hold
65ns typ.
15ns typ.
Conversion Time
35ns typ.
40ns typ.
Acquisition Time
37ns max.
±5ns
30ns min.
35ns typ.
60ns typ.
initial offset and gain errors can be reduced to zero using
the adjustment circuitry shown in Figures 3 and 4. For
operation without adjustment, tie pin 17 to analog ground.
When using this circuitry, or any similar offset and gaincalibration hardware, make adjustments following warmup.
To avoid interaction, always adjust offset before gain.
3. Applying a start convert pulse while a conversion is in
progress (EOC = logic "1") will initiate a new and inaccurate
conversion cycle.
4. Data is valid only for the time period (55ns, typical) shown in
Figure 2 even if the device is sampling at less than 10MHz.
N+1
Hold
20ns typ.
72ns min.
80ns typ.
83ns max.
40ns typ.
±5ns
DATA
INVALID DATA
10ns typ.
DATA N-1 VALID
55ns typ.
45ns typ.
INVALID DATA
Figure 2. ADS-119 Timing Diagram
3
DATA N VALID
INVALID DATA