Datasheet Z89313 Datasheet (ZILOG)

FEATURES

PRELIMINARY

P

RELIMINARY

C

USTOMER PROCUREMENT SPECIFICATION

Z89313

DIGITAL TELEVISION CONTROLLER

Z89313

CPS5TEL0700

■ Part ROM RAM Speed

Number (Word) (Word) (MHz)

Z89313 32K x 16 1K x 16 12

■ 52-Pin Shrink DIP Package

■ 4.5- to 5.5-Volt Operating Range

■ Z89C00 RISC Processor Core

■ 0°C to +70°C Temperature Range

GENERAL DESCRIPTION

The Z89313 is a member of Zilog's family of Digital
Television Controllers designed to provide complete audio
and video control of television receivers, video recorders,
and advanced on-screen display facilities.

The Z89313 features a powerful Z89C00 RISC processor
core that controls on-board peripheral functions and
registers using the standard processor instruction set.

In closed caption mode, text can be decoded directly from
the composite video signal and displayed on the screen
with assistance from the processor's digital signal
processing capabilities. The character representation in
this mode allows for a simple attribute control through the
insertion of control characters.

■ Direct Closed Caption Decoding

■ TV Tuner Serial Interface

■ Customized Character Set

■ Character Control Mode

■ Directly Controlled Receiver Functions

Serial interfacing with the television tuner is provided
through the tuner serial port. Digital channel tuning
adjustments may be accessed through the industry­standard I2C port.

Additional hardware provides the capability to display two
to three times normal size characters. The smoothing logic
contained in the on-screen display circuit improves the
appearance of larger fonts. Special circuitry can be
activated to improve the visibiity of text by adding a right­sided shadow effect to the characters.

Receiver functions such as color and volume can be
directly controlled by six 8-bit pulse width modulated
ports.

The character control mode provides access to the full set
of attribute controls. The modification of attributes is allowed
on a character-by-character basis. The insertion of control
characters permits direction of other character attributes.

Display attributes, including underlining, italics, blinking,
eight foreground/background colors, character position
offset delay, and background transparency, are made
possible through a fully customized 512 character set,
formatted in two 256 character banks.

CP95TEL[phone])

Notes:

All Signals with a preceding front slash, "/", are active Low, e.g.:
B//W (WORD is active Low); /B/W (BYTE is active Low, only).

Power connections follow conventional descriptions below:

Connection Circuit Device

Power V

Ground GND V

CC

V

DD
SS

1

PRELIMINARY

GENERAL DESCRIPTION (Continued)

Z89313

CP95TEL0700

CVI

PWM6

Port 17
Port 00
Port 05

Port 04

Capture
IRIN

ADC

ADC0
ADC1
ADC2
ADC3
ADC4
ADC5

Port 0

Port 00
Port 01
Port 02

Port 03
Port 04

Port 05
Port 06
Port 07
Port 08
Port 09
Port 0A
Port 0B
Port 0C

Port 0D
Port 0E

Port 0F

Control
XTAL1
XTAL2
LPF
HSYNC
HSYNC2

VSYNC
/Reset

Register Addr/Data

PWM

PWM1
PWM2
PWM3
PWM4
PWM5
PWM6

Port1

Port 10
Port 11
Port 12
Port 13
Port 14
Port 15
Port 16
Port 17

Port 18

I2C

SCL/MSCL2

SCD/MSCD2

MSCL1

MSCD1

OSD

V1(R)

Port 01/11

Port 02/12

CPU

V2(G)
V3(B)

RAM

1K x 16

Address

Data

ROM Addr

ROM

32K x 16

ROM Data

Functional Block Diagram

2

PIN DESCRIPTION

PRELIMINARY

Z89313

CPS5TEL0700

Port 16/SCLK

IRIN

Port 0C
Port 0B

Port 0A
Port 09

Port 0D

Port 07/CSync

Port 06/Counter

Port 03
Port 01/I2SSC
Port 02/I2SSD

CVI/ADC0

LPF

ANGNDF

ADC5
Port 04/ADC4
Port 05/ADC3
Port 00/ADC2
Port 17/ADC1

ANGND

ANVCC

Port0F/HalfBlank

V3 (B)

V2 (G)

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23

24
25

Z89313

52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32

31
30
29
28

Port15/B<1>
Port14/B<0>
Port13/G<1>
Port18/G<0>
Port08/R<1>
Port10/R<0>

PWM6/Hsync2
PWM5
PWM4

PWM3
PWM2
PWM1
ANGNDX
VCC
GND
XTAL2
XTAL1
/Reset
I2MSC1
I2MSD1

Port 0E
Port11/I2MSC2
Port11/I2MSD2

VSync
HSync

V1 (R)

26

52-Pin Shrink DIP Configuration

27

Blank

3

PRELIMINARY

CP95TEL0700

PIN DESCRIPTION

Z89313

Pin Z89313 Configuration
Name Function 52-Pin Direction Reset

Z89313

V

CC

, ANV

CC

a

+5 V 39,22 PWR –
GND, ANGND, 0 V 38,21,15,40 PWR –
ANGNDF, ANGNDX

b

IRIN Infrared Remote Capture Input 2 I I
ADC[5:1] 4-Bit Analog-to-Digital Converter 16,17,18,19,20 AI I

Input

PWM[6:1] 8-Bit Pulse Width Modulator 46,45,44,43,42,41 O O

Output
Port0[F:0] Bit Programmable Input/Output Ports 23,32,7,3,4,5,6,48,8,9,18, B I

17,10,12,11,19

Port1[8:0] Bit Programmable Input/Output Ports 49,20,1,52,51,50,30, B I

31,47

SCL I2C Clock I/O 11,31,34 BOD
SCD I2C Data I/O 12,30,33 BOD

XTAL1 Crystal Oscillator Input 36 AI I
XTAL2 Crystal Oscillator Output 37 AO O

LPF Loop Filter 14 AB O

HSYNC H_Sync 28,46 B I
VSYNC V_Sync 29 B I

/RESET Device Reset 35 I I
V[3:1] OSD Video Output 24,25,26 O O

(Typically Drive B, G, and R Outputs)
Blank OSD Blank Output 27 O O
Half Blank OSD Half Blank Output 23 O

SCLK Internal Processor SCLK – O

Notes:

Please refer to pin-out diagram for shared pin numbers.
a) AN
b) ANGND is for the reference ground of the ADC input.
ANGNDF is for LPF ground, and ANGNDX is for XTAL circuit ground.

is for the reference voltage of the ADC input.

VCC

4

V1, V2, V3 ANALOG OUTPUT

Specifications VCC = 5.25 V

VCC = 5.25 V Condition Limit

Output Voltage Bit = 11 4.30 V ± 0.3 V

Setting Time 70% of DC Level, < 50 ns

V1, V2, V3 ANALOG OUTPUT

Specifications VCC = 4.75 V

VCC = 4.75 V Condition Limit

PRELIMINARY

Bit = 10 3.10 V ± 0.25 V
Bit = 01 1.90 V ± 0.20 V
Bit = 00 0 V ± 0.75 V

10pf Load

Z89313

CPS5TEL0700

Output Voltage Bit = 11 3.90 V ± 0.30 V

Bit = 10 2.80 V ± 0.25 V
Bit = 01 1.70 V ± 0.20 V
Bit = 00 0 V ± 0.65 V

Setting Time 70% of DC Level, < 50 ns

10pf Load

Z893XX

68pF

560pF

10 Mohm

32.768k

27k

XTAL1

XTAL2

32K Oscillator Recommended Circuit

5

PRELIMINARY

ABSOLUTE MAXIMUM RATINGS

Symbol Parameter Min Max Units Conditions

Z89313

CP95TEL0700

V

CC

V

ID

V

IA

V

O

I

OH

I

OH

I

OL

I

OL

T

A

T

A

Notes:

a) 1 mA max. when output pad impedance is 600 Ω.
b) 1 mA max. when output pad impedance is 600 Ω.

Power Supply Voltage 0 7 V
Input Voltage –0.3 V

Input Voltage –0.3 V
Output Voltage –0.3 V
Output Current High –10/–1

+0.3 V Digital Inputs

CC

+0.3 V Analog Inputs (A/D0...A/D4)

CC

+0.3 V All Push-Pull Digital Output

CC

a

mA One Pin
Output Current High –100 mA All Pins
Output Current Low 20/1

b

mA One Pin
Output Current Low 200 mA All Pins

Operating Temperature 0 70 °C
Storage Temperature –65 150 °C

DC CHARACTERISTICS

TA = 0°C to + 70°C; VCC = 4.5 V to + 5.5 V; F

Symbol Parameter Min Max Typical Units Conditions

V

IL

V

IH

Input Voltage Low 0 0.2 V

Input Voltage High 0.6 V

CC

= 32.768 KHz

OSC

CC

V

CC

0.4 V

3.6 V

V
V

V
V
V
I

I
I

I
I

OL

OH

XL
XH
HY

IR

IL
CC

CC1
CC2

Output Voltage Low 0.4 0.16 V @ IOL = 1 mA

Output Voltage High V

Input Voltage XTAL1 Low 0.3 V

–0.9 4.75 V @ IOL = 0.75 mA

CC

CC

1.0 V External Clock

Input Voltage XTAL1 High VCC –2.0 3.5 V Generator Driven

Schmitt Hysteresis 3.0 0.75 0.5 V On XTAL1 Input Pin

Reset Input Current 150 90 µAV

RL

Input Leakage –3.0 3.0 0.01 µA @ 0 V and V

Supply Current 100 60 mA
Supply Current 300 100 µA Sleep Mode @ 32 KHz

Supply Current 40 5 µA Stop Mode

= 0 V

CC

6

PRELIMINARY

Z89313

CPS5TEL0700

AC CHARACTERISTICS

TA = 0°C to + 70°C; VCC = 4.5 V to 5.5 V; F

Symbol Parameter Min Max Typical Units Note

TPC Input Clock Period 16 100 32 µS
TRC,TFC Clock Input Rise and Fall 12 µS

TDPOR Power On Reset Delay 0.8 1.2 s Depends on Crystal

= 32.768 KHz

OSC

AC CHARACTERISTICS*

TA = 0°C to + 70°C; VCC = 4.5 V to 5.5 V; F

Symbol Parameter Min Max Typical Units

TWRES Power-On Reset Min. Width 5TPC µS
TDH

TDV
TDE

S

S
S

H_Sync Incoming Signal Width 5.5 12.5 11 µS
V_Sync Incoming Signal Width 0.15 1.5 1.0 mS

Time Delay Between Leading Edge –12 +12 0 µS
of V_Sync and H_Sync in Even Field

= 32.768 KHz

OSC

TDO

S

Time Delay Between Leading Edge 20 44 32 µS
of H_Sync in Odd Field

TWHV

S

Notes:

All timing of the I2C bus interface are defined by related specifications of
the I2C bus interface.

H_Sync/V_Sync Edge Width 2.0 0.5 µS

7

PRELIMINARY

Z89313

CP95TEL0700

Pre-Characterization Product:

The product represented by this CPS is newly introduced
and Zilog has not completed the full characterization of the
product. The CPS states what Zilog knows about this
product at this time, but additional features or non-con-

© 1995 by Zilog, Inc. All rights reserved. No part of this document
may be copied or reproduced in any form or by any means
without the prior written consent of Zilog, Inc. The information in
this document is subject to change without notice. Devices sold
by Zilog, Inc. are covered by warranty and patent indemnification
provisions appearing in Zilog, Inc. Terms and Conditions of Sale
only. Zilog, Inc. makes no warranty, express, statutory, implied or
by description, regarding the information set forth herein or
regarding the freedom of the described devices from intellectual
property infringement. Zilog, Inc. makes no warranty of mer­chantability or fitness for any purpose. Zilog, Inc. shall not be
responsible for any errors that may appear in this document.
Zilog, Inc. makes no commitment to update or keep current the
information contained in this document.

formance with some aspects of the CPS may be found,
either by Zilog or its customers in the course of further
application and characterization work. In addition, Zilog
cautions that delivery may be uncertain at times, due to
start-up yield issues.

Zilog’s products are not authorized for use as critical compo­nents in life support devices or systems unless a specific written
agreement pertaining to such intended use is executed between
the customer and Zilog prior to use. Life support devices or
systems are those which are intended for surgical implantation
into the body, or which sustains life whose failure to perform,
when properly used in accordance with instructions for use
provided in the labeling, can be reasonably expected to result in
significant injury to the user.

Zilog, Inc. 210 East Hacienda Ave.
Campbell, CA 95008-6600
Telephone [phone]
Telex 910-338-7621
FAX [phone]
Internet: http://www.zilog.com

8