Page 1
Surface Mount N-Channel Enhancement
Lead(Pb)-Free
P b
Mode POWER MOSFET
1 GATE
Features:
*Super High Dense Cell Design For Low RDS(ON)
R
<80mΩ@VGS=10V
DS(ON)
*Simple Drive Requirement
*Lower On-resistance
*Fast Switching Characteristic
*TO-252 Package
SOURCE
3
2
DRAIN
WTD9973
DRAIN CURRENT
14 AMPERES
DRAIN SOURCE VOLTAGE
60 VOLTAGE
1. GATE
2.4 DRAIN
3. SOURCE
D-PAK / (TO-252)
4
1
2
3
Maximum Ratings(T
=25 C Unless Otherwise Specified)
A
Rating Symbol Value
Drain-Source Voltage
Gate-Source Voltage
Continuous Drain Current, (V
, (V
Pulsed Drain Current
1
Total Power Dissipation(T
Maximum Thermal Resistace Junction-case
Maximum
Operating Junction
Thermal Resistace Junction-ambient
and Storage Temperature Range
@10V, TC=25˚C)
GS
@10V, TC=100˚C)
GS
=25˚C)
C
V
DS
V
GS
I
D
I
40
DM
P
D
R
θJC
R
θJA
TJ,Tstg
60
±20
14
27
4.5
110
-55~+150
Unit
V
9
A
W
˚C/W
˚C/W
˚C
Device Marking
WTD9973=9973
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Page 2
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02-Aug-05
WTD9973
Electrical Characteristics(T
Characteristic Symbol Min Typ Max Unit
Static
Drain-Source Breakdown Voltage
VGS=0,ID=250μA
Gate-Source Threshold Voltage
VDS=VGS,ID=250μA
Gate-Source Leakage current
VGS=±20V
Drain-Source Leakage Current(Tj=25˚C)
VDS=60V,VGS=0
Drain-Source
VDS=48V,VGS=0
Drain-Source On-Resistance
VGS=10V,ID=9A
VGS=4.5V,ID=6A
Leakage Current(Tj=150˚C)
= 25℃ Unless otherwise noted)
A
BV
V
DSS
GS(Th)
I
GSS
I
DSS
R
DS(on)
60 - -
1.0 - 3.0
- -
- - 1
- - 25
-
-
-
-
V
±100
80
100
nA
μA
mΩ
Forward Transconductance
VDS=10V,ID=9A
Dynamic
Input Capacitance
VGS=0V,VDS=25V,f=1.0MHz
Output Capacitance
VGS=0V,VDS=25V,f=1.0MHz
Reverse Transfer Capacitance
VGS=0V,VDS=25V,f=1.0MHz
gfs - 8.6
C
iss
C
oss
C
rss
- 720 1150
- 77 -
- 45 -
- S
pF
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02-Aug-05
WTD9973
Switching
Turn-on Delay Time
VDS=30V,VGS=10V,ID=9A,RD=3.3Ω,RG=3.3Ω
2
t
d(on)
- 7 -
Rise Time
VDS=30V,VGS=10V,ID=9A,RD=3.3Ω,RG=3.3Ω
Turn-off Delay Time
VDS=30V,VGS=10V,ID=9A,RD=3.3Ω,RG=3.3Ω
Fall Time
VDS=30V,VGS=10V,ID=9A,RD=3.3Ω,RG=3.3Ω
Total Gate Charge
2
VDS=48V,VGS=4.5V,ID=9A
Gate-Source Charge
VDS=48V,VGS=4.5V,ID=9A
Gate-Source Change
VDS=48V,VGS=4.5V,ID=9A
t
t
d(off)
t
Q
Q
Q
gd
r
- 15 ns
- 16 -
f
g
gs
- 3 -
- 8 13
- 3 -
nC
- 4 -
Source-Drain Diode Characteristics
Forward On Voltage
VGS=0V,IS=14A
Reverse Recovery Time
VGS=0V,IS=9A,dl/dt=100A/µs
Reverse Recovery Charge
VGS=0V,IS=9A,dl/dt=100A/µs
Note: 1. Pulse width limited by safe operating area.
2. Pulse width ≤ 300μs, duty cycle ≤ 2%.
2
V
SD
T
rr
Q
rr
- - 1.2 V
- 28 - ns
- 27 - nC
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Page 4
WTD9973
45
40
)A( TNERRUC NIARD,
35
30
25
20
15
10
D
I
5
0
0 1 2 3 4 5 6
°
T
C
=25
C
V
,DRAIN-TO-SOURCE VOLTAGE(V)
DS
FIG.1 Typical Output Characteristics
90
85
)Ωm(
80
)
n
o(
s
D
75
R
70
ID = 9A
TC = 25˚C
10V
7.0V
5.0V
4.5V
VG= 3.0V
32
T
28
)A( tnerruC niarD,
24
20
16
12
D
I
8
4
0
2.5
=150˚C
C
0 1 2 3 4 5 6 7
V
,Drain-to-source Voltage(V)
DS
Typical Output Characteristics
Fig.2
ID = 9A
2.0
VG = 10V
)no(sD
1.5
R dezil
amro
1.0
N
0.5
10V
7.0V
5.0V
4.5V
VG= 3.0V
65
3 5 7 9 11
V
,Gate-to-source Voltage(V)
GS
Fig.3 On-Resistance
14
12
10
T
= 150˚C
8
6
)A(
S
I
4
2
0
0 0.2 0.4 0.6 0.8 1.0 1.2 1.4
V
j
,Source-to-Drain Voltage(V)
DS
v.s. Gate Voltage
Tj = 25˚C
Fig.5 Forward Characteristics of
Reverse Diode
0.0
-50 0 50 100 150
Tj ,Junction Temperature(˚C)
Fig.4 Normalized OnResistance
2.5
2.0
)
1.5
V(
)
h
t(
S
G
V
1
0.5
0
-50 0 50 100 150
Tj ,Junction Temperature(˚C)
Fig.6 Gate Threshold Voltage v.s.
Junction
Temperature
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Page 5
WTD9973
5/6
02-Aug-05
12
(V)
10
ge
a
olt
V
8
e
6
4
, Gate to Sourc
SG
V
2
0
0 4 8 12 16
QG , Total Gate Charge(nC)
Fig 7. Gate Charge Characteristics
100
10
)A(
D
I
1
TC = 25˚C
Single Pulse
0.1
0.1 1 10 100 1000
V
, Drain-to-Source Voltage(V)
DS
Fig 9. Maximum Safe Operation Area
ID = 9A
VDS = 48V
VDS = 38V
VDS = 30V
1ms
10ms
100ms
1s
DC
10000
1000
f = 1.0MHz
Ciss
Fp(C )
100
10
1 5 9 13 17 21 25 29
Coss
Crss
VDS, Drain-to-Source Voltage(V)
Fig 8. Typical Capacitance Characteristics
1
)
cj
Duty factor = 0.5
θ
R(esnopseR lamrehT de
0.2
0.1
0.1
0.05
z
il
a
m
ro
N
0.02
0.01
Single pulse
0.01
0.00001 0.0001 0.001 0.01 0.1 1
P
DM
t
T
Duty factor = t / T
Peak Tj=P
DM
x R
θ jc
+ T
c
t, Pulse Width(s)
Fig 10. Effective Transient Thermal Impedance
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V
DS
90%
10%
V
GS
11. Switching Time Circuit
Fig
WEITRON
t
d(on)
VG
Q
G
4.5V
Q
GS
t
r
t
d(off)tf
Fig.12 Gate Charge
Q
GD
Charge
Q
Waveform
Page 6
WTD9973
6/6
02-Aug-05
D-PAK / (TO-252) Outline Dimension
E
A
4
1 2 3
D
B
M
C
G
H
J
K
L
Dim
A
B
C
D
E
G
H
J
K
L
M
D-PAK
Min
6.40
9.00
0.50
-
2.20
0.45
1.00
5.40
0.30
0.70
0.90
Unit:mm
Max
6.80
10.00
0.80
2.30
2.50
0.55
1.60
5.80
0.64
1.70
1.50
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