Page 1
Features
Max on-state resistance (per ch.) R
Current limitation (typ) I
Drain-source clamp voltage V
ON
LIMH
CLAMP
VNS3NV04DP-E
OMNIFET II
fully autoprotected Power MOSFET
120 mΩ
3.5 A
40 V
■ ECOPACK
■ Automotive Grade: compliance with AEC
®
: lead free and RoHS compliant
guidelines
■ Linear current limitation
■ Thermal shutdown
■ Short circuit protection
■ Integrated clamp
■ Low current drawn from input pin
■ Diagnostic feedback through input pin
■ ESD protection
■ Direct access to the gate of the Power
MOSFET (analog driving)
■ Compatible with standard Power MOSFET
SO-8
Description
The VNS3NV04DP-E device is made up of two
monolithic chips (OMNIFET II) housed in a
standard SO-8 package. The OMNIFET II is
designed using STMicroelectronics™ VIPower™
M0-3 technology and is intended for replacement
of standard Power MOSFETs in up to 50 kHz DC
applications.
Built-in thermal shutdown, linear current limitation
and overvoltage clamp protect the chip in harsh
environments.
Fault feedback can be detected by monitoring
voltage at the input pin
Table 1. Device summary
Package
SO-8 VNS3NV04DP-E VNS3NV04DPTR-E
March 2011 Doc ID 018529 Rev 1 1/21
Order codes
Tube Tape and reel
www.st.com
1
Page 2
Contents VNS3NV04DP-E
Contents
1 Block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2 Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
2.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
2.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.4 Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
3 Protection features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
3.1 Overvoltage clamp protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
3.2 Linear current limiter circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
3.3 Overtemperature and short circuit protection . . . . . . . . . . . . . . . . . . . . . . 16
3.4 Status feedback . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
4 Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
4.1 ECOPACK® packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
4.2 SO-8 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
4.3 SO-8 packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
5 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
2/21 Doc ID 018529 Rev 1
Page 3
VNS3NV04DP-E List of tables
List of tables
Table 1. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Table 2. Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Table 3. Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Table 4. Off . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Table 5. On . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Table 6. Dynamic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Table 7. Switching . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Table 8. Source drain diode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Table 9. Protections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Table 10. SO-8 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Table 11. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Doc ID 018529 Rev 1 3/21
Page 4
List of figures VNS3NV04DP-E
List of figures
Figure 1. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Figure 2. Configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Figure 3. Current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Figure 4. Switching time test circuit for resistive load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Figure 5. Test circuit for diode recovery times . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Figure 6. Unclamped inductive load test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Figure 7. Input charge test circuit. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Figure 8. Unclamped inductive waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Figure 9. Source-drain diode forward characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Figure 10. Static drain-source on resistance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Figure 11. Derating curve . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Figure 12. Static drain-source on resistance vs input voltage (part 1) . . . . . . . . . . . . . . . . . . . . . . . . . 12
Figure 13. Static drain-source on resistance vs input voltage (part 2) . . . . . . . . . . . . . . . . . . . . . . . . . 12
Figure 14. Transconductance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Figure 15. Static drain-source on resistance vs Id . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 16. Transfer characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 17. Turn-on current slope (part 1). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 18. Turn-on current slope (part 2). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 19. Input voltage vs input charge . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 20. Turn-off drain source voltage slope (part 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 21. Turn-off drain-source voltage slope (part 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 22. Capacitance variations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 23. Switching time resistive load (part 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 24. Switching time resistive load (part 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 25. Output characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 26. Normalized on resistance vs temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 27. Normalized input threshold voltage vs temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 28. Normalized current limit vs junction temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 29. Step response current limit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 30. SO-8 package dimension . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 31. SO-8 tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 32. Tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
4/21 Doc ID 018529 Rev 1
Page 5
VNS3NV04DP-E Block diagram and pin description
1 Block diagram and pin description
Figure 1. Block diagram
DRAIN1
OVERVO LTAGE
CLAMP
INPUT1
GATE
CONTROL
OVER
TEMPERATURE
LINEAR
CURRENT
LIMITER
SOURCE1
Figure 2. Configuration diagram (top view)
SOURCE 1
INPUT 1
SOURCE 2
INPUT 2
1
4
DRAIN2
SOURCE2
8
5
OVERVO LTAGE
CLAMP
LINEAR
CURRENT
LIMITER
DRAIN 1
DRAIN 1
DRAIN 2
DRAIN 2
GATE
CONTROL
OVER
TEMPERATURE
INPUT2
Doc ID 018529 Rev 1 5/21
Page 6
Electrical specifications VNS3NV04DP-E
2 Electrical specifications
Figure 3. Current and voltage conventions
IN2
R
IN1
INPUT 1
I
R
IN2
IN2
INPUT 2
SOURCE 1
I
IN1
V
IN1
V
2.1 Absolute maximum ratings
Stressing the device above the rating listed in the “Absolute maximum ratings” table may
cause permanent damage to the device. These are stress ratings only and operation of the
device at these or any other conditions above those indicated in the operating sections of
this specification is not implied. Exposure to Absolute maximum rating conditions for
extended periods may affect device reliability. Refer also to the STMicroelectronics SURE
program and other relevant quality document.
Table 2. Absolute maximum ratings
DRAIN 1
DRAIN 2
SOURCE 2
I
D1
I
D2
V
DS1
V
DS1
Symbol Parameter Value Unit
V
V
I
R
IN MINn
I
I
V
ESD1
V
ESD2
P
T
DSn
INn
INn
Dn
Rn
tot
T
j
T
c
stg
Drain-Source Voltage (V
= 0 V) Internally clamped V
INn
Input voltage Internally clamped V
Input current +/- 20 mA
Minimum input series impedance 220 Ω
Drain current Internally limited A
Reverse DC output current -5.5 A
Electrostatic discharge (R = 1.5 KΩ, C = 100 pF) 4000 V
Electrostatic discharge on output pins only (R = 330 Ω,
C=150pF)
Total dissipation at Tc=25°C 4 Ω
Operating junction temperature Internally limited °C
Case operating temperature Internally limited °C
Storage temperature -55 to 150 °C
6/21 Doc ID 018529 Rev 1
16500 V
Page 7
VNS3NV04DP-E Electrical specifications
2.2 Thermal data
Table 3. Thermal data
Symbol Parameter Max value Unit
R
thj-lead
R
thj-amb
1. When mounted on a standard single-sided FR4 board with 50mm2 of Cu (at least 35 μm thick) connected
to all DRAIN pins of the relative channel
Thermal resistance junction-lead (per channel) 30 °C/W
Thermal resistance junction-ambient 80
2.3 Electrical characteristics
Values specified in this section are for -40 °C < Tj< 150 °C, unless otherwise stated.
Table 4. Off
Symbol Parameter Test conditions Min Typ Max Unit
V
CLAMP
V
CLTH
V
INTH
I
ISS
V
INCL
I
DSS
Drain-source clamp
voltage
Drain-source clamp
threshold voltage
Input threshold
voltage
Supply current from
input pin
Input-source clamp
voltage
Zero input voltage
drain current
=0V)
(V
IN
V
=0V; ID= 1.5 A 40 45 55 V
IN
=0V; ID=2mA 36 V
V
IN
V
DS=VIN
V
DS
=1mA 6 6.8 8 V
I
IN
=-1mA -1 -0.3 V
I
IN
V
DS
V
DS
(1)
°C/W
; ID=1mA 0.5 2.5 V
=0V; VIN= 5 V 100 150 µA
=13V; VIN=0V; Tj=25°C 30 µA
=25V; VIN=0V 75 µA
Table 5. On
Symbol Parameter Test conditions Min Typ Max Unit
=5V; ID= 1.5 A; Tj= 25 °C — — 120 mΩ
V
R
DS(on)
Static drain-source on
resistance
IN
=5V; ID= 1.5 A — — 240 mΩ
V
IN
Tj= 25 °C, unless otherwise specified
Table 6. Dynamic
Symbol Parameter Test conditions Min Typ Max Unit
Forward
(1)
gfs
C
transconductance
Output capacitance VDS=13V; f=1MHz; VIN=0V — 150 — pF
OSS
Doc ID 018529 Rev 1 7/21
=13V; ID=1.5A — 5.0 — S
V
DD
Page 8
Electrical specifications VNS3NV04DP-E
Table 7. Switching
Symbol Parameter Test conditions Min Typ Max Unit
t
d(on)
t
d(off)
t
d(on)
t
d(off)
(dI/dt)
Table 8. Source drain diode
Turn-on delay time
=15V; ID=1.5A;
V
Rise time 250 750 ns
t
r
Turn-off delay time 450 1350 ns
t
Fall time 250 750 ns
f
DD
=5V; R
V
gen
= 220 Ω (see Figure 4)
MIN
gen=RIN
Turn-on delay time
V
=15V; ID=1.5A;
Rise time 2.5 7.5 µs
t
r
Turn-off delay time 3.3 10.0 µs
Fall time 2.0 6.0 µs
t
f
Turn-on current slope
on
Q
Total input charge
i
DD
V
gen
=5V; R
=2.2KΩ
gen
(see Figure 4)
V
=15V; ID=1.5A;
DD
=5V;
V
gen
R
gen=RIN MIN
V
=12V; ID= 1.5 A; VIN=5V;
DD
I
=2.13mA (see Figure 7)
gen
= 220 Ω
90 300 ns
0.45 1.35 µs
4.7 A/µs
8.5 nC
Symbol Parameter Test conditions Min Typ Max Unit
(1)
V
SD
Q
I
RRM
1. Pulsed: Pulse duration = 300 µs, duty cycle 1.5%
Forward on voltage ISD=1.5A; VIN=0V 0.8 V
Reverse recovery time
t
rr
Reverse recovery
rr
charge
Reverse recovery
current
I
= 1.5 A; dI/dt = 12 A/µs;
SD
VDD=30V; L=200µH
(see Figure 5)
107 ns
37 µC
0.7 A
-40 °C < Tj< 150 °C, unless otherwise specified
Table 9. Protections
Symbol Parameter Test conditions Min Typ Max Unit
I
Drain current limit VIN=5V; VDS=13V 3.5 5 7 A
lim
Step response current
t
dlim
limit
Overtemperature
T
jsh
shutdown
Overtemperature reset 135 °C
T
jrs
Fault sink current VIN=5V; VDS=13V; Tj=T
I
gf
Single pulse avalanche
E
as
energy
8/21 Doc ID 018529 Rev 1
=5V; VDS= 13 V 10 µs
V
IN
Starting T
V
IN
=25°C; VDD=24V;
j
=5V; R
gen=RIN MIN
L=24mH (see Figure 6
and Figure 8)
jsh
=220Ω;
150 175 200 °C
10 15 20 mA
100 mJ
Page 9
VNS3NV04DP-E Electrical specifications
Figure 4.
Switching time test circuit for resistive load
R
V
gen
I
D
90%
t
d(off)
t
f
t
r
t
V
gen
d(on)
10%
V
gen
D
t
t
Figure 5.
Test circuit for diode recovery times
A
D
220
I
OMNIFET
Ω
S
V
gen
FAS T
DIODE
B
R
gen
I
A
B
OMNIFET
L=100uH
D
S
8.5
V
DD
Ω
Doc ID 018529 Rev 1 9/21
Page 10
Electrical specifications VNS3NV04DP-E
Figure 6. Unclamped inductive load test circuits
R
V
IN
P
W
GEN
Figure 7. Input charge test circuit
V
IN
GEN
10/21 Doc ID 018529 Rev 1
ND8003
Page 11
VNS3NV04DP-E Electrical specifications
Figure 8. Unclamped inductive waveforms
Doc ID 018529 Rev 1 11/21
Page 12
Electrical specifications VNS3NV04DP-E
2.4 Electrical characteristics curves
Figure 9. Source-drain diode forward
characteristics
Vsd (mV)
1100
1050
Vin=0V
1000
950
900
850
800
750
700
650
600
0123456789101112
Id (A)
Figure 11. Derating curve Figure 12. Static drain-source on
Figure 10. Static drain-source on
resistance
Rds(on) (mohms)
1000
900
800
700
600
500
400
300
200
100
0
0.05 0.1 0.15 0.2 0.25 0.3 0.35 0.4 0.45 0.5 0.55
Tj=-40ºC
Vin=2.5V
Tj=25ºC
Tj=150ºC
Id(A)
resistance vs input voltage
(part 1)
Rds(on) (mohms)
300
275
250
Tj=150ºC
225
200
175
150
Tj=25ºC
125
100
Tj=-40ºC
75
50
25
0
3 3.5 4 4.5 5 5.5 6 6.5
Vin(V)
Id=3.5A
Id=1A
Id=3.5A
Id=1A
Id=3.5A
Id=1A
Figure 13. Static drain-source on
Figure 14. Transconductance
resistance vs input voltage
(part 2)
Rds(on) (mohms)
250
225
200
175
150
125
100
75
50
25
0
3 3.5 4 4.5 5 5.5 6 6.5
Vin(V)
Id=1.5A
Tj=150ºC
Tj=25ºC
Tj=-40ºC
12/21 Doc ID 018529 Rev 1
Gfs (S)
11
10
Vds=13V
9
8
7
6
5
4
3
2
1
0
0 0.5 1 1 .5 2 2.5 3 3.5 4 4.5 5 5.5
Id (A)
Tj=-40ºC
Tj=25ºC
Tj=150ºC
Page 13
VNS3NV04DP-E Electrical specifications
Figure 15. Static drain-source on
Figure 16. Transfer characteristics
resistance vs Id
Rds(on) (mohms)
250
225
200
175
150
125
100
75
50
25
0
Vin=5V
Tj=150ºC
Tj=25ºC
Tj= - 40ºC
00.511.522.533.54
Id (A)
Idon (A)
6
5.5
4.5
3.5
2.5
1.5
0.5
Vds=13.5V
5
4
3
2
1
0
Tj=150ºC
Tj=-40ºC
Tj=25ºC
1.5 2 2.5 3 3.5 4 4.5 5 5.5 6
Vin (V)
Figure 17. Turn-on current slope (part 1) Figure 18. Turn-on current slope (part 2)
di/dt(A/us)
5
4.5
4
3.5
3
2.5
2
1.5
1
0.5
0
0
250
500
750
1000
1250
Rg(ohm)
1500
Vdd=15V
1750
Vin=5V
Id=1.5A
2000
2250
2500
di/dt(A/usec)
1.75
1.5
1.25
1
0.75
0.5
0.25
0
0
Vin=3.5V
Vdd=15V
Id=1.5A
250
750
1250
1750
500
1000
1500
Rg(ohm)
2000
2250
2500
Figure 19. Input voltage vs input charge Figure 20. Turn-off drain source voltage
slope (part 1)
Vin (V)
9
8
Vds=1V
Id=1.5A
7
6
5
4
3
2
1
0
012345 67891011
Qg (nC)
Doc ID 018529 Rev 1 13/21
dv/dt(V/usec)
300
275
250
225
200
175
150
125
100
75
50
25
0
0
250
500
750
1000
1250
Rg(ohm)
1500
Vdd=15V
1750
Vin=5V
Id=1.5A
2000
2250
2500
Page 14
Electrical specifications VNS3NV04DP-E
Figure 21. Turn-off drain-source voltage
slope (part 2)
dv/dt(V/usec)
300
275
250
225
200
175
150
125
100
75
50
25
0
0
500
750
1000
1250
250
1500
Vin=3.5V
Vdd=15V
1750
Id=1.5A
2000
2250
2500
Rg(ohm)
Figure 23. Switching time resistive load
(part 1)
t(usec)
4
3.5
Vdd=15V
3
Id=1.5A
2.5
1.5
0.5
Vin=5V
2
1
0
0
500
750
1000
1250
250
Rg(ohm)
1500
1750
td(off)
2000
tr
tf
td(on)
2250
2500
Figure 22. Capacitance variations
C(pF)
350
300
250
200
150
100
50
0 5 10 15 20 25 30 35
Vds(V)
f=1MHz
Vin=0V
Figure 24. Switching time resistive load
(part 1)
t(nsec)
900
800
700
600
500
400
300
200
100
0
3.25 3.5 3.75 4 4.25 4.5 4.75 5 5.25
td(off)
tf
td(on)
tr
Vin(V)
Vdd=15V
Id=1.5A
Rg=220ohm
Figure 25. Output characteristics Figure 26. Normalized on resistance vs
Id (A)
5
4.5
4
3.5
3
2.5
2
1.5
1
0.5
0
012345678910
Vds (V)
14/21 Doc ID 018529 Rev 1
Vin=5V
Vin=4V
Vin=3V
temperature
Rds(on) (mOhm)
4
3.5
3
2.5
2
1.5
0.5
Vin=5V
Id=1.5A
1
-50 -25 0 25 50 75 100 125 150 175
Tc )ºC)
Page 15
VNS3NV04DP-E Electrical specifications
Figure 27. Normalized input threshold
voltage vs temperature
Figure 28. Normalized current limit vs
junction temperature
Vinth (V)
2
1.8
1.6
1.4
1.2
0.8
0.6
0.4
0.2
Vds=Vin
Id=1mA
1
0
-50 -25 0 25 50 75 100 125 150 175
Tc (ºC)
Figure 29. Step response current limit
Tdlim(usec)
13
12.5
12
11.5
11
10.5
10
9.5
9
8.5
8
7.5
5 7.5 10 12.5 15 17.5 20 22.5 25 27.5 30 32.5
Vdd(V)
Vin=5V
Rg=220ohm
Ilim (A)
10
9
8
7
6
5
4
3
2
1
0
Vin=5V
Vds=13V
-50 -25 0 25 50 75 100 125 150 1 75
Tc ( ºC )
Doc ID 018529 Rev 1 15/21
Page 16
Protection features VNS3NV04DP-E
3 Protection features
During normal operation, the INPUT pin is electrically connected to the gate of the internal
power MOSFET through a low impedance path.
The device then behaves like a standard power MOSFET and can be used as a switch from
DC up to 50 KHz. The only difference from the user’s standpoint is that a small DC current
I
(typ. 100 µA) flows into the INPUT pin in order to supply the internal circuitry.
ISS
The following sections describe the device features.
3.1 Overvoltage clamp protection
Internally set at 45 V, along with the rugged avalanche characteristics of the Power
MOSFET stage give this device unrivalled ruggedness and energy handling capability. This
feature is mainly important when driving inductive loads.
3.2 Linear current limiter circuit
Limits the drain current ID to I
is active, the device operates in the linear region, so power dissipation may exceed the
capability of the heatsink. Both case and junction temperatures increase, and if this phase
lasts long enough, junction temperature may reach the overtemperature threshold T
whatever the INPUT pin voltages. When the current limiter
lim
3.3 Overtemperature and short circuit protection
These are based on sensing the chip temperature and are not dependent on the input
voltage. The location of the sensing element on the chip in the power stage area ensures
fast, accurate detection of the junction temperature. Overtemperature cutout occurs in the
range 150 to 190 °C, a typical value being 170 °C. The device is automatically restarted
when the chip temperature falls of about 15 °C below shutdown temperature.
3.4 Status feedback
In the case of an overtemperature fault condition (Tj > T
diagnostic current I
a low impedance source, this current may be used in order to warn the control circuit of a
device shutdown. If the drive impedance is high enough so that the INPUT pin driver is not
able to supply the current I
operation: no requirement is put on the current capability of the INPUT pin driver except to
be able to supply the normal operation drive current I
Additional features of this device are ESD protection according to the Human Body model
and the ability to be driven from a TTL Logic circuit.
through the INPUT pin in order to indicate fault condition. If driven from
gf
, the INPUT pin falls to 0 V. This however not affects the device
gf
), the device tries to sink a
jsh
.
ISS
jsh.
16/21 Doc ID 018529 Rev 1
Page 17
VNS3NV04DP-E Package and packing information
4 Package and packing information
4.1 ECOPACK® packages
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK
®
packages, depending on their level of environmental compliance. ECOPACK®
®
is an ST trademark.
4.2 SO-8 mechanical data
Table 10. SO-8 mechanical data
Dim.
Min. Typ. Max.
A 1.75
A1 0.10 0.25
A2 1.25
b 0.28 0.48
c 0.17 0.23
(1)
D
E 5.80 6.00 6.20
(2)
E1
e 1.27
h 0.25 0.50
4.80 4.90 5.00
3.80 3.90 4.00
mm
L 0.40 1.27
L1 1.04
k 0° 8°
ccc 0.10
1. Dimension “D” does not include mold Flash, protrusions or gate burrs. Mold flash, protrusions or gate burrs
shall not exceed 0.15 mm in total (both side).
2. Dimension “E1” does not include interlead flash or protrusions. Interlead flash or protrusions shall not
exceed 0.25 mm per side.
Doc ID 018529 Rev 1 17/21
Page 18
Package and packing information VNS3NV04DP-E
Figure 30. SO-8 package dimension
0016023 D
18/21 Doc ID 018529 Rev 1
Page 19
VNS3NV04DP-E Package and packing information
4.3 SO-8 packing information
Figure 31. SO-8 tube shipment (no suffix)
B
C
A
Figure 32. Tape and reel shipment (suffix “TR”)
Base Q.ty 100
Bulk Q.ty 2000
Tube length (± 0.5) 532
A 3.2
B 6
C (± 0.1) 0.6
All dimensions are in mm.
REEL DIMENSIONS
Base Q.ty 2500
Bulk Q.ty 2500
A (max) 330
B (min) 1.5
C (± 0.2) 13
F 20.2
G (+ 2 / -0) 12.4
N (min) 60
T (max) 18.4
All dimensions are in mm.
TAPE DIMENSIONS
According to Electronic Industries Association
(EIA) Standard 481 rev. A, Feb. 1986
Tape width W 12
Tape Hole Spacing P0 (± 0.1) 4
Component Spacing P 8
Hole Diameter D (± 0.1/-0) 1.5
Hole Diameter D1 (min) 1.5
Hole Position F (± 0.05) 5.5
Compartment Depth K (max) 4.5
Hole Spacing P1 (± 0.1) 2
All dimensions are in mm.
Doc ID 018529 Rev 1 19/21
Top
cover
tape
End
500mm min
Empty components pockets
saled with cover tape.
User direction of feed
Start
No componentsNo components Components
500mm min
Page 20
Revision history VNS3NV04DP-E
5 Revision history
Table 11. Document revision history
Date Revision Changes
09-Mar-2011 1 Initial release.
20/21 Doc ID 018529 Rev 1
Page 21
VNS3NV04DP-E
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Doc ID 018529 Rev 1 21/21
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