Page 1
VNN1NV04P-E, VNS1NV04P-E
Features
Parameter Symbol Value
Max on-state resistance (per ch.) R
Current limitation (typ) I
Drain-source clamp voltage V
■ Linear current limitation
■ Thermal shutdown
■ Short circuit protection
■ Integrated clamp
■ Low current drawn from input pin
■ Diagnostic feedback through input pin
■ ESD protection
■ Direct access to the gate of the Power
LIMH
CLAMP
MOSFET (analog driving)
■ Compatible with standard Power MOSFET
ON
250 mΩ
1.7 A
40 V
OMNIFET II
fully autoprotected Power MOSFET
2
3
2
1
SOT-223
Description
The VNN1NV04P-E, VNS1NV04P-E are
monolithic devices designed in
STMicroelectronics VIPower M0-3 Technology,
intended for replacement of standard Power
MOSFETs from DC up to 50 kHz applications.
Built in thermal shutdown, linear current limitation
and overvoltage clamp protect the chip in harsh
environments.
SO-8
Fault feedback can be detected by monitoring the
voltage at the input pin.
Table 1. Device summary
Order codes
Package
Tube Tape and reel
SOT-223 VNN1NV04P-E VNN1NV04PTR-E
SO-8 VNS1NV04P-E VNS1NV04PTR-E
October 2009 Doc ID 15586 Rev 2 1/28
www.st.com
28
Page 2
Contents VNN1NV04P-E, VNS1NV04P-E
Contents
1 Block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2 Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
2.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
2.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.4 Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
3 Protection features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
4 Package and PCB thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
4.1 SOT-223 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
4.2 SO-8 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
5 Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
5.1 SOT-223 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
5.2 SO8 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
5.3 SOT-223 packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
5.4 SO8 packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
6 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
2/28 Doc ID 15586 Rev 2
Page 3
VNN1NV04P-E, VNS1NV04P-E List of tables
List of tables
Table 1. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Table 2. Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Table 3. Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Table 4. Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Table 5. SOT-223 thermal parameter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Table 6. SO-8 thermal parameter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Table 7. SO-8 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Table 8. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Doc ID 15586 Rev 2 3/28
Page 4
List of figures VNN1NV04P-E, VNS1NV04P-E
List of figures
Figure 1. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Figure 2. Configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Figure 3. Current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Figure 4. Switching time test circuit for resistive load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Figure 5. Test circuit for diode recovery times . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Figure 6. Unclamped inductive load test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Figure 7. Input charge test circuit. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Figure 8. Unclamped inductive waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Figure 9. Source-drain diode forward characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Figure 10. Static drain-source on resistance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Figure 11. Derating curve . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Figure 12. Static drain-source on resistance vs input voltage (part 1/2) . . . . . . . . . . . . . . . . . . . . . . . 12
Figure 13. Static drain-source on resistance vs input voltage (part 2/2) . . . . . . . . . . . . . . . . . . . . . . . 12
Figure 14. Transconductance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Figure 15. Static drain-source on resistance vs Id . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 16. Transfer characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 17. Turn-on current slope (part 1/2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 18. Turn-on current slope (part 2/2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 19. Input voltage vs input charge . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 20. Turn-off drain source voltage slope (part 1/2). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 21. Turn-off drain-source voltage slope (part 2/2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 22. Capacitance variations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 23. Switching time resistive load (part 1/2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 24. Switching time resistive load (part 2/2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 25. Output characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 26. Normalized on resistance vs temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 27. Normalized input threshold voltage vs temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 28. Normalized current limit vs junction temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 29. Step response current limit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 30. SOT-223 PC board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Figure 31. SOT-223 Rthj-amb vs PCB copper area in open box free air condition . . . . . . . . . . . . . . 17
Figure 32. SOT-223 thermal impedance junction ambient single pulse . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 33. SOT-223 thermal fitting model of a single channel. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 34. SO-8 PC board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 35. SO-8 Rthj-amb vs PCB copper area in open box free air condition . . . . . . . . . . . . . . . . . . 19
Figure 36. SO-8 thermal impedance junction ambient single pulse . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 37. SO-8 thermal fitting model of a single channel . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 38. SOT-223 mechanical data and package outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Figure 39. SO-8 package dimension . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Figure 40. SOT-223 tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Figure 41. SO-8 tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Figure 42. SO-8 tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
4/28 Doc ID 15586 Rev 2
Page 5
VNN1NV04P-E, VNS1NV04P-E Block diagram and pin description
1 Block diagram and pin description
Figure 1. Block diagram
DRAIN
2
Overvoltage
Clamp
INPUT
1
Gate
Control
Over
Temperature
Figure 2. Configuration diagram (top view)
SOURCE
SOURCE
SOURCE
INPUT
1
4
(a)
Linear
Current
Limiter
3
SOURCE
8
DRAIN
DRAIN
DRAIN
5
DRAIN
a. For the pins configuration related to SOT-223 see outline at page 1.
Doc ID 15586 Rev 2 5/28
Page 6
Electrical specifications VNN1NV04P-E, VNS1NV04P-E
2 Electrical specifications
Figure 3. Current and voltage conventions
I
D
V
DS
R
I
IN
IN
INPUT
V
IN
2.1 Absolute maximum ratings
DRAIN
SOURCE
Stress values that exceed those listed in the “Absolute maximum ratings” table can cause
permanent damage to the device. These are stress ratings only, and operation of the device
at these, or any other conditions greater than those, indicated in the operating sections of
this specification is not implied. Exposure to absolute maximum rating conditions for
extended periods may affect device reliability. Refer also to the STMicroelectronics sure
program and other relevant quality documents.
Table 2. Absolute maximum ratings
Symbol Parameter
V
DSn
V
I
INn
R
IN MINn
I
Dn
I
Rn
V
ESD1
V
ESD2
P
T
T
T
Drain-source voltage (V
Input voltage Internally clamped V
INn
=0 V) Internally clamped V
INn
Input current +/-20 mA
Minimum input series impedance 330 Ω
Drain current Internally limited A
Reverse DC output current -3 A
Electrostatic discharge (R=1.5 KΩ, C=100 pF) 4000 V
Electrostatic discharge on output pins only
(R=330 Ω, C=150 pF)
Total dissipation at Tc=25 °C 7 8.3 W
tot
Operating junction temperature Internally limited °C
j
Case operating temperature Internally limited °C
c
Storage temperature -55 to 150 °C
stg
Value
Unit
SOT-223 SO-8
16500 V
6/28 Doc ID 15586 Rev 2
Page 7
VNN1NV04P-E, VNS1NV04P-E Electrical specifications
2.2 Thermal data
Table 3. Thermal data
Max value
Symbol Parameter
SOT-223 SO-8
Unit
R
thj-case
R
thj-lead
R
thj-amb
1. When mounted on a standard single-sided FR4 board with 50 mm2 of Cu (at least 35 μm thick) connected
to all DRAIN pins
Thermal resistance junction-case 18 °C/W
Thermal resistance junction-lead 15 °C/W
Thermal resistance junction-ambient 70
(1)
65
(1)
2.3 Electrical characteristics
Table 4. Electrical characteristics
Symbol Parameter Test conditions Min Typ Max Unit
Off (-40 °C<Tj<150 °C, unless otherwise specified)
V
CLAMP
V
CLTH
V
INTH
I
ISS
V
INCL
I
DSS
On (-40 °C<Tj<150 °C, unless otherwise specified)
Drain-source clamp voltage VIN=0 V; ID=0.5 A 40 45 55 V
Drain-source clamp threshold
voltage
V
=0 V; ID=2 mA 36 V
IN
Input threshold voltage VDS=VIN; ID=1 mA 0.5 2.5 V
Supply current from input pin VDS=0 V; VIN=5 V 100 150 µA
Input-source clamp
voltage
Zero input voltage drain current
(VIN=0 V)
IIN=1 mA
=-1 mA
I
IN
=13 V; VIN=0 V; Tj=25 °C
V
DS
=25 V; VIN=0 V
V
DS
6
-1.0
6.8 8
-0.3
30
75
°C/W
V
µA
R
DS(on)
Dynamic (T
(1)
g
fs
C
OSS
Switching (T
t
d(on)
t
r
t
d(off)
t
f
Static drain-source on
resistance
=25 °C, unless otherwise specified)
j
V
IN
V
IN
=5 V; ID=0.5 A; Tj=25 °C
=5 V; ID=0.5 A
250
500
mΩ
Forward transconductance VDD=13 V; ID=0.5 A 2 S
Output capacitance VDS=13 V; f=1 MHz; VIN=0 V 90 pF
=25 °C, unless otherwise specified)
j
Turn-on delay time
V
=15 V; ID=0.5 A
Rise time 170 500 ns
Turn-off delay time 350 1000 ns
DD
V
=5 V; R
gen
gen=RIN MIN
(see Figure 4)
=330 Ω
70 200 ns
Fall time 200 600 ns
Doc ID 15586 Rev 2 7/28
Page 8
Electrical specifications VNN1NV04P-E, VNS1NV04P-E
Table 4. Electrical characteristics (continued)
Symbol Parameter Test conditions Min Typ Max Unit
t
d(on)
t
t
d(off)
t
(dI/dt)
Q
Source drain diode (T
V
SD
t
Qrr Reverse recovery charge 100 nC
I
RRM
Protections (-40 °C<T
I
lim
t
dlim
T
jsh
T
I
Eas Single pulse avalanche energy
Turn-on delay time
V
=15 V; ID=0.5 A
Rise time 1.3 4.0 µs
r
Turn-off delay time 1.8 5.5 µs
Fall time 1.2 4.0 µs
f
Turn-on current slope
on
Total input charge
i
=25 °C, unless otherwise specified)
j
(1)
Forward on voltage ISD=0.5 A; VIN=0 V 0.8 V
Reverse recovery time
rr
Reverse recovery current 0.7 A
<150 °C, unless otherwise specified)
j
DD
V
gen
=5 V; R
=2.2 KΩ
gen
(see Figure 4)
VDD=15 V; ID=1.5 A
V
gen
=5 V; R
gen=RIN MIN
=330 Ω
VDD=12 V; ID=0.5 A; VIN=5 V
I
=2.13 mA (see Figure 7)
gen
=0.5 A; dI/dt=6 A/µs
I
SD
=30 V; L=200 µH
V
DD
(see Figure 5)
0.25 1.0 µs
5A/µs
5nC
205 ns
Drain current limit VIN=5 V; VDS=13 V 1.7 3.5 A
Step response current limit VIN=5 V; VDS=13 V 2.0 µs
Over temperature shutdown 150 175 200 °C
Over temperature reset 135 °C
jrs
Fault sink current VIN=5 V; VDS=13 V; Tj=T
gf
Starting T
=5 V R
V
IN
L=50 mH
jsh
=25 °C; VDD=24 V
j
gen=RIN MIN
=330 Ω;
10 15 20 mA
55 mJ
(see Figure 6 and Figure 8)
1. Pulsed: pulse duration = 300 µs, duty cycle 1.5 %
8/28 Doc ID 15586 Rev 2
Page 9
VNN1NV04P-E, VNS1NV04P-E Electrical specifications
Figure 4.
Switching time test circuit for resistive load
R
V
gen
I
D
90%
t
d(off)
t
f
t
r
t
V
gen
d(on)
10%
V
gen
D
t
t
Doc ID 15586 Rev 2 9/28
Page 10
Electrical specifications VNN1NV04P-E, VNS1NV04P-E
Figure 5.
Test circuit for diode recovery times
A
D
330
I
OMNIFET
Ω
S
V
gen
FAS T
DIODE
B
R
gen
I
A
B
OMNIFET
L=100uH
D
S
8.5
V
DD
Ω
Figure 6. Unclamped inductive load test circuits
R
V
IN
P
W
GEN
10/28 Doc ID 15586 Rev 2
Page 11
VNN1NV04P-E, VNS1NV04P-E Electrical specifications
Figure 7. Input charge test circuit
V
IN
GEN
Figure 8. Unclamped inductive waveforms
ND8003
Doc ID 15586 Rev 2 11/28
Page 12
Electrical specifications VNN1NV04P-E, VNS1NV04P-E
2.4 Electrical characteristics curves
Figure 9. Source-drain diode forward
Figure 10. Static drain-source on resistance
characteristics
Vsd (mV)
1000
950
Vin=0V
900
850
800
750
700
0 2 4 6 8 101214
Id (A)
Rds(on) (ohms)
4.5
4
3.5
3
2.5
2
1.5
1
0.5
0
0 0.05 0.1 0.15 0.2 0.25 0.3
Tj=-40ºC
Vin=2.5V
Id(A)
Tj=25ºC
Tj=150ºC
Figure 11. Derating curve Figure 12. Static drain-source on resistance
vs input voltage (part 1/2)
Rds(on) (mohms)
500
450
400
350
300
250
200
150
100
50
0
33.544.555.566.5 7
Id=0.5A
Tj=150ºC
Tj=25ºC
Tj=-40ºC
Vin(V)
Figure 13. Static drain-source on resistance
vs input voltage (part 2/2)
Rds(on) (mohms)
500
Tj=150ºC
450
400
350
300
Tj=25ºC
250
200
Tj=-40ºC
150
100
50
0
3 3.5 4 4.5 5 5.5 6 6.5
Vin(V)
12/28 Doc ID 15586 Rev 2
Id=1.5A
Id=1A
Id=1.5A
Id=1A
Id=1.5A
Id=1A
Figure 14. Transconductance
Gfs (S)
6
5.5
5
4.5
4
3.5
3
2.5
2
1.5
1
0.5
0
Vds=13V
0 0.25 0.5 0.75 1 1.25 1.5 1.75 2
Id(A)
Tj=-40ºC
Tj=25ºC
Tj=150ºC
Page 13
VNN1NV04P-E, VNS1NV04P-E Electrical specifications
Figure 15. Static drain-source on resistance
Figure 16. Transfer characteristics
vs Id
Rds(on) (mohms)
500
450
400
350
300
250
200
150
100
50
0
0 0.25 0.5 0.75 1 1.25 1.5 1.75 2
Tj=150ºC
Tj=25ºC
Tj=-40ºC
Vin=3.5V
Vin=5V
Vin=3.5V
Vin=5V
Vin=3.5V
Vin=5V
Id(A)
Idon(A)
2.25
2
1.75
1.5
1.25
1
0.75
0.5
0.25
0
1.5
1.7522.25
Vds=13.5V
Tj=150ºC
2.5
2.7533.25
Tj=-40ºC
Vin(V)
3.5
3.7544.25
Tj=25ºC
4.5
4.75
5
Figure 17. Turn-on current slope (part 1/2) Figure 18. Turn-on current slope (part 2/2)
di/dt(A/us)
6
5
4
Vin=5V
Vdd=15V
Id=1.5A
di/dt(A/us)
1.4
1.2
1
Vin=3.5V
Vdd=15V
Id=1.5A
3
2
1
0
0 500 1000 1500 2000 2500
Rg(ohm)
0.8
0.6
0.4
0.2
0 500 1000 15 00 2000 2500
Rg(ohm)
Figure 19. Input voltage vs input charge Figure 20. Turn-off drain source voltage slope
(part 1/2)
Vin (V)
6
5
4
Vds=12V
Id=0.5A
3
2
1
0
0123 45 6
Qg (nC)
dv/dt(V/us)
350
300
250
Vin=5V
Vdd=15V
Id=0.5A
200
150
100
50
0
0 500 1000 1500 2000 2500
Rg(ohm)
Doc ID 15586 Rev 2 13/28
Page 14
Electrical specifications VNN1NV04P-E, VNS1NV04P-E
Figure 21. Turn-off drain-source voltage slope
(part 2/2)
dv/dt(V/us)
350
300
250
200
150
100
50
0
0 500 1000 1500 2000 2500
Vin=3.5V
Vdd=15V
Id=0.5A
Rg(ohm)
Figure 23. Switching time resistive load
(part 1/2)
t(us)
2
1.75
1.25
0.75
0.25
Vdd=15V
1.5
Id=0.5A
Vin=5V
1
0.5
0
250
500
750
1000
0
1250
Rg(ohm)
1500
td(off)
1750
2000
tr
tf
td(on)
2250
2500
Figure 22. Capacitance variations
C(pF)
225
200
175
150
125
100
75
50
0 5 10 15 20 25 30 35
f=1MHz
Vin=0V
Vds(V)
Figure 24. Switching time resistive load
(part 2/2)
t(ns)
550
500
450
400
350
300
250
200
150
100
50
0
3.25 3.5 3.75 4 4.25 4.5 4.75 5 5.25
tr
td(on)
Vin(V)
Vdd=15V
Id=0.5A
Rg=330ohm
td(off)
tf
Figure 25. Output characteristics Figure 26. Normalized on resistance vs
temperature
ID(A)
2.4
2.2
2
1.8
1.6
1.4
1.2
1
0.8
0.6
0.4
0.2
0
0123456789101112
Vin=5.5V
Vin=4.5V
Vin=3.5V
Vin=3V
VDS(V)
14/28 Doc ID 15586 Rev 2
Rds(on) (mOhm)
2.25
2
Vin=5V
1.75
1.5
1.25
0.75
0.5
Id=0.5A
1
-50 -25 0 25 50 75 100 125 150 175
Tc (ºC)
Page 15
VNN1NV04P-E, VNS1NV04P-E Electrical specifications
Figure 27. Normalized input threshold voltage
vs temperature
Vinth (V)
2
1.8
1.6
1.4
1.2
0.8
0.6
0.4
0.2
0
Vds=Vin
Id=1mA
1
-50 -25 0 25 50 7 5 100 125 150 175
Tc (ºC)
Figure 28. Normalized current limit vs junction
temperature
Ilim (A)
5
4.5
3.5
2.5
1.5
0.5
Vin=5V
4
Vds=13V
3
2
1
0
-50 -25 0 25 50 75 100 125 150 175
Tc ( ºC )
Figure 29. Step response current limit
Tdlim(us)
2.4
2.3
Vin=5V
2.2
2.1
2
1.9
5 101520253035
Rg=330ohm
Vdd(V)
Doc ID 15586 Rev 2 15/28
Page 16
Protection features VNN1NV04P-E, VNS1NV04P-E
3 Protection features
During normal operation, the input pin is electrically connected to the gate of the internal
Power MOSFET through a low impedance path.
The device then behaves like a standard Power MOSFET and can be used as a switch from
DC up to 50 kHz. The only difference from the user’s standpoint is that a small DC current
I
(typ. 100 µA) flows into the input pin in order to supply the internal circuitry.
ISS
The device integrates:
● Overvoltage clamp protection: internally set at 45 V, along with the rugged avalanche
characteristics of the Power MOSFET stage give this device unrivalled ruggedness and
energy handling capability. This feature is mainly important when driving inductive
loads.
● Linear current limiter circuit: limits the drain current I
voltages. When the current limiter is active, the device operates in the linear region, so
power dissipation may exceed the capability of the heatsink. Both case and junction
temperatures increase, and if this phase lasts long enough, junction temperature may
reach the over temperature threshold T
●
Over temperature and short circuit protection: these are based on sensing the chip
jsh.
temperature and are not dependent on the input voltage. The location of the sensing
element on the chip in the power stage area ensures fast, accurate detection of the
junction temperature. Over temperature cutout occurs in the range 150 to 190 °C, a
typical value being 170 °C. The device is automatically restarted when the chip
temperature falls of about 15 °C below shutdown temperature.
● Status feedback: in the case of an over temperature fault condition (T
device tries to sink a diagnostic current I
through the input pin in order to indicate fault
gf
condition. If driven from a low impedance source, this current may be used in order to
warn the control circuit of a device shutdown. If the drive impedance is high enough so
that the input pin driver is not able to supply the current I
This will not however affect the device operation: no requirement is put on the current
capability of the input pin driver except to be able to supply the normal operation drive
current I
ISS
.
Additional features of this device are ESD protection according to the Human Body model
and the ability to be driven from a TTL logic circuit.
to I
D
whatever the input pin
lim
> T
j
, the input pin will fall to 0 V.
gf
jsh
), the
16/28 Doc ID 15586 Rev 2
Page 17
VNN1NV04P-E, VNS1NV04P-E Package and PCB thermal data
4 Package and PCB thermal data
4.1 SOT-223 thermal data
Figure 30. SOT-223 PC board
.
Note: Layout condition of R
thickness = 2 mm, Cu thickness=35 µm, Copper areas: from minimum pad layout to
2
0.8 cm
).
Figure 31. SOT-223 R
140
130
120
110
100
90
80
70
60
and Zth measurements (PCB FR4 area = 58 mm x 58 mm,PCB
th
vs PCB copper area in open box free air condition
thj-amb
footprint
0 0,5 1 1,5 2 2,5
PCB Cu heatsink area (cm^ 2) - (refer to PCB layout)
Doc ID 15586 Rev 2 17/28
Page 18
Package and PCB thermal data VNN1NV04P-E, VNS1NV04P-E
Figure 32. SOT-223 thermal impedance junction ambient single pulse
ZTH ( °C/ W)
1000
Footprint
100
2 cm
2
10
1
0,1
0,0001 0,001 0,01 0,1 1 10 100 1000
Time ( s)
Equation 1: pulse calculation formula
Z
THδ
where δ = t
R
TH
P
δ Z
/T
THtp
1 δ–()+⋅=
Figure 33. SOT-223 thermal fitting model of a single channel
Table 5. SOT-223 thermal parameter
Area/island (cm2)FP2
R1 (°C/W) 0.8
R2 (°C/W) 1.6
R3 (°C/W) 4.5
R4 (°C/W) 24
R5 (°C/W) 0.1
R6 (°C/W) 100 45
18/28 Doc ID 15586 Rev 2
Page 19
VNN1NV04P-E, VNS1NV04P-E Package and PCB thermal data
Table 5. SOT-223 thermal parameter (continued)
Area/island (cm2)FP2
C1 (W·s/°C) 0.00006
C2 (W·s/°C) 0.0005
C3 (W·s/°C) 0.03
C4 (W·s/°C) 0.16
C5 (W·s/°C) 1000
C6 (W·s/°C) 0.5 2
4.2 SO-8 thermal data
Figure 34. SO-8 PC board
Note: Layout condition of R
thickness = 2 mm, Cu thickness=35 µm, Copper areas: from minimum pad layout to 2 cm
Figure 35. SO-8 R
105
95
85
75
65
and Zth measurements (PCB FR4 area = 58 mm x 58 mm,PCB
th
thj-amb
footprint
vs PCB copper area in open box free air condition
2
).
00,511,522,5
PCB Cu heatsink area (cm^ 2) - (refer to PCB layout)
Doc ID 15586 Rev 2 19/28
Page 20
Package and PCB thermal data VNN1NV04P-E, VNS1NV04P-E
Figure 36. SO-8 thermal impedance junction ambient single pulse
ZTH (°C/ W)
1000
100
10
1
0,1
0,0001 0,001 0,01 0,1 1 10 100 1000
Time (s)
Equation 2: pulse calculation formula
Z
THδ
where δ = t
R
TH
P
δ Z
/T
THtp
1 δ–()+⋅=
Figure 37. SO-8 thermal fitting model of a single channel
Footprint
2 cm
2
Table 6. SO-8 thermal parameter
Area/island (cm2)FP2
R1 (°C/W) 0.8
R2 (°C/W) 2.6
R3 (°C/W) 3.5
R4 (°C/W) 21
20/28 Doc ID 15586 Rev 2
Page 21
VNN1NV04P-E, VNS1NV04P-E Package and PCB thermal data
Table 6. SO-8 thermal parameter (continued)
Area/island (cm2)FP2
R5 (°C/W) 16
R6 (°C/W) 58 28
C1 (W·s/°C) 0.00006
C2 (W·s/°C) 0.0005
C3 (W·s/°C) 0.0075
C4 (W·s/°C) 0.045
C5 (W·s/°C) 0.35
C6 (W·s/°C) 1.05 2
Doc ID 15586 Rev 2 21/28
Page 22
Package and packing information VNN1NV04P-E, VNS1NV04P-E
5 Package and packing information
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK
®
packages, depending on their level of environmental compliance. ECOPACK
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK
®
is an ST trademark.
5.1 SOT-223 mechanical data
Figure 38. SOT-223 mechanical data and package outline
®
22/28 Doc ID 15586 Rev 2
Page 23
VNN1NV04P-E, VNS1NV04P-E Package and packing information
5.2 SO8 mechanical data
Table 7. SO-8 mechanical data
mm
Dim.
Min. Typ. Max.
A 1.75
A1 0.10 0.25
A2 1.25
b 0.28 0.48
c 0.17 0.23
(1)
D
E 5.80 6.00 6.20
(2)
E1
e 1.27
h 0.25 0.50
L 0.40 1.27
L1 1.04
k 0° 8°
4.80 4.90 5.00
3.80 3.90 4.00
ccc 0.10
1. Dimension “D” does not include mold flash, protrusions or gate burrs. Mold flash, protrusions or gate burrs
shall not exceed 0.15 mm in total (both side).
2. Dimension “E1” does not include interlead flash or protrusions. Interlead flash or protrusions shall not
exceed 0.25 mm per side.
Doc ID 15586 Rev 2 23/28
Page 24
Package and packing information VNN1NV04P-E, VNS1NV04P-E
Figure 39. SO-8 package dimension
0016023 D
24/28 Doc ID 15586 Rev 2
Page 25
VNN1NV04P-E, VNS1NV04P-E Package and packing information
5.3 SOT-223 packing information
Figure 40. SOT-223 tape and reel shipment (suffix “TR”)
Reel dimensions
Base Q.ty 1000
Bulk Q.ty 1000
A (max) 330
B (min) 1.5
C (± 0.2) 13
F 20.2
G (+ 2 / -0) 12.4
N (min) 60
T (max) 18.4
Tape dimensions
According to Electronic Industries Association
(EIA) Standard 481 rev. A, Feb. 1986
Tape width W 12
Tape Hole Spacing P0 (± 0.1) 4
Component Spacing P 8
Hole Diameter D (+ 0.1/-0) 1.5
Hole Diameter D1 (min) 1.5
Hole Position F (± 0.05) 5.5
Compartment Depth K (max) 4.5
Hole Spacing P1 (± 0.1) 2
All dimensions are in mm.
End
Start
Top
cover
tape
500mm min
Empty components pockets
saled with cover tape.
User direction of feed
No componentsNo components Components
500mm min
Doc ID 15586 Rev 2 25/28
Page 26
Package and packing information VNN1NV04P-E, VNS1NV04P-E
5.4 SO8 packing information
Figure 41. SO-8 tube shipment (no suffix)
B
C
Base Q.ty 100
Bulk Q.ty 2000
Tube length (± 0.5) 532
A
A 3.2
B 6
C (± 0.1) 0.6
All dimensions are in mm.
Figure 42. SO-8 tape and reel shipment (suffix “TR”)
TAPE DIMENSIONS
According to Electronic Industries Association
(EIA) Standard 481 rev. A, Feb. 1986
Tape width W 12
Tape Hole Spacing P0 (± 0.1) 4
Component Spacing P 8
Hole Diameter D (+ 0.1/-0) 1.5
Hole Diameter D1 (min) 1.5
Hole Position F (± 0.05) 5.5
Compartment Depth K (max) 4.5
Hole Spacing P1 (± 0.1) 2
All dimensions are in mm.
End
REEL DIMENSIONS
Base Q.ty 2500
Bulk Q.ty 2500
A (max) 330
B (min) 1.5
C (± 0.2) 13
F 20.2
G (+ 2 / -0) 12.4
N (min) 60
T (max) 18.4
All dimensions are in mm.
26/28 Doc ID 15586 Rev 2
Top
cover
tape
500mm min
Empty components pockets
saled with cover tape.
User direction of feed
Start
No componentsNo components Components
500mm min
Page 27
VNN1NV04P-E, VNS1NV04P-E Revision history
6 Revision history
Table 8. Document revision history
Date Revision Changes
16-May-2009 1 Initial release.
29-Sep-2009 2 Removed target specification on cover page.
Doc ID 15586 Rev 2 27/28
Page 28
VNN1NV04P-E, VNS1NV04P-E
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28/28 Doc ID 15586 Rev 2
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