The VNQ600 is a quad HSD formed by
assembling two VND600 chips in the same SO-28
package. The VNQ600 is a monolithic device
designed in| STMicroelectronics VIPower M0-3
Technology. The VNQ600 is intended for driving
any type of multiple loads with one side
connected to ground.
This device has four independent channels and
four analog sense outputs which deliver currents
proportional to the outputs currents.
Active current limitation combined with thermal
shutdown and automatic restart protect the device
against overload. Device automatically turns off in
case of ground pin disconnection.
Table 2.Suggested connections for unused and not connected pins
14
Connection / pinCurrent senseN.C.OutputInput
FloatingXXX
To ground
Through 1KΩ
resistor
X
Through 10KΩ
resistor
6/26
Page 7
VNQ600Electrical specifications
2 Electrical specifications
2.1 Absolute maximum ratings
Stressing the device above the rating listed in the “Absolute maximum ratings” table may
cause permanent damage to the device. These are stress ratings only and operation of the
device at these or any other conditions above those indicated in the Operating sections of
this specification is not implied. Exposure to Absolute Maximum Rating conditions for
extended periods may affect device reliability. Refer also to the STMicroelectronics SURE
Program and other relevant quality document.
Table 3.Absolute maximum rating
SymbolParameterValueUnit
V
-V
I
OUT
I
I
V
CSENSE
I
GND
V
ESD
E
MAX
P
T
T
Supply voltage (continuous)41V
CC
Reverse supply voltage (continuous)-0.3V
CC
Output current (continuous), for each channel 15A
Reverse output current (continuous), for each channel-15A
R
Input current +/- 10mA
IN
Current sense maximum voltage
Ground current at T
< 25 °C (continuous)-200mA
pins
-3
+15
Electrostatic discharge
(Human Body Model: R=1.5KΩ; C=100pF)
1. When mounted on a standard single-sided FR-4 board with 0.5cm2 of Cu (at least 35 µm thick) connected
to all V
2. When mounted on a standard single-sided FR-4 board with 6cm2 of Cu (at least 35 µm thick) connected to
all V
pins. Horizontal mounting and no artificial air flow.
CC
pins. Horizontal mounting and no artificial air flow.
CC
2.3 Electrical characteristics
Values specified in this section are for 8V<VCC<36V; -40°C< Tj <150°C, unless otherwise
stated.
Figure 3.Current and voltage conventions
I
S3,4
V
CC3,4
I
IN1
V
SENSE3
I
SENSE1
I
IN2
I
SENSE2
I
IN3
I
SENSE3
I
IN4
I
SENSE4
V
IN4
V
STAT4
V
IN1
V
SENSE1
V
IN2
V
SENSE2
V
IN3
V
CC3,4
INPUT1
CUR. SENSE1
INPUT2
CUR. SENSE2
INPUT3
CUR. SENSE3
INPUT4
CUR. SENSE4
GND
3,4
I
GND3,4
V
CC1,2
OUTPUT1
OUTPUT2
OUTPUT3
OUTPUT4
GND
(1)
60
(1)
46
V
F1
I
OUT1
I
OUT2
I
OUT3
V
OUT3
I
OUT4
V
OUT4
1,2
I
GND1,2
I
V
S1,2
OUT2
45
31
(2)
(2)
V
OUT1
V
°C/W
°C/W
CC1,2
Note:V
Fn
= V
CCn
- V
during reverse battery condition.
OUTn
8/26
Page 9
VNQ600Electrical specifications
Table 5.Power
SymbolParameterTest conditionsMin.Typ. Max.Unit
V
V
USD
V
R
V
clamp
I
I
L(off1)
I
L(off2)
I
L(off3)
I
L(off4)
Operating supply voltage5.51336V
CC
Undervoltage shutdown345.5V
Overvoltage shutdown36V
OV
I
1,2,3,4=5A; Tj=25°C
OUT
On state resistance
ON
I
1,2,3,4=5A; Tj=150°C
OUT
1,2,3,4=3A; V
I
OUT
CC
=6V
Clamp voltageICC=20mA 414855V
Off State; VCC=13V;
12
12
Supply current
S
Off state output currentVIN=V
Off state output currentVIN=0V; V
Off state output current
Off state output current
VIN=V
OUT
Off State; V
VIN=V
OUT
=25°C
T
j
On State; V
I
=0A; R
OUT
OUT
VIN=V
OUT
=125°C
T
j
VIN=V
OUT
=25°C
T
j
=0V
=13V;
CC
=0V;
=13V; VIN=5V;
CC
=3.9KΩ
SENSE
=0V050µA
=3.5V-750µA
OUT
=0V; VCC=13V;
=0V; VCC=13V;
35
mΩ
70
mΩ
120
40
25
mΩ
µA
µA
mA
6
5µA
3µA
Note:V
and VOV are correlated. Typical difference is 5V.
clamp
Table 6.Protections
SymbolParameterTest conditionsMin.Typ. Max.Unit
I
T
T
T
V
demag
V
=13V
DC Short circuit
lim
current
V
CC
5.5V<VCC<36V
Thermal shutdown
TSD
temperature
Thermal reset
R
temperature
Thermal hysteresis715°C
hyst
Turn-off output
voltage clamp
Output voltage drop
ON
limitation
=2A; L=6mHVCC-41VCC-48 VCC-55V
I
OUT
=0.5A; Tj= -40°C...+150°C50mV
I
OUT
254070
70
A
A
150175200°C
135°C
Note:To ensure long term reliability under heavy overload or short circuit conditions, protection
and related diagnostic signals must be used together with a proper software strategy. If the
device is subjected to abnormal conditions, this software must limit the duration and number
of activation cycles.
9/26
Page 10
Electrical specificationsVNQ600
.
Table 7.Switching (VCC=13V; Tj=25°C)
SymbolParameterTest conditionsMin.Typ.Max. Unit
RL=2.6Ω channels 1,2,3,4
(see Figure 5)
RL=2.6Ω channels 1,2,3,4
(see Figure 5)
RL=2.6Ω channels 1,2,3,4
(see Figure 5)
RL=2.6Ω channels 1,2,3,4
(see Figure 5)
40µs
40µs
See
Figure 10
See
Figure 12
t
d(on)
t
d(off)
(dV
/dt)onTurn-on voltage slope
OUT
/dt)
(dV
OUT
Turn-on delay time
Turn-off delay time
Turn-off voltage slope
off
Table 8.Current sense (9V< VCC< 16V)
SymbolParameterTest conditionsMin.Typ.Max.Unit
I
K
dK
1/K1
K
dK2/K
K
dK
3/K3
V
SENSE1,2
V
SENSEH
I
1
OUT/ISENSE
Current sense ratio
drift
I
2
OUT/ISENSE
Current sense ratio
2
drift
I
3
OUT/ISENSE
Current sense ratio
drift
Max analog sense
output voltage
Analog sense output
voltage in
overtemperature
condition
or I
OUT1
V
SENSE
open; Tj= -40°C...150°C
or I
I
OUT1
V
SENSE
open; Tj= -40°C...150°C
I
or I
OUT1
other channels open;
=-40°C
T
j
=25°C...150°C
T
j
or I
I
OUT1
V
SENSE
open;
=-40°C...150°C
T
j
I
or I
OUT1
other channels open;
=-40°C
T
j
=25°C...150°C
T
j
I
or I
OUT1
other channels open;
=-40°C...150°C
T
j
V
=5.5V; I
CC
R
SENSE
VCC>8V, I
R
SENSE
= 13V; R
V
CC
=0.5A;
OUT2
=0.5V; other channels
=0.35A;
OUT2
=0.5V; other channels
OUT2
OUT2
=5A; V
=2A;
SENSE
=4V;
=2.5V; other channels
OUT2
OUT2
=15A; V
=15A; V
OUT1,2
=2.5A;
SENSE
SENSE
=4V;
=4V;
=10kΩ
=5A;
OUT1,2
=10kΩ
= 3.9kΩ5.5V
SENSE
330044006000
-10+10%
4200
4400
4900
4900
6000
5750
-6+6%
4200
4400
4900
4900
5500
5250
-6+6%
2
4
V/ µs
V/ µs
V
V
10/26
Page 11
VNQ600Electrical specifications
Table 8.Current sense (9V< VCC< 16V) (continued)
SymbolParameterTest conditionsMin.Typ.Max.Unit
Analog sense output
R
VSENSEH
Impedance in
overtemperature
condition
=13V; Tj>T
V
CC
All channels open
TSD
;
400Ω
t
DSENSE
1. Current sense signal delay after positive input slope.
Table 9.Logic inputs
Current sense delay
response
To 9 0% I
SENSE
(1)
500µs
SymbolParameterTest conditionsMin.Typ.Max.Unit
V
V
V
I(hyst)
I
I
V
Table 10.VCC - output diode
Low level input voltage1.25V
IL
High level input voltage3.25V
IH
Input hysteresis voltage0.5V
Input currentVIN=1.5V1µA
IL
Input currentVIN=3.5V10µA
IN
Input clamp voltage
ICL
IIN=1mA
= -1mA
I
IN
66.8
-0.7
8V
SymbolParameterTest conditionsMin.Typ. Max.Unit
V
F
Forward on voltage-I
=2.30A; Tj=150°C0.6V
OUT
V
Figure 4.I
I
OUT/ISENSE
6500
6000
5500
5000
4500
4000
3500
3000
OUT/ISENSE
versus I
OUT
max.Tj=-40°C
max.Tj=25...150°C
min.Tj=25...150°C
typical value
min.Tj=-40°C
0246810121416
I
(A)
OUT
11/26
Page 12
Electrical specificationsVNQ600
Figure 5.Switching characteristics
V
OUT
dV
/dt
OUT
(on)
I
SENSE
INPUT
Table 11.Truth table
t
d(on)
80%
90%
t
DSENSE
90%
dV
/dt
OUT
(off)
t
r
10%
t
d(off)
t
f
t
t
t
ConditionsInputOutputSense
Normal operation
Overtemperature
Undervoltage
Overvoltage
Short circuit to GND
Short circuit to V
CC
Negative output voltage
clamp
L
H
L
H
L
H
L
H
L
H
H
L
H
LL0
L
H
L
L
L
L
L
L
L
L
L
H
H
(Tj>T
0
Nominal
0
V
SENSEH
0
0
0
0
0
(T
j<TTSD
) V
TSD
0
< Nominal
) 0
SENSEH
12/26
Page 13
VNQ600Electrical specifications
Table 12.Electrical transient requirements
ISO T/R
7637/1
Test levelsITest levelsIITest levels
Tes t pul se
1-25V-50V-75V-100V2ms, 10Ω
2+25V+50V+75V+100V0.2ms, 10Ω
3a-25V-50V-100V-150V0.1µs, 50Ω
3b+25V+50V+75V+100V0.1µs, 50Ω
4-4V-5V-6V-7V100ms, 0.01Ω
5+26.5V+46.5V+66.5V+86.5V400ms, 2Ω
ISO T/R
7637/1
Test levels resultITest levels resultIITest levels result
Tes t pul se
1C C C C
2C C C C
3aCCCC
3bCCCC
4C C C C
5C E E E
ClassContents
C
E
All functions of the device are performed as designed after exposure to
disturbance.
One or more functions of the device is not performed as designed after exposure
and cannot be returned to proper operation without replacing the device.
Test levels
III
IV
Test levels
delays and impedance
Test levels result
III
IV
13/26
Page 14
Electrical specificationsVNQ600
Figure 6.Waveforms
NORMAL OPERATION
INPUT
n
LOAD CURRENT
SENSE
n
V
CC
INPUT
n
LOAD CURRENT
SENSE
n
V
CC
INPUT
n
LOAD CURRENT
SENSE
n
n
UNDERVOLTAGE
V
USDhyst
V
USD
n
OVERVOLTAGE
V
OV
VCC < V
OV
n
VCC > V
OV
INPUT
n
LOAD CURRENT
LOAD VOLTAGE
SENSE
n
INPUT
n
LOAD VOLTAGE
LOAD CURRENT
SENSE
n
T
j
INPUT
n
LOAD CURRENT
SENSE
n
SHORT TO GROUND
n
n
SHORT TO V
n
n
<Nominal
T
TSD
T
R
n
OVERTEMPERATURE
CC
<Nominal
I
SENSE
=
V
SENSEH
R
SENSE
14/26
Page 15
VNQ600Electrical specifications
2.4 Electrical characteristics curves
Figure 7.Off state output currentFigure 8.High level input current
IL(o ff1) (u A)
5
4.5
4
3.5
3
2.5
2
1.5
1
0.5
0
Off state
Vcc=36V
Vin=Vout=0V
-50 -25025 50 75 100 125 150 175
Tc (°C)
Iih (uA )
5
4.5
Vi n=3. 25V
4
3.5
3
2.5
2
1.5
1
0.5
0
-50 -2502550 75 100 125 150 175
Tc (°C )
Figure 9.Input clamp voltageFigure 10. Turn-on voltage slope
Vicl (V)
8
7.8
7.6
7.4
7.2
6.8
6.6
6.4
6.2
Ii n =1m A
7
6
-50 -250255075 100 125 150 175
Tc (°C )
Figure 11. Overvoltage shutdownFigure 12. Turn-off voltage slope
Vov (V)
50
48
46
44
42
40
38
36
34
32
30
-50 -25025 5075 100 125 150 175
Tc (°C )
15/26
Page 16
Electrical specificationsVNQ600
Figure 13. I
vs T
LIM
case
Ilim (A)
20
18
16
14
12
10
Vcc=13V
8
6
4
2
0
-50 -25025 5075 100 125 150 175
Tc (°C )
Figure 14. On state resistance vs V
Ron (mOhm)
80
70
60
50
40
30
20
10
0
5 10152025303540
Io u t =5 A
Tc = 150°C
Tc = 25°C
Tc= - 40°C
Vcc (V)
Figure 15. Input high levelFigure 16. Input hysteresis voltage
Vih (V)
3.6
3.4
3.2
3
2.8
2.6
2.4
2.2
2
-50 -250255075 100 12 5 150 175
Tc (°C)
Vhyst (V)
1.5
1.4
1.3
1.2
1.1
1
0.9
0.8
0.7
0.6
0.5
-50 -250255075 100 12 5 150 175
Tc (°C)
Figure 17. On state resistance vs TcaseFigure 18. Input low level
CC
Ron (mOhm)
100
90
80
70
60
50
40
30
20
10
0
Io u t=5 A
Vc c=8V & 36V
-75 -50 -25 0 25 50 75 100 125 150 175
Tc (°C)
16/26
Vil (V)
2.6
2.4
2.2
2
1.8
1.6
1.4
1.2
1
-50 -25025 50 75 100 125 150 175
Tc (°C )
Page 17
VNQ600Application information
3 Application information
Figure 19. Application schematic
+5V
R
prot
R
prot
R
prot
µ
C
R
prot
R
prot
R
prot
R
prot
R
prot
INPUT1
C. SENSE 1
INPUT2
C. SENSE 2
INPUT3
C. SEN SE 3
INPUT4
C. SENSE 4
GND1,2
V
CC1,2
V
OUTPUT1
OUTPUT2
OUTPUT3
OUTPUT4
GND3,4
CC3,4
D
ld
R
SENSE1,2,3,4
R
V
GND
GND
D
GND
Note:Channels 3 & 4 have the same internal circuit as channel 1 & 2.
3.1 GND protection network against reverse battery
This section provides two solutions for implementing a ground protection network against
reverse battery.
3.1.1 Solution 1: a resistor in the ground line (R
This can be used with any type of load.
The following show how to dimension the R
1.R
2. R
where -I
≤ 600mV / 2(I
GND
≥ (−VCC) / (-I
GND
is the DC reverse ground pin current and can be found in the absolute
GND
S(on)max
GND
)
)
maximum rating section of the device datasheet.
Power dissipation in R
P
= (-VCC)2/R
D
GND
(when VCC<0 during reverse battery situations) is:
GND
GND
resistor:
GND
only)
17/26
Page 18
Application informationVNQ600
This resistor can be shared amongst several different HSDs. Please note that the value of
this resistor should be calculated with formula (1) where I
S(on)max
becomes the sum of the
maximum on-state currents of the different devices.
Please note that, if the microprocessor ground is not shared by the device ground, then the
R
will produce a shift (I
GND
S(on)max
* R
) in the input thresholds and the status output
GND
values. This shift will vary depending on how many devices are ON in the case of several
high side drivers sharing the same R
GND
.
If the calculated power dissipation requires the use of a large resistor, or several devices
have to share the same resistor, then ST suggests using solution 2 below.
3.1.2 Solution 2: a diode (D
) in the ground line
GND
A resistor (RGND=1kΩ) should be inserted in parallel to DGND if the device will be driving
an inductive load. This small signal diode can be safely shared amongst several different
HSD. Also in this case, the presence of the ground network will produce a shift (j600mV) in
the input threshold and the status output values if the microprocessor ground is not common
with the device ground. This shift will not vary if more than one HSD shares the same
diode/resistor network. Series resistor in INPUT and STATUS lines are also required to
prevent that, during battery voltage transient, the current exceeds the Absolute Maximum
Rating. Safest configuration for unused INPUT and STATUS pin is to leave them
unconnected.
3.2 Load dump protection
Dld is necessary (Voltage Transient Suppressor) if the load dump peak voltage exceeds the
V
maximum DC rating. The same applies if the device is subject to transients on the VCC
CC
line that are greater than those shown in the ISO T/R 7637/1 table.
3.3 MCU I/O protection
If a ground protection network is used and negative transients are present on the VCC line,
the control pins will be pulled negative. ST suggests to insert a resistor (R
prevent the µC I/O pins from latching up.
) in line to
prot
The value of these resistors is a compromise between the leakage current of µC and the
current required by the HSD I/Os (Input levels compatibility) with the latch-up limit of µC
I/Os:
-V
CCpeak/Ilatchup
≤ R
prot
≤ (V
OHµC-VIH-VGND
Example
For the following conditions:
V
I
latchup
V
5kΩ ≤ R
Recommended values are:
R
18/26
CCpeak
OHµC
=10kΩ
prot
= - 100V
≥ 20mA
≥ 4.5V
≤ 65kΩ.
prot
) / I
IHmax
Page 19
VNQ600Application information
3.4 Maximum demagnetization energy (VCC = 13.5V)
Figure 20. Maximum turn-off current versus load inductance
LMAX (A)
I
100
A
B
C
10
1
0.0010.010.1110100
L(mH)
A = Single Pulse at T
Jstart
B= Repetitive pulse at T
C= Repetitive Pulse at T
VIN, I
L
Demagnetization
Note:Values are generated with R
In case of repetitive pulses, T
must not exceed the temperature specified above for curves B and C.
=150ºC
=100ºC
Jstart
=125ºC
Jstart
Demagnetization
=0Ω.
L
(at beginning of each demagnetization) of every pulse
jstart
Demagnetization
t
19/26
Page 20
Package and PCB thermal dataVNQ600
4 Package and PCB thermal data
4.1 SO-28 thermal data
Figure 21. SO-28 PC board
Note:Layout condition of R
thickness=2mm, Cu thickness=35µm, Copper areas: 0.5 cm
Table 13.Thermal calculation according to the PCB heatsink area
Chip 1 Chip 2T
ONOFFR
OFFONR
ONON
ONON
= Thermal resistance Junction to Ambient with one chip ON
R
thA
R
= Thermal resistance Junction to Ambient with both chips ON and P
thB
R
= Mutual thermal resistance
thC
R
T
(R
P
amb
thA
thC
thB
dchip2
and Zth measurements (PCB FR4 area= 58mm x 58mm, PCB
thA
th
x P
x P
x (P
x P
+ T
dchip1
dchip2
dchip1
dchip1
amb
jchip1
+ T
+ T
+ P
) + R
amb
amb
dchip2
thC
x
) +
R
thC
R
thA
R
thB
T
amb
(R
P
dchip1
thA
x P
x P
x (P
x P
+ T
dchip1
dchip2
dchip1
dchip2
amb
2
, 3 cm2, 6 cm2).
T
jchip2
+ T
amb
+ T
amb
+ P
dchip2
) + R
thC
x
) +
dchip1=Pdchip2
P
dchip1=Pdchip2
P
dchip1≠Pdchip2
Note
20/26
Page 21
VNQ600Package and PCB thermal data
j
Figure 22. R
_am b
RTH
(°C /W)
70
60
50
40
30
20
10
012345 67
Vs PCB copper area in open box free air condition
thj-amb
PCB Cu heatsink area (cm^2)/is land
Figure 23. Thermal impedance junction ambient single pulse
Zth(°C /W)
100
10
1
0.1
0.01
0.00010.0010.010.11101001000
time(s )
0,5 c m ^2/is land
3 cm ^2/is land
6 cm ^2/is land
One channel ON
Two channels
ON on same chip
21/26
Page 22
Package and PCB thermal dataVNQ600
Equation 1: pulse calculation formula
Z
where
THδ
R
δtpT⁄=
TH
δ Z
THtp
1 δ–()+⋅=
Figure 24. Thermal fitting model of a quad channel HSD in SO-28
Tj_1
Pd1
Tj_2
Pd2
Tj_3
Pd3
Tj_4
Pd4
C1
C13C14
R13
C7
C15C16
R15
R14
R16
C8
R8
C3C4
R3R1R6R5R2
R17
C9
R9R7
R18
C10
C5C6C2
R4
C11C12
R10
R12R11
Table 14.Thermal parameters
Area/island (cm2)0.56
R1=R7=R13=R15 (°C/W)0.05
R2=R8=R14=R16 (°C/W)0.3
R3=R9 (°C/W)3.4
R4=R10 (°C/W)11
R5=R11 (°C/W)15
R6=R12 (°C/W)3013
C1=C7=C13=C15 (W.s/°C)0.001
C2=C8=C14=C16 (W.s/°C)5.00E-03
C3=C9 (W.s/°C)1.00E-02
C4=C10 (W.s/°C)0.2
C5=C11 (W.s/°C)1.5
C6=C12 (W.s/°C)58
R17=R18 (°C/W)150
T_amb
22/26
Page 23
VNQ600Package and packing information
5 Package and packing information
5.1 ECOPACK® packages
In order to meet environmental requirements, ST offers these devices in ECOPACK®
packages. These packages have a Lead-free second-level interconnect. The category of
Second-Level Interconnect is marked on the package and on the inner box label, in
compliance with JEDEC Standard JESD97. The maximum ratings related to soldering
conditions are also marked on the inner box label.
ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com.
Figure 25. SO-28 package dimensions
Table 15.SO-28 mechanical data
Symbol
Min.Typ.Max.
A2.65
a10.100.30
b0.350.49
b10.230.32
C0.50
c145° (typ.)
D17.718.1
E10.0010.65
e1.27
e316.51
F7.407.60
L0.401.27
S8° (max.)
Millimeters
23/26
Page 24
Package and packing informationVNQ600
5.2 SO-28 packing information
Figure 26. SO-28 tube shipment (no suffix)
Base Q.ty28
Bulk Q.ty700
Tube length (± 0.5)532
A3.5
C
B
A
Figure 27. SO-28 tape and reel shipment (suffix “TR”)
B13.8
C (± 0.1)0.6
All dimensions are in mm.
Reel dimensions
Tape dimensions
According to Electronic Industries Association
(EIA) Standard 481 rev. A, Feb. 1986
11-Nov-200810Document converted to corporate template.
Added Table 2: Suggested connections for unused and not
connected pins.
2
Cu condition.
- output diode.
CC
25/26
Page 26
VNQ600
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