Datasheet VNQ5E160AK-E Datasheet (ST)

Page 1
Quad channel high side driver with analog current sense
Features
Max supply voltage V
Operating voltage range V
Max on-state resistance (per ch.) R
Current limitation (typ) I
Off state supply current I
1. Typical value with all loads connected.
■ General
power limitation – Very low stand-by current – 3.0 V CMOS compatible inputs – Optimized electromagnetic emissions – Very low electromagnetic susceptibility – In compliance with the 2002/95/EC
european directive – Very low current sense leakage
■ Diagnostic functions
– Proportional load current sense – High current sense precision for wide
currents range – Current sense disable – Off state openload detection – Output short to Vcc detection – Thermal shutdown indication – Overload and short to ground (power
limitation) indication
■ Protections
– Undervoltage shutdown – Overvoltage clamp – Load current limitation – Self limiting of fast thermal transients – Protection against loss of ground and loss
of V
CC
– Over-temperature shutdown with
autorestart (thermal shutdown) – Reverse battery protected (see Figure 32)
CC
CC
ON
LIMH
S
4.5 to 28 V
160 mΩ
2 µA
41V
10 A
(1)
VNQ5E160AK-E
for automotive applications
PowerSSO-24
– Electrostatic discharge protection
Application
■ All types of resistive, inductive and capacitive
loads
■ Suitable as LED driver
Description
The VNQ5E160AK-E is a double channel high­side driver manufactured in the ST proprietary VIPower M0-5 technology and housed in the tiny PowerSSO-24 package. The VNQ5E160AK-E is designed to drive 12V automotive grounded loads delivering protection, diagnostics and easy 3V and 5V CMOS compatible interface with any microcontroller.
The device integrates advanced protective functions such as load current limitation, inrush and overload active management by power limitation, over-temperature shut-off with auto-restart and over-voltage active clamp. A dedicated analog current sense pin is associated with every output channel in order to provide Ehnanced diagnostic functions including fast detection of overload and short-circuit to ground through power limitation indication, over­temperature indication, short-circuit to Vcc diagnosis and on & off state open load detection.
The current sensing and diagnostic feedback of the whole device can be disabled by pulling the CS_DIS pin high to allow sharing of the external sense resistor with other similar devices.
March 2009 Rev 2 1/37
www.st.com
1
Page 2
Contents VNQ5E160AK-E
Contents
1 Block diagram and pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2 Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.4 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
2.5 Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
3 Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
3.1 GND protection network against reverse battery . . . . . . . . . . . . . . . . . . . 24
3.1.1 Solution 1 : resistor in the ground line (RGND only) . . . . . . . . . . . . . . . 24
3.1.2 Solution 2 : diode (DGND) in the ground line . . . . . . . . . . . . . . . . . . . . 25
3.2 Load dump protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
3.3 MCU I/Os protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
3.4 Current sense and diagnostic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
3.4.1 Short to VCC and off state open load detection . . . . . . . . . . . . . . . . . . 27
3.5 Maximum demagnetization energy (VCC = 13.5V) . . . . . . . . . . . . . . . . . 28
4 Package and PC board thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
4.1 PowerSSO-24 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
5 Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
5.1 ECOPACK® . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
5.2 PowerSSO-24 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
5.3 Packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
6 Order codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
7 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
2/37
Page 3
VNQ5E160AK-E List of tables
List of tables
Table 1. Pin functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Table 2. Suggested connections for unused and not connected pins . . . . . . . . . . . . . . . . . . . . . . . . 6
Table 3. Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Table 4. Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Table 5. Power section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Table 6. Switching (VCC = 13V; Tj = 25°C) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Table 7. Logic Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Table 8. Protections and diagnostics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Table 9. Current sense (8V<V Table 10. Openload detection (8V<V
Table 11. Truth table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Table 12. Electrical transient requirements (part 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Table 13. Electrical transient requirements (part 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Table 14. Electrical transient requirements (part 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Table 15. Thermal parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Table 16. PowerSSO-24 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
Table 17. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
Table 18. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
<18V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
CC
<18V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
CC
3/37
Page 4
List of figures VNQ5E160AK-E
List of figures
Figure 1. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Figure 2. Configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Figure 3. Current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Figure 4. Current sense delay characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 5. Openload off-state delay timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 6. Switching characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 7. Delay response time between rising edge of ouput current and rising edge of current sense
(CS enabled). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 8. Output voltage drop limitation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 9. Iout/ Isense vs. Iout. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 10. Maximum current sense ratio drift vs load current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 11. Normal operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 12. Overload or short to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 13. Intermittent overload . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 14. Off-state open load with external circuitry. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 15. Short to V Figure 16. T
evolution in overload or short to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
J
Figure 17. Off state output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 18. High level input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 19. Input clamp voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 20. Input low level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 21. Input high level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 22. Input hysteresis voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 23. On state resistance vs. T Figure 24. On state resistance vs. V
Figure 25. Undervoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Figure 26. Turn-on voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Figure 27. I
LIMH
vs. T
Figure 28. Turn-off voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Figure 29. CS_DIS high level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Figure 30. CS_DIS clamp voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Figure 31. CS_DIS low level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Figure 32. Application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Figure 33. Current sense and diagnostic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Figure 34. Maximum turn-off current versus inductance (for each channel) . . . . . . . . . . . . . . . . . . . . 28
Figure 35. PowerSSO-24 PC board. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Figure 36. Rthj-amb vs. PCB copper area in open box free air condition (one channel ON). . . . . . . . 29
Figure 37. PowerSSO-24 thermal impedance junction ambient single pulse (one channel ON). . . . . 30
Figure 38. Thermal fitting model of a double channel hsd in PowerSSO-24 . . . . . . . . . . . . . . . . . . . 30
Figure 39. PowerSSO-24 package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
Figure 40. PowerSSO-24 tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
Figure 41. PowerSSO-24 tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
CC
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
case
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
CC
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
case
4/37
Page 5
VNQ5E160AK-E Block diagram and pin configuration

1 Block diagram and pin configuration

Figure 1. Block diagram

V
CC
Signal Clamp
Undervoltage
IN1
IN2
IN3
IN4
CS_ DIS
CS1
CS2
CS3
CS4

Table 1. Pin functions

LOGIC
Control & Diagnostic 1
DRIVER
Over
temp.
V
SENSEH
(ACTIVE POWER LIMITATION)
Current
Limitation
Current
Sense
OVERLOAD PROTECTION
Power Clamp
V
ON
Limitation
OFF State Open load
CH 1
Channels 2, 3 & 4
CONTROL & DIAGNOSTIC
CH 2
GND
Name Function
V
CC
OUTPUT
GND
INPUT
n
CURRENT
SENSE
n
Battery connection
Power output
n
Ground connection. Must be reverse battery protected by an external diode/resistor network
Voltage controlled input pin with hysteresis, CMOS compatible. Controls output switch state
Analog current sense pin, delivers a current proportional to the load current
CS_DIS Active high CMOS compatible pin, to disable the current sense pin
CH 4
CH 3
OUT4
OUT3
OUT2
OUT1
5/37
Page 6
Block diagram and pin configuration VNQ5E160AK-E

Figure 2. Configuration diagram (top view)

V
CC
GND
INPUT1
CURRENT SENSE1
INPUT2
CURRENT SENSE2
INPUT3
CURRENT SENSE3
INPUT4
CURRENT SENSE4
CS_DIS.
V
CC
OUTPUT1 OUTPUT1 OUTPUT1 OUTPUT2 OUTPUT2 OUTPUT2 OUTPUT3 OUTPUT3 OUTPUT3 OUTPUT4 OUTPUT4 OUTPUT4
TAB = V
CC

Table 2. Suggested connections for unused and not connected pins

Connection / pin Current Sense N.C. Output Input CS_DIS
Floating Not allowed X X X X
To ground
Through 1 kΩ
resistor
X Not allowed
Through 10
kΩ resistor
Through 10 kΩ
resistor
6/37
Page 7
VNQ5E160AK-E Electrical specifications

2 Electrical specifications

Figure 3. Current and voltage conventions

I
S
V
V
CSD
CC
I
CSD
I
INn
V
INn
CS_DIS
INPUTn
GND
OUTPUTn
CURRENT S
ENSEn
I
GND
I
SENSEn
V
SENSEn
V
Fn
I
OUTn
V
OUTn
V
CC
Note: V
Fn
= V
- VCC during reverse battery condition.
OUTn

2.1 Absolute maximum ratings

Stressing the device above the rating listed in the “Absolute maximum ratings” table may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the operating sections of this specification is not implied. Exposure to the conditions in table below for extended periods may affect device reliability. Refer also to the STMicroelectronics SURE Program and other relevant quality document.

Table 3. Absolute maximum ratings

Symbol Parameter Value Unit
V
-V
-I
GND
I
OUT
-I
I
CSD
-I
CSENSE
V
CSENSE
E
DC supply voltage 41 V
CC
Reverse DC supply voltage 0.3 V
CC
DC reverse ground pin current 200 mA
DC output current Internally limited A
Reverse DC output current 6 A
OUT
DC input current -1 to 10 mA
I
IN
DC current sense disable input current -1 to 10 mA
DC reverse CS pin current 200 mA
Current sense maximum voltage
Maximum switching energy (single pulse)
MAX
(L= 12 mH; R
=0Ω; V
L
=13.5V; T
bat
jstart
=150ºC; I
OUT
= I
limL
(Typ.) )
VCC-41
+V
CC
34 mJ
V V
7/37
Page 8
Electrical specifications VNQ5E160AK-E
Table 3. Absolute maximum ratings (continued)
Symbol Parameter Value Unit
Electrostatic discharge (human body model: R= 1.5 KΩ; C= 100 pF)
4000 2000 4000 5000 5000
V V V V V
V
V
ESD
ESD
T
T
- Input
- Current sense
- CS_DIS
- Output
- V
CC
Charge device model (CDM-AEC-Q100-011) 750 V
Junction operating temperature -40 to 150 °C
j
Storage temperature -55 to 150 °C
stg

2.2 Thermal data

Table 4. Thermal data

Symbol Parameter Max. value Unit
R
thj-case
R
thj-amb
Thermal resistance junction-case (max) (with one channel ON)
Thermal resistance junction-ambient (max)
8°C/W
See Figure 36. in the
thermal section
°C/W
8/37
Page 9
VNQ5E160AK-E Electrical specifications

2.3 Electrical characteristics

Values specified in this section are for 8V<VCC<28V, -40°C< Tj <150°C, unless otherwise stated.

Table 5. Power section

Symbol Parameter Test conditions Min. Typ. Max. Unit
V
V
V
USDhyst
R
V
clamp
Operating supply voltage 4.5 13 28 V
CC
Undervoltage shutdown 3.5 4.5 V
USD
Undervoltage shutdown hysteresis
I
= 1A; Tj= 25°C 160
OUT
On state resistance
ON
(2)
= 1A; Tj= 150°C 320
OUT
I
= 1A; VCC= 5V; Tj= 25°C 210
OUT
Clamp voltage IS= 20 mA 41 46 52 V
Off State; V VIN=V
I
S
I
L(off1)
Supply current
Off state output current
(2)
OUT=VSENSE=VCSD
On State; V I
= 0A
OUT
VIN=V
= 0 V; VCC= 13 V;
OUT
Tj= 25°C
V
IN=VOUT
= 0 V; VCC= 13 V;
Tj= 125 °C
V
1. PowerMOS leakage included.
2. For each channel.
Table 6. Switching (VCC=13V; Tj= 25°C)
Output - VCC diode
F
voltage
(2)
-I
=1A; Tj=150°C 0.7 V
OUT
= 13 V; Tj= 25°C;
CC
= 13V; VIN= 5 V;
CC
= 0 V
0.5 V
mΩI
(1)
2
(1)
5
µA
814mA
00.01 3
µA
05
Symbol Parameter Test conditions Min. Typ. Max. Unit
(dV
(dV
t
d(on)
t
d(off)
OUT
OUT
W
W
ON
OFF
Turn-on delay time RL= 13 Ω (see Figure 6.)20 µs
Turn-off delay time RL= 13 Ω (see Figure 6.)10 µs
/dt)onTurn-on voltage slope RL= 13 Ω
/dt)
Turn-off voltage slope RL= 13 Ω
off
Switching energy losses during t
won
Switching energy losses during t
woff
RL= 13 Ω (see Figure 6.)0.05 mJ
RL= 13 Ω (see Figure 6.)0.03 mJ
See
Figure 26.
See
Figure 28.
9/37
V/µs
V/µs
Page 10
Electrical specifications VNQ5E160AK-E

Table 7. Logic Inputs

Symbol Parameter Test conditions Min. Typ. Max. Unit
V
I
IL
V
I
IH
V
I(hyst)
V
ICL
V
CSDL
I
CSDL
V
CSDH
I
CSDH
V
CSD(hyst)
V
CSCL

Table 8. Protections and diagnostics

Input low level voltage 0.9 V
IL
Low level input current VIN= 0.9V 1 µA
Input high level voltage 2.1 V
IH
High level input current VIN= 2.1V 10 µA
Input hysteresis voltage 0.25 V
Input clamp voltage
CS_DIS low level voltage 0.9 V
Low level CS_DIS current V
CS_DIS high level voltage 2.1 V
High level CS_DIS current V
CS_DIS hysteresis voltage 0.25 V
CS_DIS clamp voltage
IIN= 1mA 5.5 7
= -1mA -0.7
I
IN
= 0.9V 1 µA
CSD
= 2.1V 10 µA
CSD
I
= 1mA 5.5 7
CSD
= -1mA -0.7
I
CSD
(1)
V
V
Symbol Parameter Test conditions Min. Typ. Max. Unit
I
limH
I
limL
T
TSD
T
T
RS
T
HYST
V
DEMAG
V
ON
1. To ensure long term reliability under heavy overload or short circuit conditions, protection and related diagnostic signals must be used together with a proper software strategy. If the device is subjected to abnormal conditions, this software must limit the duration and number of activation cycles.
DC short circuit current
Short circuit current during thermal cycling
Shutdown temperature 150 175 200 °C
Reset temperature
R
Thermal reset of STATUS
Thermal hysteresis (T
Turn-off output voltage clamp
TSD-TR
)
I
OUT
Output voltage drop limitation
VCC= 13V
CC
<28V
5V<V
V
= 13V; TR<Tj<T
CC
= 1A; VIN= 0; L= 20mH
I
= 0.03A;
OUT
= -40°C...150°C
T
j
(see Figure 8.)
TSD
7101414A
2.5 A
TRS + 1
TRS + 5
135 °C
7°C
VCC-41
VCC-46 VCC-52
25 mV
A
°C
V
10/37
Page 11
VNQ5E160AK-E Electrical specifications

Table 9. Current sense (8V<VCC<18V)

Symbol Parameter Test conditions Min. Typ. Max. Unit
I
= 0.025 A;
OUT
dK
dK
K
K
1/K1
K
2/K2
I
0
1
2
OUT/ISENSE
I
OUT/ISENSE
(1)
Current sense ratio drift
I
OUT/ISENSE
(1)
Current sense ratio drift
V T
I V T Tj= 25°C...150°C
I V T
I V T T
I V
= 0.5 V; V
SENSE
= -40°C...150°C 330 600 870
j
= 0.35A;
OUT
= 0.5 V; V
SENSE
= -40°C...150°C
j
= 0.35 A;
OUT
= 0.5 V; V
SENSE
= -40°C...150°C
j
= 0.5A;
OUT
=4V; V
SENSE
=-40°C...150°C
j
= 25°C...150°C
j
= 0.5 A;
OUT
= 4 V; V
SENSE
CSD
CSD
CSD
CSD
CSD
= 0 V;
= 0 V;
= 0 V;
= 0 V;
= 0 V;
345
475
395
475
- 12 12 %
375
470
415
470
- 8 8 %
Tj= -40°C...150°C
600 555
565 525
K
dK
3/K3
I
SENSE0
I
OL
V
SENSE
I
3
OUT/ISENSE
(1)
Current sense ratio drift
Analog sense leakage current
Openload on state current detection threshold
Max analog sense output voltage
I
= 1.5 A;
OUT
V T T
I V
= 4 V; V
SENSE
= -40°C...150°C
j
= 25°C...150°C
j
= 1.5 A;
OUT
= 4 V; V
SENSE
Tj= -40°C...150°C
= 0 A; V
I
OUT
V
CSD
= -40°C...150°C
T
j
I
= 0 A; V
OUT
V
CSD
= -40°C...150°C
T
j
I
= 1A; V
OUT
V
CSD
SENSE
= 5 V; VIN= 0 V;
SENSE
= 0 V; VIN= 5 V;
SENSE
= 5V; VIN= 5V;
Tj= -40°C...150°C
VIN = 5V,
I
= 5 µA
SENSE
I
= 1.5 A; V
OUT
CSD
= 0 V;
CSD
425
465
505
435
465
495
CSD
= 0 V;
- 6 6 %
= 0 V;
01
= 0 V;
02
= 0V;
01
15mA
= 0 V 5 V
µA
V
SENSEH
Analog sense output voltage in fault condition
(2)
VCC= 13 V; R
= 3.9 KΩ; 8V
SENSE
11/37
Page 12
Electrical specifications VNQ5E160AK-E
Table 9. Current sense (8V<VCC<18V) (continued)
Symbol Parameter Test conditions Min. Typ. Max. Unit
Analog sense output
I
t
(2)
SENSEH
DSENSE1H
current in fault condition
(2)
Delay response time from falling edge of CS_DIS pin
VCC= 13V; V
V I
<4V, 0.025A<Iout<1.5A
SENSE
=90% of I
SENSE
(see Figure 4)
= 5 V; 9 mA
SENSE
SENSEMAX
40 100 µs
Delay response time
t
DSENSE1L
from rising edge of CS_DIS pin
Delay response time
t
DSENSE2H
from rising edge of INPUT pin
Delay response time
Δt
DSENSE2H
between rising edge of output current and rising edge of current sense
Delay response time
t
DSENSE2L
from falling edge of INPUT pin
1. Parameter guaranteed by design; it is not tested
2. Fault condition includes: power limitation, overtemperature and open load off state detection.

Table 10. Openload detection (8V<VCC<18V)

V I
(see Figure 4)
V I
(see Figure 4.)
V I I I
V I (see Figure 4.)
<4V, 0.025A<Iout<1.5A
SENSE
=10% of I
SENSE
<4V, 0.025A<Iout<1.5A
SENSE
=90% of I
SENSE
<4V,
SENSE
= 90% of I
SENSE
= 90% of I
OUT
OUTMAX
SENSE
=1.5A (see Figure 7)
<4V, 0.025A<Iout<1.5A
SENSE
=10% of I
SENSEMAX
SENSEMAX
SENSEMAX,
OUTMAX
SENSEMAX
520µs
120 300 µs
110 µs
80 250 µs
Symbol Parameter Test conditions Min. Typ. Max. Unit
Openload off state
V
OL
voltage detection
24V
threshold
Output short circuit to
t
DSTKON
detection delay at
V
CC
See Figure 5. 180 1200 µs
turn off
I
L(off2)r
I
L(off2)f
Off state output current at V
OUT
= 4V
Off state output current at V
OUT
= 2V
= 0 V; V
V
IN
rising from 0 V to 4 V
V
OUT
= 0 V; V
V
IN
V
falling from VCC to 2V
OUT
SENSE
SENSE
= 0 V
= V
SENSEH
-120 0 µA
-50 90 µA
Delay response from
= 4 V; VIN= 0 V
td_vol
output rising edge to
SENSE
rising edge in
V openload
V
OUT
V
SENSE
= 90% of V
SENSEH
20 µs
12/37
Page 13
VNQ5E160AK-E Electrical specifications

Figure 4. Current sense delay characteristics

INPUT
CS_DIS
LOAD CURRENT
SENSE CURRENT
t
DSENSE2H
t
DSENSE1L

Figure 5. Openload off-state delay timing

OUTPUT STUCK TO V
V
IN
V
CS

Figure 6. Switching characteristics

V
OUT
t
Won
80%
t
Woff
90%
t
t
DSENSE1H
CC
V
OUT
V
DSTKON
> V
SENSEH
OL
t
DSENSE2L
dV
OUT
INPUT
/dt
(on)
t
d(on)
dV
/dt
OUT
(off)
t
r
10%
t
f
t
t
d(off)
t
13/37
Page 14
Electrical specifications VNQ5E160AK-E
Figure 7. Delay response time between rising edge of ouput current and rising
edge of current sense (CS enabled)
V
IN
Δt
DSENSE2H
t
I
OUT
I
SENSE
90% I
OUTMAX
I
OUTMAX
I
SENSEMAX
t
90% I

Figure 8. Output voltage drop limitation

Vcc-Vout
Tj=150oC
Von
Von/Ron(T)
SENSEMAX
Tj=25
Tj=-40
t
o
C
o
C
Iout
14/37
Page 15
VNQ5E160AK-E Electrical specifications
Figure 9. I
I
/ I
out
sense
700
650
max Tj = -40 °C to 150 °C
600
550
500
450
400
350
300
250
200
0,35 0,58 0,81 1,04 1,27 1,5
/ I
out
max Tj = 25 °C to 150 °C
min Tj = 25 °C to 150 °C
min Tj = -40 °C to 150 °C
sense
vs. I
out
typical value
I
(A)
OUT

Figure 10. Maximum current sense ratio drift vs load current

dk/k(%)
15
10
5
0
-5
-10
-15
0,35 0,58 0,81 1,04 1,27 1,5
I
(A)
OUT
Note: Parameter guaranteed by design; it is not tested.
15/37
Page 16
Electrical specifications VNQ5E160AK-E

Table 11. Truth table

Conditions Input Output Sense (V
Normal operation
CSD
L
H
L
H
0
Nominal
=0V)
(1)
Overtemperature
Undervoltage
Overload
Short circuit to GND (power limitation)
Open load off state (with external pull up)
Short circuit to V
CC
(external pull up disconnected)
Negative output voltage clamp
1. If the V and external circuit.
is high, the SENSE output is at a high impedance, its potential depends on leakage currents
CSD
L
H
L
H
H
L L
L L
X
0
V
SENSEH
0 0
Nominal
(no power limitation)
H
Cycling
V
SENSEH
(power limitation)
L
H
LHV
L
H
L L
H H
0
V
SENSEH
SENSEH
V
SENSEH
< Nominal
LL0
16/37
Page 17
VNQ5E160AK-E Electrical specifications

Table 12. Electrical transient requirements (part 1)

ISO 7637-2:
2004(E)
Test pulse
Test levels
(1)
Number of
pulses or
III IV Min. Max.
test times
Burst cycle/pulse
repetition time
Delays and Impedance
1 -75V -100V 5000 pulses 0.5s 5s 2 ms, 10Ω
2a +37V +50V 5000 pulses 0.2s 5s 50µs, 2Ω
3a -100V -150V 1h 90ms 100ms 0.1µs, 50Ω
3b +75V +100V 1h 90ms 100ms 0.1µs, 50Ω
4 -6V -7V 1 pulse 100ms, 0.01Ω
(2)
5b
1. The above test levels must be considered referred to VCC= 13.5V except for pulse 5b.
2. Valid in case of external load dump clamp: 40V maximum referred to ground.

Table 13. Electrical transient requirements (part 2)

ISO 7637-2:
+65V +87V 1 pulse 400ms, 2Ω
Test level results
2004E
Test pul s e
III VI
1C C
2a C C
3a C C
3b C C
4C C
(1)
5b
1. Valid in case of external load dump clamp: 40V maximum referred to ground.

Table 14. Electrical transient requirements (part 3)

CC
Class Contents
C All functions of the device performed as designed after exposure to disturbance.
E
One or more functions of the device did not perform as designed after exposure to disturbance and cannot be returned to proper operation without replacing the device.
17/37
Page 18
Electrical specifications VNQ5E160AK-E

2.4 Waveforms

Figure 11. Normal operation

Normal operation
INPUT
Nominal load Nominal load
I
OUT
V
SENSE
V
CS_DIS

Figure 12. Overload or short to GND

Overload or Short to GND
INPUT
I
OUT
V
SENSE
V
CS_DIS
I
LimH
>
Power Limitation
I
LimL
Thermal cycling
>
18/37
Page 19
VNQ5E160AK-E Electrical specifications

Figure 13. Intermittent overload

Intermittent Overload
INPUT
Overload
I
>
LimH
I
>
LimL
I
OUT
V
>
SENSEH
V
SENSE
V
CS_DIS

Figure 14. Off-state open load with external circuitry

OFF-State Open Load
with external circuitry
Nominal load
INPUT
V
OUT
I
OUT
V
SENSE
V
CS_DIS
V
t
DSTK(on)
OL
V
SENSEH
V
> V
OUT
OL
>
19/37
Page 20
Electrical specifications VNQ5E160AK-E
Figure 15. Short to V
V
OUT
I
OUT
V
CS_DIS
CC
Resistive
Short to V
V
OL
t
DSTK(on)
CC
Short to V
CC
Hard
Short to V
V
> V
OUT
t
DSTK(on)
CC
OL

Figure 16. TJ evolution in overload or short to GND

TJ evolution in
Overload or Short to GND
INPUT
I
OUT
T
J
Self-limitation of fast thermal transients
T
J_START
Power Limitation
I
>
LimH
T
T
TSD
R
< I
T
HYST
LimL
20/37
Page 21
VNQ5E160AK-E Electrical specifications

2.5 Electrical characteristics curves

Figure 17. Off state output current Figure 18. High level input current

Iloff (mA)
200
Off State
150
100
50
0
-50 -25 0 25 50 75 100 125 150 175
Vcc=13V
Vin=Vout=0V
Tc (°C)
Iih (µA)
5
4,5
3,5
2,5
1,5
0,5
Vin= 2.1 V
4
3
2
1
0
-50 -25 0 25 50 75 100 125 150 175
Tc (°C)

Figure 19. Input clamp voltage Figure 20. Input low level voltage

Vicl (V)
7
6,8
6,6
6,4
6,2
5,8
5,6
5,4
5,2
lin= 1 mA
6
5
-50 -25 0 25 50 75 100 125 150 175
Tc (°C)
Vil (V)
2
1,8
1,6
1,4
1,2
1
0,8
0,6
0,4
0,2
0
-50 -25 0 25 50 75 100 125 150 175
Tc (°C)

Figure 21. Input high level voltage Figure 22. Input hysteresis voltage

Vih (V)
4
3,5
3
2,5
2
1,5
1
0,5
0
-50 -25 0 25 50 75 100 125 150 175
Tc (°C)
Vihyst (V)
1
0,9
0,8
0,7
0,6
0,5
0,4
0,3
0,2
0,1
0
-50 -25 0 25 50 75 100 125 150 175
Tc (°C)
21/37
Page 22
Electrical specifications VNQ5E160AK-E
Figure 23. On state resistance vs. T
Ron (Ohm)
300
Iout= 1A
250
200
150
100
50
Vcc= 13V
-50 -25 0 25 50 75 100 125 150 175
Tc (°C)
case
Figure 24. On state resistance vs. V
Ron (Ohm)
300
250
200
150
100
0 5 10 15 20 25 30 35
Vcc (V)

Figure 25. Undervoltage shutdown Figure 26. Turn-on voltage slope

Vusd (V)
8
6
4
2
0
-50 -25 0 25 50 75 100 125 150 175
Tc (°C)
(dVout/dt )On (V/ms)
1000
900
800
700
600
500
400
300
200
100
0
-50 -25 0 25 50 75 100 125 150 175
Vcc= 13 V
RI= 13 Ohm
Tc (°C)
CC
Tc=150°C
Tc=125°C
Tc=25°C
Tc=-40°C
Figure 27. I
Ilimh (A)
14
12
10
8
6
-50 -25 0 25 50 75 100 125 150
LIMH
Vcc= 13 V
vs. T
case
Tc (°C)
22/37

Figure 28. Turn-off voltage slope

(dVout/dt )Off (V/ms)
1200
1100
1000
900
800
700
600
500
-50 -25 0 25 50 75 100 125 150 175
Vcc= 13 V
RI= 13 Ohm
Tc (°C)
Page 23
VNQ5E160AK-E Electrical specifications

Figure 29. CS_DIS high level voltage Figure 30. CS_DIS clamp voltage

Vcsdh (V)
4
3,5
3
2,5
2
1,5
1
0,5
0
-50 -25 0 25 50 75 100 125 150 175
Tc (°C)

Figure 31. CS_DIS low level voltage

Vcsdl (V)
3
2,5
2
1,5
Vcsdcl(V)
10
9
Iin = 1 mA
8
7
6
5
4
3
-50 -25 0 25 50 75 100 125 150 175
Tc (°C)
1
0,5
0
-50 -25 0 25 50 75 100 125 150 175
Tc (°C)
23/37
Page 24
Application information VNQ5E160AK-E

3 Application information

Figure 32. Application schematic

+5V
V
CC
R
prot
Μ
CU
R
prot
R
prot
R
SENSE
C
EXT
CS_DIS
INPUT
CURRENT SENSE
D
ld
OUTPUT
GND
R
GND
GND
D
GND
V
Note: Channel 2, 3, 4 have the same internal circuit as channel 1.

3.1 GND protection network against reverse battery

This section provides two solutions for implementing a ground protection network against reverse battery.
3.1.1 Solution 1 : resistor in the ground line (R
This can be used with any type of load.
The following is an indication on how to dimension the R
1. R
2. R
where -I maximum rating section of the device datasheet.
Power dissipation in R
Equation 1
≤ 600mV / (I
GND
≥ (−VCC) / (-I
GND
is the DC reverse ground pin current and can be found in the absolute
GND
S(on)max
GND
GND
)
)
(when VCC<0: during reverse battery situations) is:
= (-VCC)2/R
P
D
GND
GND
only)
GND
resistor.
24/37
Page 25
VNQ5E160AK-E Application information
This resistor can be shared amongst several different HSDs. Please note that the value of this resistor should be calculated with formula (1) where I
S(on)max
becomes the sum of the
maximum on-state currents of the different devices.
Please note that if the microprocessor ground is not shared by the device ground then the R
will produce a shift (I
GND
S(on)max
* R
) in the input thresholds and the status output
GND
values. This shift will vary depending on how many devices are on in the case of several high side drivers sharing the same R
GND
.
If the calculated power dissipation leads to a large resistor or several devices have to share the same resistor then ST suggests to utilize Section 3.1.2: Solution 2 : diode (DGND) in
the ground line.
3.1.2 Solution 2 : diode (D
A resistor (R
=1kΩ) should be inserted in parallel to D
GND
) in the ground line
GND
inductive load.
This small signal diode can be safely shared amongst several different HSDs. Also in this case, the presence of the ground network will produce a shift (≈600mV) in the input threshold and in the status output values if the microprocessor ground is not common to the device ground. This shift will not vary if more than one HSD shares the same diode/resistor network.

3.2 Load dump protection

Dld is necessary (voltage transient suppressor) if the load dump peak voltage exceeds the V
max DC rating. The same applies if the device is subject to transients on the VCC line
CC
that are greater than the ones shown in the ISO 7637-2: 2004(E) table.

3.3 MCU I/Os protection

If a ground protection network is used and negative transient are present on the VCC line, the control pins will be pulled negative. ST suggests to insert a resistor (R prevent the µC I/Os pins to latch-up.
The value of these resistors is a compromise between the leakage current of µC and the current required by the HSD I/Os (Input levels compatibility) with the latch-up limit of µC I/Os:
if the device drives an
GND
prot
) in line to
Equation 2
-V
Calculation example:
For V
5kΩ ≤ R
= - 100V and I
CCpeak
≤ 180kΩ
prot
Recommended values: R
CCpeak/Ilatchup
≥ 20mA; V
latchup
=10kΩ, C
prot
≤ R
EXT
25/37
≤ (V
prot
OHµC
=10nF.
OHμC-VIH-VGND
≥ 4.5V
) / I
IHmax
Page 26
Application information VNQ5E160AK-E

3.4 Current sense and diagnostic

The current sense pin performs a double function (see Figure 33: Current sense and
diagnostic):
● Current mirror of the load current in normal operation, delivering a current
proportional to the load one according to a know ratio K The current I external resistor R minimum (see parameter V
can be easily converted to a voltage V
SENSE
. Linearity between I
SENSE
SENSE
in Table 9: Current sense (8V<VCC<18V)). The
OUT
and V
current sense accuracy depends on the output current (refer to current sense electrical characteristics Table 9: Current sense (8V<V
● Diagnostic flag in fault conditions, delivering a fixed voltage V
maximum current I
SENSEH
in case of the following fault conditions (refer to Tr u t h ta bl e ):
<18V)).
CC
– Power limitation activation
– Over-temperature
–Short to V
in off state
CC
– Open load in off state with additional external components.
A logic level high on CS_DIS pin sets at the same time all the current sense pins of the device in a high impedance state, thus disabling the current monitoring and diagnostic detection. This feature allows multiplexing of the microcontroller analog inputs by sharing of sense resistance and ADC line among different devices.
.
X
SENSE
by means of an
SENSE
is ensured up to 5V
SENSEH
up to a

Figure 33. Current sense and diagnostic

41V
Overtemperature
Pwr_Lim
SENSEH
CS_DIS
To uC ADC
I
OUT/KX
R
PROT
R
SENSE
I
SENSEH
CURRENT
SENSEn
V
SENSE
V
OL OFF
INPUTn
Main MOSn
+
-
GND
V
PU_CMD
R
I
Loff2r
I
Loff2f
R
PU
PU
Load
PD
V
BAT
V
CC
V
OL
OUTn
26/37
Page 27
VNQ5E160AK-E Application information
⋅⋅−
⋅

3.4.1 Short to VCC and off state open load detection

Short to V
A short circuit between V V
SENSEH
during the on state depending on the nature of the short circuit.
Off state open load with external circuitry
CC
and output is indicated by the relevant current sense pin set to
CC
during the device off state. Small or no current is delivered by the current sense
Detection of an open load in off mode requires an external pull-up resistor R the output to a positive supply voltage V
It is preferable V
to be switched off during the module stand-by mode in order to avoid the
PU
PU
.
connecting
PU
overall stand-by current consumption to increase in normal conditions, i.e. when load is connected.
An external pull down resistor R
connected between output and GND is mandatory to
PD
avoid misdetection in case of floating outputs in off state (see Figure 33: Current sense and
diagnostic).
R
must be selected in order to ensure V
PD
OUT < VOLmin
unless pulled up by the external
circuitry:
Equation 3
OLfoffLPD
min)2(
R
≤ 22 KΩ is recommended.
PD
OUT
−
OFFupPull
_
VVIRV
2
=<⋅=
For proper open load detection in off state, the external pull-up resistor must be selected according to the following formula:
Equation 4
V
OUT
For the values of V
(8V<V
CC
<18V).
=
ONupPull
_
−
OLmin ,VOLmax, IL(off2)r
IRRVR
roffLPDPUPUPD
)2(
RR
+
PDPU
and I
27/37
see Table 10: Openload detection
L(off2)f
OL
max
VV
4
=>
Page 28
Application information VNQ5E160AK-E

3.5 Maximum demagnetization energy (VCC=13.5V)

Figure 34. Maximum turn-off current versus inductance (for each channel)

100
10
A
B
C
1
I (A)
0,1
0,1 1 10 100L (mH)
A:
T
= 150°C single pulse
jstart
B: T
C:
VIN, I
= 100°C repetitive pulse
jstart
T
= 125°C repetitive pulse
jstart
L
Demagnetization Demagnetization Demagnetization
Note: Values are generated with R
In case of repetitive pulses, T must not exceed the temperature specified above for curves A and B.
=0 Ω.
L
(at beginning of each demagnetization) of every pulse
jstart
t
28/37
Page 29
VNQ5E160AK-E Package and PC board thermal data

4 Package and PC board thermal data

4.1 PowerSSO-24 thermal data

Figure 35. PowerSSO-24 PC board

Note: Layout condition of R
area= 77 mm x 86 mm, PCB thickness=1.6 mm, Cu thickness=70 mm (front and back side), Copper areas: from minimum pad lay-out to 8 cm
Figure 36.
RTHj_amb(°C/W)
R
thj-amb
60
55
50
45
40
35
and Zth measurements (PCB: Double layer, Thermal Vias, FR4
th
2
).
vs. PCB copper area in open box free air condition (one channel ON)
30
0246810
PCB Cu heatsink area (cm^2)
29/37
Page 30
Package and PC board thermal data VNQ5E160AK-E
Figure 37. PowerSSO-24 thermal impedance junction ambient single pulse (one
channel ON)
ZTH (°C/W)
1000
100
10
1
0.1
0.0001 0.001 0.01 0.1 1 10 100 1000
Time (s)

Figure 38. Thermal fitting model of a double channel hsd in PowerSSO-24

Footprint
(a)
2 cm
8 cm
2
2
30/37
Page 31
VNQ5E160AK-E Package and PC board thermal data
Equation 5: pulse calculation formula:
Z
THδ
where δ = tP/T

Table 15. Thermal parameters

Area/island (cm2)Footprint28
R1 = R7 = R9 = R11 (°C/W) 1.2
R2 = R8 = R10 = R12 (°C/W) 6
R3 (°C/W) 6
R4 (°C/W) 7.7
R5 (°C/W) 9 9 8
R6 (°C/W) 28 17 10
C1 = C7 = C9 = C11 (W.s/°C) 0.0008
C2 = C8 = C10 = C12 (W.s/°C) 0.0016
C3 (W.s/°C) 0.025
RTHδ Z
THtp
1 δ–()+⋅=
C4 (W.s/°C) 0.75
C5 (W.s/°C) 1 4 9
C6 (W.s/°C) 2.2 5 17
a. The fitting model is a semplified thermal tool and is valid for transient evolutions where the embedded
protections (power limitation or thermal cycling during thermal shutdown) are not triggered.
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Package and packing information VNQ5E160AK-E

5 Package and packing information

5.1 ECOPACK
In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com ECOPACK® is an ST trademark.
®

5.2 PowerSSO-24 mechanical data

Figure 39. PowerSSO-24 package dimensions

.
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VNQ5E160AK-E Package and packing information

Table 16. PowerSSO-24 mechanical data

Symbol
Min. Typ. Max.
A 2.45
A2 2.15 2.35
a1 0 0.1
b0.33 0.51
c0.23 0.32
(3)
D
(3)
E
10.10 10.50
7.40 7.60
e0.8
e3 8.8
F2.3
G 0.1
H 10.1 10.5
(1) (2)
Millimeters
h 0.4
k0° 8°
L0.6 1
O1.2
Q0.8
S2.9
T3.65
U1.0
N 10°
X4.1 4.7
Y6.5 7.1
1. No intrusion allowed inwards the leads.
2. Flash or bleeds on exposed die pad shall not exceed 0.5 mm per side
3. “D and E” do not include mold flash or protusions. Mold flash or protusions shall not exceed 0.15 mm per side
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Package and packing information VNQ5E160AK-E

5.3 Packing information

Figure 40. PowerSSO-24 tube shipment (no suffix)

Base q.ty 49 Bulk q.ty 1225
C
B
A

Figure 41. PowerSSO-24 tape and reel shipment (suffix “TR”)

Tube length (± 0.5) 532 A 3.5 B 13.8 C (± 0.1) 0.6
All dimensions are in mm.
Reel dimensions
Base q.ty 1000 Bulk q.ty 1000 A (max) 330 B (min) 1.5 C (± 0.2) 13 F 20.2 G (+ 2 / -0) 24.4 N (min) 100 T (max) 30.4
Tape dimensions
According to Electronic Industries Association (EIA) standard 481 rev. A, Feb 1986
Tape width W 24 Tape hole spacing P0 (± 0.1) 4 Component spacing P 12 Hole diameter D (± 0.05) 1.55 Hole diameter D1 (min) 1.5 Hole position F (± 0.1) 11.5 Compartment depth K (max) 2.85 Hole spacing P1 (± 0.1) 2
All dimensions are in mm.
Top
cover
tape
End
500mm min
No componentsNo components Components
Empty components pockets saled with cover tape.
User direction of feed
Start
500mm min
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VNQ5E160AK-E Order codes

6 Order codes

Table 17. Device summary

Order codes
Package
Tube Tape and reel
PowerSSO-24 VNQ5E160AK-E VNQ5E160AKTR-E
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Revision history VNQ5E160AK-E

7 Revision history

Table 18. Document revision history

Date Revision Changes
05-Jun-2007 1 Initial release.
Document restructured.
Table 9: Current sense (8V<VCC<18V):
parameters values
L(off2)r
, I
and td_vol parameters
L(off2)f
CC
<18V):
DSENSE2H
17-Mar-2009 2
Updated – added k0, k1, k2, k3, dk1/k1, dk2/k2, dk3/k3, Δt
Updated Table 10: Openload detection (8V<V – added I Added Figure 9.: Iout/ Isense vs. Iout. Added Figure 10.: Maximum current sense ratio drift vs load current Added Section 2.4: Waveforms. Added Section 2.5: Electrical characteristics curves. Updated Chapter 3: Application information: – added Section 3.4: Current sense and diagnostic Added Chapter 4: Package and PC board thermal data: Updated Table 16: PowerSSO-24 mechanical data
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VNQ5E160AK-E
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