Datasheet VNQ5E050AK-E Datasheet (ST)

Features

VNQ5E050AK-E

Quad channel high-side driver with analog current sense

for automotive applications

Max supply voltage V

Operating voltage range V

Max on-state resistance (per ch.) R

Current limitation (typ) I

Off-state supply current I

1. Typical value with all loads connected.

■ General

– Inrush current active management by

power limitation
– Very low standby current
– 3.0 V CMOS compatible inputs
– Optimized electromagnetic emissions
– Very low electromagnetic susceptibility
– Compliance with European directive

2002/95/EC
– Very low current sense leakage

■ Diagnostic functions

– Proportional load current sense
– High current sense precision for wide

currents range
– Current sense disable
– Off-state open-load detection
– Output short to V
– Overload and short to ground (power

limitation) indication
– Thermal shutdown indication

■ Protections

– Undervoltage shutdown
– Overvoltage clamp
– Load current limitation
– Self limiting of fast thermal transients
– Protection against loss of ground and loss

of V

CC

– Overtemperature shutdown with auto

restart (thermal shutdown)

detection

CC

CC

CC

ON

LIMH

S

41 V

4.5 to 28 V

50 mΩ

27 A

(1)

2 µA

PowerSSO-24

– Reverse battery protected
– Electrostatic discharge protection

Application

■ All types of resistive, inductive and capacitive

loads

■ Suitable as LED driver

Description

The VNQ5E050AK-E is a quad channel high-side
driver manufactured using ST proprietary
VIPower™ M0-5 technology and housed in
PowerSSO-24 package. The device is designed
to drive 12 V automotive grounded loads, and to
provide protection and diagnostics. It also
implements a 3 V and 5 V CMOS compatible
interface for the use with any microcontroller.

The device integrates advanced protective
functions such as load current limitation, inrush
and overload active management by power
limitation, overtemperature shut-off with
auto-restart and overvoltage active clamp.

A dedicated analog current sense pin is
associated with every output channel providing
enhanced diagnostic functions including fast
detection of overload and short-circuit to ground
through power limitation indication,
overtemperature indication, short-circuit to V
diagnosis and on-state and off-state open-load
detection. The current sensing and diagnostic
feedback of the whole device can be disabled by
pulling the CS_DIS pin high to share external
sense resistor with similar devices.

CC

October 2010 Doc ID 13519 Rev 6 1/37

www.st.com

1

Contents VNQ5E050AK-E

Contents

1 Block diagram and pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

2 Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

2.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

2.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

2.3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

2.4 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

2.5 Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

3 Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

3.1 GND protection network against reverse battery . . . . . . . . . . . . . . . . . . . 24

3.1.1 Solution 1: resistor in the ground line (RGND only) . . . . . . . . . . . . . . . . 24

3.1.2 Solution 2: diode (DGND) in the ground line . . . . . . . . . . . . . . . . . . . . . 25

3.2 Load dump protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

3.3 MCU I/Os protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

3.4 Current sense and diagnostic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

3.4.1 Short to VCC and off-state open-load detection . . . . . . . . . . . . . . . . . . 27

3.5 Maximum demagnetization energy (VCC = 13.5 V) . . . . . . . . . . . . . . . . . 28

4 Package and PC board thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

4.1 PowerSSO-24 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

5 Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

5.1 ECOPACK® . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

5.2 PowerSSO-24 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

5.3 Packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34

6 Order codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35

7 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36

2/37 Doc ID 13519 Rev 6

VNQ5E050AK-E List of tables

List of tables

Table 1. Pin functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

Table 2. Suggested connections for unused and not connected pins . . . . . . . . . . . . . . . . . . . . . . . . 6

Table 3. Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

Table 4. Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

Table 5. Power section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

Table 6. Switching (V

Table 7. Logic inputs. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

Table 8. Protections and diagnostics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

Table 9. Current sense (8 V < V
Table 10. Open-load detection (8V<V

Table 11. Truth table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

Table 12. Electrical transient requirements (part 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

Table 13. Electrical transient requirements (part 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

Table 14. Electrical transient requirements (part 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

Table 15. Thermal parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31

Table 16. PowerSSO-24 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33

Table 17. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35

Table 18. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36

=13V; Tj= 25 °C) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

CC

< 18 V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

CC

<18V). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

CC

Doc ID 13519 Rev 6 3/37

List of figures VNQ5E050AK-E

List of figures

Figure 1. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

Figure 2. Configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

Figure 3. Current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

Figure 4. Current sense delay characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

Figure 5. Open-load off-state delay timing. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Figure 6. Switching characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Figure 7. Delay response time between rising edge of output current and rising edge of current

sense (CS enabled) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Figure 8. Output voltage drop limitation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Figure 9. I

OUT/ISENSE

Figure 10. Maximum current sense ratio drift vs load current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Figure 11. Normal operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

Figure 12. Overload or short to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

Figure 13. Intermittent overload . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

Figure 14. Off-state open-load with external circuitry . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

Figure 15. Short to V
Figure 16. T

evolution in overload or short to GND. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

j

Figure 17. Off-state output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

Figure 18. High level input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

Figure 19. Input clamp voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

Figure 20. Input low level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

Figure 21. Input high level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

Figure 22. Input hysteresis voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

Figure 23. On-state resistance vs T
Figure 24. On-state resistance vs V

Figure 25. Undervoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

Figure 26. Turn-on voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

Figure 27. I

LIMH

vs T

Figure 28. Turn-off voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

Figure 29. CS_DIS high level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

Figure 30. CS_DIS clamp voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

Figure 31. CS_DIS low level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

Figure 32. Application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

Figure 33. Current sense and diagnostic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

Figure 34. Maximum turn-off current versus inductance (for each channel) . . . . . . . . . . . . . . . . . . . . 28

Figure 35. PowerSSO-24 PC board. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

Figure 36. Rthj-amb vs PCB copper area in open box free air condition (one channel ON) . . . . . . . . 29

Figure 37. PowerSSO-24 thermal impedance junction ambient single pulse (one channel ON). . . . . 30

Figure 38. Thermal fitting model of a double channel HSD in PowerSSO-24 . . . . . . . . . . . . . . . . . . . 30

Figure 39. PowerSSO-24 package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

Figure 40. PowerSSO-24 tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34

Figure 41. PowerSSO-24 tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34

vs I

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

CC

case

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

OUT

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

case

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

CC

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

4/37 Doc ID 13519 Rev 6

VNQ5E050AK-E Block diagram and pin configuration

1 Block diagram and pin configuration

Figure 1. Block diagram

V

Signal Clamp

CC

Undervoltage

IN1

IN2

IN3

IN4

CS_
DIS

CS1

CS2

CS3

CS4

Table 1. Pin functions

LOGIC

Control & Diagnostic 1

DRIVER

Over
temp.

V

SENSEH

(ACTIVE POWER LIMITATION)

Current

Limitation

Current

Sense

OVERLOAD PROTECTION

Power
Clamp

V

ON

Limitation

OFF State
Open load

Name Function

V

CC

OUTPUT

GND

Battery connection.

Power output.

n

Ground connection. Must be reverse battery protected by an external
diode/resistor network.

CH 1

GND

CH 4

CH 3

Channels 2, 3 & 4

CONTROL & DIAGNOSTIC

CH 2

OUT4

OUT3

OUT2

OUT1

INPUT

n

CURRENT

SENSE

n

Voltage controlled input pin with hysteresis, CMOS compatible. Controls output
switch state.

Analog current sense pin, delivers a current proportional to the load current.

CS_DIS Active high CMOS compatible pin, to disable the current sense pin.

Doc ID 13519 Rev 6 5/37

Block diagram and pin configuration VNQ5E050AK-E

Figure 2. Configuration diagram (top view)

V

GND

INPUT1

CURRENT SENSE1

INPUT2

CURRENT SENSE2

INPUT3

CURRENT SENSE3

INPUT4

CURRENT SENSE4

CS_DIS.

V

CC

CC

OUTPUT1

OUTPUT1

OUTPUT1

OUTPUT2

OUTPUT2

OUTPUT2

OUTPUT3

OUTPUT3

OUTPUT3

OUTPUT4

OUTPUT4

OUTPUT4

TAB = V

Table 2. Suggested connections for unused and not connected pins

CC

Connection / pin Current sense N.C. Output Input CS_DIS

Floating Not allowed X X X X

To ground

Through 1 kΩ

resistor

Through 22 kΩ

X

resistor

Through 10 kΩ

resistor

Through 10 kΩ

resistor

6/37 Doc ID 13519 Rev 6

VNQ5E050AK-E Electrical specifications

2 Electrical specifications

Figure 3. Current and voltage conventions

I

S

V

CC

I

CSD

GND

OUTPUTn

CURRENT
S

ENSEn

I

GND

CS_DIS

I

V

CSD

INn

INPUTn

V

INn

V

I

SENSEn

V

SENSEn

Fn

I

OUTn

V

OUTn

V

CC

Note: V

Fn

= V

- VCC during reverse battery condition.

OUTn

2.1 Absolute maximum ratings

Stressing the device above the ratings listed in the “Absolute maximum ratings” tables may
cause permanent damage to the device. These are stress ratings only and operation of the
device at these or any other conditions above those indicated in the operating sections of
this specification is not implied. Exposure to the conditions reported in this section for
extended periods may affect device reliability. Refer also to the STMicroelectronics SURE
Program and other relevant quality documents.

Table 3. Absolute maximum ratings

Symbol Parameter Value Unit

V

CC

-V

-I

GND

I

OUT

-I

OUT

I

IN

I

CSD

-I

CSENSE

V

CSENSE

DC supply voltage 41 V

Reverse DC supply voltage 0.3 V

CC

DC reverse ground pin current 200 mA

DC output current Internally limited A

Reverse DC output current 20 A

DC input current -1 to 10 mA

DC current sense disable input current -1 to 10 mA

DC reverse CS pin current 200 mA

Current sense maximum voltage

V

- 41 to

CC

+V

CC

V

Doc ID 13519 Rev 6 7/37

Electrical specifications VNQ5E050AK-E

Table 3. Absolute maximum ratings (continued)

Symbol Parameter Value Unit

Maximum switching energy (single pulse)

E

MAX

(L = 3 mH; R
I

OUT=IlimL

=0Ω; V

L

(Typ.))

=13.5V; T

bat

jstart

=150°C;

104 mJ

Electrostatic discharge
(human body model: R = 1.5 KΩ; C=100pF)

4000
2000
4000
5000
5000

V
V
V
V
V

V

V

ESD

ESD

T

T

stg

– Input
– Current sense
–CS_DIS
– Output
–V

CC

Charge device model (CDM-AEC-Q100-011) 750 V

Junction operating temperature -40 to 150 °C

j

Storage temperature -55 to 150 °C

2.2 Thermal data

Table 4. Thermal data

Symbol Parameter Max. value Unit

R

thj-case

R

thj-amb

Thermal resistance junction-case (with one channel ON) 2.8 °C/W

Thermal resistance junction-ambient See Figure 36 °C/W

2.3 Electrical characteristics

Values specified in this section are for 8 V < VCC<28V, -40°C< Tj< 150 °C, unless
otherwise stated.

Table 5. Power section

Symbol Parameter Test conditions Min. Typ. Max. Unit

V

V

V

USDhyst

R

V

Operating supply voltage 4.5 13 28 V

CC

Undervoltage shutdown 2.5 3.5 4.5 V

USD

Undervoltage shutdown
hysteresis

On-state resistance

ON

Clamp voltage IS=20mA 41 46 52 V

clamp

(1)

I

=2A; Tj=25°C 50

OUT

=2A; Tj= 150 °C 100

OUT

=2A; VCC=5V; Tj=25°C 65

I

OUT

0.5 V

mΩI

8/37 Doc ID 13519 Rev 6

VNQ5E050AK-E Electrical specifications

Table 5. Power section (continued)

Symbol Parameter Test conditions Min. Typ. Max. Unit

Off-state; V
V

I

S

Supply current

IN=VOUT=VSENSE=VCSD

On-state; VCC=13V; VIN=5V;
I

=0A

OUT

VIN=V
Tj=25°C

I

L(off)

1. For each channel

2. PowerMOS leakage included.

Table 6. Switching (VCC=13V; Tj=25°C)

Off-state output current

Output - VCC diode

V

F

voltage

(1)

(1)

V

IN=VOUT

= 125 °C

T

j

-I

=2A; Tj= 150 °C 0.7 V

OUT

=13V; Tj=25°C;

CC

=0V; VCC=13V;

OUT

=0V; VCC=13V;

=0V

(2)5(2)

2

814mA

00.01 3

05

Symbol Parameter Test conditions Min. Typ. Max. Unit

(dV

(dV

t

d(on)

t

d(off)

OUT

OUT

Turn-on delay time RL=6.5Ω (see Figure 6.)20 µs

Turn-off delay time RL=6.5Ω (see Figure 6.)35 µs

/dt)onTurn-on voltage slope RL=6.5Ω

/dt)

Turn-off voltage slope RL=6.5Ω

off

See

Figure 26

See

Figure 28

µA

µA

V/µs

V/µs

W

W

ON

OFF

Switching energy
losses during t

won

Switching energy
losses during

t

woff

RL=6.5Ω (see Figure 6.)0.15 mJ

RL=6.5Ω (see Figure 6.)0.25 mJ

Table 7. Logic inputs

Symbol Parameter Test conditions Min. Typ. Max. Unit

V

I

V

I

V

I(hyst)

V

V

I

CSDL

V

CSDH

CSDL

Input low level voltage 0.9 V

IL

Low level input current VIN=0.9V 1 µA

IL

Input high level voltage 2.1 V

IH

High level input current VIN=2.1V 10 µA

IH

Input hysteresis voltage 0.25 V

I

=1mA 5.5 7

Input clamp voltage

ICL

IN

=-1mA -0.7

I

IN

CS_DIS low level voltage 0.9 V

Low level CS_DIS current V

=0.9V 1 µA

CSD

CS_DIS high level voltage 2.1 V

V

Doc ID 13519 Rev 6 9/37

Electrical specifications VNQ5E050AK-E

Table 7. Logic inputs (continued)

Symbol Parameter Test conditions Min. Typ. Max. Unit

I

CSDH

V

CSD(hyst)

V

CSCL

Table 8. Protections and diagnostics

High level CS_DIS current V

=2.1V 10 µA

CSD

CS_DIS hysteresis voltage 0.25 V

I

=1mA 5.5 7

CS_DIS clamp voltage

CSD

=-1mA -0.7

I

CSD

(1)

Symbol Parameter Test conditions Min. Typ. Max. Unit

I

limH

I

limL

T

TSD

T

T

T

HYST

V

DEMAG

DC short circuit
current

Short circuit current
during thermal cycling

Shutdown
temperature

Reset temperature TRS + 1 TRS + 5 °C

R

Thermal reset of

RS

STATUS

Thermal hysteresis

TSD-TR

)

(T

Turn-off output voltage
clamp

VCC= 13 V 19 27 38 A

5V<V

V

CC

<28V 38 A

CC

=13V; TR<Tj<T

TSD

7A

150 175 200 °C

135 °C

7°C

I

=2A; VIN=0;

OUT

L=6mH

-41 VCC-46 VCC-52 V

V

CC

V

=0.1A;

I

V

1. To ensure long term reliability under heavy overload or short circuit conditions, protection and related

Table 9. Current sense (8 V < VCC<18V)

Output voltage drop

ON

limitation

diagnostic signals must be used together with a proper software strategy. If the device is subjected to
abnormal conditions, this software must limit the duration and number of activation cycles.

OUT

Tj= -40 °C...150 °C
(see Figure 8)

25 mV

Symbol Parameter Test conditions Min. Typ. Max. Unit

I

=0.05A;

OUT

K

K

dK

1/K1

I

0

OUT/ISENSE

I

1

OUT/ISENSE

Current sense ratio

(1)

drift

V
T

I
V
T

= 0.5 V; V

SENSE

= -40 °C...150 °C

j

=1A;

OUT

=4V; V

SENSE

= -40 °C...150 °C

j

CSD

Tj= 25 °C...150 °C

=1A; V

I

OUT

V

CSD

= -40 °C to 150 °C

T

j

SENSE

=0V;

CSD

=0V;

=4V;

=0V;

1050 2110 3170

1510

1890

2650

1510

1890

2270

-13 13 %

10/37 Doc ID 13519 Rev 6

VNQ5E050AK-E Electrical specifications

Table 9. Current sense (8 V < VCC< 18 V) (continued)

Symbol Parameter Test conditions Min. Typ. Max. Unit

I

=2A;

OUT

K

2

I

OUT/ISENSE

V
T

=4V; V

SENSE

= -40 °C...150 °C

j

Tj= 25 °C...150 °C

CSD

=0V;

1600
1600

1800
1800

2230
2000

dK

2/K2

K

dK

3/K3

I

SENSE0

I

OL

Current sense ratio

(1)

drift

I

3

OUT/ISENSE

Current sense ratio

(1)

drift

Analog sense
leakage current

Open-load on-state
current detection
threshold

=2A; V

I

OUT

V

CSD

= -40 °C to 150 °C

T

j

I

=4A;

OUT

V

SENSE

= -40 °C...150 °C

T

j

=0V;

=4V; V

SENSE

CSD

Tj= 25 °C...150 °C

=4A; V

I

OUT

V

CSD

= -40 °C to 150 °C

T

j

=0A; V

I

OUT

V

CSD

= -40 °C...150 °C

T

j

=0A; V

I

OUT

V

CSD

= -40 °C...150 °C

T

j

I

=2A; V

OUT

V

CSD

= -40 °C...150 °C

T

j

=5V; 8V<VCC<18V;

V

IN

I

SENSE

SENSE

=0V;

SENSE

=5V; VIN=0V;

SENSE

=0V; VIN=5V;

SENSE

=5V; VIN=5V;

=5µA

=4V;

=0V;

=4V;

=0V;

=0V;

=0V;

-8 8 %

1620

1770

1990

1620

1770

1920

-6 6 %

01

02

µA

01

420mA

V

SENSE

Max analog sense
output voltage

I

OUT

=4A; V

=0V 5 V

CSD

Analog sense output

V

SENSEH

voltage in fault
condition

(2)

VCC=13V; R

=10KΩ 8V

SENSE

Analog sense output

I

SENSEH

current in fault
condition

(2)

Delay response time

t

DSENSE1H

from falling edge of
CS_DIS pin

Delay response time

t

DSENSE1L

from rising edge of
CS_DIS pin

Delay response time

t

DSENSE2H

from rising edge of
INPUT pin

VCC=13V; V

V
I

<4V, 0.5A<I

SENSE

=90% of I

SENSE

(see Figure 4)

V
I

SENSE

SENSE

<4V; 0.5A<I

=10% of I

(see Figure 4)

V
I

< 4 V, 0.5 A < I

SENSE

=90% of I

SENSE

(see Figure 4)

=5V 9 mA

SENSE

<4A

OUT

SENSEMAX

OUT

SENSEMAX

OUT

SENSEMAX

<4A

<4A

40 100 µs

520µs

80 250 µs

Doc ID 13519 Rev 6 11/37

Electrical specifications VNQ5E050AK-E

Table 9. Current sense (8 V < VCC< 18 V) (continued)

Symbol Parameter Test conditions Min. Typ. Max. Unit

Δ

t

DSENSE2H

t

DSENSE2L

Delay response time
between rising edge
of output current and
rising edge of current
sense

Delay response time
from falling edge of
INPUT pin

V
I

SENSE

I

OUT

I

OUTMAX

V
I
(see Figure 4)

<4V,

SENSE

=90% of I

=90% of I

< 4 V, 0.5 A < I

SENSE

=10% of I

SENSE

SENSEMAX,

OUTMAX

=2A (see Figure 7)

OUT

SENSEMAX

60 µs

<4A

80 250 µs

1. Parameter guaranteed by design; it is not tested.

2. Fault condition includes: power limitation, overtemperature and open-load off-state detection.

Table 10. Open-load detection (8V<VCC<18V)

Symbol Parameter Test conditions Min. Typ. Max. Unit

V

OL

t

DSTKON

I

L(off2)r

I

L(off2)f

td_vol

Open-load off-state voltage
detection threshold

Output short circuit to Vcc
detection delay at turn-off

Off-state output current at
V

=4V

OUT

Off-state output current at

=2V

V

OUT

Delay response from output
rising edge to V

SENSE

rising

edge in open-load

V

=0V 2

IN

See Figure 5 180 1200 µs

VIN=0V; V
V

rising from 0 V to 4 V

OUT

V

=0V;

IN

V

SENSE=VSENSEH

V

falling from VCC to 2 V

OUT

V

=4V; VIN=0V

OUT

SENSE

=90% of V

V

SENSE

=0V;

SENSEH

-120 0 µA

-50 90 µA

See

Figure 5

4V

20 µs

Figure 4. Current sense delay characteristics

INPUT

CS_DIS

LOAD CURRENT

SENSE CURRENT

t

DSENSE2H

12/37 Doc ID 13519 Rev 6

t

DSENSE1L

t

DSENSE1H

t

DSENSE2L

VNQ5E050AK-E Electrical specifications

Figure 5. Open-load off-state delay timing

OUTPUT STUCK TO V

V

IN

V

CS

Figure 6. Switching characteristics

V

OUT

t

Won

80%

dV

/dt

OUT

(on)

t

r

10%

CC

V

t

DSTKON

t

Woff

90%

t

f

> V

OUT

V

SENSEH

dV

OL

OUT

/dt

(off)

t

INPUT

t

d(on)

t

d(off)

t

Doc ID 13519 Rev 6 13/37

Electrical specifications VNQ5E050AK-E

Figure 7. Delay response time between rising edge of output current and rising

edge of current sense (CS enabled)

V

IN

Δ

t

DSENSE2H

t

I

OUT

90% I

OUTMAX

I

OUTMAX

t

I

SENSE

90% I

I

SENSEMAX

SENSEMAX

t

Figure 8. Output voltage drop limitation

VCC-V

OUT

Tj=150°C

V

ON

V

ON/RON

(T)

=25°C

T

j

T

=-40°C

j

I

OUT

14/37 Doc ID 13519 Rev 6

VNQ5E050AK-E Electrical specifications

Figure 9. I

I

/ I

out

sense

2800

2600

2400

max T

2200

2000

1800

1600

1400

1200

min T

11,522,533,54

OUT/ISENSE

vs I

max Tj = -40 °C to 150 °C

= 25 °C to 150 °C

j

= 25 °C to 150 °C =

j

OUT

min T

= -40 °C to 150 °C

j

I

OUT

typical value

(A)

Figure 10. Maximum current sense ratio drift vs load current

dk/k(%)

20

15

10

5

0

-5

-10

-15

-20

1234

Note: Parameter guaranteed by design; it is not tested.

I

OUT

(A)

Doc ID 13519 Rev 6 15/37

Electrical specifications VNQ5E050AK-E

Table 11. Truth table

Conditions Input Output Sense (V

Normal operation

L

H

L
H

CSD

0

Nominal

=0V)

(1)

Overtemperature

Undervoltage

Overload

Short circuit to GND
(power limitation)

Open-load off-state
(with external pull-up)

Short circuit to V

CC

(external pull-up
disconnected)

Negative output voltage
clamp

1. If the V
and external circuit.

is high, the SENSE output is at a high impedance, its potential depends on leakage currents

CSD

L

H

L

H

H

L
L

L
L

X

0

V

SENSEH

0
0

Nominal

(no power limitation)

H

Cycling

V

SENSEH

(power limitation)

L

H

LHV

L

H

L
L

H
H

0

V

SENSEH

SENSEH

V

SENSEH

< Nominal

LL0

16/37 Doc ID 13519 Rev 6

VNQ5E050AK-E Electrical specifications

Table 12. Electrical transient requirements (part 1)

ISO 7637-2:

2004(E)

Test pulse

Test levels

(1)

Number of

pulses or

III IV Min. Max.

test times

Burst cycle/pulse

repetition time

Delays and
impedance

1 -75V -100V 5000 pulses 0.5s 5s 2 ms, 10Ω

2a +37V +50V 5000 pulses 0.2s 5s 50µs, 2Ω

3a -100V -150V 1h 90ms 100ms 0.1µs, 50Ω

3b +75V +100V 1h 90ms 100ms 0.1µs, 50Ω

4 -6V -7V 1 pulse 100ms, 0.01Ω

(2)

5b

1. The above test levels must be considered referred to VCC= 13.5V except for pulse 5b.

2. Valid in case of external load dump clamp: 40V maximum referred to ground.

Table 13. Electrical transient requirements (part 2)

ISO 7637-2:

+65V +87V 1 pulse 400ms, 2Ω

Test level results

2004E

Test p ulse

III VI

1C C

2a C C

3a C C

3b C C

4C C

(1)

5b

1. Valid in case of external load dump clamp: 40V maximum referred to ground.

Table 14. Electrical transient requirements (part 3)

CC

Class Contents

C All functions of the device performed as designed after exposure to disturbance.

E

One or more functions of the device did not perform as designed after exposure to
disturbance and cannot be returned to proper operation without replacing the device.

Doc ID 13519 Rev 6 17/37

Electrical specifications VNQ5E050AK-E

2.4 Waveforms

Figure 11. Normal operation

Normal operation

INPUT

Nominal load Nominal load

I

OUT

V

SENSE

V

CS_DIS

Figure 12. Overload or short to GND

Overload or Short to GND

INPUT

I

OUT

V

SENSE

I

LimH

>

Power Limitation

I

LimL

Thermal cycling

>

V

CS_DIS

18/37 Doc ID 13519 Rev 6

VNQ5E050AK-E Electrical specifications

Figure 13. Intermittent overload

Intermittent Overload

INPUT

Overload

I

>

LimH

I

>

LimL

I

OUT

V

V

SENSE

V

CS_DIS

SENSEH

>

Figure 14. Off-state open-load with external circuitry

OFF-State Open Load

with external circutry

Nominal load

INPUT

V

> V

OUT

V

t

DSTK(on)

OL

V

SENSEH

>

V

OUT

I

OUT

V

SENSE

V

CS_DIS

OL

Doc ID 13519 Rev 6 19/37

Electrical specifications VNQ5E050AK-E

Figure 15. Short to V

V

OUT

I

OUT

V

CS_DIS

CC

Resistive

Short to V

V

OL

t

DSTK(on)

CC

Short to V

CC

Hard

Short to V

V

> V

OUT

t

DSTK(on)

CC

OL

Figure 16. Tj evolution in overload or short to GND

TJ evolution in

Overload or Short to GND

INPUT

Self-limitation of fast thermal transients

T

J_START

T

J

I

>

LimH

I

OUT

Power Limitation

T

TSD

T

R

< I

T

HYST

LimL

20/37 Doc ID 13519 Rev 6

VNQ5E050AK-E Electrical specifications

)

)

)

)

)

)

2.5 Electrical characteristics curves

Figure 17. Off-state output current Figure 18. High level input current

Iloff (nA)

700

600

500

400

300

200

100

0

-50 -25 0 25 50 75 100 125 150 175

Off State
Vcc=13V

Vin=Vout=0V

Tc (°C

Iih (µA)

5

4,5

4

3,5

3

2,5

2

1,5

0,5

0

Vin=2.1V

1

-50 -25 0 25 50 75 100 125 150 175

Tc (°C

Figure 19. Input clamp voltage Figure 20. Input low level

Vicl (V)

7

6,8

6,6

6,4

6,2

6

5,8

5,6

5,4

5,2

5

lin=1mA

-50 -25 0 25 50 75 100 125 150 175

Tc (°C

Vil (V)

2

1,8

1,6

1,4

1,2

1

0,8

0,6

0,4

0,2

0

-50 -25 0 25 50 75 100 125 150 175

Tc (°C

Figure 21. Input high level Figure 22. Input hysteresis voltage

Vih (V)

4

3,5

3

2,5

2

1,5

1

0,5

0

-50 -25 0 25 50 75 100 125 150 175

Tc (°C

Vihyst (V)

1

0,9

0,8

0,7

0,6

0,5

0,4

0,3

0,2

0,1

0

-50 -25 0 25 50 75 100 125 150 175

Tc (°C

Doc ID 13519 Rev 6 21/37

Electrical specifications VNQ5E050AK-E

Figure 23. On-state resistance vs T

Ron (mOhm)

150

Iout= 2A

120

90

60

30

0

Vcc=13V

-50 -25 0 25 50 75 100 125 150 175

Tc (°C)

case

Figure 24. On-state resistance vs V

Ron (mOhm)

100

80

60

40

20

0

0 5 10 15 20 25 30 35 40

Vcc (V)

Tc=150°C

Tc=125°C

Tc=25°C

Tc=-40°C

Figure 25. Undervoltage shutdown Figure 26. Turn-on voltage slope

Vusd (V)

16

14

12

10

8

6

4

2

0

-50 -25 0 25 50 75 100 125 150 175

Tc (°C)

(dVout/dt )On (V/ms)

1000

900

800

700

600

500

400

300

200

100

0

-50 -25 0 25 50 75 100 125 150 175

Vcc=13V

RI=6.5 Ohm

Tc (°C)

CC

Figure 27. I

LIMH

vs T

case

Ilimh (A)

40

35

30

25

20

15

10

Vcc=13V

-50 -25 0 25 50 75 100 125 150 175

Tc (°C)

22/37 Doc ID 13519 Rev 6

Figure 28. Turn-off voltage slope

(dVout/dt )Off (V/ms)

600

550

500

450

400

350

300

250

200

150

100

50

0

-50 -25 0 25 50 75 100 125 150 175

Vcc=13V

RI= 6.5 Ohm

Tc (°C)

VNQ5E050AK-E Electrical specifications

Figure 29. CS_DIS high level voltage Figure 30. CS_DIS clamp voltage

Vcsdh (V)

4

3,5

3

2,5

2

1,5

1

0,5

0

-50 -25 0 25 50 75 100 125 150 175

Tc (°C)

Figure 31. CS_DIS low level voltage

Vcsdl (V)

3

2,5

2

Vcsdcl(V)

10

9

8

Iin = 1 mA

7

6

5

4

3

2

1

0

-50 -25 0 25 50 75 100 125 150 175

Tc (°C)

1,5

1

0,5

0

-50 -25 0 25 50 75 100 125 150 175

Tc (°C)

Doc ID 13519 Rev 6 23/37

Application information VNQ5E050AK-E

3 Application information

Figure 32. Application schematic

+5V

V

CC

R

prot

Μ

CU

R

prot

CS_DIS

IINPUT

OUTPUT

D

ld

R

prot

C

ext

CURRENT SENSE

R

SENSE

GND

R

GND

GND

D

GND

V

Note: Channel 2, 3, 4 have the same internal circuit as channel 1.

3.1 GND protection network against reverse battery

This section provides two solutions for implementing a ground protection network against
reverse battery.

3.1.1 Solution 1: resistor in the ground line (R

This can be used with any type of load.

The following is an indication on how to dimension the R

1. R

2. R

where -I
maximum rating section of the device datasheet.

≤ 600 mV / (I

GND

≥ (−VCC) / (-I

GND

is the DC reverse ground pin current and can be found in the absolute

GND

S(on)max

GND

).

)

GND

only)

resistor.

GND

Power Dissipation in R

(when VCC< 0: during reverse battery situations) is:

GND

Equation 1

= (-VCC)2/R

24/37 Doc ID 13519 Rev 6

P

D

GND

VNQ5E050AK-E Application information

This resistor can be shared amongst several different HSDs. Please note that the value of
this resistor should be calculated with formula (1) where I

S(on)max

becomes the sum of the

maximum on-state currents of the different devices.

Please note that if the microprocessor ground is not shared by the device ground then the
R

will produce a shift (I

GND

S(on)max

* R

) in the input thresholds and the status output

GND

values. This shift will vary depending on how many devices are on in the case of several
high side drivers sharing the same R

GND

.

If the calculated power dissipation leads to a large resistor or several devices have to share
the same resistor then ST suggests to utilize Section 3.1.2: Solution 2: diode (DGND) in the

ground line.

3.1.2 Solution 2: diode (D

A resistor (R

=1kΩ) should be inserted in parallel to D

GND

) in the ground line

GND

inductive load.

This small signal diode can be safely shared amongst several different HSDs. Also in this
case, the presence of the ground network will produce a shift (≈600mV) in the input
threshold and in the status output values if the microprocessor ground is not common to the
device ground. This shift will not vary if more than one HSD shares the same diode/resistor
network.

3.2 Load dump protection

Dld is necessary (voltage transient suppressor) if the load dump peak voltage exceeds the
V

max DC rating. The same applies if the device is subject to transients on the VCC line

CC

that are greater than the ones shown in the ISO 7637-2: 2004(E) table.

3.3 MCU I/Os protection

If a ground protection network is used and negative transients are present on the VCC line,
the control pins will be pulled negative. ST suggests to insert a resistor (R
prevent the microcontroller I/O pins to latch-up.

The value of these resistors is a compromise between the leakage current of microcontroller
and the current required by the HSD I/Os (Input levels compatibility) with the latch-up limit of
microcontroller I/Os.

if the device drives an

GND

prot

) in line to

Equation 2

-V

CCpeak/Ilatchup

≤ R

prot

≤ (V

OHμC-VIH-VGND

) / I

IHmax

Calculation example:

For V

CCpeak

5kΩ ≤ R

= -100 V and I

≤ 180 kΩ.

prot

Recommended values: R

latchup

=10kΩ, C

prot

≥ 20 mA; V

EXT

≥ 4.5 V

OHμC

=10nF.

Doc ID 13519 Rev 6 25/37

Application information VNQ5E050AK-E

3.4 Current sense and diagnostic

The current sense pin performs a double function (see Figure 33: Current sense and

diagnostic):

● Current mirror of the load current in normal operation, delivering a current

proportional to the load one according to a known ratio K
The current I
external resistor R
minimum (see parameter V

can be easily converted to a voltage V

SENSE

. Linearity between I

SENSE

SENSE

in Table 9: Current sense (8 V < VCC<18V)). The

OUT

and V

current sense accuracy depends on the output current (refer to current sense electrical
characteristics Table 9: Current sense (8 V < V

● Diagnostic flag in fault conditions, delivering a fixed voltage V

maximum current I

SENSEH

in case of the following fault conditions (refer to Tr u th t a b l e):

<18V)).

CC

– Power limitation activation

–Overtemperature

–Short to V

in off-state

CC

– Open-load in off-state with additional external components.

A logic level high on CS_DIS pin sets at the same time all the current sense pins of the
device in a high impedance state, thus disabling the current monitoring and diagnostic
detection. This feature allows multiplexing of the microcontroller analog inputs by sharing of
sense resistance and ADC line among different devices.

.

X

SENSE

by means of an

SENSE

is ensured up to 5V

SENSEH

up to a

Figure 33. Current sense and diagnostic

V

PU_CMD

R

I

Loff2r

I

Loff2f

R

PU

PU

Load

PD

V

BAT

V

CC

Main MOSn

I

OUT/KX

41V

Overtemperature

+

OL OFF

Pwr_Lim

CS_DIS

I

SENSEH

V

SENSEH

CURRENT

SENSEn

R

PROT

To uC ADC

R

SENSE

V

SENSE

INPUTn

-

V

OL

OUTn

GND

26/37 Doc ID 13519 Rev 6

VNQ5E050AK-E Application information

3.4.1 Short to VCC and off-state open-load detection

Short to V

A short circuit between V
V

SENSEH

CC

and output is indicated by the relevant current sense pin set to

CC

during the device off-state. Small or no current is delivered by the current sense

during the on-state depending on the nature of the short circuit.

Off-state open-load with external circuitry

Detection of an open-load in off mode requires an external pull-up resistor R
the output to a positive supply voltage V

It is preferable V

to be switched off during the module standby mode in order to avoid the

PU

PU

.

connecting

PU

overall standby current consumption to increase in normal conditions, i.e. when load is
connected.

An external pull down resistor R

connected between output and GND is mandatory to

PD

avoid misdetection in case of floating outputs in off-state (see Figure 33: Current sense and

diagnostic).

R

must be selected in order to ensure V

PD

OUT < VOLmin

unless pulled up by the external

circuitry:

Equation 3

VVIRV

2

=<⋅=

OUT

−

OFFupPull

_

OLfoffLPD

min)2(

R

≤ 22 KΩ is recommended.

PD

For proper open-load detection in off-state, the external pull-up resistor must be selected
according to the following formula:

Equation 4

IRRVR

⋅⋅−⋅

V

OUT

−

For the values of V

(8V<V

CC

<18V).

OLmin,VOLmax, IL(off2)r

=

ONupPull

_

and I

RR

+

PDPU

see Table 10: Open-load detection

L(off2)f

roffLPDPUPUPD

)2(

OL

max

VV

4

=>

Doc ID 13519 Rev 6 27/37

Application information VNQ5E050AK-E

3.5 Maximum demagnetization energy (VCC=13.5V)

Figure 34. Maximum turn-off current versus inductance (for each channel)

100

A

B

C

10

I (A)

1

0,1 1 10 100L (mH)

A: T

B: T

C: T

VIN, I

= 150°C single pulse

jstart

= 100°C repetitive pulse

jstart

= 125°C repetitive pulse

jstart

L

Note: Values are generated with R

In case of repetitive pulses, T
must not exceed the temperature specified above for curves A and B.

Demagnetization Demagnetization Demagnetization

=0Ω

L

(at beginning of each demagnetization) of every pulse

jstart

t

28/37 Doc ID 13519 Rev 6

VNQ5E050AK-E Package and PC board thermal data

4 Package and PC board thermal data

4.1 PowerSSO-24 thermal data

Figure 35. PowerSSO-24 PC board

Note: Layout condition of R

area = 77 mm x 86 mm, PCB thickness = 1.6 mm, Cu thickness = 70 µm (front and back
side), Copper areas: from minimum pad lay-out to 8 cm

Figure 36.

RTHj_amb(°C/W)

R

thj-amb

55

50

45

40

35

30

0246810

and Zth measurements (PCB: Double layer, Thermal Vias, FR4

th

2

).

vs PCB copper area in open box free air condition (one channel ON)

PCB Cu heatsink area (cm^2)

Doc ID 13519 Rev 6 29/37

Package and PC board thermal data VNQ5E050AK-E

Figure 37.

PowerSSO-24 thermal impedance junction ambient single pulse (one channel ON)

ZTH (°C/W)

1000

100

10

1

0.1

0.0001 0.001 0.01 0.1 1 10 100 1000

Time (s)

Footprint

2

2 cm

8 cm

2

Figure 38. Thermal fitting model of a double channel HSD in PowerSSO-24

Note: The fitting model is a simplified thermal tool and is valid for transient evolutions where the

embedded protections (power limitation or thermal cycling during thermal shutdown) are not
triggered.

30/37 Doc ID 13519 Rev 6

VNQ5E050AK-E Package and PC board thermal data

Equation 5: pulse calculation formula

Z

THδ

R

TH

δ Z

THtp

1 δ–()+⋅=

where δ = tP/T

Table 15. Thermal parameters

Area/island (cm2)Footprint28

R1 = R7 = R9 = R11 (°C/W) 0.4

R2 = R8 = R10 = R12 (°C/W) 2

R3 (°C/W) 6

R4 (°C/W) 7.7

R5 (°C/W) 9 9 8

R6 (°C/W) 28 17 10

C1 = C7 = C9 = C11 (W.s/°C) 0.001

C2 = C8 = C10 = C12 (W.s/°C) 0.0022

C3 (W.s/°C) 0.025

C4 (W.s/°C) 0.75

C5 (W.s/°C) 1 4 9

C6 (W.s/°C) 2.2 5 17

Doc ID 13519 Rev 6 31/37

Package and packing information VNQ5E050AK-E

5 Package and packing information

5.1 ECOPACK

®

In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK® packages, depending on their level of environmental compliance. ECOPACK®
specifications, grade definitions and product status are available at: www.st.com

ECOPACK® is an ST trademark.

5.2 PowerSSO-24 mechanical data

Figure 39. PowerSSO-24 package dimensions

.

32/37 Doc ID 13519 Rev 6

VNQ5E050AK-E Package and packing information

Table 16. PowerSSO-24 mechanical data

Millimeters

Symbol

Min. Typ. Max.

A 2.45

A2 2.15 2.35

a1 0 0.1

b0.33 0.51

c0.23 0.32

D 10.10 10.50

E7.40 7.60

e0.8

e3 8.8

F2.3

G 0.1

H 10.1 10.5

h 0.4

k0° 8°

L0.55 0.85

O1.2

Q0.8

S2.9

T3.65

U1.0

N 10°

X4.1 4.7

Y6.5 7.1

Doc ID 13519 Rev 6 33/37

Package and packing information VNQ5E050AK-E

5.3 Packing information

Figure 40. PowerSSO-24 tube shipment (no suffix)

Base q.ty 49
Bulk q.ty 1225

C

B

A

Figure 41. PowerSSO-24 tape and reel shipment (suffix “TR”)

Tube length (± 0.5) 532
A 3.5
B 13.8
C (± 0.1) 0.6

All dimensions are in mm.

Reel dimensions

Base q.ty 1000
Bulk q.ty 1000
A (max) 330
B (min) 1.5
C (± 0.2) 13
F 20.2
G (+ 2 / -0) 24.4
N (min) 100
T (max) 30.4

Tape dimensions

According to Electronic Industries Association
(EIA) Standard 481 rev. A, Feb 1986

Tape width W 24
Tape hole spacing P0 (± 0.1) 4
Component spacing P 12
Hole diameter D (± 0.05) 1.55
Hole diameter D1 (min) 1.5
Hole position F (± 0.1) 11.5
Compartment depth K (max) 2.85
Hole spacing P1 (± 0.1) 2

All dimensions are in mm.

End

Start

Top

cover

tape

500mm min

Empty components pockets
saled with cover tape.

User direction of feed

No componentsNo components Components

500mm min

34/37 Doc ID 13519 Rev 6

VNQ5E050AK-E Order codes

6 Order codes

Table 17. Device summary

Order codes

Package

Tube Tape and reel

PowerSSO-24 VNQ5E050AK-E VNQ5E050AKTR-E

Doc ID 13519 Rev 6 35/37

Revision history VNQ5E050AK-E

7 Revision history

Table 18. Document revision history

Date Revision Changes

06-Jun-2007 1 Initial release.

Updated Table 9: Current sense (8 V < VCC<18V):
– added dk1/k1, dk2/k2, dk3/k3 parameters
– changed t

DSENSE2H

Updated Table 10: Open-load detection (8V<V
– added I

L(off2)r

Added Figure 9.: I
Added Figure 10.: Maximum current sense ratio drift vs load current

27-Mar-2008 2

Added Section 2.4: Waveforms.
Added Section 2.5: Electrical characteristics curves.
Updated Section 3: Application information:
– added Section 3.4: Current sense and diagnostic
Updated Section 4: Package and PC board thermal data:
– added Figure 37.: PowerSSO-24 thermal impedance junction

ambient single pulse (one channel ON)

– added Table 15: Thermal parameters.

17-Mar-2009 3 Changed Table 16: PowerSSO-24 mechanical data

max value from 300 µs to 250 µs

, I

and td_vol parameters

L(off2)f

OUT/ISENSE

vs I

OUT

.

CC

<18V):

Table 16: PowerSSO-24 mechanical data:

22-Jun-2009 4

– Changed L (min) value from 6 to 0.55
– Changed L (max) value from 1 to 0.85

22-Jul-2009 5 Updated Figure 39: PowerSSO-24 package dimensions.

26-Oct-2010 6

Table 5: Power section:

–V

: updated minimum value

USD

36/37 Doc ID 13519 Rev 6

VNQ5E050AK-E

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Doc ID 13519 Rev 6 37/37