Datasheet VND830MSP Datasheet (ST)

Features

Type R

VND830MSP 60 mΩ

DS(on)

(1)

I

OUT

6A

(1)

V

CC

36 V

VND830MSP

Double channel high-side driver

10

1. Per each channel.

■ CMOS compatible inputs

■ Open drain status outputs

■ On-state open-load detection

■ Off-state open-load detection

■ Shorted load protection

■ Undervoltage and overvoltage shutdown

■ Loss of ground protection

■ Very low standby current

■ Reverse battery protection

1

PowerSO-10

Description

The VND830MSP is a monolithic device designed
in| STMicroelectronics™ VIPower™ M0-3
Technology. The VND830MSP is intended for
driving any type of multiple load with one side
connected to ground.

The Active V
device against low energy spikes (see ISO7637
transient compatibility table). Active current
limitation combined with thermal shutdown and
automatic restart protects the device against
overload.

The current limitation threshold is aimed at
detecting the 21 W / 12 V standard bulb as an
overload fault.

The device detects the open-load condition in
both the on and off-state. In the off-state the
device detects if the output is shorted to V
device automatically turns off in the case where
the ground pin becomes disconnected.

pin voltage clamp protects the

CC

CC

. The

Table 1. Device summary

Order codes

Package

Tube Tape and reel

PowerSO-10 VND830MSP VND830MSP13TR

October 2010 Doc ID 7379 Rev 4 1/27

www.st.com

1

Contents VND830MSP

Contents

1 Block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

2 Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

2.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

2.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

2.3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

2.4 Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

3 Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

3.1 GND protection network against reverse battery . . . . . . . . . . . . . . . . . . . 16

3.1.1 Solution 1: a resistor in the ground line (RGND only) . . . . . . . . . . . . . . 16

3.1.2 Solution 2: a diode (D

3.2 Load dump protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

) in the ground line . . . . . . . . . . . . . . . . . . . . 17

GND

3.3 MCU I/O protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

3.4 Open-load detection in off-state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

3.5 Maximum demagnetization energy (V

= 13.5 V) . . . . . . . . . . . . . . . . . 19

CC

4 Package and PCB thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

4.1 PowerSO-10 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

5 Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

5.1 ECOPACK® packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

5.2 PowerSO-10 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

5.3 PowerSO-10 packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

6 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

2/27 Doc ID 7379 Rev 4

VND830MSP List of tables

List of tables

Table 1. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

Table 2. Suggested connections for unused and not connected pins . . . . . . . . . . . . . . . . . . . . . . . . 5

Table 3. Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

Table 4. Thermal data (per island) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

Table 5. Power output. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

Table 6. Protections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

Table 7. V
Table 8. Switching (V

Table 9. Logic inputs. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

Table 10. Status pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

Table 11. Open-load detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

Table 12. Truth table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

Table 13. Electrical transient requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

Table 14. Thermal parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

Table 15. PowerSO-10 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

Table 16. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

- output diode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

CC

= 13 V; Tj = 25 °C) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

CC

Doc ID 7379 Rev 4 3/27

List of figures VND830MSP

List of figures

Figure 1. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

Figure 2. Configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

Figure 3. Current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

Figure 4. Status timings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

Figure 5. Switching time waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

Figure 6. Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

Figure 7. Off-state output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Figure 8. High level input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Figure 9. Input clamp voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Figure 10. Turn-on voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Figure 11. Overvoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Figure 12. Turn-off voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Figure 13. ILIM vs Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Figure 14. On-state resistance vs VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Figure 15. Input high level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Figure 16. Input hysteresis voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Figure 17. On-state resistance vs Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Figure 18. Input low level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Figure 19. Status leakage current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Figure 20. Status low output voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Figure 21. Status clamp voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Figure 22. Open-load on-state detection threshold . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Figure 23. Open-load off-state voltage detection threshold . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Figure 24. Application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

Figure 25. Open-load detection in off-state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

Figure 26. Maximum turn-off current versus load inductance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

Figure 27. PowerSO-10 PC board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

Figure 28. R

Figure 29. Thermal impedance junction ambient single pulse . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

Figure 30. Thermal fitting model of a double channel HSD in PowerSO-10 . . . . . . . . . . . . . . . . . . . . 21

Figure 31. PowerSO-10 package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

Figure 32. PowerSO-10 suggested pad layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

Figure 33. PowerSO-10 tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

Figure 34. PowerSO-10 tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

vs PCB copper area in open box free air condition . . . . . . . . . . . . . . . . . . . . . . . 20

thj-amb

4/27 Doc ID 7379 Rev 4

VND830MSP Block diagram and pin description

1 Block diagram and pin description

Figure 1. Block diagram

V

cc

V

GND

INPUT1

STATUS1

INPUT2

STATUS2

cc

CLAMP

OVERT EMP. 1

OVERT EMP. 2

LOGIC

OVERVOLTAGE

UNDERVOLTAGE

CLAMP 1

DRIVER 1

CURRENT LIMITER 1

OPEN LOAD ON 1

OPEN LOAD OFF 1

CLAMP 2

DRIVER 2

CURRENT LIMITER 2

OPEN LOAD ON 2

OPEN LOAD OFF 2

OUTPUT1

OUTPUT2

Figure 2. Configuration diagram (top view)

GROUND
INPUT 1
STATUS 1
STATUS 2
INPUT 2

10

6
7

8
9

5
4
3

2

1

OUTPUT 1
OUTPUT 1
N.C.
OUTPUT 2
OUTPUT 2

11

V

CC

Table 2. Suggested connections for unused and not connected pins

Connection / pin Status N.C. Output Input

Floating X X X X

To ground X

Through 10 KΩ

resistor

Doc ID 7379 Rev 4 5/27

Electrical specifications VND830MSP

2 Electrical specifications

2.1 Absolute maximum ratings

Stressing the device above the rating listed in the “Absolute maximum ratings” table may
cause permanent damage to the device. These are stress ratings only and operation of the
device at these or any other conditions above those indicated in the Operating sections of
this specification is not implied. Exposure to Absolute Maximum Rating conditions for
extended periods may affect device reliability. Refer also to the STMicroelectronics SURE
Program and other relevant quality document.

Table 3. Absolute maximum ratings

Symbol Parameter Value Unit

V

- V

- I

I

- I

I

V

E

T

CC

CC

GND

OUT

OUT

I

IN

STAT

ESD

MAX

P

tot

T

T

c

stg

DC supply voltage 41 V

Reverse DC supply voltage -0.3 V

DC reverse ground pin current -200 mA

DC output current Internally limited A

Reverse DC output current -6 A

DC input current +/-10 mA

DC Status current +/-10 mA

Electrostatic discharge (human body model: R = 1.5 KΩ;
C=100pF)

–INPUT
–STATUS
–OUTPUT
–V

CC

4000
4000
5000
5000

Maximum switching energy
(L = 1.8 mH; R

=9A)

I

L

= 0 Ω; V

L

Power dissipation (per island) at T

Junction operating temperature Internally limited °C

j

= 13.5 V; T

bat

= 150 °C;

jstart

= 25 °C 73.5 W

lead

100 mJ

Case operating temperature -40 to 150

Storage temperature -55 to 150 °C

V
V
V
V

6/27 Doc ID 7379 Rev 4

VND830MSP Electrical specifications

2.2 Thermal data

Table 4. Thermal data (per island)

Symbol Parameter Value Unit

R

thj-lead

R

thj-amb

1. When mounted on a standard single-sided FR-4 board with 0.5 cm2 of Cu (at least 35 µm thick) connected
to all VCC pins. Horizontal mounting and no artificial air flow.

2. When mounted on a standard single-sided FR-4 board with 6 cm2 of Cu (at least 35 µm thick) connected to
all VCC pins. Horizontal mounting and no artificial air flow.

Thermal resistance junction-lead 1.7 °C/W

Thermal resistance junction-ambient 51.7

2.3 Electrical characteristics

Values specified in this section are for 8 V < V
otherwise stated.

Figure 3. Current and voltage conventions

I

IN1

I

IN2

I

I

V

STAT2

STAT1

IN2

STAT2

V

IN1

V

STAT1

V

INPUT 1

STATUS 1

INPUT 2

STATUS 2

(1)

< 36 V; -40 °C < Tj < 150 °C, unless

CC

V

(*)

F1

V

CC

I

OUT1

OUTPUT 1

V

I

OUT2

OUTPUT 2

V

OUT2

GND

I

GND

(2)

37

OUT1

°C/W

I

S

V

CC

Note:
V

Fn

= V

CCn

- V

during reverse battery condition.

OUTn

Doc ID 7379 Rev 4 7/27

Electrical specifications VND830MSP

Table 5. Power output

Symbol Parameter Test conditions Min. Typ. Max. Unit

V

V

V

R

I

L(off1)

I

L(off2)

I

L(off3)

I

L(off4)

Table 6. Protections

Operating supply

CC

voltage

Undervoltage shutdown 3 4 5.5 V

USD

Overvoltage shutdown 36 V

OV

On-state resistance

ON

I

Supply current

S

Off-state output current V

Off-state output current V

Off-state output current

Off-state output current

I

= 0.5 A; Tj = 25 °C

OUT

= 0.5 A; V

I

OUT

Off-state; V

= V

V

IN

OUT

Off-state; V

= V

V

IN

OUT

On-state; V

= 0 A

I

OUT

= V

IN

OUT

= 0 V; V

IN

V

= V

IN

OUT

= 125 °C

T

j

V

= V

IN

OUT

=25°C

T

j

5.5 13 36 V

60

> 8 V

CC

= 13 V;

CC

= 0 V

= 13 V;

CC

= 0 V; Tj = 25 °C

= 13 V; V

CC

IN

= 5 V;

120mΩmΩ

12 40 µA

12 25 µA

57mA

= 0 V 0 50 µA

= 3.5 V -75 0 µA

OUT

= 0 V; V

= 0 V; V

CC

CC

= 13 V;

= 13 V;

5µA

3µA

Symbol Parameter Test conditions Min. Typ. Max. Unit

T

T

t

SDL

I

V

demag

Shutdown temperature 150 175 200 °C

TSD

T

Reset temperature 135 °C

R

Thermal hysteresis 7 15 °C

hyst

Status delay in overload
conditions

Current limitation

lim

Turn-off output clamp voltage I

> T

T

j

TSD

V

= 13 V 6 9 15 A

CC

5.5 V < V

= 2A; L = 6mH

OUT

< 36 V 15 A

CC

V

-41V

CC

CC

-48V

20 µs

-

CC

55

V

Note: To ensure long term reliability under heavy overload or short circuit conditions, protection

and related diagnostic signals must be used together with a proper software strategy. If the
device is subjected to abnormal conditions, this software must limit the duration and number
of activation cycles.

8/27 Doc ID 7379 Rev 4

VND830MSP Electrical specifications

Table 7. VCC - output diode

Symbol Parameter Test conditions Min. Typ. Max. Unit

V

F

Table 8. Switching (V

Forward on voltage - I

= 13 V; Tj = 25 °C)

CC

= 1.3 A; Tj = 150 °C — — 0.6 V

OUT

Symbol Parameter Test conditions Min. Typ. Max. Unit

RL = 6.5 Ω from VIN rising

t

d(on)

Turn-on delay time

edge to V

OUT

= 1.3 V

53060µs

(see Figure 5)

RL = 6.5 Ω from VIN falling

t

d(off)

Turn-off delay time

edge to V

OUT

= 11.7 V

10 30 70 µs

(see Figure 5)

dV

/dt

OUT

dV

OUT

Table 9. Logic inputs

Turn-on voltage slope

(on)

/dt

Turn-off voltage slope

(off)

RL = 6.5 Ω from V
to V

OUT

= 10.4 V

(see Figure 5)

RL = 6.5 Ω from V
to V

OUT

= 1.3 V

(see Figure 5)

OUT

OUT

= 1.3 V

= 11.7 V

0.15

0.1

See

Figure 10

See

Figure 12

1.5 V/µs

0.75 V/µs

Symbol Parameter Test conditions Min. Typ. Max. Unit

V

V

V

I

V

I

I(hyst)

Input low level 1.25 V

IL

Low level input current V

IL

Input high level 3.25 V

IH

High level input current V

IH

= 1.25 V 1 µA

IN

= 3.25 V 10 µA

IN

Input hysteresis voltage 0.5 V

I

= 1 mA 6 6.8 8 V

Input clamp voltage

ICL

IN

I

= -1 mA -0.7 V

IN

Table 10. Status pin

Symbol Parameter Test conditions Min. Typ. Max. Unit

V

I

LSTAT

C

V

Status low output voltage I

STAT

STAT

Status leakage current Normal operation; V

Status pin Input capacitance Normal operation; V

STAT

I

Status clamp voltage

SCL

STAT

I

STAT

= 1.6 mA 0.5 V

= 5 V 10 µA

STAT

= 5 V 100 pF

STAT

= 1 mA 6 6.8 8 V

= - 1 mA -0.7 V

Doc ID 7379 Rev 4 9/27

Electrical specifications VND830MSP

Table 11. Open-load detection

Symbol Parameter Test conditions Min. Typ. Max. Unit

I

t

DOL(on)

V

t

DOL(off)

Open-load on-state detection threshold V

OL

Open-load on-state detection delay I

Open-load off-state voltage detection

OL

threshold

Open-load detection delay at turn-off 1000 µs

Figure 4. Status timings

OPEN LOAD STATUS TIMING (with external pull-up)

V

> V

OUT

V

INn

V

STATn

t

DOL(off)

I

OUT

OL

t

DOL(on)

Figure 5. Switching time waveforms

< I

= 5 V 0.6 0.9 1.2 A

IN

= 0 A 200 µs

OUT

= 0 V 1.5 2.5 3.5 V

V

IN

OVER TEMP STATUS TIMING

OL

V

INn

V

STATn

t

SDL

Tj > T

TSD

t

SDL

10/27 Doc ID 7379 Rev 4

VND830MSP Electrical specifications

Table 12. Truth table

Conditions Input Output Status

Normal operation

L
H

L

Current limitation

H
H

Overtemperature

Undervoltage

Overvoltage

Output voltage > V

Output current < I

Table 13. Electrical transient requirements

OL

OL

L
H

L
H

L
H

L
H

L
H

ISO T/R

Test level

L

H

L
X
X

L

L

L

L

L

L

H
H

L
H

(T

(T

< T

j

> T

j

H
H

H

H

L

X
X

H
H

L

H

H

L

TSD

TSD

) H
) L

7637/1

Test pulse

1- 25V

2 + 25V

3a - 25V

3b + 25V

4- 4V

5+ 26.5V

1. All functions of the device are performed as designed after exposure to disturbance.

2. One or more functions of the device is not performed as designed after exposure and cannot be returned to
proper operation without replacing the device.

I II III IV Delays and impedance

(1)

(1)

(1)

(1)

(1)

(1)

- 50V

+ 50V

- 50V

+ 50V

- 5V

+ 46.5V

(1)

(1)

(1)

(1)

(1)

(2)

- 75V

+ 75V

- 100V

+ 75V

- 6V

+ 66.5V

(1)

(1)

(1)

(1)

(1)

(2)

- 100V

+ 100V

- 150V

+ 100V

(1)

- 7V

+ 86.5V

(1)

(1)

(1)

(1)

(2)

2ms, 10Ω

0.2ms, 10Ω

0.1µs, 50Ω

0.1µs, 50Ω

100ms, 0.01Ω

400ms, 2Ω

Doc ID 7379 Rev 4 11/27

Electrical specifications VND830MSP

Figure 6. Waveforms

NORMAL OPERATION

INPUT

n

LOAD VOLTAGE

STATUS

V

INPUT

n

CC

n

LOAD VOLTAGE

STATUS

V

CC

INPUT

n

LOAD VOLTAGE
STATUS

n

n

UNDERVOLTAGE

V

USDhyst

V

USD

n

undefined

OVERVOLTAGE

VCC<V

OV

n

V

> V

CC

OV

INPUT

n

LOAD VOLTAGE

STATUS

INPUT

n

n

LOAD VOLTAGE

STATUS

T

INPUT

n

j

n

LOAD CURRENT

STATUS

n

OPEN LOAD with external pull-up

V

> V

n

V

OL

OUT

OL

OPEN LOAD without external pull-up

n

T

TSD

T

R

n

OVERTEMPERATURE

12/27 Doc ID 7379 Rev 4

VND830MSP Electrical specifications

2.4 Electrical characteristics curves

Figure 7. Off-state output current Figure 8. High level input current

Figure 9. Input clamp voltage Figure 10. Turn-on voltage slope

Figure 11. Overvoltage shutdown Figure 12. Turn-off voltage slope

IL(off1) (uA)

2.5

2.25

2

1.75

1.5

1.25

1

0.75

0.5

0.25

0

-50 -25 0 25 50 75 100 125 150 175

Off state
Vcc=36V

Vin=Vout=0V

Tc (°C)

Vicl (V)

8

7.8

7.6

7.4

7.2

7

6.8

6.6

6.4

6.2

6

Iin=1mA

-50 -25 0 25 50 75 100 125 150 175

Tc (°C)

Vov (V)

50

48

46

44

42

40

38

36

34

32

30

-50 -25 0 25 50 75 100 125 150 175

Tc (°C)

Iih (uA)

5

4.5

3.5

2.5

1.5

0.5

Vin=3.25V

4

3

2

1

0

-50 -25 0 25 50 75 100 125 150 175

Tc (°C)

dVout/dt(on) (V/ms)

800

700

600

500

400

300

200

100

Vcc=13V

Rl=6.5Ohm

0

-50 -25 0 25 50 75 100 125 150 175

Tc (ºC)

dVout/dt(off) (V/ms)

600

550

500

450

400

350

300

250

200

Vcc=13V

Rl=6.5Ohm

-50 -25 0 25 50 75 100 125 150 175

Tc (ºC)

Doc ID 7379 Rev 4 13/27

Electrical specifications VND830MSP

Figure 13. I

Ilim (A)

20

18

16

14

12

10

8

6

4

2

0

-50 -25 0 25 50 75 100 125 150 175

Figure 15. Input high level Figure 16. Input hysteresis voltage

Vih (V)

3.6

3.4

3.2

3

2.8

2.6

2.4

2.2

2

-50 -25 0 25 50 75 100 125 150 175

vs T

LIM

Vcc=13V

case

Tc (°C)

Tc (°C)

Figure 14. On-state resistance vs V

Ron (mOhm)

120

110

100

90

80

70

60

50

40

30

20

10

0

5 10152025303540

Tc=150°C

Tc=25°C

Tc= - 40°C

Iout=5A

Vcc (V)

Vhyst (V)

1.5

1.4

1.3

1.2

1.1

1

0.9

0.8

0.7

0.6

0.5

-50 -25 0 25 50 75 100 125 150 175

Tc (°C)

CC

Figure 17. On-state resistance vs Tcase Figure 18. Input low level

Ron (mOhm)

160

140

120

100

80

60

40

20

0

-50 -25 0 25 50 75 100 125 150 175

Iout=2A

Vcc=8V; 13V & 36V

Tc (°C)

Vil (V)

2.6

2.4

2.2

2

1.8

1.6

1.4

1.2

1

-50 -25 0 25 50 75 100 125 150 175

Tc (°C)

14/27 Doc ID 7379 Rev 4

VND830MSP Electrical specifications

Figure 19. Status leakage current Figure 20. Status low output voltage

Ilstat (uA)

0.05

0.04

Vstat=5V

0.03

0.02

0.01

0

-50 -25 0 25 50 75 100 125 150 175

Tc (°C)

Vstat (V)

0.8

0.7

Istat=1.6mA

0.6

0.5

0.4

0.3

0.2

0.1

0

-50 -25 0 25 50 75 100 125 150 175

Tc (°C)

Figure 21. Status clamp voltage Figure 22. Open-load on-state detection

threshold

Iol (mA)

1250

1200

1150

1100

1050

1000

950

900

850

800

750

Vcc=13V

Vin=5V

-50 -25 0 25 50 75 100 125 150 175

Tc (ºC)

Vscl (V)

8

7.8

7.6

7.4

7.2

6.8

6.6

6.4

6.2

Istat=1mA

7

6

-50 -25 0 25 50 75 100 125 150 175

Tc (°C)

Figure 23. Open-load off-state voltage

detection threshold

Vol (V)

5

4.5

4

3.5

3

2.5

2

1.5

1

0.5

0

Vin=0V

-50 -25 0 25 50 75 100 125 150 175

Tc (°C)

Doc ID 7379 Rev 4 15/27

Application information VND830MSP

3 Application information

Figure 24. Application schematic

+5V

+5V

+5V

μ

R

prot

C

R

prot

R

prot

R

prot

STATUS1

INPUT1

STATUS2

INPUT2

V

CC

D

ld

OUTPUT1

V

GND

GND

R

GND

D

OUTPUT2

GND

3.1 GND protection network against reverse battery

This section provides two solutions for implementing a ground protection network against
reverse battery.

3.1.1 Solution 1: a resistor in the ground line (R

This can be used with any type of load.

The following show how to dimension the R

1. R

2. R

where - I

≤ 600 mV / 2 (I

GND

≥ ( -VCC) / ( -I

GND

is the DC reverse ground pin current and can be found in the absolute

GND

S(on)max

GND

)

)

maximum rating section of the device datasheet.

GND

resistor:

GND

only)

Power dissipation in R

P

= ( -VCC)2/ R

D

GND

GND

(when V

< 0 during reverse battery situations) is:

CC

This resistor can be shared amongst several different HSDs. Please note that the value of
this resistor should be calculated with formula (1) where I
maximum on-state currents of the different devices.

16/27 Doc ID 7379 Rev 4

S(on)max

becomes the sum of the

VND830MSP Application information

Please note that, if the microprocessor ground is not shared by the device ground, then the
R

produces a shift (I

GND

S(on)max

* R

) in the input thresholds and the status output

GND

values. This shift varies depending on how many devices are ON in the case of several high­side drivers sharing the same R

GND

.

If the calculated power dissipation requires the use of a large resistor, or several devices
have to share the same resistor, then ST suggests using solution 2 below.

3.1.2 Solution 2: a diode (D

A resistor (R

= 1 kΩ) should be inserted in parallel to D

GND

) in the ground line

GND

inductive load. This small signal diode can be safely shared amongst several different HSD.
Also in this case, the presence of the ground network produces a shift (≈600 mV) in the
input threshold and the status output values if the microprocessor ground is not common
with the device ground. This shift not varies if more than one HSD shares the same
diode/resistor network. Series resistor in INPUT and STATUS lines are also required to
prevent that, during battery voltage transient, the current exceeds the Absolute Maximum
Rating. Safest configuration for unused INPUT and STATUS pin is to leave them
unconnected.

3.2 Load dump protection

Dld is necessary (voltage transient suppressor) if the load dump peak voltage exceeds the
V

maximum DC rating. The same applies if the device is subject to transients on the VCC

CC

line that are greater than those shown in the ISO T/R 7637/1 table.

3.3 MCU I/O protection

If a ground protection network is used and negative transients are present on the VCC line,
the control pins are pulled negative. ST suggests to insert a resistor (R
the microcontroller I/O pins from latching up.

if the device is driving an

GND

) in line to prevent

prot

The value of these resistors is a compromise between the leakage current of microcontroller
and the current required by the HSD I/Os (Input levels compatibility) with the latch-up limit of
microcontroller I/Os:

- V

CCpeak

/ I

latchup

≤ R

prot

≤ (V

OHμC

- V

IH

- V

GND

) / I

IHmax

Example

For the following conditions:

V

CCpeak

I

latchup

V

OHμC

5kΩ ≤ R

Recommended values are:

R

prot

= -100 V

≥ 20 mA

≥ 4.5 V

prot

= 10 kΩ

≤ 65 kΩ.

Doc ID 7379 Rev 4 17/27

Application information VND830MSP

3.4 Open-load detection in off-state

Off-state open-load detection requires an external pull-up resistor (RPU) connected between
OUTPUT pin and a positive supply voltage (V
microprocessor.

The external resistor has to be selected according to the following requirements:

1. no false open-load indication when load is connected: in this case we have to avoid

V

to be higher than V

OUT

V

= (V

OUT

PU

/ (RL + RPU))RL < V

; this results in the following condition

Olmin

Olmin.

2. no misdetection when load is disconnected: in this case the V

V

Because I
up resistor R

; this results in the following condition R

OLmax

may significantly increase if V

s(OFF)

should be connected to a supply that is switched OFF when the module is in

PU

standby.

Figure 25. Open-load detection in off-state

) like the +5 V line used to supply the

PU

has to be higher than

PU

- V

OUT

OLmax

) / I

L(off2)

< (V

PU

is pulled high (up to several mA), the pull-

out

V batt. VPU

V

CC

.

INPUT

STATUS

DRIVER

+

LOGIC

+

-

VOL

GROUND

R

PU

I

L(off2)

OUT

R

RL

18/27 Doc ID 7379 Rev 4

VND830MSP Application information

3.5 Maximum demagnetization energy (V

Figure 26. Maximum turn-off current versus load inductance

I

LM AX (A)

100

10

1

0,1 1 10 100

L( mH)

= 13.5 V)

CC

C

A

B

A = single pulse at T

Jstart

B= repetitive pulse at T

C= repetitive pulse at T

VIN, I

L

Note:
Values are generated with R
In case of repetitive pulses, T
specified above for curves B and C.

Demagnetization

= 0Ω.

L

jstart

= 150 °C

= 100 °C

Jstart

= 125 °C

Jstart

Demagnetization

(at beginning of each demagnetization) of every pulse must not exceed the temperature

Demagnetization

t

Doc ID 7379 Rev 4 19/27

Package and PCB thermal data VND830MSP

4 Package and PCB thermal data

4.1 PowerSO-10 thermal data

Figure 27. PowerSO-10 PC board

Note:
Layout condition of R
35 µm, Copper areas: from minimum pad lay-out to 8 cm

Figure 28. R

and Zth measurements (PCB FR4 area = 58 mm x 58 mm, PCB thickness = 2 mm, Cu thickness =

th

vs PCB copper area in open box free air condition

thj-amb

RTHj_amb (°C/W)

55

50

45

40

35

30

0246810

2

).

Tj-Tamb=50°C

PCB Cu heatsink area (cm^2)

20/27 Doc ID 7379 Rev 4

VND830MSP Package and PCB thermal data

Figure 29. Thermal impedance junction ambient single pulse

ZTH (°C/W)

1000

100

10

1

0.1

0.0001 0.001 0.01 0.1 1 10 100 1000

Time (s)

Equation 1

Z

THδ

where

: pulse calculation formula

RTHδ Z

THtp

1 δ–()+⋅=

δ tpT⁄=

0.5 cm

6 cm

2

2

Figure 30. Thermal fitting model of a double channel HSD in PowerSO-10

Tj_1

Pd1

Tj_2

C1

C1 C2

R1

Pd2

C3 C4

R3R1 R6R5R2

R2

R4

T_amb

C5 C6C2

Doc ID 7379 Rev 4 21/27

Package and PCB thermal data VND830MSP

Table 14. Thermal parameters

Area / island (cm2) Footprint 6

R1 (°C/W) 0.15

R2 (°C/W) 0.8

R3 (°C/W) 0.7

R4 (°C/W) 0.8

R5 (°C/W) 12

R6 (°C/W) 37 22

C1 (W.s/°C) 0.0006

C2 (W.s/°C) 2.1E-03

C3 (W.s/°C) 0.013

C4 (W.s/°C) 0.3

C5 (W.s/°C) 0.75

C6 (W.s/°C) 3 5

22/27 Doc ID 7379 Rev 4

VND830MSP Package and packing information

5 Package and packing information

5.1 ECOPACK® packages

In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK

®

packages, depending on their level of environmental compliance. ECOPACK®

®

is an ST trademark.

5.2 PowerSO-10 mechanical data

Figure 31. PowerSO-10 package dimensions

10

HE

h

A

F

A1

1

eB

0.25

D

= =

D1

= =

E2

DETAIL "A"

B

0.10 A

E

SEATING

PLANE

A

C

B

E4

SEATING

PLANE

A1

DETAIL "A"

L

α

Doc ID 7379 Rev 4 23/27

Package and packing information VND830MSP

Table 15. PowerSO-10 mechanical data

mm

Dim.

Min. Typ. Max.

A 3.35 3.65

(1)

A

A1 0 0.10

B 0.40 0.60

(1)

B

C 0.35 0.55

(1)

C

D 9.40 9.60

D1 7.40 7.60

E 9.30 9.50

3.4 3.6

0.37 0.53

0.23 0.32

E2 7.20 7.60

(1)

E2

E4 5.90 6.10

(1)

E4

e1.27

F 1.25 1.35

(1)

F

H 13.80 14.40

(1)

H

h0.50

L 1.20 1.80

(1)

L

α 0° 8°

(1)

α

1. Muar only POA P013P.

7.30 7.50

5.90 6.30

1.20 1.40

13.85 14.35

0.80 1.10

2° 8°

24/27 Doc ID 7379 Rev 4

VND830MSP Package and packing information

5.3 PowerSO-10 packing information

Figure 32. PowerSO-10 suggested

pad layout

Figure 33. PowerSO-10 tube shipment

(no suffix)

14.6 - 14.9

10.8 - 11

6.30

1

2

3

9.5
4

5

0.67 - 0.73

10

0.54 - 0. 6

9

8

7

1.27

6

C

A

All dimensions are in mm.

Casablanca 50 1000 532 10.4 16.4 0.8

B

Base Q.ty Bulk Q.ty Tube length (± 0.5) A B C (± 0.1)

Muar 50 1000 532 4.9 17.2 0.8

Figure 34. PowerSO-10 tape and reel shipment (suffix “TR”)

Reel dimensions

Base Q.ty 600
Bulk Q.ty 600
A (max) 330
B (min) 1.5
C (± 0.2) 13
F 20.2
G (+ 2 / -0) 24.4
N (min) 60
T (max) 30.4

MUARCASABLANCA

A

B

C

Tape dimensions

According to Electronic Industries Association
(EIA) Standard 481 rev. A, Feb. 1986

Tape width W 24
Tape Hole Spacing P0 (± 0.1) 4
Component Spacing P 24
Hole Diameter D (± 0.1/-0) 1.5
Hole Diameter D1 (min) 1.5
Hole Position F (± 0.05) 11.5
Compartment Depth K (max) 6.5
Hole Spacing P1 (± 0.1) 2

All dimensions are in mm.

Doc ID 7379 Rev 4 25/27

Top

cover

tape

End

500mm min

Empty components pock ets
saled with cover tape.

User direction of feed

Start

No componentsNo components Components

500mm min

Revision history VND830MSP

6 Revision history

Table 16. Document revision history

Date Revision Changes

09-Sep-2004 1 Initial release.

Current and voltage convention update (page 2).
Configuration diagram (top view) & suggested connections for unused

and n.c. pins insertion (page 2).

03-Mar-2008 2

05-Dec-2008 3

08-Oct-2010 4 Updated Figure 5: Switching time waveforms

4 cm2 Cu condition insertion in thermal data table (page 3).

- output diode section update (page 4).

V

CC

Protections note insertion (page 4).
Revision history table insertion (page 18).
Disclaimers update (page 19).

Document reformatted and restructured.
Added contents, list of tables and figures.
Added ECOPACK® packages information.

26/27 Doc ID 7379 Rev 4

VND830MSP

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Doc ID 7379 Rev 4 27/27