Datasheet VND830E-E Datasheet (ST)

Features

Type R

VND830E-E 65 mΩ

1. Per each channel.

■ Output current: 9.5 A

■ CMOS compatible inputs

■ On-state open-load detection

■ Off-state open-load detection

■ Output stuck to V

■ Open drain status outputs

■ Undervoltage shutdown

■ Overvoltage clamp

■ Thermal shutdown

■ Current and power limitation

■ Very low standby current

■ Protection against loss of ground and loss of

V

CC

■

Reverse battery protection

■ Very low electromagnetic susceptibility

■ Optimized electromagnetic emission

DS(on)

(1)

CC

I

OUT

9.5 A

detection

(1)

V

CC

36 V

VND830E-E

Double channel high-side driver

Description

The VND830E-E is a monolithic device made by
using STMicroelectronics™ VIPower™ M0-3
technology. It is intended for driving resistive or
inductive loads with one side connected to
ground.

Active V
against low energy spikes (see ISO7637 transient
compatibility table).

The device detects open-load condition both in
on-state and off-state. Output shorted to V
detected in the off-state.

Output current limitation protects the device in
overload condition. In case of long duration
overload, the device limits the dissipated power to
safe level up to thermal shutdown intervention.

pin voltage clamp protects the device

CC

CC

is

Thermal shutdown with automatic restart allows
the device to recover normal operation as soon as
fault condition disappears.

Table 1. Device summary

Package

SO-16L VND830E-E VND830ETR-E

May 2010 Doc ID 17461 Rev 1 1/26

Order codes

Tube Tape and reel

www.st.com

1

VND830E-E Contents

Contents

1 Block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

2 Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

2.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

2.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

2.3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

2.4 Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

3 Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

3.1 GND protection network against reverse battery . . . . . . . . . . . . . . . . . . . 16

3.1.1 Solution 1: a resistor in the ground line (RGND only) . . . . . . . . . . . . . . 16

3.1.2 Solution 2: a diode (D

3.2 Load dump protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

) in the ground line . . . . . . . . . . . . . . . . . . . . 17

GND

3.3 MCU I/O protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

3.4 Open-load detection in off-state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

3.5 Maximum demagnetization energy . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

4 Package and PCB thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

4.1 SO-16L thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

5 Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

5.1 ECOPACK® packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

6 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

Doc ID 17461 Rev 1 2/26

List of tables VND830E-E

List of tables

Table 1. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

Table 2. Suggested connections for unused and not connected pins . . . . . . . . . . . . . . . . . . . . . . . . 5

Table 3. Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

Table 4. Thermal data (per island) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

Table 5. Power outputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

Table 6. Switching (V

Table 7. Logic input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

Table 8. V

- output diode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

CC

Table 9. Status pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

Table 10. Protections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

Table 11. Open-load detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

Table 12. Truth table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

Table 13. Electrical transient requirements on V
Table 14. Electrical transient requirements on V
Table 15. Electrical transient requirements on V

Table 16. Thermal parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

Table 17. SO-16L mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

Table 18. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

= 13 V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

CC

pin (part 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

CC

pin (part 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

CC

pin (part 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

CC

3/26 Doc ID 17461 Rev 1

VND830E-E List of figures

List of figures

Figure 1. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

Figure 2. Configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

Figure 3. Current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

Figure 4. Status timings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

Figure 5. Switching time waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

Figure 6. Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

Figure 7. Off-state output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Figure 8. High level input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Figure 9. Input clamp voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Figure 10. Status leakage current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Figure 11. Status low output voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Figure 12. Status clamp voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Figure 13. On-state resistance vs T
Figure 14. On-state resistance vs V

Figure 15. Open-load on-state detection threshold . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Figure 16. Open-load off-state detection threshold . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Figure 17. Input high level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Figure 18. Input low level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Figure 19. Input hysteresis voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Figure 20. Overvoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Figure 21. Turn-on voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Figure 22. Turn-off voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Figure 23. I

LIM vs Tcase

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Figure 24. Undervoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Figure 25. Application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

Figure 26. Open-load detection in off-state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

Figure 27. Maximum turn-off current versus load inductance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

Figure 28. SO-16L PC board
Figure 29. R

vs PCB copper area in open box free air condition . . . . . . . . . . . . . . . . . . . . . . . 20

thj-amb

(1)

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

Figure 30. SO-16 L thermal impedance junction ambient single pulse . . . . . . . . . . . . . . . . . . . . . . . . 21

Figure 31. Thermal fitting model of a quad channel HSD in SO-16L . . . . . . . . . . . . . . . . . . . . . . . . . . 21

Figure 32. SO-16L package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

case

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

CC

Doc ID 17461 Rev 1 4/26

Block diagram and pin description VND830E-E

1 Block diagram and pin description

Figure 1. Block diagram

V

cc

V

GND

INPUT1

STATUS1

INPUT2

STATUS2

cc

CLAMP

OVERT EMP. 1

OVERT EMP. 2

LOGIC

OVERVOLTAGE

UNDERVOLTAGE

CLAMP 1

DRIVER 1

CURRENT LIMITER 1

OPEN-LOAD ON 1

OPEN-LOAD OFF 1

CLAMP 2

DRIVER 2

CURRENT LIMITER 2

OPEN-LOAD ON 2

OPEN-LOAD OFF 2

OUTPUT1

OUTPUT2

Figure 2. Configuration diagram (top view)

V

CC

1

16

N.C.

GND

INPUT 1

STATUS 1

STATUS 2

INPUT 2

V

CC

Table 2. Suggested connections for unused and not connected pins

Connection / pin Status N.C. Output Input

Floating X X X X

To ground - X -

8

9

V

CC

OUTPUT 1

OUTPUT 1

OUTPUT 1

OUTPUT 2

OUTPUT 2

OUTPUT 2

V

CC

Through 10 KΩ

resistor

5/27 Doc ID 17461 Rev 1

VND830E-E Electrical specifications

2 Electrical specifications

2.1 Absolute maximum ratings

Stressing the device above the rating listed in Tab le 3 may cause permanent damage to the
device. These are stress ratings only and operation of the device at these or any other
conditions above those indicated in the operating sections of this specification is not implied.
Exposure to absolute maximum rating conditions for extended periods may affect device
reliability. Refer also to the STMicroelectronics SURE Program and other relevant quality
document.

Table 3. Absolute maximum ratings

Symbol Parameter Value Unit

V

- V

- I

I

- I

I

V

E

T

CC

CC

GND

OUT

OUT

I

IN

STAT

ESD

MAX

P

tot

T

T

c

stg

DC supply voltage 41 V

Reverse DC supply voltage - 0.3 V

DC reverse ground pin current - 200 mA

DC output current Internally limited A

Reverse DC output current - 6 A

DC input current +/- 10 mA

DC status current +/- 10 mA

Electrostatic discharge (Human Body Model: R = 1.5 KΩ;
C = 100 pF)

- INPUT

- STATUS

- OUTPUT

- V

CC

4000
4000
5000
5000

Maximum switching energy
(L = 0.45 mH; R

= 13.5 A)

I

L

= 0 Ω; V

L

= 13.5 V; T

bat

jstart

= 150 °C;

57 mJ

Power dissipation TC=25°C 8.3 W

Junction operating temperature Internally limited °C

j

Case operating temperature - 40 to 150 °C

Storage temperature - 55 to 150 °C

V
V
V
V

Doc ID 17461 Rev 1 6/27

Electrical specifications VND830E-E

2.2 Thermal data

Table 4. Thermal data (per island)

Symbol Parameter Value Unit

R

thj-lead

R

thj-amb

1. When mounted on a standard single-sided FR-4 board with 0.5 cm2 of Cu (at least 35 µm thick) connected to all VCC pins.

Horizontal mounting and no artificial air flow.

2. When mounted on a standard single-sided FR-4 board with 6 cm2 of Cu (at least 35 µm thick) connected to all VCC pins.

Horizontal mounting and no artificial air flow.

Thermal resistance junction-lead 15 °C/W

Thermal resistance junction-ambient 65

(1)

47

(2)

°C/W

2.3 Electrical characteristics

Values specified in this section are for 8 V < V
otherwise stated.

(Per each channel)

Figure 3. Current and voltage conventions

I

IN1

INPUT 1

I

V

IN1

STAT1

STATUS 1

V

STAT1

I

IN2

INPUT 2

I

V

STAT2

IN2

STATUS 2

V

STAT2

< 36 V; -40 °C < Tj < 150 °C, unless

CC

(1)

V

F1

V

CC

I

OUT1

OUTPUT 1

V

OUT1

I

OUT2

OUTPUT 2

V

OUT2

GND

I

GND

I

S

V

CC

1. VFn = V

Table 5. Power outputs

CCn

- V

during reverse battery condition.

OUTn

Symbol Parameter Test conditions Min. Typ. Max. Unit

V

V

V

R

Operating supply voltage 5.5 13 36 V

CC

Undervoltage shutdown 3 4 5.5 V

USD

Overvoltage shutdown 36 V

OV

I

= 2 A; Tj = 25°C

On-state resistance

ON

OUT

I

OUT

= 2 A; V

CC

7/27 Doc ID 17461 Rev 1

> 8 V

65

130mΩmΩ

VND830E-E Electrical specifications

Table 5. Power outputs (continued)

Symbol Parameter Test conditions Min. Typ. Max. Unit

µA

40

µA

25

mA

7

5µA

3µA

I

Supply current

S

I

L(off1)

I

L(off2)

I

L(off3)

I

L(off4)

Table 6. Switching (V

Off-state output current V

Off-state output current V

Off-state output current

Off-state output current

CC

Off-state; V
V

Off-state; V
V

On-state; V
V

V
T

V
T

= 13 V)

= V

IN

= V

IN

= 5 V; I

IN

= V

IN

= 0 V; V

IN

= V

IN

= 125°C

j

= V

IN

=25°C

j

= 13 V;

CC

= 0 V

OUT

= 13 V;

CC

= 0 V; Tj = 25°C

OUT

= 13 V;

CC

= 0 A

OUT

= 0 V 0 50 µA

OUT

= 3.5 V -75 0 µA

OUT

OUT

OUT

= 0 V; V

= 0 V; V

CC

CC

= 13 V;

= 13 V;

12

12

5

Symbol Parameter Test conditions Min. Typ. Max. Unit

= 6.5 Ω from VIN rising

R

t

d(on)

t

d(off)

dV

OUT

dV

OUT

Table 7. Logic input

Turn-on delay time

Turn-off delay time

/dt

Turn-on voltage slope

(on)

/dt

Turn-off voltage slope

(off)

L

edge to V

= 6.5 Ω from VIN falling

R

L

edge to V

R

= 6.5 Ω from V

L

to V

OUT

= 6.5 Ω from V

R

L

to V

OUT

= 1.3 V

OUT

= 11.7 V

OUT

= 10.4 V

= 1.3 V

OUT

OUT

= 1.3 V

= 11.7 V

-50-µs

-50-µs

See

-

-

Figure 21

See

Figure 22

-V/µs

-V/µs

Symbol Parameter Test conditions Min. Typ. Max. Unit

V

V

V

V

I

I(hyst)

Input low level 1.25 V

IL

Low level input current V

I

IL

Input high level 3.25 V

IH

High level input current V

IH

= 1.25 V 1 µA

IN

= 3.25 V 10 µA

IN

Input hysteresis voltage 0.5 V

Input clamp voltage

ICL

I

IN

I

IN

= 1 mA
= -1 mA

66.8

-0.7

8V

V

Doc ID 17461 Rev 1 8/27

Electrical specifications VND830E-E

Table 8. VCC - output diode

Symbol Parameter Test conditions Min. Typ. Max. Unit

V

Table 9. Status pin

Forward on voltage -I

F

=1.2A; Tj= 150 °C - - 0.6 V

OUT

Symbol Parameter Test conditions Min. Typ. Max. Unit

V

STAT

I

LSTAT

C

STAT

V

Table 10. Protections

Status low output voltage I

STAT

Status leakage current Normal operation; V

Status pin Input capacitance Normal operation; V

I

Status clamp voltage

SCL

(1)

STAT

I

STAT

= 1.6 mA 0.5 V

= 5 V 10 µA

STAT

= 5 V 100 pF

STAT

= 1 mA
= - 1 mA

66.8

- 0.7

8V

Symbol Parameter Test conditions Min. Typ. Max. Unit

T

T

T

t

SDL

I

V

demag

1. To ensure long term reliability under heavy overload or short circuit conditions, protection and related
diagnostic signals must be used together with a proper software strategy. If the device is subjected to
abnormal conditions, this software must limit the duration and number of activation cycles.

Shutdown temperature 150 175 200 °C

TSD

Reset temperature 135 °C

R

Thermal hysteresis 7 15 °C

hyst

Status delay in overload
conditions

Current limitation

lim

Turn-off output clamp
voltage

> T

T

j

TSD

V

= 13 V

CC

5.5 V < V

I

OUT

< 36 V

CC

= 2A; L = 6mH VCC-41 VCC-48 VCC-55 V

9.5 13.5 18

20 µs

18

V

A
A

Table 11. Open-load detection

Symbol Parameter Test conditions Min. Typ. Max. Unit

t

t

I

OL

DOL(on)

V

OL

DOL(off)

Open-load on-state detection
threshold

Open-load on-state detection
delay

Open-load off-state voltage
detection threshold

Open-load detection delay at
turn-off

V

= 5 V 50 115 200 mA

IN

I

= 0 A 200 µs

OUT

= 0 V 1.5 2.9 3.5 V

V

IN

9/27 Doc ID 17461 Rev 1

1000 µs

VND830E-E Electrical specifications

Figure 4. Status timings

OPEN- LOAD STATUS TIMING (with external pull-up)

V

> V

OUT

V

INn

V

STATn

t

DOL(off)

I

OUT

OL

t

DOL(on)

Figure 5. Switching time waveforms

< I

OVERTEMP STATUS TIMING

OL

V

INn

V

STATn

t

SDL

Tj > T

TSD

t

SDL

Table 12. Truth table

Conditions Input

Normal operation

Current limitation

Overtemperature

Undervoltage

n

L

H

L
H
H

L
H

L
H

Output

L

H

L
X
X

L

L

L

L

n

(T
(T

< T

j

> T

j

Status

TSD

TSD

n

H
H

H
) H
) L

H

L

X

X

Doc ID 17461 Rev 1 10/27

Electrical specifications VND830E-E

Table 12. Truth table (continued)

Conditions Input

Overvoltage

Output voltage > V

Output current < I

Table 13. Electrical transient requirements on VCC pin (part 1)

OLn

OLn

n

L

H

L

H

L

H

ISO T/R

Output

L
L

H
H

L

H

Test levels

n

7637/1

test pulse

1 -25 V -50 V -75 V -100 V

2 +25 V +50 V +75 V +100 V

3a -25 V -50 V -100 V -150 V

I II III IV Delays and impedance

3b +25 V +50 V +75 V +100 V 0.1 µs, 50 Ω

4 -4 V -5 V -6 V -7 V 100 ms, 0.01 Ω

5 +26.5V +46.5V +66.5V +86.5V 400ms, 2Ω

Status

H

H

L

H

H

L

2ms, 10Ω

0.2 ms, 10 Ω

0.1 µs, 50 Ω

n

Table 14. Electrical transient requirements on VCC pin (part 2)

ISO T/R

Test levels results

7637/1

test pulse

I II III IV

1 CCCC

2 CCCC

3a CCCC

3b CCCC

4 CCCC

5CEEE

Table 15. Electrical transient requirements on VCC pin (part 3)

Class Contents

C

E

All functions of the device are performed as designed after exposure to
disturbance.

One or more functions of the device is not performed as designed after
exposure to disturbance and cannot be returned to proper operation without
replacing the device.

11/27 Doc ID 17461 Rev 1

VND830E-E Electrical specifications

Figure 6. Waveforms

NORMAL OPERATION

INPUT

n

OUTPUT VOLTAGE

STATUS

n

V

CC

INPUT

n

OUTPUT VOLTAGE

STATUS

V

CC

INPUT

n

OUTPUT VOLTAGE

STATUS

n

n

n

n

V

USD

VCC<V

UNDERVOLTAGE

OVERVOLTAGE

OV

V

USDhyst

undefined

V

> V

CC

OV

INPUT

n

OUTPUT VOLTAGE

STATUS

n

INPUT

n

OUTPUT VOLTAGE

STATUS

n

T

j

INPUT

n

OUTPUT CURRENT

STATUS

n

OPEN-LOAD with external pull-up

V

> V

n

V

OL

OUT

OL

OPEN-LOAD without external pull-up

n

T

TSD

T

R

n

OVERTEMPERATURE

Doc ID 17461 Rev 1 12/27

Electrical specifications VND830E-E

2.4 Electrical characteristics curves

Figure 7. Off-state output current Figure 8. High level input current

IL(off1) (µA)

0.9

0.8

0.7

0.6

0.5

0.4

0.3

0.2

0.1

0

-50 -25 0 25 50 75 100 125 150 175

Off state

Vcc=13V

Vin=Vout=0 V

Tc ( °C )

Figure 9. Input clamp voltage Figure 10. Status leakage current

lih (µA)

6

5.5

5

Vin=3.25V

4.5

4

3.5

3

2.5

2

1.5

1

0.5

-50 -25 0 25 50 75 100 125 150 175

Tc ( °C )

Vic l (V)

12

11

10

Iin=1mA

9

8

7

6

5

4

3

2

-50 -25 0 25 50 75 100 125 150 175

Tc (° C )

Ilstat (µA)

0.2

0.195

0.19

0.185

0.18

0.175

0.17

0.165

0.16

0.155

0.15

Vstat=5V

-50 -25 0 25 50 75 100 125 150 175

Tc (°C)

Figure 11. Status low output voltage Figure 12. Status clamp voltage

Vstat ( V)

0.8

0.7

Istat=1.6mA

0.6

0.5

0.4

0.3

Vscl (V)

10

9

Istat=1mA

8

7

6

5

0.2

0.1

0

-50 -25 0 25 50 75 100 125 150 175

4

3

2

Tc ( °C )

13/27 Doc ID 17461 Rev 1

-50 - 25 0 25 50 75 100 125 150 175

Tc ( °C )

VND830E-E Electrical specifications

Figure 13. On-state resistance vs T

Ron (mOh m)

160

140

120

100

80

60

40

20

0

-50 -25 0 25 50 75 100 125 150 175

Iout=2A

Vcc=8V; 13V & 36V

Tc (° C)

case

Figure 15. Open-load on-state detection

threshold

Iol (mA)

150

140

130

120

110

100

90

80

70

Vcc=13V

Vin=5V

-50 -25 0 25 50 75 100 125 150 175

Tc ( °C )

Figure 14. On-state resistance vs V

Ron (mOh m)

120

105

90

75

60

45

30

15

0

5 10152025303540

Vcc (V)

Figure 16. Open-load off-state detection

threshold

Vol (V)

5

4.5

4

3.5

3

2.5

2

1.5

1

0.5

0

-50 -25 0 25 50 75 100 125 150 175

Vin=0V

Tc ( °C )

Figure 17. Input high level Figure 18. Input low level

CC

Tc=150°C

Tc= 25 °Tc=25°C

Tc=-40°C

Iout=2A

Vih ( V)

3.6

3.4

3.2

3

2.8

2.6

2.4

2.2

2

-50 -25 0 25 50 75 100 125 150 175

Tc ( °C )

Vil (V)

2.6

2.4

2.2

2

1.8

1.6

1.4

1.2

1

-50 -25 0 25 50 75 100 125 150 175

Tc ( °C )

Doc ID 17461 Rev 1 14/27

Electrical specifications VND830E-E

Figure 19. Input hysteresis voltage Figure 20. Overvoltage shutdown

Vhy st ( V)

2

1.75

1.5

1.25

1

0.75

0.5

0.25

0

-50 -25 0 25 50 75 100 125 150 175

Tc ( °C )

Vov (V)

70

65

60

55

50

45

40

35

30

25

20

15

10

-50 -25 0 25 50 75 100 125 150 175

Tc ( °C )

Figure 21. Turn-on voltage slope Figure 22. Turn-off voltage slope

dVout/dt(on) (Vms)

800

700

600

500

400

300

200

100

0

-50 -25 0 25 50 75 100 125 150 175

Figure 23. I

Ilim (A)

30

25

20

15

10

5

0

-50 -25 0 25 50 75 100 125 150 175

Vcc=13V

Rl=6.5Ohm

LIM vs Tcase

Vcc=13V

Tc (° C )

Tc ( °C )

dVout/dt(off) (Vms)

500

450

400

350

300

250

200

150

100

50

0

Vcc=13V

Rl=6.5Ohm

-50 -25 0 25 50 75 100 125 150 175

Tc ( °C )

Figure 24. Undervoltage shutdown

Vusd (V)

10

9

8

7

6

5

4

3

2

1

-50 - 25 0 25 50 75 100 125 150 175

Tc ( °C )

15/27 Doc ID 17461 Rev 1

VND830E-E Application information

3 Application information

Figure 25. Application schematic

+5V

+5V

+5V

μ

R

prot

C

R

prot

R

prot

R

prot

STATUS1

INPUT1

STATUS2

INPUT2

V

CC

D

ld

OUTPUT1

D

OUTPUT2

GND

GND

R

V

GND

GND

3.1 GND protection network against reverse battery

This section provides two solutions for implementing a ground protection network against
reverse battery.

3.1.1 Solution 1: a resistor in the ground line (R

This can be used with any type of load.

The following shows how to dimension the R

1. R

2. R

where -I

≤ 600 mV / (I

GND

≥ (-VCC) / (-I

GND

is the DC reverse ground pin current and can be found in the absolute

GND

S(on)max

GND

)

)

maximum rating section of the device’s datasheet.

GND

resistor:

GND

only)

Power dissipation in R

P

= (-VCC)2/ R

D

GND

GND

(when V

< 0 during reverse battery situations) is:

CC

This resistor can be shared amongst several different HSD. Please note that the value of this
resistor should be calculated with formula (1) where I

S(on)max

becomes the sum of the

maximum on-state currents of the different devices.

Doc ID 17461 Rev 1 16/27

Application information VND830E-E

Please note that, if the microprocessor ground is not common with the device ground, then
the R

produces a shift (I

GND

S(on)max

* R

) in the input thresholds and the status output

GND

values. This shift varies depending on how many devices are ON in the case of several high­side drivers sharing the same R

GND

.

If the calculated power dissipation requires the use of a large resistor, or several devices
have to share the same resistor, then ST suggests using Section 3.1.2 described below.

3.1.2 Solution 2: a diode (D

A resistor (R

= 1 kΩ) should be inserted in parallel to D

GND

) in the ground line

GND

inductive load. This small signal diode can be safely shared amongst several different HSD.
Also in this case, the presence of the ground network produce a shift (~600 mV) in the input
threshold and the status output values if the microprocessor ground is not common with the
device ground. This shift does not vary if more than one HSD shares the same
diode/resistor network. Series resistor in INPUT and STATUS lines are also required to
prevent that, during battery voltage transient, the current exceeds the absolute maximum
rating. Safest configuration for unused INPUT and STATUS pin is to leave them
unconnected.

3.2 Load dump protection

Dld is necessary (Voltage Transient Suppressor) if the load dump peak voltage exceeds the
V

maximum DC rating. The same applies if the device is subjected to transients on the

CC

V

line that are greater than those shown in Tab l e 13 .

CC

3.3 MCU I/O protection

If a ground protection network is used and negative transients are present on the VCC line,
the control pins are pulled negative. ST suggests to insert a resistor (R
the microcontroller I/O pins from latching up.

if the device is driving an

GND

) in line to prevent

prot

The value of these resistors is a compromise between the leakage current of microcontroller
and the current required by the HSD I/Os (Input levels compatibility) with the latch-up limit of
microcontroller I/Os:

- V

CCpeak

/ I

latchup

≤ R

prot

≤ (V

OHμC

- V

IH

- V

Example

For the following conditions:

V

CCpeak

I

latchup

V

OHμC

5kΩ ≤ R

The recommended values are:

R

prot

17/27 Doc ID 17461 Rev 1

= -100 V

≥ 20 mA

≥ 4.5 V

prot

= 10 kΩ

≤ 65 kΩ.

GND

) / I

IHmax

VND830E-E Application information

3.4 Open-load detection in off-state

Off-state open-load detection requires an external pull-up resistor (RPU) connected between
OUTPUT pin and a positive supply voltage (V
microprocessor.

The external resistor has to be selected according to the following requirements:

1. No false open-load indication when load is connected: in this case it needs to avoid
V

to be higher than V

OUT

V

= (V

OUT

PU

/ (RL + RPU))RL < V

; this results in the following condition

Olmin

Olmin.

2. No misdetection when load is disconnected: in this case the V
V

Because I
up resistor R

; this results in the following condition R

OLmax

may significantly increase if V

s(OFF)

should be connected to a supply that is switched OFF when the module is in

PU

standby.

) like the +5 V line used to supply the

PU

has to be higher than

< (V

PU

is pulled high (up to several mA), the pull-

out

PU

- V

OUT

OLmax

) / I

L(off2)

.

The values of V

OLmin

, V

OLmax

and I

are available in Chapter 2: Electrical specifications.

L(off2)

Figure 26. Open-load detection in off-state

IN P U T

STATUS

DRIVER

+

LOGIC

+

-

GROUND

V batt. VPU

V

CC

I

L(o ff2)

OUT

R

V

OL

R

PU

R

L

Doc ID 17461 Rev 1 18/27

Application information VND830E-E

3.5 Maximum demagnetization energy

Figure 27. Maximum turn-off current versus load inductance

I

LM AX ( A )

100

10

A

B

C

1

0,1 1 10 100

A = single pulse at T

B= repetitive pulse at T

C= repetitive pulse at T

Jstart

Jstart

Jstart

= 150°C

= 125°C

Conditions:

= 13.5 V

V

CC

VIN, I

L

Demagnetization

Note: Values are generated with RL = 0

In case of repetitive pulses, T

jstart

must not exceed the temperature specified above for curves B and C.

L( mH )

= 100°C

Demagnetization

Ω

.

(at beginning of each demagnetization) of every pulse

Demagnetization

t

19/27 Doc ID 17461 Rev 1

VND830E-E Package and PCB thermal data

4 Package and PCB thermal data

4.1 SO-16L thermal data

Figure 28. SO-16L PC board

1. Layout condition of R

Cu thickness = 35 µm, Copper areas: 0.5 cm2, 6 cm2).

Figure 29. R

70

thj-amb

RTH j-amb (°C/W)

and Zth measurements (PCB FR4 area = 41 mm x 48 mm, PCB thickness = 2 mm,

th

vs PCB copper area in open box free air condition

(1)

65

60

55

50

45

40

01234567

PCB Cu heatsink area (cm^2)

Doc ID 17461 Rev 1 20/27

Package and PCB thermal data VND830E-E

Figure 30. SO-16 L thermal impedance junction ambient single pulse

Equation 1

Z

THδ

where

: pulse calculation formula

RTHδ Z

THtp

1 δ–()+⋅=

δ tpT⁄=

Figure 31. Thermal fitting model of a quad channel HSD in SO-16L

Tj_1

Pd1

Tj_2

C1

C1 C2

R1

Pd2

C3 C4

R3R1 R6R5R2

R2

R4

T_amb

C5 C6C2

21/27 Doc ID 17461 Rev 1

VND830E-E Package and PCB thermal data

Table 16. Thermal parameters

Area/ island (cm2) Footprint 6

R1 (°C/W) 0.15

R2 (°C/W) 0.7

R3 (°C/W) 2

R4 (°C/W) 10

R5 (°C/W) 15

R6 (°C/W) 37 22

C1 (W.s/°C) 0.0005

C2 (W.s/°C) 0.003

C3 (W.s/°C) 0.015

C4 (W.s/°C) 0.15

C5 (W.s/°C) 1.5

C6 (W.s/°C) 3 5

Doc ID 17461 Rev 1 22/27

Package and packing information VND830E-E

5 Package and packing information

5.1 ECOPACK® packages

In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK

Figure 32. SO-16L package dimensions

®

packages, depending on their level of environmental compliance. ECOPACK®

®

is an ST trademark.

23/27 Doc ID 17461 Rev 1

VND830E-E Package and packing information

Table 17. SO-16L mechanical data

mm.

DIM.

Min. Typ. Max.

A 2.65

a1 0.1 0.2

a2 2.45

b 0.35 0.49

b1 0.23 0.32

C0.5

c1 45° (typ.)

D 10.1 10.5

E 10.0 10.65

e1.27

e3 8.89

F7.4 7.6

L 0.5 1.27

M 0.75

S 8° (max.)

Doc ID 17461 Rev 1 24/27

Revision history VND830E-E

6 Revision history

Table 18. Document revision history

Date Revision Changes

03-May-2010 1 Initial release.

25/27 Doc ID 17461 Rev 1

VND830E-E

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Doc ID 17461 Rev 1 26/26