Page 1
Features
Type R
VND830AEP-E 60mΩ
1. Per each channel.
DS(on)
(1)
I
6A
OUT
(1)
V
CC
36V
VND830AEP-E
Double channel high side driver
■ DC short circuit current: 6A
■ CMOS compatible inputs
■ Proportional load current sense
■ Undervoltage and overvoltage shutdown
■ Overvoltage clamp
■ Thermal shutdown
■ Current limitation
■ Very low standby power dissipation
■ Protection against loss of ground and loss of
V
CC
■
Reverse battery protection
In compliance with the 2002/95/EC european
■
(a)
directive
a. See Application schematic on page 16
Table 1. Device summary
PowerSSO-24
Description
The VND830AEP-E is a monolithic device made
using| STMicroelectronics VIPower™ M0-3
Technology. The VND830AEP-E is intended for
driving any type of multiple load with one side
connected to ground.
The Active V
device against low energy spikes (see ISO7637
transient compatibility table).
This device has two channels in high side
configuration; each channel has an analog sense
output on which the sensing current is
proportional (according to a known ratio) to the
corresponding load current. Built-in thermal
shutdown and outputs current limitation protect
the chip from over temperature and short circuit.
The device automatically turns off in the case
where the ground pin becomes disconnected.
pin voltage clamp protects the
CC
Package
Order codes
Tube Tape and reel
PowerSSO-24 VND830AEP-E VND830AEPTR-E
July 2009 Doc ID 11038 Rev 3 1/26
www.st.com
1
Page 2
Contents VND830AEP-E
Contents
1 Block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2 Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
2.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
2.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
2.3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.4 Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
3 Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
3.1 GND protection network against reverse battery . . . . . . . . . . . . . . . . . . . 16
3.1.1 Solution 1: a resistor in the ground line (RGND only) . . . . . . . . . . . . . . 16
3.1.2 Solution 2: a diode (D
3.2 Load dump protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
) in the ground line . . . . . . . . . . . . . . . . . . . . 17
GND
3.3 MCU I/O protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
3.4 Maximum demagnetization energy (V
= 13.5V) . . . . . . . . . . . . . . . . . . 18
CC
4 Package and PC board thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
4.1 PowerSSO-24 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
5 Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
5.1 ECOPACK® packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
5.2 PowerSSO-24 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
5.3 Packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
6 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
2/26 Doc ID 11038 Rev 3
Page 3
VND830AEP-E List of tables
List of tables
Table 1. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Table 2. Suggested connections for unused and not connected pins . . . . . . . . . . . . . . . . . . . . . . . . 5
Table 3. Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Table 4. Thermal data (per island) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Table 5. Power output. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Table 6. Protections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Table 7. V
Table 8. Switching (V
Table 9. Logic inputs. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Table 10. Current sense . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Table 11. Truth table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Table 12. Electrical transient requirements (part 1/3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Table 13. Electrical transient requirements (part 2/3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Table 14. Electrical transient requirements (part 3/3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Table 15. Thermal parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Table 16. PowerSSO-24 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Table 17. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
- output diode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
CC
= 13V; Tj = 25°C) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
CC
Doc ID 11038 Rev 3 3/26
Page 4
List of figures VND830AEP-E
List of figures
Figure 1. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Figure 2. Configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Figure 3. Current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Figure 4. IOUT/ISENSE versus IOUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Figure 5. Switching characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Figure 6. Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 7. Off-state output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 8. High level input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 9. Input clamp voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 10. Turn-on voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 11. Overvoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 12. Turn-off voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 13. ILIM vs Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 14. On-state resistance vs VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 15. Input high level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 16. Input hysteresis voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 17. On-state resistance vs Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 18. Input low level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 19. Application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 20. Maximum turn-off current versus load inductance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 21. PowerSSO-24 PC board. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 22. Rthj-amb vs PCB copper area in open box free air condition (one channel ON) . . . . . . . . 19
Figure 23. PowerSSO-24 thermal impedance junction ambient single pulse (one channel ON). . . . . 20
Figure 24. Thermal fitting model of a double channel HSD in PowerSSO-24 . . . . . . . . . . . . . . . . . . . 20
Figure 25. PowerSSO-24 package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Figure 26. PowerSSO-24 tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Figure 27. PowerSSO-24 tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
4/26 Doc ID 11038 Rev 3
Page 5
VND830AEP-E Block diagram and pin description
1 Block diagram and pin description
Figure 1. Block diagram
V
CC
OVERVOLTAGE
V
CLAMP
CC
UNDERVOLTAGE
DRIVER 1
INPUT 1
LOGIC
INPUT 2
GND
Ot1
DRIVER 2
OVERTEMP. 1
OVERTEMP. 2
Ot2
Figure 2. Configuration diagram (top view)
V
CC
GND
NC
INPUT2
NC
INPUT1
NC
C.SENSE1
NC
C.SENSE2
NC
V
CC
PwCLAMP 1
I
V
I
OUT1
PwCLAMP 2
I
V
I
OUT2
LIM1
dslim1
K
LIM2
dslim2
K
OUTPUT2
OUTPUT2
OUTPUT2
OUTPUT2
OUTPUT2
OUTPUT2
OUTPUT1
OUTPUT1
OUTPUT1
OUTPUT1
OUTPUT1
OUTPUT1
OUTPUT 1
Ot1
CURRENT
SENSE 1
OUTPUT 2
Ot2
CURRENT
SENSE 2
TAB = V
Table 2. Suggested connections for unused and not connected pins
Connection / pin Current sense N.C. Output Input
Floating X X X
To ground
Through 1KΩ
resistor
X
CC
Through 10KΩ
resistor
Doc ID 11038 Rev 3 5/26
Page 6
Electrical specifications VND830AEP-E
2 Electrical specifications
2.1 Absolute maximum ratings
Stressing the device above the rating listed in the “Absolute maximum ratings” table may
cause permanent damage to the device. These are stress ratings only and operation of the
device at these or any other conditions above those indicated in the Operating sections of
this specification is not implied. Exposure to Absolute Maximum Rating conditions for
extended periods may affect device reliability. Refer also to the STMicroelectronics SURE
Program and other relevant quality document.
Table 3. Absolute maximum ratings
Symbol Parameter Value Unit
V
CC
- V
- I
GND
I
OUT
I
I
IN
V
CSENSE
V
ESD
E
MAX
P
T
T
T
stg
DC supply voltage 41 V
Reverse DC supply voltage - 0.3 V
CC
DC reverse ground pin current - 200 mA
DC output current Internally limited A
Reverse DC output current - 6 A
R
DC input current +/- 10 mA
Current sense maximum voltage
- 3
15
Electrostatic discharge (human body model:R=1.5KΩ; C=100pF)
– Input
– Current sense
– Output
–V
CC
Maximum switching energy
(L = 2.2mH; R
Power dissipation (per island) at T
tot
Junction operating temperature Internally limited °C
j
Case operating temperature - 40 to 150 °C
c
= 0Ω; V
L
= 13.5V; T
bat
= 150°C; IL = 10A)
jstart
= 25°C 8.3 W
lead
4000
2000
5000
5000
153 mJ
Storage temperature - 55 to 150 °C
V
V
V
V
V
V
2.2 Thermal data
Table 4. Thermal data (per island)
Symbol Parameter Max. value Unit
R
thj-case
R
thj-amb
1. When mounted on a standard single-sided FR-4 board with 0.5cm2 of Cu (at least 35 µm thick) connected
to all Vcc pins. Horizontal mounting and no artificial air flow.
6/26 Doc ID 11038 Rev 3
Thermal resistance junction-case 1.7 °C/W
Thermal resistance junction-ambient (one chip ON) 55
(1)
°C/W
Page 7
VND830AEP-E Electrical specifications
2.3 Electrical characteristics
Note: V
Values specified in this section are for 8V < V
< 36V; -40°C < Tj < 150°C, unless
CC
otherwise stated.
Figure 3. Current and voltage conventions
I
S
V
CC
I
IN1
V
IN1
I
IN2
V
IN2
= V
Fn
Table 5. Power output
CCn
- V
during reverse battery condition.
OUTn
INPUT1
CURRENT SENSE 1
INPUT2
CURRENT SENSE 2
OUTPUT1
OUTPUT2
GROUND
I
GND
Symbol Parameter Test conditions Min. Typ. Max. Unit
I
OUT1
I
SENSE1
I
OUT2
I
SENSE2
V
SENSE2
V
V
F1
V
OUT2
(*)
SENSE1
V
OUT1
V
CC
V
V
V
R
V
CLAMP
I
L(off1)
I
L(off3)
I
L(off4)
Operating supply voltage 5.5 13 36 V
CC
Undervoltage shutdown 3 4 5.5 V
USD
Overvoltage shutdown 36 V
OV
I
= 2A; Tj = 25°C
On-state resistance
ON
Clamp voltage I
Supply current
I
S
Off-state output current
Off-state output current
Off-state output current
OUT
= 2A; Tj = 125°C
I
OUT
= 20mA 41 48 55 V
CC
Off-state; V
= V
V
IN
Off-state; V
= V
V
IN
On-state; V
= 0A; R
I
OUT
V
= V
IN
= 125°C
T
j
V
= V
IN
= 125°C
T
j
V
= V
IN
= 25°C
T
j
= 13V;
CC
= 0V
OUT
= 13V;
CC
= 0V; Tj = 25°C
OUT
= 13V; V
CC
SENSE
= 0V; V
OUT
= 0V; V
OUT
= 0V; V
OUT
IN
= 3.9KΩ
= 36V;
CC
= 13V;
CC
= 13V;
CC
= 5V;
050µA
60
120mΩmΩ
121240
25
µA
µA
mA
7
5µA
3µA
Doc ID 11038 Rev 3 7/26
Page 8
Electrical specifications VND830AEP-E
Table 6. Protections
Symbol Parameter Test conditions Min. Typ. Max. Unit
V
I
lim
T
TSD
T
T
hyst
V
demag
= 13V
Current limitation
CC
5.5V < V
CC
< 36V
Shutdown temperature 150 175 200 °C
Reset temperature 135 °C
R
Thermal hysteresis 7 15 °C
I
Turn-off output clamp voltage
= 2A; V
OUT
L = 6mH
IN
= 0V;
6101515A
-41V
V
CC
CC
-48V
CC
55
A
V
V
Output voltage drop limitation I
ON
= 10mA 50 mV
OUT
Note: To ensure long term reliability under heavy overload or short circuit conditions, protection
and related diagnostic signals must be used together with a proper software strategy. If the
device is subjected to abnormal conditions, this software must limit the duration and number
of activation cycles.
Table 7 . VCC - output diode
Symbol Parameter Test conditions Min. Typ. Max. Unit
V
F
Table 8. Switching (V
Symbol Parameter Test conditions Min. Typ. Max. Unit
t
d(on)
t
d(off)
/dt
dV
OUT
dV
/dt
OUT
Forward on voltage - I
Turn-on delay time
Turn-off delay time
Turn-on voltage slope
(on)
Turn-off voltage slope
(off)
OUT
= 13V; Tj = 25°C)
CC
RL = 6.5Ω from VIN rising
edge to V
Figure 5)
= 6.5Ω from VIN falling
R
L
edge to V
(see Figure 5)
= 6.5Ω from V
R
L
V
OUT
= 6.5Ω from V
R
L
to V
OUT
= 1.3A; Tj = 150°C 0.6 V
= 1.3V (see
OUT
= 11.7V
OUT
= 1.3V to
OUT
= 10.4V (see Figure 5)
= 11.7V
OUT
= 1.3V (see Figure 5)
30 µs
30 µs
See
Figure 10
See
Figure 12
V/µs
V/µs
Table 9. Logic inputs
Symbol Parameter Test conditions Min. Typ. Max. Unit
V
I
V
I
Input low level 1.25 V
IL
Low level input current V
IL
Input high level 3.25 V
IH
High level input current V
IH
8/26 Doc ID 11038 Rev 3
= 1.25V 1 µA
IN
= 3.25V 10 µA
IN
Page 9
VND830AEP-E Electrical specifications
Table 9. Logic inputs (continued)
Symbol Parameter Test conditions Min. Typ. Max. Unit
V
I(hyst)
V
Table 10. Current sense
Input hysteresis voltage 0.5 V
I
Input clamp voltage
ICL
IN
I
IN
= 1mA
= -1mA
66.8
- 0.7
8V
Symbol Parameter Test conditions Min. Typ. Max. Unit
I
or I
OUT1
V
SENSE
0
I
OUT/ISENSE
K
open; T
I
or I
K
1
I
OUT/ISENSE
OUT1
V
SENSE
= 0.05A;
OUT2
= 0.5V; other channels
= -40°C...150°C
j
= 0.25A;
OUT2
= 0.5V; other channels
600 1300 2000
1000 1400 1900
open; Tj = -40°C...150°C
dK
dK
1/K1
K
2
2/K2
Current sense ratio drift
I
OUT/ISENSE
Current sense ratio drift
or I
I
OUT1
V
SENSE
open; T
I
or I
OUT1
V
SENSE
open; T
Tj = 25°C...150°C
or I
I
OUT1
V
SENSE
= 0.25A;
OUT2
= 0.5V; other channels
= -40°C...150°C
j
= 1.6A;
OUT2
= 4V; other channels
= -40°C
j
= 1.6A;
OUT2
= 4V; other channels
-10 +10 %
1280
1500
1800
1300
1500
1780
-6 +6 %
open; Tj = -40°C...150°C
V
I
dK
K
3
3/K3
I
OUT/ISENSE
Current sense ratio drift
or I
OUT1
V
SENSE
open; Tj = -40°C
= 25°C...150°C
T
j
I
or I
OUT1
V
SENSE
= 2.5A;
OUT2
= 4V; other channels
= 2.5A;
OUT2
= 4V; other channels
1280
1500
1680
1340
1500
1600
-6 +6 %
open; Tj = -40°C...150°C
= 0V; I
V
IN
= -40°C...150°C
I
SENSE
V
SENSE
V
SENSEH
Analog sense leakage
current
Max. analog sense
output voltage
Sense voltage in over
temperature conditions
T
j
= 5V; I
V
IN
= -40°C...150°C
T
j
= 5.5V; I
V
CC
R
SENSE
V
> 8V, I
CC
R
SENSE
= 13V; R
V
CC
OUT
OUT
OUT1,2
= 10kΩ
OUT1,2
= 10kΩ
SENSE
= 0A; V
SENSE
= 0V;
0
= 0A; V
SENSE
= 0V;
0
= 1.3A;
2
= 2.5A;
4
= 3.9kΩ 5.5 V
510µA
µA
V
V
Doc ID 11038 Rev 3 9/26
Page 10
Electrical specifications VND830AEP-E
Table 10. Current sense (continued)
Symbol Parameter Test conditions Min. Typ. Max. Unit
R
VSENSEH
t
DSENSE
Analog sense output
impedance in over
temperature condition
Current sense delay
response
V
= 13V; Tj > T
CC
All channels open
To 9 0 % I
SENSE
1. Current sense signal delay after positive input slope.
Figure 4. I
OUT/ISENSE
versus I
OUT
Iout/Isense
2250
2000
1750
max Tj=25...150ºC
1500
min Tj=25...150ºC
1250
1000
(1)
TSD
;
400 Ω
500 µs
max Tj= -40ºC
typical value
min Tj= -40ºC
750
500
0 0.5 1 1.5 2 2.5 3
Iout (A)
10/26 Doc ID 11038 Rev 3
Page 11
VND830AEP-E Electrical specifications
Figure 5. Switching characteristics
V
OUT
dV
/dt
OUT
(on)
I
SENSE
INPUT
Table 11. Truth table
t
d(on)
t
80%
t
90%
DSENSE
90%
dV
/dt
OUT
(off)
r
10%
t
f
t
t
t
d(off)
t
Conditions Input Output Sense
Normal operation
Overtemperature
Undervoltage
Overvoltage
L
H
L
H
L
H
L
H
L
Short circuit to GND
H
H
Short circuit to V
CC
L
H
L
H
L
L
L
L
L
L
L
L
L
H
H
0
Nominal
0
V
SENSEH
0
0
0
0
0
< T
(T
J
> T
(T
J
0
< Nominal
TSD
TSD
) 0
) 0
Negative output voltage clamp L L 0
Doc ID 11038 Rev 3 11/26
Page 12
Electrical specifications VND830AEP-E
Table 12. Electrical transient requirements (part 1/3)
ISO T/R
Test l evel
7637/1
Test p ulse
I II III IV Delays and impedance
1 - 25V - 50V - 75V - 100V 2ms, 10Ω
2 + 25V + 50V + 75V + 100V 0.2ms, 10Ω
3a - 25V - 50V - 100V - 150V 0.1µs, 50Ω
3b + 25V + 50V + 75V + 100V 0.1µs, 50Ω
4 - 4V - 5V - 6V - 7V 100ms, 0.01Ω
5 + 26.5V + 46.5V + 66.5V + 86.5V 400ms, 2Ω
Table 13. Electrical transient requirements (part 2/3)
ISO T/R
Test level
7637/1
Test p ulse
IIIIIIIV
1C C C C
2C C C C
3a C C C C
3b C C C C
4C C C C
5C E E E
Table 14. Electrical transient requirements (part 3/3)
Class Contents
C
E
All functions of the device are performed as designed after exposure to
disturbance.
One or more functions of the device is not performed as designed after exposure
and cannot be returned to proper operation without replacing the device.
12/26 Doc ID 11038 Rev 3
Page 13
VND830AEP-E Electrical specifications
Figure 6. Waveforms
NORMAL OPERATION
INPUT
n
LOAD CURRENT
SENSE
n
V
CC
INPUT
n
LOAD CURRENT
SENSE
n
V
CC
INPUT
n
LOAD CURRENT
SENSE
n
n
UNDERVOLTAGE
V
USDhyst
V
USD
n
OVERVOLTAGE
V
OV
VCC < V
OV
n
VCC > V
OV
SHORT TO GROUND
INPUT
n
LOAD CURRENT
LOAD VOLTAGE
SENSE
n
INPUT
n
LOAD VOLTAGE
LOAD CURRENT
SENSE
n
T
j
INPUT
n
LOAD CURRENT
SENSE
n
n
n
SHORT TO V
CC
n
n
<Nominal
T
TSD
T
R
OVERTEMPERATURE
n
<Nominal
I
SENSE
=
V
SENSEH
R
SENSE
Doc ID 11038 Rev 3 13/26
Page 14
Electrical specifications VND830AEP-E
2.4 Electrical characteristics curves
Figure 7. Off-state output current Figure 8. High level input current
Figure 9. Input clamp voltage Figure 10. Turn-on voltage slope
IL(off1) (uA)
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
-50 -25 0 25 50 75 100 125 150 175
Off state
Vcc=13V
Vin=Vout=0V
Tc ( ºC )
Vicl (V)
8
7.8
7.6
7.4
7.2
6.8
6.6
6.4
6.2
Iin=1mA
7
6
-50 -25 0 25 50 7 5 100 125 150 175
Tc ( ºC )
Iih (uA)
5
4.5
3.5
2.5
1.5
Vin=3.25V
4
3
2
1
-50 -25 0 25 50 7 5 100 125 150 175
Tc ( ºC )
dVout/dt(on)
900
800
700
600
500
400
300
200
100
Vcc=13V
RI=6.5Ohm
-50 -25 0 25 50 75 100 125 150 175
Tc ( °C )
Figure 11. Overvoltage shutdown Figure 12. Turn-off voltage slope
Vov (V)
50
47.5
45
42.5
40
37.5
35
32.5
30
-50 -25 0 25 50 75 100 125 150 175
dVout/dt(off) (V/ms)
500
450
400
350
300
250
200
150
100
Vcc=13V
Rl=6.5Ohm
50
0
-50 -25 0 25 50 75 100 125 150 175
Tc ( ºC )
14/26 Doc ID 11038 Rev 3
Tc (º C)
Page 15
VND830AEP-E Electrical specifications
Figure 13. I
Ilim (A)
20
17.5
15
12.5
10
7.5
5
2.5
0
-50 -25 0 25 50 75 100 125 150 175
Figure 15. Input high level Figure 16. Input hysteresis voltage
Vih (V)
3.6
3.4
3.2
3
2.8
2.6
2.4
2.2
2
-50 -25 0 25 50 7 5 100 125 150 175
LIM
Vcc=13V
Vcc=13V
vs T
case
Tc (° C)
Tc ( ºC )
Figure 14. On-state resistance vs V
Ron (mOhm)
100
90
80
70
60
50
40
30
20
Iout=5A
5 10152025303540
Tc= 150 ºC
Tc= 25º C
Tc= -4 0ºC
Vcc (V)
Vhyst (V)
1.5
1.4
1.3
1.2
1.1
0.9
0.8
0.7
0.6
0.5
Vcc=13V
1
-50 -25 0 25 50 75 100 125 150 175
Tc ( ºC )
CC
Figure 17. On-state resistance vs Tcase Figure 18. Input low level
Ron (mOhm)
100
90
80
70
60
50
40
30
20
10
0
-50 -25 0 25 50 75 100 125 150 175
Iout=5A
Vcc=8V & 36V
Tc (º C)
Vil (V)
2.6
2.4
2.2
1.8
1.6
1.4
1.2
Vcc=13V
2
1
-50 -25 0 25 50 75 100 125 150 175
Doc ID 11038 Rev 3 15/26
Tc (° C)
Page 16
Application information VND830AEP-E
3 Application information
Figure 19. Application schematic
+5V
R
prot
R
μ
C
prot
R
prot
INPUT1
CURRENT SENSE1
INPUT2
V
CC
D
ld
OUTPUT1
R
SENSE1
R
prot
CURRENT SENSE2
R
SENSE2
GND
R
GND
GND
V
OUTPUT2
D
GND
3.1 GND protection network against reverse battery
This section provides two solutions for implementing a ground protection network against
reverse battery.
3.1.1 Solution 1: a resistor in the ground line (R
This can be used with any type of load.
The following show how to dimension the R
1. R
2. R
where - I
≤ 600mV / 2 (I
GND
≥ ( - VCC) / (- I
GND
is the DC reverse ground pin current and can be found in the absolute
GND
S(on)max
GND
)
)
maximum rating section of the device datasheet.
GND
resistor:
GND
only)
Power dissipation in R
P
= (- VCC)2/ R
D
GND
GND
(when V
CC
This resistor can be shared amongst several different HSDs. Please note that the value of
this resistor should be calculated with formula (1) where I
maximum on-state currents of the different devices.
Please note that, if the microprocessor ground is not shared by the device ground, then the
R
will produce a shift (I
GND
S(on)max
* R
values. This shift will vary depending on how many devices are ON in the case of several
high side drivers sharing the same R
16/26 Doc ID 11038 Rev 3
< 0 during reverse battery situations) is:
S(on)max
) in the input thresholds and the status output
GND
.
GND
becomes the sum of the
Page 17
VND830AEP-E Application information
If the calculated power dissipation requires the use of a large resistor, or several devices
have to share the same resistor, then ST suggests using solution 2 below.
3.1.2 Solution 2: a diode (D
A resistor (R
= 1kΩ) should be inserted in parallel to D
GND
) in the ground line
GND
inductive load. This small signal diode can be safely shared amongst several different HSD.
Also in this case, the presence of the ground network will produce a shift (j600mV) in the
input threshold and the status output values if the microprocessor ground is not common
with the device ground. This shift will not vary if more than one HSD shares the same
diode/resistor network. Series resistor in INPUT and STATUS lines are also required to
prevent that, during battery voltage transient, the current exceeds the Absolute Maximum
Rating. Safest configuration for unused INPUT and STATUS pin is to leave them
unconnected.
3.2 Load dump protection
Dld is necessary (voltage transient suppressor) if the load dump peak voltage exceeds the
V
maximum DC rating. The same applies if the device is subject to transients on the VCC
CC
line that are greater than those shown in the ISO T/R 7637/1 table.
3.3 MCU I/O protection
If a ground protection network is used and negative transients are present on the VCC line,
the control pins will be pulled negative. ST suggests to insert a resistor (R
prevent the µC I/O pins from latching up.
if the device will be driving an
GND
) in line to
prot
The value of these resistors is a compromise between the leakage current of µC and the
current required by the HSD I/Os (Input levels compatibility) with the latch-up limit of µC
I/Os:
- V
CCpeak
/ I
latchup
≤ R
prot
≤ (V
OHμC
- V
IH
- V
GND
) / I
IHmax
Example
For the following conditions:
V
I
latchup
V
OHμC
5kΩ ≤ R
Recommended values are:
R
CCpeak
≥ 20mA
≥ 4.5V
= 10kΩ
prot
= - 100V
≤ 65kΩ.
prot
Doc ID 11038 Rev 3 17/26
Page 18
Application information VND830AEP-E
3.4 Maximum demagnetization energy (V
Figure 20. Maximum turn-off current versus load inductance
LMAX (A)
I
100
A
10
1
0.1 1 10
L(mH)
= 13.5V)
CC
B
C
A = single pulse at T
B= repetitive pulse at T
C= repetitive pulse at T
VIN, I
L
Note: Values are generated with R
In case of repetitive pulses, T
must not exceed the temperature specified above for curves B and C.
= 150ºC
Jstart
= 100ºC
Jstart
= 125ºC
Jstart
Demagnetization
= 0Ω.
L
(at beginning of each demagnetization) of every pulse
jstart
Demagnetization
Demagnetization
t
18/26 Doc ID 11038 Rev 3
Page 19
VND830AEP-E Package and PC board thermal data
4 Package and PC board thermal data
4.1 PowerSSO-24 thermal data
Figure 21. PowerSSO-24 PC board
Note: Layout condition of R
thickness=2 mm, Cu thickness=70 mm (front and back side), Copper areas: from minimum
pad lay-out to 8 cm
Figure 22.
RTHj_a mb(°C/W )
60
55
50
45
40
0123456789
R
thj-amb
2
and Zth measurements (PCB FR4 area= 78 mm x 78 mm, PCB
th
).
vs PCB copper area in open box free air condition (one channel ON)
PCB Cu he atsink area (cm^2)
Doc ID 11038 Rev 3 19/26
Page 20
Package and PC board thermal data VND830AEP-E
Figure 23. PowerSSO-24 thermal impedance junction ambient single pulse (one
channel ON)
ZTH (°C/W)
100
Footprint
2
8 cm
10
1
0.1
0.0001 0.001 0.01 0.1 1 10 100 1000
Time (s)
Figure 24. Thermal fitting model of a double channel HSD in PowerSSO-24
(b)
Equation 1: pulse calculation formula:
Z
THδ
where δ = t
b. The fitting model is a simplified thermal tool and is valid for transient evolutions where the embedded
RTHδ Z
/T
P
THtp
1 δ–()+⋅=
protections (power limitation or thermal cycling during thermal shutdown) are not triggered.
20/26 Doc ID 11038 Rev 3
Page 21
VND830AEP-E Package and PC board thermal data
Table 15. Thermal parameters
Area/island (cm2)Footprint8
R1 = R7 (°C/W) 0.1
R2 = R8 (°C/W) 0.9
R3 (°C/W) 1
R4 (°C/W) 4
R5 (°C/W) 13.5
R6 (°C/W) 37 22
C1 = C7 (W.s/°C) 0.0006
C2 = C8 (W.s/°C) 0.0025
C3 (W.s/°C) 0.025
C4 (W.s/°C) 0.08
C5 (W.s/°C) 0.7
C6 (W.s/°C) 3 5
Doc ID 11038 Rev 3 21/26
Page 22
Package and packing information VND830AEP-E
5 Package and packing information
5.1 ECOPACK® packages
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK
®
packages, depending on their level of environmental compliance. ECOPACK®
specifications, grade definitions and product status are available at: www.st.com
ECOPACK
®
is an ST trademark.
5.2 PowerSSO-24 mechanical data
Figure 25. PowerSSO-24 package dimensions
.
22/26 Doc ID 11038 Rev 3
Page 23
VND830AEP-E Package and packing information
Table 16. PowerSSO-24 mechanical data
Symbol
Min. Typ. Max.
A 2.45
A2 2.15 2.35
a1 0 0.10
b0.33 0.51
c0.23 0.32
(3)
D
(3)
E
10.10 10.50
7.40 7.60
e0.8
e3 8.8
F2.3
G 0.1
G1 0.06
H 10.1 10.5
h 0.4
(1) (2)
Millimeters
k0° 8°
L0.55 0.85
O1.2
Q0.8
S2.9
T3.65
U1
N 10º
X4.1 4.7
5.5
7.1
(4)
Y
6.5
4.9
(4)
1. No intrusion allowed inwards the leads.
2. Flash or bleeds on exposed die pad shall not exceed 0.4 mm per side
3. “D and E” do not include mold flash or protusions. Mold flash or protusions shall not exceed 0.15 mm.
4. Variations for small window leadframe option.
Doc ID 11038 Rev 3 23/26
Page 24
Package and packing information VND830AEP-E
5.3 Packing information
Figure 26. PowerSSO-24 tube shipment (no suffix)
Base Q.ty 49
Bulk Q.ty 1225
C
B
A
Figure 27. PowerSSO-24 tape and reel shipment (suffix “TR”)
Tube length (± 0.5) 532
A 3.5
B 13.8
C (± 0.1) 0.6
All dimensions are in mm.
Reel dimensions
Base Q.ty 1000
Bulk Q.ty 1000
A (max) 330
B (min) 1.5
C (± 0.2) 13
F 20.2
G (+ 2 / -0) 24.4
N (min) 100
T (max) 30.4
Tape dimensions
According to Electronic Industries Association
(EIA) Standard 481 rev. A, Feb 1986
Tape width W 24
Tape Hole Spacing P0 (± 0.1) 4
Component Spacing P 12
Hole Diameter D (± 0.05) 1.55
Hole Diameter D1 (min) 1.5
Hole Position F (± 0.1) 11.5
Compartment Depth K (max) 2.85
Hole Spacing P1 (± 0.1) 2
All dimensions are in mm.
End
Start
Top
cover
tape
500mm min
Empty components pockets
saled with cover tape.
User direction of feed
No componentsNo components Components
500mm min
24/26 Doc ID 11038 Rev 3
Page 25
VND830AEP-E Revision history
6 Revision history
Table 17. Document revision history
Date Revision Changes
04-Feb-2005 1 Initial release.
Document reformatted and restructured.
27-Nov-2008 2
01-Jul-2009 3
Added list of contents, tables and figures.
Added ECOPACK® packages information.
Update PowerSSO-24 mechanical data.
Updated Figure 16: PowerSSO-24 mechanical data:
– Deleted A (min) value
– Changed A (max) value from 2.50 to 2.45
– Changed A2 (max) value from 2.40 to 2.35
– Updated k values
– Changed L (min) value from 0.6 to 0.55
– Changed L (max) value from1 to 0.85
Doc ID 11038 Rev 3 25/26
Page 26
VND830AEP-E
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26/26 Doc ID 11038 Rev 3
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