Datasheet VND5E025AS-E Datasheet (ST)

Features

SO-16L

("1($'5

VND5E025AS-E

Double channel high-side driver with analog current sense

for automotive applications

Datasheet − production data

Max transient supply voltage V

Operating voltage range V

Max on-state resistance (per ch.) R

Current limitation (typ) I

Off-state supply current I

1. Typical value with all loads connected.

■ General

CC

CC

ON

LIMH

S

4.5 to 28 V

– AEC-Q100 qualified
– Inrush current active management by

power limitation
– Very low standby current
– 3.0 V CMOS compatible inputs
– Optimized electromagnetic emissions
– Very low electromagnetic susceptibility
– Compliant with European directive

2002/95/EC
– Very low current sense leakage

■ Diagnostic functions

– Proportional load current sense
– High current sense precision for wide

currents range
– Current sense disable
– Off-state open- load detection
– Output short to V

detection

CC

– Overload and short to ground (power

limitation) indication
– Thermal shutdown indication

■ Protections

– Undervoltage shutdown
– Overvoltage clamp
– Load current limitation
– Self limiting of fast thermal transients
– Protection against loss of ground and loss

of V

CC

41 V

25 mΩ

60 A

(1)

2µA

– Overtemperature shutdown with auto

restart (thermal shutdown)
– Reverse battery protected
– Electrostatic discharge protection

Applications

■ All types of resistive, inductive and capacitive

loads

■ Suitable as LED driver

Description

The VND5E025AS-E is a double channel high­side driver manufactured using ST proprietary
VIPower
SO-16L package. The device is designed to drive
12 V automotive grounded loads, and to provide
protection and diagnostics. It also implements a
3 V and 5 V CMOS-compatible interface for the
use with any microcontroller.

The device integrates advanced protective
functions such as load current limitation, inrush
and overload active management by power
limitation, overtemperature shut-off with auto­restart and overvoltage active clamp. A dedicated
analog current sense pin is associated with every
output channel providing enhanced diagnostic
functions including fast detection of overload and
short-circuit to ground through power limitation
indication, overtemperature indication, short­circuit to V
open-load detection. The current sensing and
diagnostic feedback of the whole device can be
disabled by pulling the CS_DIS pin high to share
the external sense resistor with similar devices.

®

M0-5 technology and housed in

diagnosis and on-state and off-state

CC

June 2012 Doc ID 022490 Rev 4 1/37

This is information on a product in full production.

www.st.com

1

Contents VND5E025AS-E

Contents

1 Block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

2 Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

2.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

2.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

2.3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

2.4 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

2.5 Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

3 Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

3.1 GND protection network against reverse battery . . . . . . . . . . . . . . . . . . . 24

3.1.1 Solution 1: resistor in the ground line (RGND only) . . . . . . . . . . . . . . . . 24

3.1.2 Solution 2: diode (DGND) in the ground line . . . . . . . . . . . . . . . . . . . . . 25

3.2 Load dump protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

3.3 MCU I/Os protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

3.4 Current sense and diagnostic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

3.4.1 Short to VCC and off-state open-load detection . . . . . . . . . . . . . . . . . . . 27

3.5 Maximum demagnetization energy (VCC= 13.5 V) . . . . . . . . . . . . . . . . . 28

4 Package and thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

4.1 SO-16L thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

5 Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

5.1 ECOPACK® packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

5.2 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

5.3 Packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34

6 Order codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35

7 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36

2/37 Doc ID 022490 Rev 4

VND5E025AS-E List of tables

List of tables

Table 1. Pin functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

Table 2. Suggested connections for unused and not connected pins . . . . . . . . . . . . . . . . . . . . . . . . 6

Table 3. Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

Table 4. Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

Table 5. Power section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

Table 6. Switching (V

Table 7. Logic inputs. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

Table 8. Protections and diagnostics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

Table 9. Current sense (8 V < V
Table 10. Open-load detection (8 V < V

Table 11. Truth table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

Table 12. Electrical transient requirements (part 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

Table 13. Electrical transient requirements (part 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

Table 14. Electrical transient requirements (part 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

Table 15. Thermal parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31

Table 16. SO-16L mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33

Table 17. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35

Table 18. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36

=13V; Tj= 25°C) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

CC

< 18 V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

CC

< 18 V). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

CC

Doc ID 022490 Rev 4 3/37

List of figures VND5E025AS-E

List of figures

Figure 1. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

Figure 2. Configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

Figure 3. Current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

Figure 4. Current sense delay characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

Figure 5. Open-load off-state delay timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

Figure 6. Switching characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Figure 7. Delay response time between rising edge of output current and rising edge of current

sense (CS enabled) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Figure 8. Output voltage drop limitation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Figure 9. I

OUT/ISENSE

Figure 10. Maximum current sense ratio drift vs load current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Figure 11. Normal operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

Figure 12. Overload or short to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

Figure 13. Intermittent overload . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

Figure 14. Off-state open-load with external circuitry . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

Figure 15. Short to V
Figure 16. T

evolution in overload or short to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

J

Figure 17. Off-state output current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

Figure 18. High level input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

Figure 19. Input clamp voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

Figure 20. Input high level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

Figure 21. Input low level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

Figure 22. Input hysteresis voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

Figure 23. On-state resistance vs Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

Figure 24. On-state resistance vs VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

Figure 25. Undervoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

Figure 26. ILIMH vs Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

Figure 27. Turn-on voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

Figure 28. Turn-off voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

Figure 29. CS_DIS high level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

Figure 30. CS_DIS low level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

Figure 31. CS_DIS clamp voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

Figure 32. Application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

Figure 33. Current sense and diagnostic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

Figure 34. Maximum turn-off current versus inductance (for each channel) . . . . . . . . . . . . . . . . . . . . 28

Figure 35. SO-16L PC board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

Figure 36. Rthj-amb vs PCB copper area in open box free air condition (one channel on) . . . . . . . . . 29

Figure 37. SO-16L thermal impedance junction to ambient single pulse (one channel on). . . . . . . . . 30

Figure 38. Thermal fitting model of a double channel HSD in SO-16L

Figure 39. SO-16L package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

Figure 40. SO-16L tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34

Figure 41. SO-16L tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34

vs I

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

CC

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

OUT

(1)

. . . . . . . . . . . . . . . . . . . . . . 30

4/37 Doc ID 022490 Rev 4

VND5E025AS-E Block diagram and pin description

V

CC

CH 1

Control & Diagnostic 1

LOGIC

DRIVER

V

ON

Limitation

Current

Limitation

Power
Clamp

OFF State
Open load

Over

temp.

Undervoltage

V

SENSEH

Current

Sense

CH 2

OVERLOAD PROTECTION

(ACTIVE POWER LIMITATION)

IN1

IN2

CS1

CS2

CS_
DIS

GND

OUT2

OUT1

Signal Clamp

CONTROL & DIAGNOSTIC

Channels 2

1 Block diagram and pin description

Figure 1. Block diagram

Table 1. Pin functions

OUTPUT

INPUT

CURRENT SENSE

CS_DIS Active high CMOS compatible pin to disable the current sense pin.

Name Function

V

CC

GND

1,2

1,2

Battery connection.

Power output.

Ground connection. Must be reverse battery protected by an external
diode / resistor network.

Voltage controlled input pin with hysteresis, CMOS compatible. It controls
output switch state.

Analog current sense pin; it delivers a current proportional to the load

1,2

current.

Doc ID 022490 Rev 4 5/37

Block diagram and pin description VND5E025AS-E







 9FF9FF

9FF9FF

287387

287387

287387

287387

287387

287387

*1'

,1387

,1387

&6(16(

&6(16(

&6',6

("1($'5

Figure 2. Configuration diagram (top view)

Table 2. Suggested connections for unused and not connected pins

Connection / pin Current sense N.C. Output Input CS_DIS

Floating Not allowed X

To ground

1. X: do not care.

Through 1 kΩ

resistor

(1)

Through 22 kΩ

X

XXX

resistor

Through 10 kΩ

resistor

Through 10 kΩ

resistor

6/37 Doc ID 022490 Rev 4

VND5E025AS-E Electrical specifications

V

Fn

I

S

I

GND

V

CC

V

CC

V

SENSE2

OUTPUT1

I

OUT1

CURRENT

I

SENSE1

INPUT1

I

IN1

V

IN2

V

OUT2

GND

CS_DIS

I

CSD

V

CSD

INPUT2

I

IN2

V

IN1

SENSE1

OUTPUT2

I

OUT2

CURRENT

I

SENSE2

SENSE2

V

SENSE1

V

OUT1

2 Electrical specifications

Figure 3. Current and voltage conventions

Note: V

Fn

= V

- VCC during reverse battery condition.

OUTn

2.1 Absolute maximum ratings

Applying stress which exceeds the rating listed in Table 3: Absolute maximum ratings may

cause permanent damage to the device. These are stress ratings only and operation of the

device at these or any other conditions above those indicated in the Operating sections of

this specification is not implied. Exposure to the conditions in table below for extended

periods may affect device reliability.

Table 3. Absolute maximum ratings

Symbol Parameter Value Unit

V

-V

-I

GND

I

OUT

-I

OUT

I

CSD

-I

CSENSE

V

CSENSE

E

MAX

DC supply voltage 41

CC

Reverse DC supply voltage 0.3

CC

DC reverse ground pin current 200 mA

DC output current Internally limited

Reverse DC output current 24

DC input current

IN

-1 to 10

DC current sense disable input current

DC reverse CS pin current 200

Current sense maximum voltage VCC- 41 to +V

Maximum switching energy (single pulse)
(L = 0.8 mH; RL=0Ω; V

I

OUT

= I

limL

(Typ.))

Doc ID 022490 Rev 4 7/37

= 13.5 V; T

bat

jstart

= 150 °C;

V

A

mAI

V

CC

140 mJ

Electrical specifications VND5E025AS-E

Table 3. Absolute maximum ratings (continued)

Symbol Parameter Value Unit

Electrostatic discharge
(Human Body Model: R = 1.5 kΩ; C = 100 pF)

V

V

ESD

ESD

T

– Input
– Current sense
–CS_DIS
– Output
–V

CC

Charge device model (CDM-AEC-Q100-011) 750 V

T

Junction operating temperature -40 to 150

j

Storage temperature -55 to 150

stg

4000
2000
4000
5000
5000

V
V
V
V
V

°C

2.2 Thermal data

Table 4. Thermal data

Symbol Parameter T yp val ue Unit

R

thj-pcb

R

thj-amb

1. The measure is done in accordance with the JESD 51-8.

Thermal resistance junction-pcb

Thermal resistance junction-ambient See Figure 36 °C/W

(1)

18.5 °C/W

2.3 Electrical characteristics

Values specified in this section are for 8 V < VCC< 28 V; -40°C < Tj< 150°C, unless

otherwise stated.

Table 5. Power section

Symbol Parameter Test conditions Min. Typ. Max. Unit

V

V

USDhyst

R

V

clamp

Operating supply

CC

voltage

Undervoltage shutdown 3.5 4.5

USD

Undervoltage shutdown
hysteresis

I

OUT

On-state resistance

ON

(1)

OUT

I

OUT

Clamp voltage IS= 20 mA 41 46 52 V

Off-state; V
V

I

S

Supply current

IN=VOUT=VSENSE=VCSD

On-state; V
I

OUT

4.5 13 28

0.5

=3A; Tj=25°C 25

=3A; Tj=150°C 50

=3A; VCC=5V; Tj=25°C 35

=0A

=13V; Tj=25°C;

CC

=13V; VIN=5V;

CC

=0V

(2)5(2)

2

36mA

VV

mΩI

µA

8/37 Doc ID 022490 Rev 4

VND5E025AS-E Electrical specifications

Table 5. Power section (continued)

Symbol Parameter Test conditions Min. Typ. Max. Unit

VIN=V

= 25°C

T

I

L(off1)

1. For each channel.

2. PowerMOS leakage included.

Table 6. Switching (VCC=13V; Tj= 25°C)

Off-state output
current

Output - VCC diode

V

F

voltage

(1)

(1)

j

V

IN=VOUT

= 125°C

T

j

-I

OUT

=0V; VCC=13V;

OUT

=0V; VCC=13V;

00.013

05

=4 A; Tj= 150°C 0.7 V

Symbol Parameter Test conditions Min. Typ. Max. Unit

t

d(on)

t

d(off)

(dV

/dt)onTurn-on voltage slope

OUT

/dt)

(dV

OUT

W

ON

W

OFF

Tu r n - o n d e l a y t i m e

Turn-off delay time — 40 —

Turn-off voltage slope — See Figure 28 —

off

Switching energy losses
during t

Switching energy losses
during t

WON

WOFF

R

=4.3 Ω

L

(see Figure 6)

=4.3 Ω

R

L

RL=4.3 Ω
(see Figure 6)

—20—

—See Figure 27 —

—0.6—

—0.35—

µA

µs

V/µs

mJ

Table 7. Logic inputs

Symbol Parameter Test conditions Min. Typ. Max. Unit

V

IL

I

IL

V

IH

I

IH

V

I(hyst)

ICL

V

CSDL

I

CSDL

V

CSDH

I

CSDH

V

CSD(hyst)

V

CSCL

Input low level voltage 0.9 V

Low level input current VIN=0.9V 1 µA

Input high level voltage 2.1 V

High level input current VIN=2.1V 10 µA

Input hysteresis voltage 0.25

I

=1mA 5.5 7

Input clamp voltage

IN

I

=-1mA -0.7

IN

CS_DIS low level voltage 0.9

Low level CS_DIS current V

=0.9V 1 µA

CSD

CS_DIS high level voltage 2.1 V

High level CS_DIS current V

=2.1V 10 µA

CSD

CS_DIS hysteresis voltage 0.25

=1mA 5.5 7

I

CS_DIS clamp voltage

CSD

I

=-1mA -0.7

CSD

VV

V

Doc ID 022490 Rev 4 9/37

Electrical specifications VND5E025AS-E

Table 8. Protections and diagnostics

(1)

Symbol Parameter Test conditions Min. Typ. Max. Unit

= 13 V 43 60 85 A

V

I

LIMH

I

LIML

T

TSD

T

T

RS

T

HYST

V

DEMAG

V

ON

1. To ensure long term reliability under heavy overload or short circuit conditions, protection and related
diagnostic signals must be used together with a proper software strategy. If the device is subjected to
abnormal conditions, this software must limit the duration and number of activation cycles.

T able 9. Current sense (8 V < VCC<18V)

DC short circuit current

Short circuit current
during thermal cycling

Shutdown temperature 150 175 200 °C

Reset temperature TRS+1 TRS+5 °C

R

Thermal reset of STATUS 135 °C

Thermal hysteresis

TSD-TR

)

(T

Turn-Off output voltage
clamp

Output voltage drop
limitation

CC

5V<VCC<28V 85 A

VCC=13V;
T

R<Tj<TTSD

15 A

7°C

I

=2A; VIN=0;

OUT

L=6 mH

=0.1A;

I

OUT

= -40°C to 150°C

T

j

VCC-41 VCC-46 VCC-52 V

25 mV

(see Figure 8)

Symbol Parameter Test conditions Min. Typ. Max. Unit

I

dK

dK

K

LED

K

K

1/K1

K

2/K2

K

= 0.05 A; V

I

OUT/ISENSE

0

1

2

3

I

OUT/ISENSE

I

OUT/ISENSE

(1)

Current sense ratio drift

I

OUT/ISENSE

(1)

Current sense ratio drift

I

OUT/ISENSE

OUT

V

=0V; Tj= -40°C to 150°C

CSD

I

= 0.5 A; V

OUT

=0V; Tj= -40 °C to 150 °C

V

CSD

I

=2 A; V

OUT

V

=0V;

CSD

T

= -40°C to 150°C

j

T

= 25°C to 150°C

j

I

=2 A; V

OUT

=0V;

V

CSD

T

= -40°C to 150°C

j

I

=3 A; V

OUT

=0V;

V

CSD

SENSE

SENSE

SENSE

SENSE

Tj= -40°C to 150°C
T

= 25°C to150°C

j

=3 A; V

I

OUT

V

CSD

= -40°C to 150°C

T

j

I

= 10 A; V

OUT

V

CSD

SENSE

=0V;

SENSE

=0V;
Tj= -40°C to 150°C
Tj= 25°C to 150°C

SENSE

=4 V;

=4 V;

=4V;

=4V;

=0.5V;

=0.5V;

=4V;

1240 3350 5100

1860 3150 4600

2100

3100

4400

2250

3100

3850

-13 13 %

2200

3000

4100

2450

3000

3550

-12 12 %

2550

2850

3280

2650

2850

3180

10/37 Doc ID 022490 Rev 4

VND5E025AS-E Electrical specifications

T able 9. Current sense (8 V < VCC< 18 V) (continued)

Symbol Parameter Test conditions Min. Typ. Max. Unit

dK3/K

I

SENSE

I

OL

V

SENSE

V

SENSEH

I

SENSEH

(1)

Current sense ratio drift

3

Analog sense leakage

0

current

Open-load on-state
current detection
threshold

Max analog sense output
voltage

Analog sense output
voltage in fault
condition

(1)

Analog sense output
current in fault
condition

(2)

= 10 A; V

I

OUT

=0V; Tj= -40°C to 150°C

V

CSD

=0A; V

I

OUT

=5V; VIN=0V;

V

CSD

= -40°C to 150°C

T

j

I

=0A; V

OUT

=0V; VIN=5V;

V

CSD

= -40 °C to 150 °C

T

j

I

=2A; V

OUT

=5V; VIN=5V;

V

CSD

= -40°C to 150°C

T

j

= 5V; 8V<VCC<18V;

V

IN

I

SENSE

=3 A; V

I

OUT

VCC=13V; R

VCC=13V; V

= 5 µA

SENSE

=0V;

SENSE

=0V;

SENSE

=0V;

SENSE

=0V 5 V

CSD

SENSE

SENSE

=4V;

-6 +6 %

01µA

02µA

01µA

530mA

=3.9kΩ 8V

=5V 9 mA

Delay response time

t

DSENSE1H

from falling edge of
CS_DIS pin

Delay response time

t

DSENSE1L

from rising edge of
CS_DIS pin

Delay response time

t

DSENSE2H

from rising edge of
INPUT pin

Delay response time

Δt

DSENSE2H

between rising edge of
output current and rising
edge of current sense

Delay response time

t

DSENSE2L

from falling edge of
INPUT pin

1. Fault condition includes: power limitation, overtemperature and open-load off-state detection.

V
I

SENSE

SENSE

<4V, 0.5<I

= 90% of I

(see Figure 4)

V
I

SENSE

SENSE

<4V, 0.5<I

=10% of I

(see Figure 4)

V
I

SENSE

SENSE

<4V, 0.5<I

= 90% of I

(see Figure 4)

V
I

SENSE

I

OUT

I

OUTMAX

V
I

SENSE

SENSE

=90% of I

=90% of I

SENSE

<4V,

=3A; (see Figure 7)

<4V, 0.5<I

=10% of I

(see Figure 4)

OUT

SENSEMAX

OUT

SENSEMAX

OUT

SENSEMAX

SENSEMAX,

OUTMAX

OUT

SENSEMAX

<10A

<10A

<10A

;

<10A

30 100 µs

520µs

80 300 µs

110 µs

70 250 µs

Doc ID 022490 Rev 4 11/37

Electrical specifications VND5E025AS-E

SENSE CURRENT

INPUT

LOAD CURRENT

CS_DIS

t

DSENSE2H

t

DSENSE2L

t

DSENSE1L

t

DSENSE1H

V

IN

V

CS

t

DSTKON

OUTPUT STUCK TO V

CC

V

OUT

> V

OL

V

SENSEH

Table 10. Open-load detection (8 V < V

Symbol Parameter Test condition Min. Typ. Max. Unit

CC

<18V)

V

t

DSTKON

I

L(off2)r

I

L(off2)f

Open-load off-state

OL

voltage detection threshold

Output short circuit to V
detection delay at turn-off

Off-state output current at

= 4V

V

OUT

Off-state output current at
V

= 2 V

OUT

VIN=0V 2

CC

See Figure 5 180 1200 µs

V

=0V; V

V

V
V

IN

OUT

IN

OUT

=0V; V

SENSE

rising from 0 V to 4 V

SENSE=VSENSEH

falling from VCC to 2 V

Delay response from

td_vol

output rising edge to
V

SENSE

rising edge in

= 4 V; VIN= 0 V;

V

OUT

V

SENSE

= 90 % of V

openload

Figure 4. Current sense delay characteristics

=0V;

SENSEH

See

Figure 5

4V

-120 0 µA

;

-50 90 µA

20 µs

12/37 Doc ID 022490 Rev 4

Figure 5. Open-load off-state delay timing

VND5E025AS-E Electrical specifications

V

OUT

dV

OUT

/dt

(on)

t

r

80%

10%

t

f

dV

OUT

/dt

(off)

t

d(off)

t

d(on)

INPUT

t

t

90%

t

Won

t

Woff

Figure 6. Switching characteristics

Doc ID 022490 Rev 4 13/37

Electrical specifications VND5E025AS-E

V

IN

I

OUT

I

SENSE

I

OUTMAX

I

SENSEMAX

90% I

SENSEMAX

90% I

OUTMAX

Δ

t

DSENSE2H

t

t

t

V

on

I

OUT

VCC-V

OUT

Tj= 150oC

T

j

=25oC

T

j

=-40oC

V

on/Ron(T)

Figure 7. Delay response time between rising edge of output current and rising

edge of current sense (CS enabled)

Figure 8. Output voltage drop limitation

14/37 Doc ID 022490 Rev 4

VND5E025AS-E Electrical specifications

1200

1700

2200

2700

3200

3700

4200

4700

2345678910

I

OUT

(A)

I

out

/ I

sense

max Tj = -40 °C to 150 °C

max Tj = 25 °C to 150 °C

min Tj = 25 °C to 150 °C

min Tj = -40 °C to 150 °C

typical value

-20

-15

-10

-5

0

5

10

15

20

2345678 910

I

OUT

(A)

dk/k(%)

Figure 9. I

OUT/ISENSE

vs I

OUT

Figure 10. Maximum current sense ratio drift vs load current

Note: Parameter guaranteed by design; it is not tested.

Doc ID 022490 Rev 4 15/37

Electrical specifications VND5E025AS-E

Table 11. Truth table

Conditions Input Output Sense (V

Normal operation

L

H

L
H

CSD

0

Nominal

=0V)

(1)

Overtemperature

Undervoltage

Overload

Short circuit to GND
(Power limitation)

Open-load off-state
(with external pull up)

Short circuit to V

CC

(external pull up
disconnected)

Negative output voltage
clamp

1. If the V
and external circuit.

is high, the SENSE output is at a high impedance, its potential depends on leakage currents

CSD

L

H

L

H

H

L
L

L
L

X

0

V

SENSEH

0
0

Nominal

(no power limitation)

H

Cycling

V

SENSEH

(power limitation)

L

H

LHV

L

H

L
L

H
H

0

V

SENSEH

SENSEH

V

SENSEH

< Nominal

LL0

16/37 Doc ID 022490 Rev 4

VND5E025AS-E Electrical specifications

T able 12. Electrical transient requirements (part 1)

ISO 7637-2:

2004(E) T est

pulse

Test levels

(1)

Number of

pulses or

III IV Min. Max.

test times

Burst cycle / pulse

repetition time

Delays and
Impedance

1 -75V -100V 5000 pulses 0.5s 5s 2 ms, 10Ω

2a +37V +50V 5000 pulses 0.2s 5s 50µs, 2Ω

3a -100V -150V 1h 90ms 100ms 0.1µs, 50Ω

3b +75V +100V 1h 90ms 100ms 0.1µs, 50Ω

4 -6V -7V 1 pulse 100ms, 0.01Ω

(2)

5b

1. The above test levels must be considered referred to VCC= 13.5V except for pulse 5b.

2. Valid in case of external load dump clamp: 40V maximum referred to ground.

T able 13. Electrical transient requirements (part 2)

ISO 7637-2:

+65V +87V 1 pulse 400ms, 2Ω

Test level results

2004E

T est puls e

III VI

1C C

2a C C

3a C C

3b C C

4C C

(1)

5b

1. Valid in case of external load dump clamp: 40V maximum referred to ground

T able 14. Electrical transient requirements (part 3)

CC

Class Contents

C All functions of the device performed as designed after exposure to disturbance.

E

One or more functions of the device did not perform as designed after exposure to
disturbance and cannot be returned to proper operation without replacing the device.

Doc ID 022490 Rev 4 17/37

Electrical specifications VND5E025AS-E

I

OUT

V

SENSE

V

CS_DIS

INPUT

Nominal load Nominal load

Normal operation

Power Limitation

I

LimH

>

I

LimL

>

I

OUT

V

SENSE

V

CS_DIS

INPUT

Thermal cycling

Overload or Short to GND

2.4 Waveforms

Figure 11. Normal operation

Figure 12. Overload or short to GND

18/37 Doc ID 022490 Rev 4

VND5E025AS-E Electrical specifications

I

OUT

V

SENSE

V

CS_DIS

INPUT

I

LimH

>

Nominal load

Intermittent Overload

I

LimL

>

Overload

V

SENSEH

>

INPUT

OFF-State Open Load

with external circuitry

V

OL

I

OUT

V

SENSE

V

CS_DIS

V

OUT

V

OUT

> V

OL

t

DSTK(on)

V

SENSEH

>

Figure 13. Intermittent overload

Figure 14. Off-state open-load with external circuitry

Doc ID 022490 Rev 4 19/37

Electrical specifications VND5E025AS-E

t

DSTK(on)

V

OUT

> V

OL

Resistive

Short to V

CC

Hard

Short to V

CC

Short to V

CC

I

OUT

V

CS_DIS

V

OUT

V

OL

t

DSTK(on)

T

TSD

T

R

TJ evolution in

Overload or Short to GND

I

LimH

>

< I

LimL

T

J_START

T

HYST

Power Limitation

Self-limitation of fast thermal transients

INPUT

I

OUT

T

J

Figure 15. Short to V

CC

Figure 16. TJ evolution in overload or short to GND

20/37 Doc ID 022490 Rev 4

VND5E025AS-E Electrical specifications

-50 -25 0 25 50 75 100 125 150 175

Tc (°C)

0

100

200

300

400

500

600

700

800

900

1000

Iloff (nA)

Off State
Vcc=13V

Vin=Vout=0V

-50 -25 0 25 50 75 100 125 150 175

Tc (°C)

0

0,5

1

1,5

2

2,5

3

3,5

4

4,5

5

Iih (µA)

Vin = 2.1V

V

CC = 8 V

-50 -25 0 25 50 75 100 125 150 175

Tc (°C)

5

5,2

5,4

5,6

5,8

6

6,2

6,4

6,6

6,8

7

Vicl (V)

lin=1mA

-50 -25 0 25 50 75 100 125 150 175

Tc (°C)

0

0,5

1

1,5

2

2,5

3

3,5

4

Vih (V)

-50 -25 0 25 50 75 100 125 150 175

Tc (°C)

0

0,2

0,4

0,6

0,8

1

1,2

1,4

1,6

1,8

2

Vil (V)

-50 -25 0 25 50 75 100 125 150 175

Tc (°C)

0

0,1

0,2

0,3

0,4

0,5

0,6

0,7

0,8

0,9

1

Vihyst (V)

2.5 Electrical characteristics curves

Figure 17. Off-state output current Figure 18. High level input current

Figure 19. Input clamp voltage Figure 20. Input high level voltage

Figure 21. Input low level voltage Figure 22. Input hysteresis voltage

Doc ID 022490 Rev 4 21/37

Electrical specifications VND5E025AS-E

-50 -25 0 25 50 75 100 125 150 175

Tc (°C)

0

10

20

30

40

50

60

70

Ron (mOhm)

Iout= 3A

Vcc=13V

0 5 10 15 20 25 30 35 40

Vcc (V)

0

10

20

30

40

50

60

Ron (mOhm)

Tc=-40°C

Tc=25°C

Tc=125°C

Tc=150°C

-50 -25 0 25 50 75 100 125 150 175

Tc (°C)

0

2

4

6

8

10

12

14

16

Vusd (V)

-50 -25 0 25 50 75 100 125 150 175

Tc (°C)

40

45

50

55

60

65

70

Ilimh (A)

Vcc=13V

-50 -25 0 25 50 75 100 125 150 175

Tc (°C)

0

100

200

300

400

500

600

700

(dVout/dt )On ( V/ms)

Vcc=13V

RI=4.3 Ohm

-50 -25 0 25 50 75 100 125 150 175

Tc (°C)

0

100

200

300

400

500

600

(dVout/dt )Off (V/m s)

Vcc=13V

RI= 4.3 Ohm

Figure 23. On-state resistance vs T

case

Figure 24. On-state resistance vs V

Figure 25. Undervoltage shutdown Figure 26. I

LIMH

vs T

CC

case

Figure 27. Turn-on volt age slope Figure 28. Turn-off voltage slope

22/37 Doc ID 022490 Rev 4

VND5E025AS-E Electrical specifications

-50 -25 0 25 50 75 100 125 150 175

Tc (°C)

0

0,5

1

1,5

2

2,5

3

3,5

4

Vcsdh (V)

-50 -25 0 25 50 75 100 125 150 175

Tc (°C)

0

0,5

1

1,5

2

2,5

3

Vcsdl (V)

-50 -25 0 25 50 75 100 125 150 175

Tc (°C)

0

1

2

3

4

5

6

7

8

9

10

Vcsdcl(V)

Icsd = 1 mA

Figure 29. CS_DIS high level voltage Figure 30. CS_DIS low level voltage

Figure 31. CS_DIS clamp voltage

Doc ID 022490 Rev 4 23/37

Application information VND5E025AS-E

V

CC

GND

OUTPUT

D

GND

R

GND

D

ld

Μ

CU

+5V

V

GND

CS_DIS

INPUT

R

prot

R

prot

CURRENT SENSE

R

SENSE

R

prot

C

EXT

3 Application information

Figure 32. Application schematic

1. Channel 2 has the same internal circuit as channel 1.

3.1 GND protection network against reverse battery

This section provides two solutions for implementing a ground protection network against
reverse battery.

3.1.1 Solution 1: resistor in the ground line (R

This can be used with any type of load.

The following is an indication on how to dimension the R

1. R

2. R

where -I
maximum rating section of the device datasheet.

Power dissipation in R

P

= (-VCC)2/R

D

This resistor can be shared amongst several different HSDs. Please note that the value of
this resistor should be calculated with formula (1) where I
maximum on-state currents of the different devices.

Please note that if the microprocessor ground is not shared by the device ground then the
R

GND

values. This shift varies depending on how many devices are On in the case of several high

24/37 Doc ID 022490 Rev 4

side drivers sharing the same R

≤ 600mV / (I

GND

≥ (−VCC) / (-I

GND

is the DC reverse ground pin current and can be found in the absolute

GND

GND

produces a shift (I

S(on)max

GND

GND

S(on)max

)

)

(when VCC<0: during reverse battery situations) is:

* R

GND

) in the input thresholds and the status output

GND

.

GND

only)

resistor.

GND

S(on)max

becomes the sum of the

VND5E025AS-E Application information

If the calculated power dissipation leads to a large resistor or several devices have to share
the same resistor then ST suggests to utilize Solution 2 (see below).

3.1.2 Solution 2: diode (D

A resistor (R

=1kΩ) should be inserted in parallel to D

GND

) in the ground line

GND

inductive load.

This small signal diode can be safely shared amongst several different HSDs. Also in this
case, the presence of the ground network produces a shift (≈600 mV) in the input threshold
and in the status output values if the microprocessor ground is not common to the device
ground. This shift not varies if more than one HSD shares the same diode/resistor network.

3.2 Load dump protection

Dld is necessary (Voltage Transient Suppressor) if the load dump peak voltage exceeds the
V

maximum DC rating. The same applies if the device is subject to transients on the VCC

CC

line that are greater than the ones shown in the ISO 7637-2: 2004(E) table.

3.3 MCU I/Os protection

If a ground protection network is used and negative transient are present on the VCC line,
the control pins are pulled negative. ST suggests to insert a resistor (R
the microcontroller I/O pins from latching-up.

The value of these resistors is a compromise between the leakage current of microcontroller
and the current required by the HSD I/Os (Input levels compatibility) with the latch-up limit of
microcontroller I/Os:

if the device drives an

GND

) in line to prevent

prot

-V

CCpeak/Ilatchup

≤ R

prot

Calculation example:

For V

5kΩ ≤ R

CCpeak

prot

≤ 180kΩ

= - 100V and I

Recommended values: R

≤ (V

OHμC-VIH-VGND

≥ 20mA; V

latchup

=10kΩ, C

prot

EXT

) / I

IHmax

OHµC

=10nF.

≥ 4.5V

Doc ID 022490 Rev 4 25/37

Application information VND5E025AS-E

Main MOSn

41V

OUTn

I

Loff2r

R

SENSE

R

PROT

To uC ADC

R

PD

R

PU

V

PU

Pwr_Lim

V

SENSE

PU_CMD

Overtemperature

OL OFF

+

-

V

OL

CURRENT

SENSEn

I

OUT/KX

I

SENSEH

V

BAT

I

Loff2f

V

SENSEH

Load

INPUTn

V

CC

GND

CS_DIS

3.4 Current sense and diagnostic

The current sense pin performs a double function (see Figure 33: Current sense and

diagnostic):

● Current mirror of the load current in normal operation, delivering a current

proportional to the load current according to a known ratio K

The current I
external resistor R
minimum (see parameter V

can be easily converted to a voltage V

SENSE

. Linearity between I

SENSE

SENSE

in Table 9: Current sense (8 V < VCC<18V)). The

OUT

and V

current sense accuracy depends on the output current (refer to current sense electrical
characteristics Table 9: Current sense (8 V < V

● Diagnostic flag in fault conditions, delivering a fixed voltage V

maximum current I

SENSEH

in case of the following fault conditions (refer to

<18V)).

CC

Table 11: Truth table):

– Power limitation activation

–Overtemperature

– Short to V

in off-state

CC

– Open-load in off-state with additional external components.

A logic level high on the CS_DIS pin sets at the same time all the current sense pins of the
device in a high impedance state, thus disabling the current monitoring and diagnostic
detection. This feature allows multiplexing of the microcontroller analog inputs by sharing of
sense resistance and ADC line among different devices.

.

X

by means of an

SENSE

is ensured up to 5V

SENSE

SENSEH

up to a

Figure 33. Current sense and diagnostic

26/37 Doc ID 022490 Rev 4

VND5E025AS-E Application information

VVIRV

OLfoffLPD

OFFupPull

OUT

2

min)2(

_

=<⋅=

−

VV

RR

IRRVR

V

OL

PDPU

roffLPDPUPUPD

ONupPull

OUT

4

max

)2(

_

=>

+

=

−

3.4.1 Short to VCC and off-state open-load detection

Short to V

A short circuit between V
V

SENSEH

CC

and output is indicated by the relevant current sense pin set to

CC

during the device off-state. Little or no current is delivered by the current sense

during the on-state depending on the nature of the short circuit.

Off-state open-load with exte rnal circuitry

Detection of an open-load in off mode requires an external pull-up resistor (R
the output to a positive supply voltage V

It is preferable that V

is switched off during the module standby mode to avoid an increase

PU

PU

.

) connecting

PU

in overall standby current consumption in normal conditions, that is, when the load is
connected.

An external pull-down resistor (R

) connected between output and GND is mandatory to

PD

avoid misdetection in case of floating outputs in off-state (see Figure 33: Current sense and

diagnostic).

R

must be selected in order to ensure V

PD

OUT < VOLmin

unless pulled up by the external

circuitry:

R

≤ 22 KΩ is recommended.

PD

For proper open-load detection in off-state, the external pull-up resistor must be selected
according to the following formula:

For the values of V

(8 V < V

CC

<18V).

OLmin,VOLmax, IL(off2)r

and I

⋅⋅−⋅

see Table 10: Open-load detection

L(off2)f

Doc ID 022490 Rev 4 27/37

Application information VND5E025AS-E

1

10

100

0,1 1 10 100L (mH)

I (A)

Demagnetization Demagnetization Demagnetization

t

V

IN

, I

L

C:

T

jstart

= 125°C repetitive pulse

A:

T

jstart

= 150°C single pulse

B: T

jstart

= 100°C repetitive pulse

A

B

C

3.5 Maximum demagnetization energy (VCC=13.5V)

Figure 34. Maximum turn-off current versus inductance (for each channel)

1. Values are generated with RL=0 Ω.
In case of repetitive pulses, T
exceed the temperature specified above for curves A and B.

(at the beginning of each demagnetization) of every pulse must not

jstart

28/37 Doc ID 022490 Rev 4

VND5E025AS-E Package and thermal data

("1($'5

57+MDPE



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4 Package and thermal data

4.1 SO-16L thermal data

Figure 35. SO-16L PC board

1. Layout condition of Rth and Zth measurements (PCB: Double Layers, Thermal Vias, FR4 area
77 mm x 86 mm, PCB thickness = 1.6 mm, Cu thickness = 70 µm (front and back side), Copper area from
minimum pad lay- out to 24 cm

2

).

Figure 36. R

thj-amb

on)

vs PCB copper area in open box free air condition (one channel

Doc ID 022490 Rev 4 29/37

Package and thermal data VND5E025AS-E









     

7LPHV

=7+ &:

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&X FP

&X IRRWSULQW

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Z

THδ

R

TH

δ Z

THtp

1 δ–()+⋅=

'!0'2)

Figure 37. SO-16 L thermal impedance junction to ambient single pulse (one channel

on)

Equation 1: pulse calculation formula

where δ = tP/T

Figure 38. Thermal fitting model of a double channel HSD in SO-16L

1. The fitting model is a simplified thermal tool and is valid for transient evolutions where the embedded
protections (power limitation or thermal cycling during thermal shutdown) are not triggered.

(1)

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VND5E025AS-E Package and thermal data

Table 15. Thermal parameters

Area/Island (cm2)Footprint 2 8

R1 (°C/W) 0.28

R2 (°C/W) 1.2

R3 (°C/W) 4

R4 (°C/W) 8 6 6

R5 (°C/W) 14 13 13

R6 (°C/W) 28 20 14.5

R7 (°C/W) 0.28

R8 (°C/W) 1.2

C1 (W.s/°C) 0.001

C2 (W.s/°C) 0.005

C3 (W.s/°C) 0.1

C4 (W.s/°C) 0.5

C5 (W.s/°C) 1 1.5 1.5

C6 (W.s/°C) 3 9 12

C7 (W.s/°C) 0.001

C8 (W.s/°C) 0.005

Doc ID 022490 Rev 4 31/37

Package and packing information VND5E025AS-E

("1($'5

5 Package and packing information

5.1 ECOPACK® packages

In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK
specifications, grade definitions and product status are available at: www.st.com

ECOPACK

®

packages, depending on their level of environmental compliance. ECOPACK®

®

is an ST trademark.

5.2 Package mechanical data

Figure 39. SO-16L package dimensions

.

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VND5E025AS-E Package and packing information

T able 16. SO-16L mechanical data

Millimeters

Symbol

Min Typ Max

A 2.35 2.65

A1 0.10 0.30

B 0.33 0.51

C 0.23 0.32

D 10.10 10.50

E 7.40 7.60

e1.27

H 10.00 10.65

h 0.25 0.75

L 0.40 1.27

k0° 8°

ddd 0.10

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Package and packing information VND5E025AS-E

5.3 Packing information

Figure 40. SO-16L tube shipment (no suffix)

"ASE1TY 

K1T Y 

"UL

#

"

4UBELE NGTH  
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" 
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!

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Figure 41. SO-16L tape and reel shipment (suffix “TR”)

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VND5E025AS-E Order codes

6 Order codes

T a ble 17. Device summary

Order codes

Package

Tube Tape and reel

SO-16L VND5E025AS-E VND5E025ASTR-E

Doc ID 022490 Rev 4 35/37

Revision history VND5E025AS-E

7 Revision history

Table 18. Document revision history

Date Revision Changes

11-Nov-2011 1 Initial release.

19-Dec-2011 2 Updated Figure 2.

13-Mar-2012 3 Added Section 4: Package and thermal data.

19-Jun-2012 4 Updated Table 4: Thermal data

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VND5E025AS-E

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